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Ok. I didn't make 2.4.0 in 2000. Tough. I tried, but we had some
[davej-history.git] / drivers / atm / nicstar.c
blob7e9dc5ee21ac940a43c9e9dd0a8e5c09ae2c0f0b
1 /******************************************************************************
2 *
3 * nicstar.c
4 *
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
6 *
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
13 *
14 * Author: Rui Prior (rprior@inescn.pt)
15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
16 *
17 *
18 * (C) INESC 1999
19 *
20 *
21 ******************************************************************************/
22
23
24 /**** IMPORTANT INFORMATION ***************************************************
25 *
26 * There are currently three types of spinlocks:
27 *
28 * 1 - Per card interrupt spinlock (to protect structures and such)
29 * 2 - Per SCQ scq spinlock
30 * 3 - Per card resource spinlock (to access registers, etc.)
31 *
32 * These must NEVER be grabbed in reverse order.
33 *
34 ******************************************************************************/
35
36 /* Header files ***************************************************************/
37
38 #include <linux/module.h>
39 #include <linux/config.h>
40 #include <linux/kernel.h>
41 #include <linux/skbuff.h>
42 #include <linux/atmdev.h>
43 #include <linux/atm.h>
44 #include <linux/pci.h>
45 #include <linux/types.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/init.h>
49 #include <linux/sched.h>
50 #include <linux/timer.h>
51 #include <linux/interrupt.h>
52 #include <linux/bitops.h>
53 #include <asm/io.h>
54 #include <asm/uaccess.h>
55 #include <asm/atomic.h>
56 #include "nicstar.h"
57 #include "nicstarmac.h"
58 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
59 #include "suni.h"
60 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
61 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
62 #include "idt77105.h"
63 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
64
65
66 /* Additional code ************************************************************/
67
68 #include "nicstarmac.c"
69
70
71 /* Configurable parameters ****************************************************/
72
73 #undef PHY_LOOPBACK
74 #undef TX_DEBUG
75 #undef RX_DEBUG
76 #undef GENERAL_DEBUG
77 #undef EXTRA_DEBUG
78
79 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
80 you're going to use only raw ATM */
81
82
83 /* Do not touch these *********************************************************/
84
85 #ifdef TX_DEBUG
86 #define TXPRINTK(args...) printk(args)
87 #else
88 #define TXPRINTK(args...)
89 #endif /* TX_DEBUG */
90
91 #ifdef RX_DEBUG
92 #define RXPRINTK(args...) printk(args)
93 #else
94 #define RXPRINTK(args...)
95 #endif /* RX_DEBUG */
96
97 #ifdef GENERAL_DEBUG
98 #define PRINTK(args...) printk(args)
99 #else
100 #define PRINTK(args...)
101 #endif /* GENERAL_DEBUG */
102
103 #ifdef EXTRA_DEBUG
104 #define XPRINTK(args...) printk(args)
105 #else
106 #define XPRINTK(args...)
107 #endif /* EXTRA_DEBUG */
108
109
110 /* Macros *********************************************************************/
111
112 #define MAX(a,b) ((a) > (b) ? (a) : (b))
113 #define MIN(a,b) ((a) < (b) ? (a) : (b))
114
115 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
116
117 #define NS_DELAY mdelay(1)
118
119 #define ALIGN_BUS_ADDR(addr, alignment) \
120 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
121 #define ALIGN_ADDRESS(addr, alignment) \
122 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
123
124 #undef CEIL(d)
125
126 #ifndef ATM_SKB
127 #define ATM_SKB(s) (&(s)->atm)
128 #endif
129
130 /* Spinlock debugging stuff */
131 #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
132 #define ns_grab_int_lock(card,flags) \
133 do { \
134 unsigned long nsdsf, nsdsf2; \
135 local_irq_save(flags); \
136 save_flags(nsdsf); cli();\
137 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
138 (flags)&(1<<9)?"en":"dis"); \
139 if (spin_is_locked(&(card)->int_lock) && \
140 (card)->cpu_int == smp_processor_id()) { \
141 printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
142 __LINE__, smp_processor_id(), (card)->has_int_lock, \
143 (card)->cpu_int); \
144 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
145 } \
146 if (spin_is_locked(&(card)->res_lock) && \
147 (card)->cpu_res == smp_processor_id()) { \
148 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
149 __LINE__, smp_processor_id(), (card)->has_res_lock, \
150 (card)->cpu_res); \
151 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
152 } \
153 spin_lock_irq(&(card)->int_lock); \
154 (card)->has_int_lock = __LINE__; \
155 (card)->cpu_int = smp_processor_id(); \
156 restore_flags(nsdsf); } while (0)
157 #define ns_grab_res_lock(card,flags) \
158 do { \
159 unsigned long nsdsf, nsdsf2; \
160 local_irq_save(flags); \
161 save_flags(nsdsf); cli();\
162 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
163 (flags)&(1<<9)?"en":"dis"); \
164 if (spin_is_locked(&(card)->res_lock) && \
165 (card)->cpu_res == smp_processor_id()) { \
166 printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
167 __LINE__, smp_processor_id(), (card)->has_res_lock, \
168 (card)->cpu_res); \
169 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
170 } \
171 spin_lock_irq(&(card)->res_lock); \
172 (card)->has_res_lock = __LINE__; \
173 (card)->cpu_res = smp_processor_id(); \
174 restore_flags(nsdsf); } while (0)
175 #define ns_grab_scq_lock(card,scq,flags) \
176 do { \
177 unsigned long nsdsf, nsdsf2; \
178 local_irq_save(flags); \
179 save_flags(nsdsf); cli();\
180 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
181 (flags)&(1<<9)?"en":"dis"); \
182 if (spin_is_locked(&(scq)->lock) && \
183 (scq)->cpu_lock == smp_processor_id()) { \
184 printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
185 __LINE__, smp_processor_id(), (scq)->has_lock, \
186 (scq)->cpu_lock); \
187 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
188 } \
189 if (spin_is_locked(&(card)->res_lock) && \
190 (card)->cpu_res == smp_processor_id()) { \
191 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
192 __LINE__, smp_processor_id(), (card)->has_res_lock, \
193 (card)->cpu_res); \
194 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
195 } \
196 spin_lock_irq(&(scq)->lock); \
197 (scq)->has_lock = __LINE__; \
198 (scq)->cpu_lock = smp_processor_id(); \
199 restore_flags(nsdsf); } while (0)
200 #else /* !NS_DEBUG_SPINLOCKS */
201 #define ns_grab_int_lock(card,flags) \
202 spin_lock_irqsave(&(card)->int_lock,(flags))
203 #define ns_grab_res_lock(card,flags) \
204 spin_lock_irqsave(&(card)->res_lock,(flags))
205 #define ns_grab_scq_lock(card,scq,flags) \
206 spin_lock_irqsave(&(scq)->lock,flags)
207 #endif /* NS_DEBUG_SPINLOCKS */
208
209
210 /* Version definition *********************************************************/
211 /*
212 #include <linux/version.h>
213 char kernel_version[] = UTS_RELEASE;
214 */
215
216 /* Function declarations ******************************************************/
217
218 static u32 ns_read_sram(ns_dev *card, u32 sram_address);
219 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
220 static int ns_init_card(int i, struct pci_dev *pcidev);
221 static void ns_init_card_error(ns_dev *card, int error);
222 static scq_info *get_scq(int size, u32 scd);
223 static void free_scq(scq_info *scq, struct atm_vcc *vcc);
224 static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
225 u32 handle2, u32 addr2);
226 static void ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
227 static int ns_open(struct atm_vcc *vcc, short vpi, int vci);
228 static void ns_close(struct atm_vcc *vcc);
229 static void fill_tst(ns_dev *card, int n, vc_map *vc);
230 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
231 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
232 struct sk_buff *skb);
233 static void process_tsq(ns_dev *card);
234 static void drain_scq(ns_dev *card, scq_info *scq, int pos);
235 static void process_rsq(ns_dev *card);
236 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
237 #ifdef NS_USE_DESTRUCTORS
238 static void ns_sb_destructor(struct sk_buff *sb);
239 static void ns_lb_destructor(struct sk_buff *lb);
240 static void ns_hb_destructor(struct sk_buff *hb);
241 #endif /* NS_USE_DESTRUCTORS */
242 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
243 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
244 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
245 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
246 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
247 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
248 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg);
249 static void which_list(ns_dev *card, struct sk_buff *skb);
250 static void ns_poll(unsigned long arg);
251 static int ns_parse_mac(char *mac, unsigned char *esi);
252 static short ns_h2i(char c);
253 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
254 unsigned long addr);
255 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
256
257
258
259 /* Global variables ***********************************************************/
260
261 static struct ns_dev *cards[NS_MAX_CARDS];
262 static unsigned num_cards;
263 static struct atmdev_ops atm_ops =
264 {
265 open: ns_open,
266 close: ns_close,
267 ioctl: ns_ioctl,
268 send: ns_send,
269 phy_put: ns_phy_put,
270 phy_get: ns_phy_get,
271 proc_read: ns_proc_read,
272 owner: THIS_MODULE,
273 };
274 static struct timer_list ns_timer;
275 static char *mac[NS_MAX_CARDS];
276 MODULE_PARM(mac, "1-" __MODULE_STRING(NS_MAX_CARDS) "s");
277
278
279 /* Functions*******************************************************************/
280
281 #ifdef MODULE
282
283 int init_module(void)
284 {
285 int i;
286 unsigned error = 0; /* Initialized to remove compile warning */
287 struct pci_dev *pcidev;
288
289 XPRINTK("nicstar: init_module() called.\n");
290 if(!pci_present())
291 {
292 printk("nicstar: no PCI subsystem found.\n");
293 return -EIO;
294 }
295
296 for(i = 0; i < NS_MAX_CARDS; i++)
297 cards[i] = NULL;
298
299 pcidev = NULL;
300 for(i = 0; i < NS_MAX_CARDS; i++)
301 {
302 if ((pcidev = pci_find_device(PCI_VENDOR_ID_IDT,
303 PCI_DEVICE_ID_IDT_IDT77201,
304 pcidev)) == NULL)
305 break;
306
307 error = ns_init_card(i, pcidev);
308 if (error)
309 cards[i--] = NULL; /* Try to find another card but don't increment index */
310 }
311
312 if (i == 0)
313 {
314 if (!error)
315 {
316 printk("nicstar: no cards found.\n");
317 return -ENXIO;
318 }
319 else
320 return -EIO;
321 }
322 TXPRINTK("nicstar: TX debug enabled.\n");
323 RXPRINTK("nicstar: RX debug enabled.\n");
324 PRINTK("nicstar: General debug enabled.\n");
325 #ifdef PHY_LOOPBACK
326 printk("nicstar: using PHY loopback.\n");
327 #endif /* PHY_LOOPBACK */
328 XPRINTK("nicstar: init_module() returned.\n");
329
330 init_timer(&ns_timer);
331 ns_timer.expires = jiffies + NS_POLL_PERIOD;
332 ns_timer.data = 0UL;
333 ns_timer.function = ns_poll;
334 add_timer(&ns_timer);
335 return 0;
336 }
337
338
339
340 void cleanup_module(void)
341 {
342 int i, j;
343 unsigned short pci_command;
344 ns_dev *card;
345 struct sk_buff *hb;
346 struct sk_buff *iovb;
347 struct sk_buff *lb;
348 struct sk_buff *sb;
349
350 XPRINTK("nicstar: cleanup_module() called.\n");
351
352 if (MOD_IN_USE)
353 printk("nicstar: module in use, remove delayed.\n");
354
355 del_timer(&ns_timer);
356
357 for (i = 0; i < NS_MAX_CARDS; i++)
358 {
359 if (cards[i] == NULL)
360 continue;
361
362 card = cards[i];
363
364 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
365 if (card->max_pcr == ATM_25_PCR) {
366 idt77105_stop(card->atmdev);
367 }
368 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
369
370 /* Stop everything */
371 writel(0x00000000, card->membase + CFG);
372
373 /* De-register device */
374 atm_dev_deregister(card->atmdev);
375
376 /* Disable memory mapping and busmastering */
377 if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command) != 0)
378 {
379 printk("nicstar%d: can't read PCI_COMMAND.\n", i);
380 }
381 pci_command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
382 if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command) != 0)
383 {
384 printk("nicstar%d: can't write PCI_COMMAND.\n", i);
385 }
386
387 /* Free up resources */
388 j = 0;
389 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
390 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
391 {
392 dev_kfree_skb_any(hb);
393 j++;
394 }
395 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
396 j = 0;
397 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
398 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
399 {
400 dev_kfree_skb_any(iovb);
401 j++;
402 }
403 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
404 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
405 dev_kfree_skb_any(lb);
406 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
407 dev_kfree_skb_any(sb);
408 free_scq(card->scq0, NULL);
409 for (j = 0; j < NS_FRSCD_NUM; j++)
410 {
411 if (card->scd2vc[j] != NULL)
412 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
413 }
414 kfree(card->rsq.org);
415 kfree(card->tsq.org);
416 free_irq(card->pcidev->irq, card);
417 iounmap((void *) card->membase);
418 kfree(card);
419
420 }
421 XPRINTK("nicstar: cleanup_module() returned.\n");
422 }
423
424
425 #else
426
427 int __init nicstar_detect(void)
428 {
429 int i;
430 unsigned error = 0; /* Initialized to remove compile warning */
431 struct pci_dev *pcidev;
432
433 if(!pci_present())
434 {
435 printk("nicstar: no PCI subsystem found.\n");
436 return -EIO;
437 }
438
439 for(i = 0; i < NS_MAX_CARDS; i++)
440 cards[i] = NULL;
441
442 pcidev = NULL;
443 for(i = 0; i < NS_MAX_CARDS; i++)
444 {
445 if ((pcidev = pci_find_device(PCI_VENDOR_ID_IDT,
446 PCI_DEVICE_ID_IDT_IDT77201,
447 pcidev)) == NULL)
448 break;
449
450 error = ns_init_card(i, pcidev);
451 if (error)
452 cards[i--] = NULL; /* Try to find another card but don't increment index */
453 }
454
455 if (i == 0 && error)
456 return -EIO;
457
458 TXPRINTK("nicstar: TX debug enabled.\n");
459 RXPRINTK("nicstar: RX debug enabled.\n");
460 PRINTK("nicstar: General debug enabled.\n");
461 #ifdef PHY_LOOPBACK
462 printk("nicstar: using PHY loopback.\n");
463 #endif /* PHY_LOOPBACK */
464 XPRINTK("nicstar: init_module() returned.\n");
465
466 init_timer(&ns_timer);
467 ns_timer.expires = jiffies + NS_POLL_PERIOD;
468 ns_timer.data = 0UL;
469 ns_timer.function = ns_poll;
470 add_timer(&ns_timer);
471 return i;
472 }
473
474
475 #endif /* MODULE */
476
477
478 static u32 ns_read_sram(ns_dev *card, u32 sram_address)
479 {
480 unsigned long flags;
481 u32 data;
482 sram_address <<= 2;
483 sram_address &= 0x0007FFFC; /* address must be dword aligned */
484 sram_address |= 0x50000000; /* SRAM read command */
485 ns_grab_res_lock(card, flags);
486 while (CMD_BUSY(card));
487 writel(sram_address, card->membase + CMD);
488 while (CMD_BUSY(card));
489 data = readl(card->membase + DR0);
490 spin_unlock_irqrestore(&card->res_lock, flags);
491 return data;
492 }
493
494
495
496 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
497 {
498 unsigned long flags;
499 int i, c;
500 count--; /* count range now is 0..3 instead of 1..4 */
501 c = count;
502 c <<= 2; /* to use increments of 4 */
503 ns_grab_res_lock(card, flags);
504 while (CMD_BUSY(card));
505 for (i = 0; i <= c; i += 4)
506 writel(*(value++), card->membase + i);
507 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
508 so card->membase + DR0 == card->membase */
509 sram_address <<= 2;
510 sram_address &= 0x0007FFFC;
511 sram_address |= (0x40000000 | count);
512 writel(sram_address, card->membase + CMD);
513 spin_unlock_irqrestore(&card->res_lock, flags);
514 }
515
516
517 static int ns_init_card(int i, struct pci_dev *pcidev)
518 {
519 int j;
520 struct ns_dev *card = NULL;
521 unsigned short pci_command;
522 unsigned char pci_latency;
523 unsigned error;
524 u32 data;
525 u32 u32d[4];
526 u32 ns_cfg_rctsize;
527 int bcount;
528
529 error = 0;
530
531 if (pci_enable_device(pcidev))
532 {
533 printk("nicstar%d: can't enable PCI device\n", i);
534 error = 2;
535 ns_init_card_error(card, error);
536 return error;
537 }
538
539 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
540 {
541 printk("nicstar%d: can't allocate memory for device structure.\n", i);
542 error = 2;
543 ns_init_card_error(card, error);
544 return error;
545 }
546 cards[i] = card;
547 spin_lock_init(&card->int_lock);
548 spin_lock_init(&card->res_lock);
549
550 card->index = i;
551 card->atmdev = NULL;
552 card->pcidev = pcidev;
553 card->membase = pci_resource_start(pcidev, 1);
554 #ifdef __powerpc__
555 /* Compensate for different memory map between host CPU and PCI bus.
556 Shouldn't we use a macro for this? */
557 card->membase += KERNELBASE;
558 #endif /* __powerpc__ */
559 card->membase = (unsigned long) ioremap(card->membase, NS_IOREMAP_SIZE);
560 if (card->membase == 0)
561 {
562 printk("nicstar%d: can't ioremap() membase.\n",i);
563 error = 3;
564 ns_init_card_error(card, error);
565 return error;
566 }
567 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
568
569 if (pci_read_config_word(pcidev, PCI_COMMAND, &pci_command) != 0)
570 {
571 printk("nicstar%d: can't read PCI_COMMAND.\n", i);
572 error = 4;
573 ns_init_card_error(card, error);
574 return error;
575 }
576 pci_command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
577 if (pci_write_config_word(pcidev, PCI_COMMAND, pci_command) != 0)
578 {
579 printk("nicstar%d: can't write PCI_COMMAND.\n", i);
580 error = 5;
581 ns_init_card_error(card, error);
582 return error;
583 }
584
585 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
586 {
587 printk("nicstar%d: can't read PCI latency timer.\n", i);
588 error = 6;
589 ns_init_card_error(card, error);
590 return error;
591 }
592 #ifdef NS_PCI_LATENCY
593 if (pci_latency < NS_PCI_LATENCY)
594 {
595 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
596 for (j = 1; j < 4; j++)
597 {
598 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
599 break;
600 }
601 if (j == 4)
602 {
603 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
604 error = 7;
605 ns_init_card_error(card, error);
606 return error;
607 }
608 }
609 #endif /* NS_PCI_LATENCY */
610
611 /* Clear timer overflow */
612 data = readl(card->membase + STAT);
613 if (data & NS_STAT_TMROF)
614 writel(NS_STAT_TMROF, card->membase + STAT);
615
616 /* Software reset */
617 writel(NS_CFG_SWRST, card->membase + CFG);
618 NS_DELAY;
619 writel(0x00000000, card->membase + CFG);
620
621 /* PHY reset */
622 writel(0x00000008, card->membase + GP);
623 NS_DELAY;
624 writel(0x00000001, card->membase + GP);
625 NS_DELAY;
626 while (CMD_BUSY(card));
627 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
628 NS_DELAY;
629
630 /* Detect PHY type */
631 while (CMD_BUSY(card));
632 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
633 while (CMD_BUSY(card));
634 data = readl(card->membase + DR0);
635 switch(data) {
636 case 0x00000009:
637 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
638 card->max_pcr = ATM_25_PCR;
639 while(CMD_BUSY(card));
640 writel(0x00000008, card->membase + DR0);
641 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
642 /* Clear an eventual pending interrupt */
643 writel(NS_STAT_SFBQF, card->membase + STAT);
644 #ifdef PHY_LOOPBACK
645 while(CMD_BUSY(card));
646 writel(0x00000022, card->membase + DR0);
647 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
648 #endif /* PHY_LOOPBACK */
649 break;
650 case 0x00000030:
651 case 0x00000031:
652 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
653 card->max_pcr = ATM_OC3_PCR;
654 #ifdef PHY_LOOPBACK
655 while(CMD_BUSY(card));
656 writel(0x00000002, card->membase + DR0);
657 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
658 #endif /* PHY_LOOPBACK */
659 break;
660 default:
661 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
662 error = 8;
663 ns_init_card_error(card, error);
664 return error;
665 }
666 writel(0x00000000, card->membase + GP);
667
668 /* Determine SRAM size */
669 data = 0x76543210;
670 ns_write_sram(card, 0x1C003, &data, 1);
671 data = 0x89ABCDEF;
672 ns_write_sram(card, 0x14003, &data, 1);
673 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
674 ns_read_sram(card, 0x1C003) == 0x76543210)
675 card->sram_size = 128;
676 else
677 card->sram_size = 32;
678 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
679
680 card->rct_size = NS_MAX_RCTSIZE;
681
682 #if (NS_MAX_RCTSIZE == 4096)
683 if (card->sram_size == 128)
684 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
685 #elif (NS_MAX_RCTSIZE == 16384)
686 if (card->sram_size == 32)
687 {
688 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
689 card->rct_size = 4096;
690 }
691 #else
692 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
693 #endif
694
695 card->vpibits = NS_VPIBITS;
696 if (card->rct_size == 4096)
697 card->vcibits = 12 - NS_VPIBITS;
698 else /* card->rct_size == 16384 */
699 card->vcibits = 14 - NS_VPIBITS;
700
701 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
702 if (mac[i] == NULL)
703 nicstar_init_eprom(card->membase);
704
705 if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0)
706 {
707 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
708 error = 9;
709 ns_init_card_error(card, error);
710 return error;
711 }
712
713 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
714 writel(0x00000000, card->membase + VPM);
715
716 /* Initialize TSQ */
717 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
718 if (card->tsq.org == NULL)
719 {
720 printk("nicstar%d: can't allocate TSQ.\n", i);
721 error = 10;
722 ns_init_card_error(card, error);
723 return error;
724 }
725 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
726 card->tsq.next = card->tsq.base;
727 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
728 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
729 ns_tsi_init(card->tsq.base + j);
730 writel(0x00000000, card->membase + TSQH);
731 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
732 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
733 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
734
735 /* Initialize RSQ */
736 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
737 if (card->rsq.org == NULL)
738 {
739 printk("nicstar%d: can't allocate RSQ.\n", i);
740 error = 11;
741 ns_init_card_error(card, error);
742 return error;
743 }
744 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
745 card->rsq.next = card->rsq.base;
746 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
747 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
748 ns_rsqe_init(card->rsq.base + j);
749 writel(0x00000000, card->membase + RSQH);
750 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
751 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
752
753 /* Initialize SCQ0, the only VBR SCQ used */
754 card->scq1 = (scq_info *) NULL;
755 card->scq2 = (scq_info *) NULL;
756 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
757 if (card->scq0 == (scq_info *) NULL)
758 {
759 printk("nicstar%d: can't get SCQ0.\n", i);
760 error = 12;
761 ns_init_card_error(card, error);
762 return error;
763 }
764 u32d[0] = (u32) virt_to_bus(card->scq0->base);
765 u32d[1] = (u32) 0x00000000;
766 u32d[2] = (u32) 0xffffffff;
767 u32d[3] = (u32) 0x00000000;
768 ns_write_sram(card, NS_VRSCD0, u32d, 4);
769 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
770 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
771 card->scq0->scd = NS_VRSCD0;
772 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
773
774 /* Initialize TSTs */
775 card->tst_addr = NS_TST0;
776 card->tst_free_entries = NS_TST_NUM_ENTRIES;
777 data = NS_TST_OPCODE_VARIABLE;
778 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
779 ns_write_sram(card, NS_TST0 + j, &data, 1);
780 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
781 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
782 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
783 ns_write_sram(card, NS_TST1 + j, &data, 1);
784 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
785 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
786 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
787 card->tste2vc[j] = NULL;
788 writel(NS_TST0 << 2, card->membase + TSTB);
789
790
791 /* Initialize RCT. AAL type is set on opening the VC. */
792 #ifdef RCQ_SUPPORT
793 u32d[0] = NS_RCTE_RAWCELLINTEN;
794 #else
795 u32d[0] = 0x00000000;
796 #endif RCQ_SUPPORT
797 u32d[1] = 0x00000000;
798 u32d[2] = 0x00000000;
799 u32d[3] = 0xFFFFFFFF;
800 for (j = 0; j < card->rct_size; j++)
801 ns_write_sram(card, j * 4, u32d, 4);
802
803 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
804
805 for (j = 0; j < NS_FRSCD_NUM; j++)
806 card->scd2vc[j] = NULL;
807
808 /* Initialize buffer levels */
809 card->sbnr.min = MIN_SB;
810 card->sbnr.init = NUM_SB;
811 card->sbnr.max = MAX_SB;
812 card->lbnr.min = MIN_LB;
813 card->lbnr.init = NUM_LB;
814 card->lbnr.max = MAX_LB;
815 card->iovnr.min = MIN_IOVB;
816 card->iovnr.init = NUM_IOVB;
817 card->iovnr.max = MAX_IOVB;
818 card->hbnr.min = MIN_HB;
819 card->hbnr.init = NUM_HB;
820 card->hbnr.max = MAX_HB;
821
822 card->sm_handle = 0x00000000;
823 card->sm_addr = 0x00000000;
824 card->lg_handle = 0x00000000;
825 card->lg_addr = 0x00000000;
826
827 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
828
829 /* Pre-allocate some huge buffers */
830 skb_queue_head_init(&card->hbpool.queue);
831 card->hbpool.count = 0;
832 for (j = 0; j < NUM_HB; j++)
833 {
834 struct sk_buff *hb;
835 hb = alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
836 if (hb == NULL)
837 {
838 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
839 i, j, NUM_HB);
840 error = 13;
841 ns_init_card_error(card, error);
842 return error;
843 }
844 skb_queue_tail(&card->hbpool.queue, hb);
845 card->hbpool.count++;
846 }
847
848
849 /* Allocate large buffers */
850 skb_queue_head_init(&card->lbpool.queue);
851 card->lbpool.count = 0; /* Not used */
852 for (j = 0; j < NUM_LB; j++)
853 {
854 struct sk_buff *lb;
855 lb = alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
856 if (lb == NULL)
857 {
858 printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
859 i, j, NUM_LB);
860 error = 14;
861 ns_init_card_error(card, error);
862 return error;
863 }
864 skb_queue_tail(&card->lbpool.queue, lb);
865 skb_reserve(lb, NS_SMBUFSIZE);
866 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
867 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
868 if (j == 1)
869 {
870 card->rcbuf = lb;
871 card->rawch = (u32) virt_to_bus(lb->data);
872 }
873 }
874 /* Test for strange behaviour which leads to crashes */
875 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
876 {
877 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
878 i, j, bcount);
879 error = 14;
880 ns_init_card_error(card, error);
881 return error;
882 }
883
884
885 /* Allocate small buffers */
886 skb_queue_head_init(&card->sbpool.queue);
887 card->sbpool.count = 0; /* Not used */
888 for (j = 0; j < NUM_SB; j++)
889 {
890 struct sk_buff *sb;
891 sb = alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
892 if (sb == NULL)
893 {
894 printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
895 i, j, NUM_SB);
896 error = 15;
897 ns_init_card_error(card, error);
898 return error;
899 }
900 skb_queue_tail(&card->sbpool.queue, sb);
901 skb_reserve(sb, NS_AAL0_HEADER);
902 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
903 }
904 /* Test for strange behaviour which leads to crashes */
905 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
906 {
907 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
908 i, j, bcount);
909 error = 15;
910 ns_init_card_error(card, error);
911 return error;
912 }
913
914
915 /* Allocate iovec buffers */
916 skb_queue_head_init(&card->iovpool.queue);
917 card->iovpool.count = 0;
918 for (j = 0; j < NUM_IOVB; j++)
919 {
920 struct sk_buff *iovb;
921 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
922 if (iovb == NULL)
923 {
924 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
925 i, j, NUM_IOVB);
926 error = 16;
927 ns_init_card_error(card, error);
928 return error;
929 }
930 skb_queue_tail(&card->iovpool.queue, iovb);
931 card->iovpool.count++;
932 }
933
934 card->intcnt = 0;
935
936 /* Configure NICStAR */
937 if (card->rct_size == 4096)
938 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
939 else /* (card->rct_size == 16384) */
940 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
941
942 card->efbie = 1;
943
944 /* Register device */
945 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
946 if (card->atmdev == NULL)
947 {
948 printk("nicstar%d: can't register device.\n", i);
949 error = 17;
950 ns_init_card_error(card, error);
951 return error;
952 }
953
954 if (ns_parse_mac(mac[i], card->atmdev->esi))
955 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
956 card->atmdev->esi, 6);
957
958 printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
959 card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
960 card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
961
962 card->atmdev->dev_data = card;
963 card->atmdev->ci_range.vpi_bits = card->vpibits;
964 card->atmdev->ci_range.vci_bits = card->vcibits;
965 card->atmdev->link_rate = card->max_pcr;
966 card->atmdev->phy = NULL;
967
968 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
969 if (card->max_pcr == ATM_OC3_PCR) {
970 suni_init(card->atmdev);
971
972 MOD_INC_USE_COUNT;
973 /* Can't remove the nicstar driver or the suni driver would oops */
974 }
975 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
976
977 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
978 if (card->max_pcr == ATM_25_PCR) {
979 idt77105_init(card->atmdev);
980 /* Note that for the IDT77105 PHY we don't need the awful
981 * module count hack that the SUNI needs because we can
982 * stop the '105 when the nicstar module is cleaned up.
983 */
984 }
985 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
986
987 if (card->atmdev->phy && card->atmdev->phy->start)
988 card->atmdev->phy->start(card->atmdev);
989
990 writel(NS_CFG_RXPATH |
991 NS_CFG_SMBUFSIZE |
992 NS_CFG_LGBUFSIZE |
993 NS_CFG_EFBIE |
994 NS_CFG_RSQSIZE |
995 NS_CFG_VPIBITS |
996 ns_cfg_rctsize |
997 NS_CFG_RXINT_NODELAY |
998 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
999 NS_CFG_RSQAFIE |
1000 NS_CFG_TXEN |
1001 NS_CFG_TXIE |
1002 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
1003 NS_CFG_PHYIE,
1004 card->membase + CFG);
1005
1006 num_cards++;
1007
1008 return error;
1009 }
1010
1011
1012
1013 static void ns_init_card_error(ns_dev *card, int error)
1014 {
1015 if (error >= 17)
1016 {
1017 writel(0x00000000, card->membase + CFG);
1018 }
1019 if (error >= 16)
1020 {
1021 struct sk_buff *iovb;
1022 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
1023 dev_kfree_skb_any(iovb);
1024 }
1025 if (error >= 15)
1026 {
1027 struct sk_buff *sb;
1028 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
1029 dev_kfree_skb_any(sb);
1030 free_scq(card->scq0, NULL);
1031 }
1032 if (error >= 14)
1033 {
1034 struct sk_buff *lb;
1035 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
1036 dev_kfree_skb_any(lb);
1037 }
1038 if (error >= 13)
1039 {
1040 struct sk_buff *hb;
1041 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
1042 dev_kfree_skb_any(hb);
1043 }
1044 if (error >= 12)
1045 {
1046 kfree(card->rsq.org);
1047 }
1048 if (error >= 11)
1049 {
1050 kfree(card->tsq.org);
1051 }
1052 if (error >= 10)
1053 {
1054 free_irq(card->pcidev->irq, card);
1055 }
1056 if (error >= 4)
1057 {
1058 iounmap((void *) card->membase);
1059 }
1060 if (error >= 3)
1061 {
1062 kfree(card);
1063 }
1064 }
1065
1066
1067
1068 static scq_info *get_scq(int size, u32 scd)
1069 {
1070 scq_info *scq;
1071 int i;
1072
1073 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
1074 return (scq_info *) NULL;
1075
1076 scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
1077 if (scq == (scq_info *) NULL)
1078 return (scq_info *) NULL;
1079 scq->org = kmalloc(2 * size, GFP_KERNEL);
1080 if (scq->org == NULL)
1081 {
1082 kfree(scq);
1083 return (scq_info *) NULL;
1084 }
1085 scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
1086 (size / NS_SCQE_SIZE), GFP_KERNEL);
1087 if (scq->skb == (struct sk_buff **) NULL)
1088 {
1089 kfree(scq->org);
1090 kfree(scq);
1091 return (scq_info *) NULL;
1092 }
1093 scq->num_entries = size / NS_SCQE_SIZE;
1094 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
1095 scq->next = scq->base;
1096 scq->last = scq->base + (scq->num_entries - 1);
1097 scq->tail = scq->last;
1098 scq->scd = scd;
1099 scq->num_entries = size / NS_SCQE_SIZE;
1100 scq->tbd_count = 0;
1101 init_waitqueue_head(&scq->scqfull_waitq);
1102 scq->full = 0;
1103 spin_lock_init(&scq->lock);
1104
1105 for (i = 0; i < scq->num_entries; i++)
1106 scq->skb[i] = NULL;
1107
1108 return scq;
1109 }
1110
1111
1112
1113 /* For variable rate SCQ vcc must be NULL */
1114 static void free_scq(scq_info *scq, struct atm_vcc *vcc)
1115 {
1116 int i;
1117
1118 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1119 for (i = 0; i < scq->num_entries; i++)
1120 {
1121 if (scq->skb[i] != NULL)
1122 {
1123 vcc = ATM_SKB(scq->skb[i])->vcc;
1124 if (vcc->pop != NULL)
1125 vcc->pop(vcc, scq->skb[i]);
1126 else
1127 dev_kfree_skb_any(scq->skb[i]);
1128 }
1129 }
1130 else /* vcc must be != NULL */
1131 {
1132 if (vcc == NULL)
1133 {
1134 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
1135 for (i = 0; i < scq->num_entries; i++)
1136 dev_kfree_skb_any(scq->skb[i]);
1137 }
1138 else
1139 for (i = 0; i < scq->num_entries; i++)
1140 {
1141 if (scq->skb[i] != NULL)
1142 {
1143 if (vcc->pop != NULL)
1144 vcc->pop(vcc, scq->skb[i]);
1145 else
1146 dev_kfree_skb_any(scq->skb[i]);
1147 }
1148 }
1149 }
1150 kfree(scq->skb);
1151 kfree(scq->org);
1152 kfree(scq);
1153 }
1154
1155
1156
1157 /* The handles passed must be pointers to the sk_buff containing the small
1158 or large buffer(s) cast to u32. */
1159 static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
1160 u32 handle2, u32 addr2)
1161 {
1162 u32 stat;
1163 unsigned long flags;
1164
1165
1166 #ifdef GENERAL_DEBUG
1167 if (!addr1)
1168 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
1169 #endif /* GENERAL_DEBUG */
1170
1171 stat = readl(card->membase + STAT);
1172 card->sbfqc = ns_stat_sfbqc_get(stat);
1173 card->lbfqc = ns_stat_lfbqc_get(stat);
1174 if (type == BUF_SM)
1175 {
1176 if (!addr2)
1177 {
1178 if (card->sm_addr)
1179 {
1180 addr2 = card->sm_addr;
1181 handle2 = card->sm_handle;
1182 card->sm_addr = 0x00000000;
1183 card->sm_handle = 0x00000000;
1184 }
1185 else /* (!sm_addr) */
1186 {
1187 card->sm_addr = addr1;
1188 card->sm_handle = handle1;
1189 }
1190 }
1191 }
1192 else /* type == BUF_LG */
1193 {
1194 if (!addr2)
1195 {
1196 if (card->lg_addr)
1197 {
1198 addr2 = card->lg_addr;
1199 handle2 = card->lg_handle;
1200 card->lg_addr = 0x00000000;
1201 card->lg_handle = 0x00000000;
1202 }
1203 else /* (!lg_addr) */
1204 {
1205 card->lg_addr = addr1;
1206 card->lg_handle = handle1;
1207 }
1208 }
1209 }
1210
1211 if (addr2)
1212 {
1213 if (type == BUF_SM)
1214 {
1215 if (card->sbfqc >= card->sbnr.max)
1216 {
1217 skb_unlink((struct sk_buff *) handle1);
1218 dev_kfree_skb_any((struct sk_buff *) handle1);
1219 skb_unlink((struct sk_buff *) handle2);
1220 dev_kfree_skb_any((struct sk_buff *) handle2);
1221 return;
1222 }
1223 else
1224 card->sbfqc += 2;
1225 }
1226 else /* (type == BUF_LG) */
1227 {
1228 if (card->lbfqc >= card->lbnr.max)
1229 {
1230 skb_unlink((struct sk_buff *) handle1);
1231 dev_kfree_skb_any((struct sk_buff *) handle1);
1232 skb_unlink((struct sk_buff *) handle2);
1233 dev_kfree_skb_any((struct sk_buff *) handle2);
1234 return;
1235 }
1236 else
1237 card->lbfqc += 2;
1238 }
1239
1240 ns_grab_res_lock(card, flags);
1241
1242 while (CMD_BUSY(card));
1243 writel(addr2, card->membase + DR3);
1244 writel(handle2, card->membase + DR2);
1245 writel(addr1, card->membase + DR1);
1246 writel(handle1, card->membase + DR0);
1247 writel(NS_CMD_WRITE_FREEBUFQ | (u32) type, card->membase + CMD);
1248
1249 spin_unlock_irqrestore(&card->res_lock, flags);
1250
1251 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
1252 (type == BUF_SM ? "small" : "large"), addr1, addr2);
1253 }
1254
1255 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1256 card->lbfqc >= card->lbnr.min)
1257 {
1258 card->efbie = 1;
1259 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
1260 }
1261
1262 return;
1263 }
1264
1265
1266
1267 static void ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
1268 {
1269 u32 stat_r;
1270 ns_dev *card;
1271 struct atm_dev *dev;
1272 unsigned long flags;
1273
1274 card = (ns_dev *) dev_id;
1275 dev = card->atmdev;
1276 card->intcnt++;
1277
1278 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1279
1280 ns_grab_int_lock(card, flags);
1281
1282 stat_r = readl(card->membase + STAT);
1283
1284 /* Transmit Status Indicator has been written to T. S. Queue */
1285 if (stat_r & NS_STAT_TSIF)
1286 {
1287 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1288 process_tsq(card);
1289 writel(NS_STAT_TSIF, card->membase + STAT);
1290 }
1291
1292 /* Incomplete CS-PDU has been transmitted */
1293 if (stat_r & NS_STAT_TXICP)
1294 {
1295 writel(NS_STAT_TXICP, card->membase + STAT);
1296 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1297 card->index);
1298 }
1299
1300 /* Transmit Status Queue 7/8 full */
1301 if (stat_r & NS_STAT_TSQF)
1302 {
1303 writel(NS_STAT_TSQF, card->membase + STAT);
1304 PRINTK("nicstar%d: TSQ full.\n", card->index);
1305 process_tsq(card);
1306 }
1307
1308 /* Timer overflow */
1309 if (stat_r & NS_STAT_TMROF)
1310 {
1311 writel(NS_STAT_TMROF, card->membase + STAT);
1312 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1313 }
1314
1315 /* PHY device interrupt signal active */
1316 if (stat_r & NS_STAT_PHYI)
1317 {
1318 writel(NS_STAT_PHYI, card->membase + STAT);
1319 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1320 if (dev->phy && dev->phy->interrupt) {
1321 dev->phy->interrupt(dev);
1322 }
1323 }
1324
1325 /* Small Buffer Queue is full */
1326 if (stat_r & NS_STAT_SFBQF)
1327 {
1328 writel(NS_STAT_SFBQF, card->membase + STAT);
1329 printk("nicstar%d: Small free buffer queue is full.\n", card->index);
1330 }
1331
1332 /* Large Buffer Queue is full */
1333 if (stat_r & NS_STAT_LFBQF)
1334 {
1335 writel(NS_STAT_LFBQF, card->membase + STAT);
1336 printk("nicstar%d: Large free buffer queue is full.\n", card->index);
1337 }
1338
1339 /* Receive Status Queue is full */
1340 if (stat_r & NS_STAT_RSQF)
1341 {
1342 writel(NS_STAT_RSQF, card->membase + STAT);
1343 printk("nicstar%d: RSQ full.\n", card->index);
1344 process_rsq(card);
1345 }
1346
1347 /* Complete CS-PDU received */
1348 if (stat_r & NS_STAT_EOPDU)
1349 {
1350 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1351 process_rsq(card);
1352 writel(NS_STAT_EOPDU, card->membase + STAT);
1353 }
1354
1355 /* Raw cell received */
1356 if (stat_r & NS_STAT_RAWCF)
1357 {
1358 writel(NS_STAT_RAWCF, card->membase + STAT);
1359 #ifndef RCQ_SUPPORT
1360 printk("nicstar%d: Raw cell received and no support yet...\n",
1361 card->index);
1362 #endif /* RCQ_SUPPORT */
1363 /* NOTE: the following procedure may keep a raw cell pending untill the
1364 next interrupt. As this preliminary support is only meant to
1365 avoid buffer leakage, this is not an issue. */
1366 while (readl(card->membase + RAWCT) != card->rawch)
1367 {
1368 ns_rcqe *rawcell;
1369
1370 rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
1371 if (ns_rcqe_islast(rawcell))
1372 {
1373 struct sk_buff *oldbuf;
1374
1375 oldbuf = card->rcbuf;
1376 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
1377 card->rawch = (u32) virt_to_bus(card->rcbuf->data);
1378 recycle_rx_buf(card, oldbuf);
1379 }
1380 else
1381 card->rawch += NS_RCQE_SIZE;
1382 }
1383 }
1384
1385 /* Small buffer queue is empty */
1386 if (stat_r & NS_STAT_SFBQE)
1387 {
1388 int i;
1389 struct sk_buff *sb;
1390
1391 writel(NS_STAT_SFBQE, card->membase + STAT);
1392 printk("nicstar%d: Small free buffer queue empty.\n",
1393 card->index);
1394 for (i = 0; i < card->sbnr.min; i++)
1395 {
1396 sb = alloc_skb(NS_SMSKBSIZE, GFP_ATOMIC);
1397 if (sb == NULL)
1398 {
1399 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1400 card->efbie = 0;
1401 break;
1402 }
1403 skb_queue_tail(&card->sbpool.queue, sb);
1404 skb_reserve(sb, NS_AAL0_HEADER);
1405 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
1406 }
1407 card->sbfqc = i;
1408 process_rsq(card);
1409 }
1410
1411 /* Large buffer queue empty */
1412 if (stat_r & NS_STAT_LFBQE)
1413 {
1414 int i;
1415 struct sk_buff *lb;
1416
1417 writel(NS_STAT_LFBQE, card->membase + STAT);
1418 printk("nicstar%d: Large free buffer queue empty.\n",
1419 card->index);
1420 for (i = 0; i < card->lbnr.min; i++)
1421 {
1422 lb = alloc_skb(NS_LGSKBSIZE, GFP_ATOMIC);
1423 if (lb == NULL)
1424 {
1425 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1426 card->efbie = 0;
1427 break;
1428 }
1429 skb_queue_tail(&card->lbpool.queue, lb);
1430 skb_reserve(lb, NS_SMBUFSIZE);
1431 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
1432 }
1433 card->lbfqc = i;
1434 process_rsq(card);
1435 }
1436
1437 /* Receive Status Queue is 7/8 full */
1438 if (stat_r & NS_STAT_RSQAF)
1439 {
1440 writel(NS_STAT_RSQAF, card->membase + STAT);
1441 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1442 process_rsq(card);
1443 }
1444
1445 spin_unlock_irqrestore(&card->int_lock, flags);
1446 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1447 }
1448
1449
1450
1451 static int ns_open(struct atm_vcc *vcc, short vpi, int vci)
1452 {
1453 ns_dev *card;
1454 vc_map *vc;
1455 int error;
1456 unsigned long tmpl, modl;
1457 int tcr, tcra; /* target cell rate, and absolute value */
1458 int n = 0; /* Number of entries in the TST. Initialized to remove
1459 the compiler warning. */
1460 u32 u32d[4];
1461 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1462 warning. How I wish compilers were clever enough to
1463 tell which variables can truly be used
1464 uninitialized... */
1465 int inuse; /* tx or rx vc already in use by another vcc */
1466
1467 card = (ns_dev *) vcc->dev->dev_data;
1468 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
1469 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1470 {
1471 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1472 return -EINVAL;
1473 }
1474
1475 if ((error = atm_find_ci(vcc, &vpi, &vci)))
1476 {
1477 PRINTK("nicstar%d: error in atm_find_ci().\n", card->index);
1478 return error;
1479 }
1480 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1481 vcc->vpi = vpi;
1482 vcc->vci = vci;
1483 vcc->dev_data = vc;
1484
1485 inuse = 0;
1486 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1487 inuse = 1;
1488 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1489 inuse += 2;
1490 if (inuse)
1491 {
1492 printk("nicstar%d: %s vci already in use.\n", card->index,
1493 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1494 return -EINVAL;
1495 }
1496
1497 set_bit(ATM_VF_ADDR,&vcc->flags);
1498
1499 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1500 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1501 needed to do that. */
1502 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1503 {
1504 scq_info *scq;
1505
1506 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1507 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1508 {
1509 /* Check requested cell rate and availability of SCD */
1510 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
1511 vcc->qos.txtp.min_pcr == 0)
1512 {
1513 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1514 card->index);
1515 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1516 clear_bit(ATM_VF_ADDR,&vcc->flags);
1517 return -EINVAL;
1518 }
1519
1520 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1521 tcra = tcr >= 0 ? tcr : -tcr;
1522
1523 PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
1524 vcc->qos.txtp.max_pcr);
1525
1526 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
1527 modl = tmpl % card->max_pcr;
1528
1529 n = (int)(tmpl / card->max_pcr);
1530 if (tcr > 0)
1531 {
1532 if (modl > 0) n++;
1533 }
1534 else if (tcr == 0)
1535 {
1536 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
1537 {
1538 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
1539 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1540 clear_bit(ATM_VF_ADDR,&vcc->flags);
1541 return -EINVAL;
1542 }
1543 }
1544
1545 if (n == 0)
1546 {
1547 printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
1548 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1549 clear_bit(ATM_VF_ADDR,&vcc->flags);
1550 return -EINVAL;
1551 }
1552
1553 if (n > (card->tst_free_entries - NS_TST_RESERVED))
1554 {
1555 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
1556 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1557 clear_bit(ATM_VF_ADDR,&vcc->flags);
1558 return -EINVAL;
1559 }
1560 else
1561 card->tst_free_entries -= n;
1562
1563 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
1564 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
1565 {
1566 if (card->scd2vc[frscdi] == NULL)
1567 {
1568 card->scd2vc[frscdi] = vc;
1569 break;
1570 }
1571 }
1572 if (frscdi == NS_FRSCD_NUM)
1573 {
1574 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
1575 card->tst_free_entries += n;
1576 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1577 clear_bit(ATM_VF_ADDR,&vcc->flags);
1578 return -EBUSY;
1579 }
1580
1581 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1582
1583 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
1584 if (scq == (scq_info *) NULL)
1585 {
1586 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
1587 card->scd2vc[frscdi] = NULL;
1588 card->tst_free_entries += n;
1589 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1590 clear_bit(ATM_VF_ADDR,&vcc->flags);
1591 return -ENOMEM;
1592 }
1593 vc->scq = scq;
1594 u32d[0] = (u32) virt_to_bus(scq->base);
1595 u32d[1] = (u32) 0x00000000;
1596 u32d[2] = (u32) 0xffffffff;
1597 u32d[3] = (u32) 0x00000000;
1598 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1599
1600 fill_tst(card, n, vc);
1601 }
1602 else /* not CBR */
1603 {
1604 vc->cbr_scd = 0x00000000;
1605 vc->scq = card->scq0;
1606 }
1607
1608 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1609 {
1610 vc->tx = 1;
1611 vc->tx_vcc = vcc;
1612 vc->tbd_count = 0;
1613 }
1614 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1615 {
1616 u32 status;
1617
1618 vc->rx = 1;
1619 vc->rx_vcc = vcc;
1620 vc->rx_iov = NULL;
1621
1622 /* Open the connection in hardware */
1623 if (vcc->qos.aal == ATM_AAL5)
1624 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1625 else /* vcc->qos.aal == ATM_AAL0 */
1626 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1627 #ifdef RCQ_SUPPORT
1628 status |= NS_RCTE_RAWCELLINTEN;
1629 #endif /* RCQ_SUPPORT */
1630 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
1631 NS_RCT_ENTRY_SIZE, &status, 1);
1632 }
1633
1634 }
1635
1636 set_bit(ATM_VF_READY,&vcc->flags);
1637 return 0;
1638 }
1639
1640
1641
1642 static void ns_close(struct atm_vcc *vcc)
1643 {
1644 vc_map *vc;
1645 ns_dev *card;
1646 u32 data;
1647 int i;
1648
1649 vc = vcc->dev_data;
1650 card = vcc->dev->dev_data;
1651 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1652 (int) vcc->vpi, vcc->vci);
1653
1654 clear_bit(ATM_VF_READY,&vcc->flags);
1655
1656 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1657 {
1658 u32 addr;
1659 unsigned long flags;
1660
1661 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1662 ns_grab_res_lock(card, flags);
1663 while(CMD_BUSY(card));
1664 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
1665 spin_unlock_irqrestore(&card->res_lock, flags);
1666
1667 vc->rx = 0;
1668 if (vc->rx_iov != NULL)
1669 {
1670 struct sk_buff *iovb;
1671 u32 stat;
1672
1673 stat = readl(card->membase + STAT);
1674 card->sbfqc = ns_stat_sfbqc_get(stat);
1675 card->lbfqc = ns_stat_lfbqc_get(stat);
1676
1677 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
1678 card->index);
1679 iovb = vc->rx_iov;
1680 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
1681 ATM_SKB(iovb)->iovcnt);
1682 ATM_SKB(iovb)->iovcnt = 0;
1683 ATM_SKB(iovb)->vcc = NULL;
1684 ns_grab_int_lock(card, flags);
1685 recycle_iov_buf(card, iovb);
1686 spin_unlock_irqrestore(&card->int_lock, flags);
1687 vc->rx_iov = NULL;
1688 }
1689 }
1690
1691 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1692 {
1693 vc->tx = 0;
1694 }
1695
1696 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1697 {
1698 unsigned long flags;
1699 ns_scqe *scqep;
1700 scq_info *scq;
1701
1702 scq = vc->scq;
1703
1704 for (;;)
1705 {
1706 ns_grab_scq_lock(card, scq, flags);
1707 scqep = scq->next;
1708 if (scqep == scq->base)
1709 scqep = scq->last;
1710 else
1711 scqep--;
1712 if (scqep == scq->tail)
1713 {
1714 spin_unlock_irqrestore(&scq->lock, flags);
1715 break;
1716 }
1717 /* If the last entry is not a TSR, place one in the SCQ in order to
1718 be able to completely drain it and then close. */
1719 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
1720 {
1721 ns_scqe tsr;
1722 u32 scdi, scqi;
1723 u32 data;
1724 int index;
1725
1726 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1727 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1728 scqi = scq->next - scq->base;
1729 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1730 tsr.word_3 = 0x00000000;
1731 tsr.word_4 = 0x00000000;
1732 *scq->next = tsr;
1733 index = (int) scqi;
1734 scq->skb[index] = NULL;
1735 if (scq->next == scq->last)
1736 scq->next = scq->base;
1737 else
1738 scq->next++;
1739 data = (u32) virt_to_bus(scq->next);
1740 ns_write_sram(card, scq->scd, &data, 1);
1741 }
1742 spin_unlock_irqrestore(&scq->lock, flags);
1743 schedule();
1744 }
1745
1746 /* Free all TST entries */
1747 data = NS_TST_OPCODE_VARIABLE;
1748 for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
1749 {
1750 if (card->tste2vc[i] == vc)
1751 {
1752 ns_write_sram(card, card->tst_addr + i, &data, 1);
1753 card->tste2vc[i] = NULL;
1754 card->tst_free_entries++;
1755 }
1756 }
1757
1758 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1759 free_scq(vc->scq, vcc);
1760 }
1761
1762 vcc->dev_data = NULL;
1763 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1764 clear_bit(ATM_VF_ADDR,&vcc->flags);
1765
1766 #ifdef RX_DEBUG
1767 {
1768 u32 stat, cfg;
1769 stat = readl(card->membase + STAT);
1770 cfg = readl(card->membase + CFG);
1771 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1772 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
1773 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
1774 readl(card->membase + TSQT));
1775 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
1776 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
1777 readl(card->membase + RSQT));
1778 printk("Empty free buffer queue interrupt %s \n",
1779 card->efbie ? "enabled" : "disabled");
1780 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1781 ns_stat_sfbqc_get(stat), card->sbpool.count,
1782 ns_stat_lfbqc_get(stat), card->lbpool.count);
1783 printk("hbpool.count = %d iovpool.count = %d \n",
1784 card->hbpool.count, card->iovpool.count);
1785 }
1786 #endif /* RX_DEBUG */
1787 }
1788
1789
1790
1791 static void fill_tst(ns_dev *card, int n, vc_map *vc)
1792 {
1793 u32 new_tst;
1794 unsigned long cl;
1795 int e, r;
1796 u32 data;
1797
1798 /* It would be very complicated to keep the two TSTs synchronized while
1799 assuring that writes are only made to the inactive TST. So, for now I
1800 will use only one TST. If problems occur, I will change this again */
1801
1802 new_tst = card->tst_addr;
1803
1804 /* Fill procedure */
1805
1806 for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
1807 {
1808 if (card->tste2vc[e] == NULL)
1809 break;
1810 }
1811 if (e == NS_TST_NUM_ENTRIES) {
1812 printk("nicstar%d: No free TST entries found. \n", card->index);
1813 return;
1814 }
1815
1816 r = n;
1817 cl = NS_TST_NUM_ENTRIES;
1818 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1819
1820 while (r > 0)
1821 {
1822 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
1823 {
1824 card->tste2vc[e] = vc;
1825 ns_write_sram(card, new_tst + e, &data, 1);
1826 cl -= NS_TST_NUM_ENTRIES;
1827 r--;
1828 }
1829
1830 if (++e == NS_TST_NUM_ENTRIES) {
1831 e = 0;
1832 }
1833 cl += n;
1834 }
1835
1836 /* End of fill procedure */
1837
1838 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1839 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1840 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1841 card->tst_addr = new_tst;
1842 }
1843
1844
1845
1846 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1847 {
1848 ns_dev *card;
1849 vc_map *vc;
1850 scq_info *scq;
1851 unsigned long buflen;
1852 ns_scqe scqe;
1853 u32 flags; /* TBD flags, not CPU flags */
1854
1855 card = vcc->dev->dev_data;
1856 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1857 if ((vc = (vc_map *) vcc->dev_data) == NULL)
1858 {
1859 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
1860 atomic_inc(&vcc->stats->tx_err);
1861 dev_kfree_skb_any(skb);
1862 return -EINVAL;
1863 }
1864
1865 if (!vc->tx)
1866 {
1867 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1868 atomic_inc(&vcc->stats->tx_err);
1869 dev_kfree_skb_any(skb);
1870 return -EINVAL;
1871 }
1872
1873 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1874 {
1875 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1876 atomic_inc(&vcc->stats->tx_err);
1877 dev_kfree_skb_any(skb);
1878 return -EINVAL;
1879 }
1880
1881 if (ATM_SKB(skb)->iovcnt != 0)
1882 {
1883 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1884 atomic_inc(&vcc->stats->tx_err);
1885 dev_kfree_skb_any(skb);
1886 return -EINVAL;
1887 }
1888
1889 ATM_SKB(skb)->vcc = vcc;
1890
1891 if (vcc->qos.aal == ATM_AAL5)
1892 {
1893 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1894 flags = NS_TBD_AAL5;
1895 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1896 scqe.word_3 = cpu_to_le32((u32) skb->len);
1897 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1898 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1899 flags |= NS_TBD_EOPDU;
1900 }
1901 else /* (vcc->qos.aal == ATM_AAL0) */
1902 {
1903 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1904 flags = NS_TBD_AAL0;
1905 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1906 scqe.word_3 = cpu_to_le32(0x00000000);
1907 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1908 flags |= NS_TBD_EOPDU;
1909 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1910 /* Force the VPI/VCI to be the same as in VCC struct */
1911 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1912 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1913 NS_TBD_VC_MASK);
1914 }
1915
1916 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1917 {
1918 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1919 scq = ((vc_map *) vcc->dev_data)->scq;
1920 }
1921 else
1922 {
1923 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1924 scq = card->scq0;
1925 }
1926
1927 if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1928 {
1929 atomic_inc(&vcc->stats->tx_err);
1930 dev_kfree_skb_any(skb);
1931 return -EIO;
1932 }
1933 atomic_inc(&vcc->stats->tx);
1934
1935 return 0;
1936 }
1937
1938
1939
1940 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
1941 struct sk_buff *skb)
1942 {
1943 unsigned long flags;
1944 ns_scqe tsr;
1945 u32 scdi, scqi;
1946 int scq_is_vbr;
1947 u32 data;
1948 int index;
1949
1950 ns_grab_scq_lock(card, scq, flags);
1951 while (scq->tail == scq->next)
1952 {
1953 if (in_interrupt()) {
1954 spin_unlock_irqrestore(&scq->lock, flags);
1955 printk("nicstar%d: Error pushing TBD.\n", card->index);
1956 return 1;
1957 }
1958
1959 scq->full = 1;
1960 spin_unlock_irqrestore(&scq->lock, flags);
1961 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1962 ns_grab_scq_lock(card, scq, flags);
1963
1964 if (scq->full) {
1965 spin_unlock_irqrestore(&scq->lock, flags);
1966 printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1967 return 1;
1968 }
1969 }
1970 *scq->next = *tbd;
1971 index = (int) (scq->next - scq->base);
1972 scq->skb[index] = skb;
1973 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1974 card->index, (u32) skb, index);
1975 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1976 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1977 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1978 (u32) scq->next);
1979 if (scq->next == scq->last)
1980 scq->next = scq->base;
1981 else
1982 scq->next++;
1983
1984 vc->tbd_count++;
1985 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1986 {
1987 scq->tbd_count++;
1988 scq_is_vbr = 1;
1989 }
1990 else
1991 scq_is_vbr = 0;
1992
1993 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1994 {
1995 int has_run = 0;
1996
1997 while (scq->tail == scq->next)
1998 {
1999 if (in_interrupt()) {
2000 data = (u32) virt_to_bus(scq->next);
2001 ns_write_sram(card, scq->scd, &data, 1);
2002 spin_unlock_irqrestore(&scq->lock, flags);
2003 printk("nicstar%d: Error pushing TSR.\n", card->index);
2004 return 0;
2005 }
2006
2007 scq->full = 1;
2008 if (has_run++) break;
2009 spin_unlock_irqrestore(&scq->lock, flags);
2010 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
2011 ns_grab_scq_lock(card, scq, flags);
2012 }
2013
2014 if (!scq->full)
2015 {
2016 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
2017 if (scq_is_vbr)
2018 scdi = NS_TSR_SCDISVBR;
2019 else
2020 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
2021 scqi = scq->next - scq->base;
2022 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
2023 tsr.word_3 = 0x00000000;
2024 tsr.word_4 = 0x00000000;
2025
2026 *scq->next = tsr;
2027 index = (int) scqi;
2028 scq->skb[index] = NULL;
2029 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
2030 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
2031 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
2032 (u32) scq->next);
2033 if (scq->next == scq->last)
2034 scq->next = scq->base;
2035 else
2036 scq->next++;
2037 vc->tbd_count = 0;
2038 scq->tbd_count = 0;
2039 }
2040 else
2041 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
2042 }
2043 data = (u32) virt_to_bus(scq->next);
2044 ns_write_sram(card, scq->scd, &data, 1);
2045
2046 spin_unlock_irqrestore(&scq->lock, flags);
2047
2048 return 0;
2049 }
2050
2051
2052
2053 static void process_tsq(ns_dev *card)
2054 {
2055 u32 scdi;
2056 scq_info *scq;
2057 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
2058 int serviced_entries; /* flag indicating at least on entry was serviced */
2059
2060 serviced_entries = 0;
2061
2062 if (card->tsq.next == card->tsq.last)
2063 one_ahead = card->tsq.base;
2064 else
2065 one_ahead = card->tsq.next + 1;
2066
2067 if (one_ahead == card->tsq.last)
2068 two_ahead = card->tsq.base;
2069 else
2070 two_ahead = one_ahead + 1;
2071
2072 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
2073 !ns_tsi_isempty(two_ahead))
2074 /* At most two empty, as stated in the 77201 errata */
2075 {
2076 serviced_entries = 1;
2077
2078 /* Skip the one or two possible empty entries */
2079 while (ns_tsi_isempty(card->tsq.next)) {
2080 if (card->tsq.next == card->tsq.last)
2081 card->tsq.next = card->tsq.base;
2082 else
2083 card->tsq.next++;
2084 }
2085
2086 if (!ns_tsi_tmrof(card->tsq.next))
2087 {
2088 scdi = ns_tsi_getscdindex(card->tsq.next);
2089 if (scdi == NS_TSI_SCDISVBR)
2090 scq = card->scq0;
2091 else
2092 {
2093 if (card->scd2vc[scdi] == NULL)
2094 {
2095 printk("nicstar%d: could not find VC from SCD index.\n",
2096 card->index);
2097 ns_tsi_init(card->tsq.next);
2098 return;
2099 }
2100 scq = card->scd2vc[scdi]->scq;
2101 }
2102 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
2103 scq->full = 0;
2104 wake_up_interruptible(&(scq->scqfull_waitq));
2105 }
2106
2107 ns_tsi_init(card->tsq.next);
2108 previous = card->tsq.next;
2109 if (card->tsq.next == card->tsq.last)
2110 card->tsq.next = card->tsq.base;
2111 else
2112 card->tsq.next++;
2113
2114 if (card->tsq.next == card->tsq.last)
2115 one_ahead = card->tsq.base;
2116 else
2117 one_ahead = card->tsq.next + 1;
2118
2119 if (one_ahead == card->tsq.last)
2120 two_ahead = card->tsq.base;
2121 else
2122 two_ahead = one_ahead + 1;
2123 }
2124
2125 if (serviced_entries) {
2126 writel((((u32) previous) - ((u32) card->tsq.base)),
2127 card->membase + TSQH);
2128 }
2129 }
2130
2131
2132
2133 static void drain_scq(ns_dev *card, scq_info *scq, int pos)
2134 {
2135 struct atm_vcc *vcc;
2136 struct sk_buff *skb;
2137 int i;
2138 unsigned long flags;
2139
2140 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
2141 card->index, (u32) scq, pos);
2142 if (pos >= scq->num_entries)
2143 {
2144 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
2145 return;
2146 }
2147
2148 ns_grab_scq_lock(card, scq, flags);
2149 i = (int) (scq->tail - scq->base);
2150 if (++i == scq->num_entries)
2151 i = 0;
2152 while (i != pos)
2153 {
2154 skb = scq->skb[i];
2155 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
2156 card->index, (u32) skb, i);
2157 if (skb != NULL)
2158 {
2159 vcc = ATM_SKB(skb)->vcc;
2160 if (vcc->pop != NULL) {
2161 vcc->pop(vcc, skb);
2162 } else {
2163 dev_kfree_skb_irq(skb);
2164 }
2165 scq->skb[i] = NULL;
2166 }
2167 if (++i == scq->num_entries)
2168 i = 0;
2169 }
2170 scq->tail = scq->base + pos;
2171 spin_unlock_irqrestore(&scq->lock, flags);
2172 }
2173
2174
2175
2176 static void process_rsq(ns_dev *card)
2177 {
2178 ns_rsqe *previous;
2179
2180 if (!ns_rsqe_valid(card->rsq.next))
2181 return;
2182 while (ns_rsqe_valid(card->rsq.next))
2183 {
2184 dequeue_rx(card, card->rsq.next);
2185 ns_rsqe_init(card->rsq.next);
2186 previous = card->rsq.next;
2187 if (card->rsq.next == card->rsq.last)
2188 card->rsq.next = card->rsq.base;
2189 else
2190 card->rsq.next++;
2191 }
2192 writel((((u32) previous) - ((u32) card->rsq.base)),
2193 card->membase + RSQH);
2194 }
2195
2196
2197
2198 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
2199 {
2200 u32 vpi, vci;
2201 vc_map *vc;
2202 struct sk_buff *iovb;
2203 struct iovec *iov;
2204 struct atm_vcc *vcc;
2205 struct sk_buff *skb;
2206 unsigned short aal5_len;
2207 int len;
2208 u32 stat;
2209
2210 stat = readl(card->membase + STAT);
2211 card->sbfqc = ns_stat_sfbqc_get(stat);
2212 card->lbfqc = ns_stat_lfbqc_get(stat);
2213
2214 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
2215 vpi = ns_rsqe_vpi(rsqe);
2216 vci = ns_rsqe_vci(rsqe);
2217 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
2218 {
2219 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2220 card->index, vpi, vci);
2221 recycle_rx_buf(card, skb);
2222 return;
2223 }
2224
2225 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2226 if (!vc->rx)
2227 {
2228 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2229 card->index, vpi, vci);
2230 recycle_rx_buf(card, skb);
2231 return;
2232 }
2233
2234 vcc = vc->rx_vcc;
2235
2236 if (vcc->qos.aal == ATM_AAL0)
2237 {
2238 struct sk_buff *sb;
2239 unsigned char *cell;
2240 int i;
2241
2242 cell = skb->data;
2243 for (i = ns_rsqe_cellcount(rsqe); i; i--)
2244 {
2245 if ((sb = alloc_skb(NS_SMSKBSIZE, GFP_ATOMIC)) == NULL)
2246 {
2247 printk("nicstar%d: Can't allocate buffers for aal0.\n",
2248 card->index);
2249 atomic_add(i,&vcc->stats->rx_drop);
2250 break;
2251 }
2252 if (!atm_charge(vcc, sb->truesize))
2253 {
2254 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2255 card->index);
2256 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2257 dev_kfree_skb_any(sb);
2258 break;
2259 }
2260 /* Rebuild the header */
2261 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2262 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2263 if (i == 1 && ns_rsqe_eopdu(rsqe))
2264 *((u32 *) sb->data) |= 0x00000002;
2265 skb_put(sb, NS_AAL0_HEADER);
2266 memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
2267 skb_put(sb, ATM_CELL_PAYLOAD);
2268 ATM_SKB(sb)->vcc = vcc;
2269 sb->stamp = xtime;
2270 vcc->push(vcc, sb);
2271 atomic_inc(&vcc->stats->rx);
2272 cell += ATM_CELL_PAYLOAD;
2273 }
2274
2275 recycle_rx_buf(card, skb);
2276 return;
2277 }
2278
2279 /* To reach this point, the AAL layer can only be AAL5 */
2280
2281 if ((iovb = vc->rx_iov) == NULL)
2282 {
2283 iovb = skb_dequeue(&(card->iovpool.queue));
2284 if (iovb == NULL) /* No buffers in the queue */
2285 {
2286 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2287 if (iovb == NULL)
2288 {
2289 printk("nicstar%d: Out of iovec buffers.\n", card->index);
2290 atomic_inc(&vcc->stats->rx_drop);
2291 recycle_rx_buf(card, skb);
2292 return;
2293 }
2294 }
2295 else
2296 if (--card->iovpool.count < card->iovnr.min)
2297 {
2298 struct sk_buff *new_iovb;
2299 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2300 {
2301 skb_queue_tail(&card->iovpool.queue, new_iovb);
2302 card->iovpool.count++;
2303 }
2304 }
2305 vc->rx_iov = iovb;
2306 ATM_SKB(iovb)->iovcnt = 0;
2307 iovb->len = 0;
2308 iovb->tail = iovb->data = iovb->head;
2309 ATM_SKB(iovb)->vcc = vcc;
2310 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2311 buffer is stored as iovec base, NOT a pointer to the
2312 small or large buffer itself. */
2313 }
2314 else if (ATM_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2315 {
2316 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2317 atomic_inc(&vcc->stats->rx_err);
2318 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2319 ATM_SKB(iovb)->iovcnt = 0;
2320 iovb->len = 0;
2321 iovb->tail = iovb->data = iovb->head;
2322 ATM_SKB(iovb)->vcc = vcc;
2323 }
2324 iov = &((struct iovec *) iovb->data)[ATM_SKB(iovb)->iovcnt++];
2325 iov->iov_base = (void *) skb;
2326 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2327 iovb->len += iov->iov_len;
2328
2329 if (ATM_SKB(iovb)->iovcnt == 1)
2330 {
2331 if (skb->list != &card->sbpool.queue)
2332 {
2333 printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2334 card->index);
2335 which_list(card, skb);
2336 atomic_inc(&vcc->stats->rx_err);
2337 recycle_rx_buf(card, skb);
2338 vc->rx_iov = NULL;
2339 recycle_iov_buf(card, iovb);
2340 return;
2341 }
2342 }
2343 else /* ATM_SKB(iovb)->iovcnt >= 2 */
2344 {
2345 if (skb->list != &card->lbpool.queue)
2346 {
2347 printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2348 card->index);
2349 which_list(card, skb);
2350 atomic_inc(&vcc->stats->rx_err);
2351 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2352 ATM_SKB(iovb)->iovcnt);
2353 vc->rx_iov = NULL;
2354 recycle_iov_buf(card, iovb);
2355 return;
2356 }
2357 }
2358
2359 if (ns_rsqe_eopdu(rsqe))
2360 {
2361 /* This works correctly regardless of the endianness of the host */
2362 unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2363 iov->iov_len - 6);
2364 aal5_len = L1L2[0] << 8 | L1L2[1];
2365 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2366 if (ns_rsqe_crcerr(rsqe) ||
2367 len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2368 {
2369 printk("nicstar%d: AAL5 CRC error", card->index);
2370 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2371 printk(" - PDU size mismatch.\n");
2372 else
2373 printk(".\n");
2374 atomic_inc(&vcc->stats->rx_err);
2375 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2376 ATM_SKB(iovb)->iovcnt);
2377 vc->rx_iov = NULL;
2378 recycle_iov_buf(card, iovb);
2379 return;
2380 }
2381
2382 /* By this point we (hopefully) have a complete SDU without errors. */
2383
2384 if (ATM_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
2385 {
2386 /* skb points to a small buffer */
2387 if (!atm_charge(vcc, skb->truesize))
2388 {
2389 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
2390 0, 0);
2391 }
2392 else
2393 {
2394 skb_put(skb, len);
2395 dequeue_sm_buf(card, skb);
2396 #ifdef NS_USE_DESTRUCTORS
2397 skb->destructor = ns_sb_destructor;
2398 #endif /* NS_USE_DESTRUCTORS */
2399 ATM_SKB(skb)->vcc = vcc;
2400 skb->stamp = xtime;
2401 vcc->push(vcc, skb);
2402 atomic_inc(&vcc->stats->rx);
2403 }
2404 }
2405 else if (ATM_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
2406 {
2407 struct sk_buff *sb;
2408
2409 sb = (struct sk_buff *) (iov - 1)->iov_base;
2410 /* skb points to a large buffer */
2411
2412 if (len <= NS_SMBUFSIZE)
2413 {
2414 if (!atm_charge(vcc, sb->truesize))
2415 {
2416 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2417 0, 0);
2418 }
2419 else
2420 {
2421 skb_put(sb, len);
2422 dequeue_sm_buf(card, sb);
2423 #ifdef NS_USE_DESTRUCTORS
2424 sb->destructor = ns_sb_destructor;
2425 #endif /* NS_USE_DESTRUCTORS */
2426 ATM_SKB(sb)->vcc = vcc;
2427 sb->stamp = xtime;
2428 vcc->push(vcc, sb);
2429 atomic_inc(&vcc->stats->rx);
2430 }
2431
2432 push_rxbufs(card, BUF_LG, (u32) skb,
2433 (u32) virt_to_bus(skb->data), 0, 0);
2434
2435 }
2436 else /* len > NS_SMBUFSIZE, the usual case */
2437 {
2438 if (!atm_charge(vcc, skb->truesize))
2439 {
2440 push_rxbufs(card, BUF_LG, (u32) skb,
2441 (u32) virt_to_bus(skb->data), 0, 0);
2442 }
2443 else
2444 {
2445 dequeue_lg_buf(card, skb);
2446 #ifdef NS_USE_DESTRUCTORS
2447 skb->destructor = ns_lb_destructor;
2448 #endif /* NS_USE_DESTRUCTORS */
2449 skb_push(skb, NS_SMBUFSIZE);
2450 memcpy(skb->data, sb->data, NS_SMBUFSIZE);
2451 skb_put(skb, len - NS_SMBUFSIZE);
2452 ATM_SKB(skb)->vcc = vcc;
2453 skb->stamp = xtime;
2454 vcc->push(vcc, skb);
2455 atomic_inc(&vcc->stats->rx);
2456 }
2457
2458 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2459 0, 0);
2460
2461 }
2462
2463 }
2464 else /* Must push a huge buffer */
2465 {
2466 struct sk_buff *hb, *sb, *lb;
2467 int remaining, tocopy;
2468 int j;
2469
2470 hb = skb_dequeue(&(card->hbpool.queue));
2471 if (hb == NULL) /* No buffers in the queue */
2472 {
2473
2474 hb = alloc_skb(NS_HBUFSIZE, GFP_ATOMIC);
2475 if (hb == NULL)
2476 {
2477 printk("nicstar%d: Out of huge buffers.\n", card->index);
2478 atomic_inc(&vcc->stats->rx_drop);
2479 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2480 ATM_SKB(iovb)->iovcnt);
2481 vc->rx_iov = NULL;
2482 recycle_iov_buf(card, iovb);
2483 return;
2484 }
2485 else if (card->hbpool.count < card->hbnr.min)
2486 {
2487 struct sk_buff *new_hb;
2488 if ((new_hb = alloc_skb(NS_HBUFSIZE, GFP_ATOMIC)) != NULL)
2489 {
2490 skb_queue_tail(&card->hbpool.queue, new_hb);
2491 card->hbpool.count++;
2492 }
2493 }
2494 }
2495 else
2496 if (--card->hbpool.count < card->hbnr.min)
2497 {
2498 struct sk_buff *new_hb;
2499 if ((new_hb = alloc_skb(NS_HBUFSIZE, GFP_ATOMIC)) != NULL)
2500 {
2501 skb_queue_tail(&card->hbpool.queue, new_hb);
2502 card->hbpool.count++;
2503 }
2504 if (card->hbpool.count < card->hbnr.min)
2505 {
2506 if ((new_hb = alloc_skb(NS_HBUFSIZE, GFP_ATOMIC)) != NULL)
2507 {
2508 skb_queue_tail(&card->hbpool.queue, new_hb);
2509 card->hbpool.count++;
2510 }
2511 }
2512 }
2513
2514 iov = (struct iovec *) iovb->data;
2515
2516 if (!atm_charge(vcc, hb->truesize))
2517 {
2518 recycle_iovec_rx_bufs(card, iov, ATM_SKB(iovb)->iovcnt);
2519 if (card->hbpool.count < card->hbnr.max)
2520 {
2521 skb_queue_tail(&card->hbpool.queue, hb);
2522 card->hbpool.count++;
2523 }
2524 else
2525 dev_kfree_skb_any(hb);
2526 }
2527 else
2528 {
2529 /* Copy the small buffer to the huge buffer */
2530 sb = (struct sk_buff *) iov->iov_base;
2531 memcpy(hb->data, sb->data, iov->iov_len);
2532 skb_put(hb, iov->iov_len);
2533 remaining = len - iov->iov_len;
2534 iov++;
2535 /* Free the small buffer */
2536 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2537 0, 0);
2538
2539 /* Copy all large buffers to the huge buffer and free them */
2540 for (j = 1; j < ATM_SKB(iovb)->iovcnt; j++)
2541 {
2542 lb = (struct sk_buff *) iov->iov_base;
2543 tocopy = MIN(remaining, iov->iov_len);
2544 memcpy(hb->tail, lb->data, tocopy);
2545 skb_put(hb, tocopy);
2546 iov++;
2547 remaining -= tocopy;
2548 push_rxbufs(card, BUF_LG, (u32) lb,
2549 (u32) virt_to_bus(lb->data), 0, 0);
2550 }
2551 #ifdef EXTRA_DEBUG
2552 if (remaining != 0 || hb->len != len)
2553 printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
2554 #endif /* EXTRA_DEBUG */
2555 ATM_SKB(hb)->vcc = vcc;
2556 #ifdef NS_USE_DESTRUCTORS
2557 hb->destructor = ns_hb_destructor;
2558 #endif /* NS_USE_DESTRUCTORS */
2559 hb->stamp = xtime;
2560 vcc->push(vcc, hb);
2561 atomic_inc(&vcc->stats->rx);
2562 }
2563 }
2564
2565 vc->rx_iov = NULL;
2566 recycle_iov_buf(card, iovb);
2567 }
2568
2569 }
2570
2571
2572
2573 #ifdef NS_USE_DESTRUCTORS
2574
2575 static void ns_sb_destructor(struct sk_buff *sb)
2576 {
2577 ns_dev *card;
2578 u32 stat;
2579
2580 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2581 stat = readl(card->membase + STAT);
2582 card->sbfqc = ns_stat_sfbqc_get(stat);
2583 card->lbfqc = ns_stat_lfbqc_get(stat);
2584
2585 do
2586 {
2587 sb = alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2588 if (sb == NULL)
2589 break;
2590 skb_queue_tail(&card->sbpool.queue, sb);
2591 skb_reserve(sb, NS_AAL0_HEADER);
2592 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
2593 } while (card->sbfqc < card->sbnr.min);
2594 }
2595
2596
2597
2598 static void ns_lb_destructor(struct sk_buff *lb)
2599 {
2600 ns_dev *card;
2601 u32 stat;
2602
2603 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2604 stat = readl(card->membase + STAT);
2605 card->sbfqc = ns_stat_sfbqc_get(stat);
2606 card->lbfqc = ns_stat_lfbqc_get(stat);
2607
2608 do
2609 {
2610 lb = alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2611 if (lb == NULL)
2612 break;
2613 skb_queue_tail(&card->lbpool.queue, lb);
2614 skb_reserve(lb, NS_SMBUFSIZE);
2615 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
2616 } while (card->lbfqc < card->lbnr.min);
2617 }
2618
2619
2620
2621 static void ns_hb_destructor(struct sk_buff *hb)
2622 {
2623 ns_dev *card;
2624
2625 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2626
2627 while (card->hbpool.count < card->hbnr.init)
2628 {
2629 hb = alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2630 if (hb == NULL)
2631 break;
2632 skb_queue_tail(&card->hbpool.queue, hb);
2633 card->hbpool.count++;
2634 }
2635 }
2636
2637 #endif /* NS_USE_DESTRUCTORS */
2638
2639
2640
2641 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2642 {
2643 if (skb->list == &card->sbpool.queue)
2644 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
2645 else if (skb->list == &card->lbpool.queue)
2646 push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
2647 else
2648 {
2649 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2650 dev_kfree_skb_any(skb);
2651 }
2652 }
2653
2654
2655
2656 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2657 {
2658 struct sk_buff *skb;
2659
2660 for (; count > 0; count--)
2661 {
2662 skb = (struct sk_buff *) (iov++)->iov_base;
2663 if (skb->list == &card->sbpool.queue)
2664 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
2665 0, 0);
2666 else if (skb->list == &card->lbpool.queue)
2667 push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data),
2668 0, 0);
2669 else
2670 {
2671 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2672 dev_kfree_skb_any(skb);
2673 }
2674 }
2675 }
2676
2677
2678
2679 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2680 {
2681 if (card->iovpool.count < card->iovnr.max)
2682 {
2683 skb_queue_tail(&card->iovpool.queue, iovb);
2684 card->iovpool.count++;
2685 }
2686 else
2687 dev_kfree_skb_any(iovb);
2688 }
2689
2690
2691
2692 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2693 {
2694 skb_unlink(sb);
2695 #ifdef NS_USE_DESTRUCTORS
2696 if (card->sbfqc < card->sbnr.min)
2697 #else
2698 if (card->sbfqc < card->sbnr.init)
2699 {
2700 struct sk_buff *new_sb;
2701 if ((new_sb = alloc_skb(NS_SMSKBSIZE, GFP_ATOMIC)) != NULL)
2702 {
2703 skb_queue_tail(&card->sbpool.queue, new_sb);
2704 skb_reserve(new_sb, NS_AAL0_HEADER);
2705 push_rxbufs(card, BUF_SM, (u32) new_sb,
2706 (u32) virt_to_bus(new_sb->data), 0, 0);
2707 }
2708 }
2709 if (card->sbfqc < card->sbnr.init)
2710 #endif /* NS_USE_DESTRUCTORS */
2711 {
2712 struct sk_buff *new_sb;
2713 if ((new_sb = alloc_skb(NS_SMSKBSIZE, GFP_ATOMIC)) != NULL)
2714 {
2715 skb_queue_tail(&card->sbpool.queue, new_sb);
2716 skb_reserve(new_sb, NS_AAL0_HEADER);
2717 push_rxbufs(card, BUF_SM, (u32) new_sb,
2718 (u32) virt_to_bus(new_sb->data), 0, 0);
2719 }
2720 }
2721 }
2722
2723
2724
2725 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2726 {
2727 skb_unlink(lb);
2728 #ifdef NS_USE_DESTRUCTORS
2729 if (card->lbfqc < card->lbnr.min)
2730 #else
2731 if (card->lbfqc < card->lbnr.init)
2732 {
2733 struct sk_buff *new_lb;
2734 if ((new_lb = alloc_skb(NS_LGSKBSIZE, GFP_ATOMIC)) != NULL)
2735 {
2736 skb_queue_tail(&card->lbpool.queue, new_lb);
2737 skb_reserve(new_lb, NS_SMBUFSIZE);
2738 push_rxbufs(card, BUF_LG, (u32) new_lb,
2739 (u32) virt_to_bus(new_lb->data), 0, 0);
2740 }
2741 }
2742 if (card->lbfqc < card->lbnr.init)
2743 #endif /* NS_USE_DESTRUCTORS */
2744 {
2745 struct sk_buff *new_lb;
2746 if ((new_lb = alloc_skb(NS_LGSKBSIZE, GFP_ATOMIC)) != NULL)
2747 {
2748 skb_queue_tail(&card->lbpool.queue, new_lb);
2749 skb_reserve(new_lb, NS_SMBUFSIZE);
2750 push_rxbufs(card, BUF_LG, (u32) new_lb,
2751 (u32) virt_to_bus(new_lb->data), 0, 0);
2752 }
2753 }
2754 }
2755
2756
2757
2758 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2759 {
2760 u32 stat;
2761 ns_dev *card;
2762 int left;
2763
2764 left = (int) *pos;
2765 card = (ns_dev *) dev->dev_data;
2766 stat = readl(card->membase + STAT);
2767 if (!left--)
2768 return sprintf(page, "Pool count min init max \n");
2769 if (!left--)
2770 return sprintf(page, "Small %5d %5d %5d %5d \n",
2771 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
2772 card->sbnr.max);
2773 if (!left--)
2774 return sprintf(page, "Large %5d %5d %5d %5d \n",
2775 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
2776 card->lbnr.max);
2777 if (!left--)
2778 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
2779 card->hbnr.min, card->hbnr.init, card->hbnr.max);
2780 if (!left--)
2781 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
2782 card->iovnr.min, card->iovnr.init, card->iovnr.max);
2783 if (!left--)
2784 {
2785 int retval;
2786 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2787 card->intcnt = 0;
2788 return retval;
2789 }
2790 #if 0
2791 /* Dump 25.6 Mbps PHY registers */
2792 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2793 here just in case it's needed for debugging. */
2794 if (card->max_pcr == ATM_25_PCR && !left--)
2795 {
2796 u32 phy_regs[4];
2797 u32 i;
2798
2799 for (i = 0; i < 4; i++)
2800 {
2801 while (CMD_BUSY(card));
2802 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
2803 while (CMD_BUSY(card));
2804 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2805 }
2806
2807 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2808 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
2809 }
2810 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2811 #if 0
2812 /* Dump TST */
2813 if (left-- < NS_TST_NUM_ENTRIES)
2814 {
2815 if (card->tste2vc[left + 1] == NULL)
2816 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2817 else
2818 return sprintf(page, "%5d - %d %d \n", left + 1,
2819 card->tste2vc[left + 1]->tx_vcc->vpi,
2820 card->tste2vc[left + 1]->tx_vcc->vci);
2821 }
2822 #endif /* 0 */
2823 return 0;
2824 }
2825
2826
2827
2828 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg)
2829 {
2830 ns_dev *card;
2831 pool_levels pl;
2832 int btype;
2833 unsigned long flags;
2834
2835 card = dev->dev_data;
2836 switch (cmd)
2837 {
2838 case NS_GETPSTAT:
2839 if (get_user(pl.buftype, &((pool_levels *) arg)->buftype))
2840 return -EFAULT;
2841 switch (pl.buftype)
2842 {
2843 case NS_BUFTYPE_SMALL:
2844 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
2845 pl.level.min = card->sbnr.min;
2846 pl.level.init = card->sbnr.init;
2847 pl.level.max = card->sbnr.max;
2848 break;
2849
2850 case NS_BUFTYPE_LARGE:
2851 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
2852 pl.level.min = card->lbnr.min;
2853 pl.level.init = card->lbnr.init;
2854 pl.level.max = card->lbnr.max;
2855 break;
2856
2857 case NS_BUFTYPE_HUGE:
2858 pl.count = card->hbpool.count;
2859 pl.level.min = card->hbnr.min;
2860 pl.level.init = card->hbnr.init;
2861 pl.level.max = card->hbnr.max;
2862 break;
2863
2864 case NS_BUFTYPE_IOVEC:
2865 pl.count = card->iovpool.count;
2866 pl.level.min = card->iovnr.min;
2867 pl.level.init = card->iovnr.init;
2868 pl.level.max = card->iovnr.max;
2869 break;
2870
2871 default:
2872 return -ENOIOCTLCMD;
2873
2874 }
2875 if (!copy_to_user((pool_levels *) arg, &pl, sizeof(pl)))
2876 return (sizeof(pl));
2877 else
2878 return -EFAULT;
2879
2880 case NS_SETBUFLEV:
2881 if (!capable(CAP_NET_ADMIN))
2882 return -EPERM;
2883 if (copy_from_user(&pl, (pool_levels *) arg, sizeof(pl)))
2884 return -EFAULT;
2885 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
2886 return -EINVAL;
2887 if (pl.level.min == 0)
2888 return -EINVAL;
2889 switch (pl.buftype)
2890 {
2891 case NS_BUFTYPE_SMALL:
2892 if (pl.level.max > TOP_SB)
2893 return -EINVAL;
2894 card->sbnr.min = pl.level.min;
2895 card->sbnr.init = pl.level.init;
2896 card->sbnr.max = pl.level.max;
2897 break;
2898
2899 case NS_BUFTYPE_LARGE:
2900 if (pl.level.max > TOP_LB)
2901 return -EINVAL;
2902 card->lbnr.min = pl.level.min;
2903 card->lbnr.init = pl.level.init;
2904 card->lbnr.max = pl.level.max;
2905 break;
2906
2907 case NS_BUFTYPE_HUGE:
2908 if (pl.level.max > TOP_HB)
2909 return -EINVAL;
2910 card->hbnr.min = pl.level.min;
2911 card->hbnr.init = pl.level.init;
2912 card->hbnr.max = pl.level.max;
2913 break;
2914
2915 case NS_BUFTYPE_IOVEC:
2916 if (pl.level.max > TOP_IOVB)
2917 return -EINVAL;
2918 card->iovnr.min = pl.level.min;
2919 card->iovnr.init = pl.level.init;
2920 card->iovnr.max = pl.level.max;
2921 break;
2922
2923 default:
2924 return -EINVAL;
2925
2926 }
2927 return 0;
2928
2929 case NS_ADJBUFLEV:
2930 if (!capable(CAP_NET_ADMIN))
2931 return -EPERM;
2932 btype = (int) arg; /* an int is the same size as a pointer */
2933 switch (btype)
2934 {
2935 case NS_BUFTYPE_SMALL:
2936 while (card->sbfqc < card->sbnr.init)
2937 {
2938 struct sk_buff *sb;
2939
2940 sb = alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2941 if (sb == NULL)
2942 return -ENOMEM;
2943 skb_queue_tail(&card->sbpool.queue, sb);
2944 skb_reserve(sb, NS_AAL0_HEADER);
2945 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
2946 }
2947 break;
2948
2949 case NS_BUFTYPE_LARGE:
2950 while (card->lbfqc < card->lbnr.init)
2951 {
2952 struct sk_buff *lb;
2953
2954 lb = alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2955 if (lb == NULL)
2956 return -ENOMEM;
2957 skb_queue_tail(&card->lbpool.queue, lb);
2958 skb_reserve(lb, NS_SMBUFSIZE);
2959 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
2960 }
2961 break;
2962
2963 case NS_BUFTYPE_HUGE:
2964 while (card->hbpool.count > card->hbnr.init)
2965 {
2966 struct sk_buff *hb;
2967
2968 ns_grab_int_lock(card, flags);
2969 hb = skb_dequeue(&card->hbpool.queue);
2970 card->hbpool.count--;
2971 spin_unlock_irqrestore(&card->int_lock, flags);
2972 if (hb == NULL)
2973 printk("nicstar%d: huge buffer count inconsistent.\n",
2974 card->index);
2975 else
2976 dev_kfree_skb_any(hb);
2977
2978 }
2979 while (card->hbpool.count < card->hbnr.init)
2980 {
2981 struct sk_buff *hb;
2982
2983 hb = alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2984 if (hb == NULL)
2985 return -ENOMEM;
2986 ns_grab_int_lock(card, flags);
2987 skb_queue_tail(&card->hbpool.queue, hb);
2988 card->hbpool.count++;
2989 spin_unlock_irqrestore(&card->int_lock, flags);
2990 }
2991 break;
2992
2993 case NS_BUFTYPE_IOVEC:
2994 while (card->iovpool.count > card->iovnr.init)
2995 {
2996 struct sk_buff *iovb;
2997
2998 ns_grab_int_lock(card, flags);
2999 iovb = skb_dequeue(&card->iovpool.queue);
3000 card->iovpool.count--;
3001 spin_unlock_irqrestore(&card->int_lock, flags);
3002 if (iovb == NULL)
3003 printk("nicstar%d: iovec buffer count inconsistent.\n",
3004 card->index);
3005 else
3006 dev_kfree_skb_any(iovb);
3007
3008 }
3009 while (card->iovpool.count < card->iovnr.init)
3010 {
3011 struct sk_buff *iovb;
3012
3013 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
3014 if (iovb == NULL)
3015 return -ENOMEM;
3016 ns_grab_int_lock(card, flags);
3017 skb_queue_tail(&card->iovpool.queue, iovb);
3018 card->iovpool.count++;
3019 spin_unlock_irqrestore(&card->int_lock, flags);
3020 }
3021 break;
3022
3023 default:
3024 return -EINVAL;
3025
3026 }
3027 return 0;
3028
3029 default:
3030 if (dev->phy && dev->phy->ioctl) {
3031 return dev->phy->ioctl(dev, cmd, arg);
3032 }
3033 else {
3034 printk("nicstar%d: %s == NULL \n", card->index,
3035 dev->phy ? "dev->phy->ioctl" : "dev->phy");
3036 return -ENOIOCTLCMD;
3037 }
3038 }
3039 }
3040
3041
3042
3043 static void which_list(ns_dev *card, struct sk_buff *skb)
3044 {
3045 printk("It's a %s buffer.\n", skb->list == &card->sbpool.queue ?
3046 "small" : skb->list == &card->lbpool.queue ? "large" :
3047 skb->list == &card->hbpool.queue ? "huge" :
3048 skb->list == &card->iovpool.queue ? "iovec" : "unknown");
3049 }
3050
3051
3052
3053 static void ns_poll(unsigned long arg)
3054 {
3055 int i;
3056 ns_dev *card;
3057 unsigned long flags;
3058 u32 stat_r, stat_w;
3059
3060 PRINTK("nicstar: Entering ns_poll().\n");
3061 for (i = 0; i < num_cards; i++)
3062 {
3063 card = cards[i];
3064 if (spin_is_locked(&card->int_lock)) {
3065 /* Probably it isn't worth spinning */
3066 continue;
3067 }
3068 ns_grab_int_lock(card, flags);
3069
3070 stat_w = 0;
3071 stat_r = readl(card->membase + STAT);
3072 if (stat_r & NS_STAT_TSIF)
3073 stat_w |= NS_STAT_TSIF;
3074 if (stat_r & NS_STAT_EOPDU)
3075 stat_w |= NS_STAT_EOPDU;
3076
3077 process_tsq(card);
3078 process_rsq(card);
3079
3080 writel(stat_w, card->membase + STAT);
3081 spin_unlock_irqrestore(&card->int_lock, flags);
3082 }
3083 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
3084 PRINTK("nicstar: Leaving ns_poll().\n");
3085 }
3086
3087
3088
3089 static int ns_parse_mac(char *mac, unsigned char *esi)
3090 {
3091 int i, j;
3092 short byte1, byte0;
3093
3094 if (mac == NULL || esi == NULL)
3095 return -1;
3096 j = 0;
3097 for (i = 0; i < 6; i++)
3098 {
3099 if ((byte1 = ns_h2i(mac[j++])) < 0)
3100 return -1;
3101 if ((byte0 = ns_h2i(mac[j++])) < 0)
3102 return -1;
3103 esi[i] = (unsigned char) (byte1 * 16 + byte0);
3104 if (i < 5)
3105 {
3106 if (mac[j++] != ':')
3107 return -1;
3108 }
3109 }
3110 return 0;
3111 }
3112
3113
3114
3115 static short ns_h2i(char c)
3116 {
3117 if (c >= '0' && c <= '9')
3118 return (short) (c - '0');
3119 if (c >= 'A' && c <= 'F')
3120 return (short) (c - 'A' + 10);
3121 if (c >= 'a' && c <= 'f')
3122 return (short) (c - 'a' + 10);
3123 return -1;
3124 }
3125
3126
3127
3128 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
3129 unsigned long addr)
3130 {
3131 ns_dev *card;
3132 unsigned long flags;
3133
3134 card = dev->dev_data;
3135 ns_grab_res_lock(card, flags);
3136 while(CMD_BUSY(card));
3137 writel((unsigned long) value, card->membase + DR0);
3138 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
3139 card->membase + CMD);
3140 spin_unlock_irqrestore(&card->res_lock, flags);
3141 }
3142
3143
3144
3145 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
3146 {
3147 ns_dev *card;
3148 unsigned long flags;
3149 unsigned long data;
3150
3151 card = dev->dev_data;
3152 ns_grab_res_lock(card, flags);
3153 while(CMD_BUSY(card));
3154 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3155 card->membase + CMD);
3156 while(CMD_BUSY(card));
3157 data = readl(card->membase + DR0) & 0x000000FF;
3158 spin_unlock_irqrestore(&card->res_lock, flags);
3159 return (unsigned char) data;
3160 }
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