Ok. I didn't make 2.4.0 in 2000. Tough. I tried, but we had some
[davej-history.git] / drivers / atm / ambassador.c
blob3de74d517115fa8a1a0ae3301af80bf9b01f65fd
1 /*
2 Madge Ambassador ATM Adapter driver.
3 Copyright (C) 1995-1999 Madge Networks Ltd.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
20 system and in the file COPYING in the Linux kernel source.
23 /* * dedicated to the memory of Graham Gordon 1971-1998 * */
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/ioport.h>
31 #include <linux/atmdev.h>
32 #include <linux/delay.h>
33 #include <linux/interrupt.h>
35 #include <asm/atomic.h>
36 #include <asm/io.h>
37 #include <asm/byteorder.h>
39 #include "ambassador.h"
41 #define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
42 #define description_string "Madge ATM Ambassador driver"
43 #define version_string "1.2.4"
45 static inline void __init show_version (void) {
46 printk ("%s version %s\n", description_string, version_string);
51 Theory of Operation
53 I Hardware, detection, initialisation and shutdown.
55 1. Supported Hardware
57 This driver is for the PCI ATMizer-based Ambassador card (except
58 very early versions). It is not suitable for the similar EISA "TR7"
59 card. Commercially, both cards are known as Collage Server ATM
60 adapters.
62 The loader supports image transfer to the card, image start and few
63 other miscellaneous commands.
65 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
67 The cards are big-endian.
69 2. Detection
71 Standard PCI stuff, the early cards are detected and rejected.
73 3. Initialisation
75 The cards are reset and the self-test results are checked. The
76 microcode image is then transferred and started. This waits for a
77 pointer to a descriptor containing details of the host-based queues
78 and buffers and various parameters etc. Once they are processed
79 normal operations may begin. The BIA is read using a microcode
80 command.
82 4. Shutdown
84 This may be accomplished either by a card reset or via the microcode
85 shutdown command. Further investigation required.
87 5. Persistent state
89 The card reset does not affect PCI configuration (good) or the
90 contents of several other "shared run-time registers" (bad) which
91 include doorbell and interrupt control as well as EEPROM and PCI
92 control. The driver must be careful when modifying these registers
93 not to touch bits it does not use and to undo any changes at exit.
95 II Driver software
97 0. Generalities
99 The adapter is quite intelligent (fast) and has a simple interface
100 (few features). VPI is always zero, 1024 VCIs are supported. There
101 is limited cell rate support. UBR channels can be capped and ABR
102 (explicit rate, but not EFCI) is supported. There is no CBR or VBR
103 support.
105 1. Driver <-> Adapter Communication
107 Apart from the basic loader commands, the driver communicates
108 through three entities: the command queue (CQ), the transmit queue
109 pair (TXQ) and the receive queue pairs (RXQ). These three entities
110 are set up by the host and passed to the microcode just after it has
111 been started.
113 All queues are host-based circular queues. They are contiguous and
114 (due to hardware limitations) have some restrictions as to their
115 locations in (bus) memory. They are of the "full means the same as
116 empty so don't do that" variety since the adapter uses pointers
117 internally.
119 The queue pairs work as follows: one queue is for supply to the
120 adapter, items in it are pending and are owned by the adapter; the
121 other is the queue for return from the adapter, items in it have
122 been dealt with by the adapter. The host adds items to the supply
123 (TX descriptors and free RX buffer descriptors) and removes items
124 from the return (TX and RX completions). The adapter deals with out
125 of order completions.
127 Interrupts (card to host) and the doorbell (host to card) are used
128 for signalling.
130 1. CQ
132 This is to communicate "open VC", "close VC", "get stats" etc. to
133 the adapter. At most one command is retired every millisecond by the
134 card. There is no out of order completion or notification. The
135 driver needs to check the return code of the command, waiting as
136 appropriate.
138 2. TXQ
140 TX supply items are of variable length (scatter gather support) and
141 so the queue items are (more or less) pointers to the real thing.
142 Each TX supply item contains a unique, host-supplied handle (the skb
143 bus address seems most sensible as this works for Alphas as well,
144 there is no need to do any endian conversions on the handles).
146 TX return items consist of just the handles above.
148 3. RXQ (up to 4 of these with different lengths and buffer sizes)
150 RX supply items consist of a unique, host-supplied handle (the skb
151 bus address again) and a pointer to the buffer data area.
153 RX return items consist of the handle above, the VC, length and a
154 status word. This just screams "oh so easy" doesn't it?
156 Note on RX pool sizes:
158 Each pool should have enough buffers to handle a back-to-back stream
159 of minimum sized frames on a single VC. For example:
161 frame spacing = 3us (about right)
163 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
165 min number of buffers for one VC = 1 + delay/spacing (buffers)
167 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
169 The 20us delay assumes that there is no need to sleep; if we need to
170 sleep to get buffers we are going to drop frames anyway.
172 In fact, each pool should have enough buffers to support the
173 simultaneous reassembly of a separate frame on each VC and cope with
174 the case in which frames complete in round robin cell fashion on
175 each VC.
177 Only one frame can complete at each cell arrival, so if "n" VCs are
178 open, the worst case is to have them all complete frames together
179 followed by all starting new frames together.
181 desired number of buffers = n + delay/spacing
183 These are the extreme requirements, however, they are "n+k" for some
184 "k" so we have only the constant to choose. This is the argument
185 rx_lats which current defaults to 7.
187 Actually, "n ? n+k : 0" is better and this is what is implemented,
188 subject to the limit given by the pool size.
190 4. Driver locking
192 Simple spinlocks are used around the TX and RX queue mechanisms.
193 Anyone with a faster, working method is welcome to implement it.
195 The adapter command queue is protected with a spinlock. We always
196 wait for commands to complete.
198 A more complex form of locking is used around parts of the VC open
199 and close functions. There are three reasons for a lock: 1. we need
200 to do atomic rate reservation and release (not used yet), 2. Opening
201 sometimes involves two adapter commands which must not be separated
202 by another command on the same VC, 3. the changes to RX pool size
203 must be atomic. The lock needs to work over context switches, so we
204 use a semaphore.
206 III Hardware Features and Microcode Bugs
208 1. Byte Ordering
210 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
212 2. Memory access
214 All structures that are not accessed using DMA must be 4-byte
215 aligned (not a problem) and must not cross 4MB boundaries.
217 There is a DMA memory hole at E0000000-E00000FF (groan).
219 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
220 but for a hardware bug).
222 RX buffers (DMA write) must not cross 16MB boundaries and must
223 include spare trailing bytes up to the next 4-byte boundary; they
224 will be written with rubbish.
226 The PLX likes to prefetch; if reading up to 4 u32 past the end of
227 each TX fragment is not a problem, then TX can be made to go a
228 little faster by passing a flag at init that disables a prefetch
229 workaround. We do not pass this flag. (new microcode only)
231 Now we:
232 . Note that alloc_skb rounds up size to a 16byte boundary.
233 . Ensure all areas do not traverse 4MB boundaries.
234 . Ensure all areas do not start at a E00000xx bus address.
235 (I cannot be certain, but this may always hold with Linux)
236 . Make all failures cause a loud message.
237 . Discard non-conforming SKBs (causes TX failure or RX fill delay).
238 . Discard non-conforming TX fragment descriptors (the TX fails).
239 In the future we could:
240 . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
241 . Segment TX areas into some/more fragments, when necessary.
242 . Relax checks for non-DMA items (ignore hole).
243 . Give scatter-gather (iovec) requirements using ???. (?)
245 3. VC close is broken (only for new microcode)
247 The VC close adapter microcode command fails to do anything if any
248 frames have been received on the VC but none have been transmitted.
249 Frames continue to be reassembled and passed (with IRQ) to the
250 driver.
252 IV To Do List
254 . Fix bugs!
256 . Timer code may be broken.
258 . Deal with buggy VC close (somehow) in microcode 12.
260 . Handle interrupted and/or non-blocking writes - is this a job for
261 the protocol layer?
263 . Add code to break up TX fragments when they span 4MB boundaries.
265 . Add SUNI phy layer (need to know where SUNI lives on card).
267 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
268 leave extra headroom space for Ambassador TX descriptors.
270 . Understand these elements of struct atm_vcc: recvq (proto?),
271 sleep, callback, listenq, backlog_quota, reply and user_back.
273 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
275 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
277 . Decide whether RX buffer recycling is or can be made completely safe;
278 turn it back on. It looks like Werner is going to axe this.
280 . Implement QoS changes on open VCs (involves extracting parts of VC open
281 and close into separate functions and using them to make changes).
283 . Hack on command queue so that someone can issue multiple commands and wait
284 on the last one (OR only "no-op" or "wait" commands are waited for).
286 . Eliminate need for while-schedule around do_command.
290 /********** microcode **********/
292 #ifdef AMB_NEW_MICROCODE
293 #define UCODE(x) UCODE1(atmsar12.,x)
294 #else
295 #define UCODE(x) UCODE1(atmsar11.,x)
296 #endif
297 #define UCODE2(x) #x
298 #define UCODE1(x,y) UCODE2(x ## y)
300 static const u32 __initdata ucode_start =
301 #include UCODE(start)
304 static const region __initdata ucode_regions[] = {
305 #include UCODE(regions)
306 { 0, 0 }
309 static const u32 __initdata ucode_data[] = {
310 #include UCODE(data)
311 0xdeadbeef
314 /********** globals **********/
316 static amb_dev * amb_devs = NULL;
317 static struct timer_list housekeeping;
319 static unsigned short debug = 0;
320 static unsigned int cmds = 8;
321 static unsigned int txs = 32;
322 static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
323 static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
324 static unsigned int rx_lats = 7;
325 static unsigned char pci_lat = 0;
327 static const unsigned long onegigmask = -1 << 30;
329 /********** access to adapter **********/
331 static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
332 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08x <- %08x", addr, data);
333 #ifdef AMB_MMIO
334 dev->membase[addr / sizeof(u32)] = data;
335 #else
336 outl (data, dev->iobase + addr);
337 #endif
340 static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
341 #ifdef AMB_MMIO
342 u32 data = dev->membase[addr / sizeof(u32)];
343 #else
344 u32 data = inl (dev->iobase + addr);
345 #endif
346 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08x -> %08x", addr, data);
347 return data;
350 static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
351 u32 be = cpu_to_be32 (data);
352 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08x <- %08x b[%08x]", addr, data, be);
353 #ifdef AMB_MMIO
354 dev->membase[addr / sizeof(u32)] = be;
355 #else
356 outl (be, dev->iobase + addr);
357 #endif
360 static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
361 #ifdef AMB_MMIO
362 u32 be = dev->membase[addr / sizeof(u32)];
363 #else
364 u32 be = inl (dev->iobase + addr);
365 #endif
366 u32 data = be32_to_cpu (be);
367 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08x -> %08x b[%08x]", addr, data, be);
368 return data;
371 /********** dump routines **********/
373 static inline void dump_registers (const amb_dev * dev) {
374 #ifdef DEBUG_AMBASSADOR
375 if (debug & DBG_REGS) {
376 size_t i;
377 PRINTD (DBG_REGS, "reading PLX control: ");
378 for (i = 0x00; i < 0x30; i += sizeof(u32))
379 rd_mem (dev, i);
380 PRINTD (DBG_REGS, "reading mailboxes: ");
381 for (i = 0x40; i < 0x60; i += sizeof(u32))
382 rd_mem (dev, i);
383 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
384 for (i = 0x60; i < 0x70; i += sizeof(u32))
385 rd_mem (dev, i);
387 #else
388 (void) dev;
389 #endif
390 return;
393 static inline void dump_loader_block (volatile loader_block * lb) {
394 #ifdef DEBUG_AMBASSADOR
395 unsigned int i;
396 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
397 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
398 for (i = 0; i < MAX_COMMAND_DATA; ++i)
399 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
400 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
401 #else
402 (void) lb;
403 #endif
404 return;
407 static inline void dump_command (command * cmd) {
408 #ifdef DEBUG_AMBASSADOR
409 unsigned int i;
410 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
411 cmd, /*be32_to_cpu*/ (cmd->request));
412 for (i = 0; i < 3; ++i)
413 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
414 PRINTDE (DBG_CMD, "");
415 #else
416 (void) cmd;
417 #endif
418 return;
421 static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
422 #ifdef DEBUG_AMBASSADOR
423 unsigned int i;
424 unsigned char * data = skb->data;
425 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
426 for (i=0; i<skb->len && i < 256;i++)
427 PRINTDM (DBG_DATA, "%02x ", data[i]);
428 PRINTDE (DBG_DATA,"");
429 #else
430 (void) prefix;
431 (void) vc;
432 (void) skb;
433 #endif
434 return;
437 /********** check memory areas for use by Ambassador **********/
439 /* see limitations under Hardware Features */
441 static inline int check_area (void * start, size_t length) {
442 // assumes length > 0
443 const u32 fourmegmask = -1 << 22;
444 const u32 twofivesixmask = -1 << 8;
445 const u32 starthole = 0xE0000000;
446 u32 startaddress = virt_to_bus (start);
447 u32 lastaddress = startaddress+length-1;
448 if ((startaddress ^ lastaddress) & fourmegmask ||
449 (startaddress & twofivesixmask) == starthole) {
450 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
451 startaddress, lastaddress);
452 return -1;
453 } else {
454 return 0;
458 /********** free an skb (as per ATM device driver documentation) **********/
460 static inline void amb_kfree_skb (struct sk_buff * skb) {
461 if (ATM_SKB(skb)->vcc->pop) {
462 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
463 } else {
464 dev_kfree_skb_any (skb);
468 /********** TX completion **********/
470 static inline void tx_complete (amb_dev * dev, tx_out * tx) {
471 tx_simple * tx_descr = bus_to_virt (tx->handle);
472 struct sk_buff * skb = tx_descr->skb;
474 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
476 // VC layer stats
477 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
479 // free the descriptor
480 kfree (tx_descr);
482 // free the skb
483 amb_kfree_skb (skb);
485 dev->stats.tx_ok++;
486 return;
489 /********** RX completion **********/
491 static void rx_complete (amb_dev * dev, rx_out * rx) {
492 struct sk_buff * skb = bus_to_virt (rx->handle);
493 u16 vc = be16_to_cpu (rx->vc);
494 // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
495 u16 status = be16_to_cpu (rx->status);
496 u16 rx_len = be16_to_cpu (rx->length);
498 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
500 // XXX move this in and add to VC stats ???
501 if (!status) {
502 struct atm_vcc * atm_vcc = dev->rxer[vc];
503 dev->stats.rx.ok++;
505 if (atm_vcc) {
507 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
509 if (atm_charge (atm_vcc, skb->truesize)) {
511 // prepare socket buffer
512 ATM_SKB(skb)->vcc = atm_vcc;
513 skb_put (skb, rx_len);
515 dump_skb ("<<<", vc, skb);
517 // VC layer stats
518 atomic_inc(&atm_vcc->stats->rx);
519 skb->stamp = xtime;
520 // end of our responsability
521 atm_vcc->push (atm_vcc, skb);
522 return;
524 } else {
525 // someone fix this (message), please!
526 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
527 // drop stats incremented in atm_charge
530 } else {
531 PRINTK (KERN_INFO, "dropped over-size frame");
532 // should we count this?
533 atomic_inc(&atm_vcc->stats->rx_drop);
536 } else {
537 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
538 // this is an adapter bug, only in new version of microcode
541 } else {
542 dev->stats.rx.error++;
543 if (status & CRC_ERR)
544 dev->stats.rx.badcrc++;
545 if (status & LEN_ERR)
546 dev->stats.rx.toolong++;
547 if (status & ABORT_ERR)
548 dev->stats.rx.aborted++;
549 if (status & UNUSED_ERR)
550 dev->stats.rx.unused++;
553 dev_kfree_skb_any (skb);
554 return;
559 Note on queue handling.
561 Here "give" and "take" refer to queue entries and a queue (pair)
562 rather than frames to or from the host or adapter. Empty frame
563 buffers are given to the RX queue pair and returned unused or
564 containing RX frames. TX frames (well, pointers to TX fragment
565 lists) are given to the TX queue pair, completions are returned.
569 /********** command queue **********/
571 // I really don't like this, but it's the best I can do at the moment
573 // also, the callers are responsible for byte order as the microcode
574 // sometimes does 16-bit accesses (yuk yuk yuk)
576 static int command_do (amb_dev * dev, command * cmd) {
577 amb_cq * cq = &dev->cq;
578 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
579 command * my_slot;
580 unsigned long timeout;
582 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
584 if (test_bit (dead, &dev->flags))
585 return 0;
587 spin_lock (&cq->lock);
589 // if not full...
590 if (cq->pending < cq->maximum) {
591 // remember my slot for later
592 my_slot = ptrs->in;
593 PRINTD (DBG_CMD, "command in slot %p", my_slot);
595 dump_command (cmd);
597 // copy command in
598 *ptrs->in = *cmd;
599 cq->pending++;
600 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
602 // mail the command
603 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
605 // prepare to wait for cq->pending milliseconds
606 // effectively one centisecond on i386
607 timeout = (cq->pending*HZ+999)/1000;
609 if (cq->pending > cq->high)
610 cq->high = cq->pending;
611 spin_unlock (&cq->lock);
613 while (timeout) {
614 // go to sleep
615 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
616 timeout = schedule_timeout (timeout);
617 // woken up by timeout or signal
620 // wait for my slot to be reached (all waiters are here or above, until...)
621 while (ptrs->out != my_slot) {
622 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
623 schedule();
626 // wait on my slot (... one gets to its slot, and... )
627 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
628 PRINTD (DBG_CMD, "wait: command slot completion");
629 schedule();
632 PRINTD (DBG_CMD, "command complete");
633 // update queue (... moves the queue along to the next slot)
634 spin_lock (&cq->lock);
635 cq->pending--;
636 // copy command out
637 *cmd = *ptrs->out;
638 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
639 spin_unlock (&cq->lock);
641 return 0;
642 } else {
643 cq->filled++;
644 spin_unlock (&cq->lock);
645 return -EAGAIN;
650 /********** TX queue pair **********/
652 static inline int tx_give (amb_dev * dev, tx_in * tx) {
653 amb_txq * txq = &dev->txq;
654 unsigned long flags;
656 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
658 if (test_bit (dead, &dev->flags))
659 return 0;
661 spin_lock_irqsave (&txq->lock, flags);
663 if (txq->pending < txq->maximum) {
664 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
666 *txq->in.ptr = *tx;
667 txq->pending++;
668 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
669 // hand over the TX and ring the bell
670 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
671 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
673 if (txq->pending > txq->high)
674 txq->high = txq->pending;
675 spin_unlock_irqrestore (&txq->lock, flags);
676 return 0;
677 } else {
678 txq->filled++;
679 spin_unlock_irqrestore (&txq->lock, flags);
680 return -EAGAIN;
684 static inline int tx_take (amb_dev * dev) {
685 amb_txq * txq = &dev->txq;
686 unsigned long flags;
688 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
690 spin_lock_irqsave (&txq->lock, flags);
692 if (txq->pending && txq->out.ptr->handle) {
693 // deal with TX completion
694 tx_complete (dev, txq->out.ptr);
695 // mark unused again
696 txq->out.ptr->handle = 0;
697 // remove item
698 txq->pending--;
699 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
701 spin_unlock_irqrestore (&txq->lock, flags);
702 return 0;
703 } else {
705 spin_unlock_irqrestore (&txq->lock, flags);
706 return -1;
710 /********** RX queue pairs **********/
712 static inline int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
713 amb_rxq * rxq = &dev->rxq[pool];
714 unsigned long flags;
716 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
718 spin_lock_irqsave (&rxq->lock, flags);
720 if (rxq->pending < rxq->maximum) {
721 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
723 *rxq->in.ptr = *rx;
724 rxq->pending++;
725 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
726 // hand over the RX buffer
727 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
729 spin_unlock_irqrestore (&rxq->lock, flags);
730 return 0;
731 } else {
732 spin_unlock_irqrestore (&rxq->lock, flags);
733 return -1;
737 static inline int rx_take (amb_dev * dev, unsigned char pool) {
738 amb_rxq * rxq = &dev->rxq[pool];
739 unsigned long flags;
741 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
743 spin_lock_irqsave (&rxq->lock, flags);
745 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
746 // deal with RX completion
747 rx_complete (dev, rxq->out.ptr);
748 // mark unused again
749 rxq->out.ptr->status = 0;
750 rxq->out.ptr->length = 0;
751 // remove item
752 rxq->pending--;
753 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
755 if (rxq->pending < rxq->low)
756 rxq->low = rxq->pending;
757 spin_unlock_irqrestore (&rxq->lock, flags);
758 return 0;
759 } else {
760 if (!rxq->pending && rxq->buffers_wanted)
761 rxq->emptied++;
762 spin_unlock_irqrestore (&rxq->lock, flags);
763 return -1;
767 /********** RX Pool handling **********/
769 /* pre: buffers_wanted = 0, post: pending = 0 */
770 static inline void drain_rx_pool (amb_dev * dev, unsigned char pool) {
771 amb_rxq * rxq = &dev->rxq[pool];
773 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
775 if (test_bit (dead, &dev->flags))
776 return;
778 /* we are not quite like the fill pool routines as we cannot just
779 remove one buffer, we have to remove all of them, but we might as
780 well pretend... */
781 if (rxq->pending > rxq->buffers_wanted) {
782 command cmd;
783 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
784 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
785 while (command_do (dev, &cmd))
786 schedule();
787 /* the pool may also be emptied via the interrupt handler */
788 while (rxq->pending > rxq->buffers_wanted)
789 if (rx_take (dev, pool))
790 schedule();
793 return;
796 #ifdef MODULE
797 static void drain_rx_pools (amb_dev * dev) {
798 unsigned char pool;
800 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
802 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
803 drain_rx_pool (dev, pool);
805 return;
807 #endif
809 static inline void fill_rx_pool (amb_dev * dev, unsigned char pool, int priority) {
810 rx_in rx;
811 amb_rxq * rxq;
813 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
815 if (test_bit (dead, &dev->flags))
816 return;
818 rxq = &dev->rxq[pool];
819 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
821 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
822 if (!skb) {
823 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
824 return;
826 if (check_area (skb->data, skb->truesize)) {
827 dev_kfree_skb_any (skb);
828 return;
830 // cast needed as there is no %? for pointer differences
831 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
832 skb, skb->head, (long) (skb->end - skb->head));
833 rx.handle = virt_to_bus (skb);
834 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
835 if (rx_give (dev, &rx, pool))
836 dev_kfree_skb_any (skb);
840 return;
843 // top up all RX pools (can also be called as a bottom half)
844 static void fill_rx_pools (amb_dev * dev) {
845 unsigned char pool;
847 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
849 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
850 fill_rx_pool (dev, pool, GFP_ATOMIC);
852 return;
855 /********** enable host interrupts **********/
857 static inline void interrupts_on (amb_dev * dev) {
858 wr_plain (dev, offsetof(amb_mem, interrupt_control),
859 rd_plain (dev, offsetof(amb_mem, interrupt_control))
860 | AMB_INTERRUPT_BITS);
863 /********** disable host interrupts **********/
865 static inline void interrupts_off (amb_dev * dev) {
866 wr_plain (dev, offsetof(amb_mem, interrupt_control),
867 rd_plain (dev, offsetof(amb_mem, interrupt_control))
868 &~ AMB_INTERRUPT_BITS);
871 /********** interrupt handling **********/
873 static void interrupt_handler (int irq, void * dev_id, struct pt_regs * pt_regs) {
874 amb_dev * dev = amb_devs;
875 (void) pt_regs;
877 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
879 if (!dev_id) {
880 PRINTD (DBG_IRQ|DBG_ERR, "irq with NULL dev_id: %d", irq);
881 return;
883 // Did one of our cards generate the interrupt?
884 while (dev) {
885 if (dev == dev_id)
886 break;
887 dev = dev->prev;
889 // impossible - unless we add the device to our list after both
890 // registering the IRQ handler for it and enabling interrupts, AND
891 // the card generates an IRQ at startup - should not happen again
892 if (!dev) {
893 PRINTD (DBG_IRQ, "irq for unknown device: %d", irq);
894 return;
896 // impossible - unless we have memory corruption of dev or kernel
897 if (irq != dev->irq) {
898 PRINTD (DBG_IRQ|DBG_ERR, "irq mismatch: %d", irq);
899 return;
903 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
905 // for us or someone else sharing the same interrupt
906 if (!interrupt) {
907 PRINTD (DBG_IRQ, "irq not for me: %d", irq);
908 return;
911 // definitely for us
912 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
913 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
917 unsigned int irq_work = 0;
918 unsigned char pool;
919 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
920 while (!rx_take (dev, pool))
921 ++irq_work;
922 while (!tx_take (dev))
923 ++irq_work;
925 if (irq_work) {
926 #ifdef FILL_RX_POOLS_IN_BH
927 queue_task (&dev->bh, &tq_immediate);
928 mark_bh (IMMEDIATE_BH);
929 #else
930 fill_rx_pools (dev);
931 #endif
933 PRINTD (DBG_IRQ, "work done: %u", irq_work);
934 } else {
935 PRINTD (DBG_IRQ|DBG_WARN, "no work done");
939 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
940 return;
943 /********** don't panic... yeah, right **********/
945 #ifdef DEBUG_AMBASSADOR
946 static void dont_panic (amb_dev * dev) {
947 amb_cq * cq = &dev->cq;
948 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
949 amb_txq * txq;
950 amb_rxq * rxq;
951 command * cmd;
952 tx_in * tx;
953 tx_simple * tx_descr;
954 unsigned char pool;
955 rx_in * rx;
957 unsigned long flags;
958 save_flags (flags);
959 cli();
961 PRINTK (KERN_INFO, "don't panic - putting adapter into reset");
962 wr_plain (dev, offsetof(amb_mem, reset_control),
963 rd_plain (dev, offsetof(amb_mem, reset_control)) | AMB_RESET_BITS);
965 PRINTK (KERN_INFO, "marking all commands complete");
966 for (cmd = ptrs->start; cmd < ptrs->limit; ++cmd)
967 cmd->request = cpu_to_be32 (SRB_COMPLETE);
969 PRINTK (KERN_INFO, "completing all TXs");
970 txq = &dev->txq;
971 tx = txq->in.ptr;
972 while (txq->pending--) {
973 if (tx == txq->in.start)
974 tx = txq->in.limit;
975 --tx;
976 tx_descr = bus_to_virt (be32_to_cpu (tx->tx_descr_addr));
977 amb_kfree_skb (tx_descr->skb);
978 kfree (tx_descr);
981 PRINTK (KERN_INFO, "freeing all RX buffers");
982 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
983 rxq = &dev->rxq[pool];
984 rx = rxq->in.ptr;
985 while (rxq->pending--) {
986 if (rx == rxq->in.start)
987 rx = rxq->in.limit;
988 --rx;
989 dev_kfree_skb_any (bus_to_virt (rx->handle));
993 PRINTK (KERN_INFO, "don't panic over - close all VCs and rmmod");
994 set_bit (dead, &dev->flags);
995 restore_flags (flags);
996 return;
998 #endif
1000 /********** make rate (not quite as much fun as Horizon) **********/
1002 static unsigned int make_rate (unsigned int rate, rounding r,
1003 u16 * bits, unsigned int * actual) {
1004 unsigned char exp = -1; // hush gcc
1005 unsigned int man = -1; // hush gcc
1007 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
1009 // rates in cells per second, ITU format (nasty 16-bit floating-point)
1010 // given 5-bit e and 9-bit m:
1011 // rate = EITHER (1+m/2^9)*2^e OR 0
1012 // bits = EITHER 1<<14 | e<<9 | m OR 0
1013 // (bit 15 is "reserved", bit 14 "non-zero")
1014 // smallest rate is 0 (special representation)
1015 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
1016 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
1017 // simple algorithm:
1018 // find position of top bit, this gives e
1019 // remove top bit and shift (rounding if feeling clever) by 9-e
1021 // ucode bug: please don't set bit 14! so 0 rate not representable
1023 if (rate > 0xffc00000U) {
1024 // larger than largest representable rate
1026 if (r == round_up) {
1027 return -EINVAL;
1028 } else {
1029 exp = 31;
1030 man = 511;
1033 } else if (rate) {
1034 // representable rate
1036 exp = 31;
1037 man = rate;
1039 // invariant: rate = man*2^(exp-31)
1040 while (!(man & (1<<31))) {
1041 exp = exp - 1;
1042 man = man<<1;
1045 // man has top bit set
1046 // rate = (2^31+(man-2^31))*2^(exp-31)
1047 // rate = (1+(man-2^31)/2^31)*2^exp
1048 man = man<<1;
1049 man &= 0xffffffffU; // a nop on 32-bit systems
1050 // rate = (1+man/2^32)*2^exp
1052 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
1053 // time to lose significance... we want m in the range 0 to 2^9-1
1054 // rounding presents a minor problem... we first decide which way
1055 // we are rounding (based on given rounding direction and possibly
1056 // the bits of the mantissa that are to be discarded).
1058 switch (r) {
1059 case round_down: {
1060 // just truncate
1061 man = man>>(32-9);
1062 break;
1064 case round_up: {
1065 // check all bits that we are discarding
1066 if (man & (-1>>9)) {
1067 man = (man>>(32-9)) + 1;
1068 if (man == (1<<9)) {
1069 // no need to check for round up outside of range
1070 man = 0;
1071 exp += 1;
1073 } else {
1074 man = (man>>(32-9));
1076 break;
1078 case round_nearest: {
1079 // check msb that we are discarding
1080 if (man & (1<<(32-9-1))) {
1081 man = (man>>(32-9)) + 1;
1082 if (man == (1<<9)) {
1083 // no need to check for round up outside of range
1084 man = 0;
1085 exp += 1;
1087 } else {
1088 man = (man>>(32-9));
1090 break;
1094 } else {
1095 // zero rate - not representable
1097 if (r == round_down) {
1098 return -EINVAL;
1099 } else {
1100 exp = 0;
1101 man = 0;
1106 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
1108 if (bits)
1109 *bits = /* (1<<14) | */ (exp<<9) | man;
1111 if (actual)
1112 *actual = (exp >= 9)
1113 ? (1 << exp) + (man << (exp-9))
1114 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
1116 return 0;
1119 /********** Linux ATM Operations **********/
1121 // some are not yet implemented while others do not make sense for
1122 // this device
1124 /********** Open a VC **********/
1126 static int amb_open (struct atm_vcc * atm_vcc, short vpi, int vci) {
1127 int error;
1129 struct atm_qos * qos;
1130 struct atm_trafprm * txtp;
1131 struct atm_trafprm * rxtp;
1132 u16 tx_rate_bits;
1133 u16 tx_vc_bits = -1; // hush gcc
1134 u16 tx_frame_bits = -1; // hush gcc
1136 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1137 amb_vcc * vcc;
1138 unsigned char pool = -1; // hush gcc
1140 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
1142 #ifdef ATM_VPI_UNSPEC
1143 // UNSPEC is deprecated, remove this code eventually
1144 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
1145 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
1146 return -EINVAL;
1148 #endif
1150 // deal with possibly wildcarded VCs
1151 error = atm_find_ci (atm_vcc, &vpi, &vci);
1152 if (error) {
1153 PRINTD (DBG_WARN|DBG_VCC, "atm_find_ci failed!");
1154 return error;
1156 PRINTD (DBG_VCC, "atm_find_ci gives %x %x", vpi, vci);
1158 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
1159 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
1160 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
1161 return -EINVAL;
1164 qos = &atm_vcc->qos;
1166 if (qos->aal != ATM_AAL5) {
1167 PRINTD (DBG_QOS, "AAL not supported");
1168 return -EINVAL;
1171 // traffic parameters
1173 PRINTD (DBG_QOS, "TX:");
1174 txtp = &qos->txtp;
1175 if (txtp->traffic_class != ATM_NONE) {
1176 switch (txtp->traffic_class) {
1177 case ATM_UBR: {
1178 // we take "the PCR" as a rate-cap
1179 int pcr = atm_pcr_goal (txtp);
1180 if (!pcr) {
1181 // no rate cap
1182 tx_rate_bits = 0;
1183 tx_vc_bits = TX_UBR;
1184 tx_frame_bits = TX_FRAME_NOTCAP;
1185 } else {
1186 rounding r;
1187 if (pcr < 0) {
1188 r = round_down;
1189 pcr = -pcr;
1190 } else {
1191 r = round_up;
1193 error = make_rate (pcr, r, &tx_rate_bits, 0);
1194 tx_vc_bits = TX_UBR_CAPPED;
1195 tx_frame_bits = TX_FRAME_CAPPED;
1197 break;
1199 #if 0
1200 case ATM_ABR: {
1201 pcr = atm_pcr_goal (txtp);
1202 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1203 break;
1205 #endif
1206 default: {
1207 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1208 PRINTD (DBG_QOS, "request for non-UBR denied");
1209 return -EINVAL;
1212 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
1213 tx_rate_bits, tx_vc_bits);
1216 PRINTD (DBG_QOS, "RX:");
1217 rxtp = &qos->rxtp;
1218 if (rxtp->traffic_class == ATM_NONE) {
1219 // do nothing
1220 } else {
1221 // choose an RX pool (arranged in increasing size)
1222 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1223 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
1224 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
1225 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
1226 break;
1228 if (pool == NUM_RX_POOLS) {
1229 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
1230 "no pool suitable for VC (RX max_sdu %d is too large)",
1231 rxtp->max_sdu);
1232 return -EINVAL;
1235 switch (rxtp->traffic_class) {
1236 case ATM_UBR: {
1237 break;
1239 #if 0
1240 case ATM_ABR: {
1241 pcr = atm_pcr_goal (rxtp);
1242 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1243 break;
1245 #endif
1246 default: {
1247 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1248 PRINTD (DBG_QOS, "request for non-UBR denied");
1249 return -EINVAL;
1254 // get space for our vcc stuff
1255 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
1256 if (!vcc) {
1257 PRINTK (KERN_ERR, "out of memory!");
1258 return -ENOMEM;
1260 atm_vcc->dev_data = (void *) vcc;
1262 // no failures beyond this point
1264 // we are not really "immediately before allocating the connection
1265 // identifier in hardware", but it will just have to do!
1266 set_bit(ATM_VF_ADDR,&atm_vcc->flags);
1268 if (txtp->traffic_class != ATM_NONE) {
1269 command cmd;
1271 vcc->tx_frame_bits = tx_frame_bits;
1273 down (&dev->vcc_sf);
1274 if (dev->rxer[vci]) {
1275 // RXer on the channel already, just modify rate...
1276 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1277 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1278 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1279 while (command_do (dev, &cmd))
1280 schedule();
1281 // ... and TX flags, preserving the RX pool
1282 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1283 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1284 cmd.args.modify_flags.flags = cpu_to_be32
1285 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
1286 | (tx_vc_bits << SRB_FLAGS_SHIFT) );
1287 while (command_do (dev, &cmd))
1288 schedule();
1289 } else {
1290 // no RXer on the channel, just open (with pool zero)
1291 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1292 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1293 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
1294 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1295 while (command_do (dev, &cmd))
1296 schedule();
1298 dev->txer[vci].tx_present = 1;
1299 up (&dev->vcc_sf);
1302 if (rxtp->traffic_class != ATM_NONE) {
1303 command cmd;
1305 vcc->rx_info.pool = pool;
1307 down (&dev->vcc_sf);
1308 /* grow RX buffer pool */
1309 if (!dev->rxq[pool].buffers_wanted)
1310 dev->rxq[pool].buffers_wanted = rx_lats;
1311 dev->rxq[pool].buffers_wanted += 1;
1312 fill_rx_pool (dev, pool, GFP_KERNEL);
1314 if (dev->txer[vci].tx_present) {
1315 // TXer on the channel already
1316 // switch (from pool zero) to this pool, preserving the TX bits
1317 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1318 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1319 cmd.args.modify_flags.flags = cpu_to_be32
1320 ( (pool << SRB_POOL_SHIFT)
1321 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
1322 } else {
1323 // no TXer on the channel, open the VC (with no rate info)
1324 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1325 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1326 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
1327 cmd.args.open.rate = cpu_to_be32 (0);
1329 while (command_do (dev, &cmd))
1330 schedule();
1331 // this link allows RX frames through
1332 dev->rxer[vci] = atm_vcc;
1333 up (&dev->vcc_sf);
1336 // set elements of vcc
1337 atm_vcc->vpi = vpi; // 0
1338 atm_vcc->vci = vci;
1340 // indicate readiness
1341 set_bit(ATM_VF_READY,&atm_vcc->flags);
1343 return 0;
1346 /********** Close a VC **********/
1348 static void amb_close (struct atm_vcc * atm_vcc) {
1349 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1350 amb_vcc * vcc = AMB_VCC (atm_vcc);
1351 u16 vci = atm_vcc->vci;
1353 PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
1355 // indicate unreadiness
1356 clear_bit(ATM_VF_READY,&atm_vcc->flags);
1358 // disable TXing
1359 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
1360 command cmd;
1362 down (&dev->vcc_sf);
1363 if (dev->rxer[vci]) {
1364 // RXer still on the channel, just modify rate... XXX not really needed
1365 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1366 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1367 cmd.args.modify_rate.rate = cpu_to_be32 (0);
1368 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
1369 } else {
1370 // no RXer on the channel, close channel
1371 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1372 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1374 dev->txer[vci].tx_present = 0;
1375 while (command_do (dev, &cmd))
1376 schedule();
1377 up (&dev->vcc_sf);
1380 // disable RXing
1381 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
1382 command cmd;
1384 // this is (the?) one reason why we need the amb_vcc struct
1385 unsigned char pool = vcc->rx_info.pool;
1387 down (&dev->vcc_sf);
1388 if (dev->txer[vci].tx_present) {
1389 // TXer still on the channel, just go to pool zero XXX not really needed
1390 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1391 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1392 cmd.args.modify_flags.flags = cpu_to_be32
1393 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
1394 } else {
1395 // no TXer on the channel, close the VC
1396 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1397 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1399 // forget the rxer - no more skbs will be pushed
1400 if (atm_vcc != dev->rxer[vci])
1401 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
1402 "arghhh! we're going to die!",
1403 vcc, dev->rxer[vci]);
1404 dev->rxer[vci] = 0;
1405 while (command_do (dev, &cmd))
1406 schedule();
1408 /* shrink RX buffer pool */
1409 dev->rxq[pool].buffers_wanted -= 1;
1410 if (dev->rxq[pool].buffers_wanted == rx_lats) {
1411 dev->rxq[pool].buffers_wanted = 0;
1412 drain_rx_pool (dev, pool);
1414 up (&dev->vcc_sf);
1417 // free our structure
1418 kfree (vcc);
1420 // say the VPI/VCI is free again
1421 clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
1423 return;
1426 /********** Debug\x17Ioctl **********/
1428 #if 0
1429 static int amb_ioctl (struct atm_dev * dev, unsigned int cmd, void * arg) {
1430 unsigned short newdebug;
1431 if (cmd == AMB_SETDEBUG) {
1432 if (!capable(CAP_NET_ADMIN))
1433 return -EPERM;
1434 if (copy_from_user (&newdebug, arg, sizeof(newdebug))) {
1435 // moan
1436 return -EFAULT;
1437 } else {
1438 debug = newdebug;
1439 return 0;
1441 } else if (cmd == AMB_DONTPANIC) {
1442 if (!capable(CAP_NET_ADMIN))
1443 return -EPERM;
1444 dont_panic (dev);
1445 } else {
1446 // moan
1447 return -ENOIOCTLCMD;
1450 #endif
1452 /********** Set socket options for a VC **********/
1454 // int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1456 /********** Set socket options for a VC **********/
1458 // int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1460 /********** Send **********/
1462 static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1463 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1464 amb_vcc * vcc = AMB_VCC(atm_vcc);
1465 u16 vc = atm_vcc->vci;
1466 unsigned int tx_len = skb->len;
1467 unsigned char * tx_data = skb->data;
1468 tx_simple * tx_descr;
1469 tx_in tx;
1471 if (test_bit (dead, &dev->flags))
1472 return -EIO;
1474 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
1475 vc, tx_data, tx_len);
1477 dump_skb (">>>", vc, skb);
1479 if (!dev->txer[vc].tx_present) {
1480 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
1481 return -EBADFD;
1484 // this is a driver private field so we have to set it ourselves,
1485 // despite the fact that we are _required_ to use it to check for a
1486 // pop function
1487 ATM_SKB(skb)->vcc = atm_vcc;
1489 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
1490 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
1491 return -EIO;
1494 if (check_area (skb->data, skb->len)) {
1495 atomic_inc(&atm_vcc->stats->tx_err);
1496 return -ENOMEM; // ?
1499 // allocate memory for fragments
1500 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
1501 if (!tx_descr) {
1502 PRINTK (KERN_ERR, "could not allocate TX descriptor");
1503 return -ENOMEM;
1505 if (check_area (tx_descr, sizeof(tx_simple))) {
1506 kfree (tx_descr);
1507 return -ENOMEM;
1509 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
1511 tx_descr->skb = skb;
1513 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
1514 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
1516 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
1517 tx_descr->tx_frag_end.vc = 0;
1518 tx_descr->tx_frag_end.next_descriptor_length = 0;
1519 tx_descr->tx_frag_end.next_descriptor = 0;
1520 #ifdef AMB_NEW_MICROCODE
1521 tx_descr->tx_frag_end.cpcs_uu = 0;
1522 tx_descr->tx_frag_end.cpi = 0;
1523 tx_descr->tx_frag_end.pad = 0;
1524 #endif
1526 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
1527 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
1528 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
1530 #ifdef DEBUG_AMBASSADOR
1531 /* wey-hey! */
1532 if (vc == 1023) {
1533 unsigned int i;
1534 unsigned short d = 0;
1535 char * s = skb->data;
1536 switch (*s++) {
1537 case 'D': {
1538 for (i = 0; i < 4; ++i) {
1539 d = (d<<4) | ((*s <= '9') ? (*s - '0') : (*s - 'a' + 10));
1540 ++s;
1542 PRINTK (KERN_INFO, "debug bitmap is now %hx", debug = d);
1543 break;
1545 case 'R': {
1546 if (*s++ == 'e' && *s++ == 's' && *s++ == 'e' && *s++ == 't')
1547 dont_panic (dev);
1548 break;
1550 default: {
1551 break;
1555 #endif
1557 while (tx_give (dev, &tx))
1558 schedule();
1559 return 0;
1562 /********** Scatter Gather Send Capability **********/
1564 static int amb_sg_send (struct atm_vcc * atm_vcc,
1565 unsigned long start,
1566 unsigned long size) {
1567 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: never");
1568 return 0;
1569 if (atm_vcc->qos.aal == ATM_AAL5) {
1570 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: yes");
1571 return 1;
1572 } else {
1573 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: no");
1574 return 0;
1576 PRINTD (DBG_FLOW|DBG_VCC, "amb_sg_send: always");
1577 return 1;
1580 /********** Send OAM **********/
1582 // static int amb_send_oam (struct atm_vcc * atm_vcc, void * cell, int flags);
1584 /********** Feedback to Driver **********/
1586 // void amb_feedback (struct atm_vcc * atm_vcc, struct sk_buff * skb,
1587 // unsigned long start, unsigned long dest, int len);
1589 /********** Change QoS on a VC **********/
1591 // int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
1593 /********** Free RX Socket Buffer **********/
1595 #if 0
1596 static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1597 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1598 amb_vcc * vcc = AMB_VCC (atm_vcc);
1599 unsigned char pool = vcc->rx_info.pool;
1600 rx_in rx;
1602 // This may be unsafe for various reasons that I cannot really guess
1603 // at. However, I note that the ATM layer calls kfree_skb rather
1604 // than dev_kfree_skb at this point so we are least covered as far
1605 // as buffer locking goes. There may be bugs if pcap clones RX skbs.
1607 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
1608 skb, atm_vcc, vcc);
1610 rx.handle = virt_to_bus (skb);
1611 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
1613 skb->data = skb->head;
1614 skb->tail = skb->head;
1615 skb->len = 0;
1617 if (!rx_give (dev, &rx, pool)) {
1618 // success
1619 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
1620 return;
1623 // just do what the ATM layer would have done
1624 dev_kfree_skb_any (skb);
1626 return;
1628 #endif
1630 /********** Proc File Output **********/
1632 static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
1633 amb_dev * dev = AMB_DEV (atm_dev);
1634 int left = *pos;
1635 unsigned char pool;
1637 PRINTD (DBG_FLOW, "amb_proc_read");
1639 /* more diagnostics here? */
1641 if (!left--) {
1642 amb_stats * s = &dev->stats;
1643 return sprintf (page,
1644 "frames: TX OK %lu, RX OK %lu, RX bad %lu "
1645 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
1646 s->tx_ok, s->rx.ok, s->rx.error,
1647 s->rx.badcrc, s->rx.toolong,
1648 s->rx.aborted, s->rx.unused);
1651 if (!left--) {
1652 amb_cq * c = &dev->cq;
1653 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
1654 c->pending, c->high, c->maximum);
1657 if (!left--) {
1658 amb_txq * t = &dev->txq;
1659 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
1660 t->pending, t->maximum, t->high, t->filled);
1663 if (!left--) {
1664 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
1665 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1666 amb_rxq * r = &dev->rxq[pool];
1667 count += sprintf (page+count, " %u/%u/%u %u %u",
1668 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
1670 count += sprintf (page+count, ".\n");
1671 return count;
1674 if (!left--) {
1675 unsigned int count = sprintf (page, "RX buffer sizes:");
1676 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1677 amb_rxq * r = &dev->rxq[pool];
1678 count += sprintf (page+count, " %u", r->buffer_size);
1680 count += sprintf (page+count, ".\n");
1681 return count;
1684 #if 0
1685 if (!left--) {
1686 // suni block etc?
1688 #endif
1690 return 0;
1693 /********** Operation Structure **********/
1695 static const struct atmdev_ops amb_ops = {
1696 open: amb_open,
1697 close: amb_close,
1698 send: amb_send,
1699 sg_send: amb_sg_send,
1700 proc_read: amb_proc_read,
1701 owner: THIS_MODULE,
1704 /********** housekeeping **********/
1706 static inline void set_timer (struct timer_list * timer, unsigned long delay) {
1707 timer->expires = jiffies + delay;
1708 add_timer (timer);
1709 return;
1712 static void do_housekeeping (unsigned long arg) {
1713 amb_dev * dev = amb_devs;
1714 // data is set to zero at module unload
1715 (void) arg;
1717 if (housekeeping.data) {
1718 while (dev) {
1720 // could collect device-specific (not driver/atm-linux) stats here
1722 // last resort refill once every ten seconds
1723 fill_rx_pools (dev);
1725 dev = dev->prev;
1727 set_timer (&housekeeping, 10*HZ);
1730 return;
1733 /********** creation of communication queues **********/
1735 static int __init create_queues (amb_dev * dev, unsigned int cmds,
1736 unsigned int txs, unsigned int * rxs,
1737 unsigned int * rx_buffer_sizes) {
1738 unsigned char pool;
1739 size_t total = 0;
1740 void * memory;
1741 void * limit;
1743 PRINTD (DBG_FLOW, "create_queues %p", dev);
1745 total += cmds * sizeof(command);
1747 total += txs * (sizeof(tx_in) + sizeof(tx_out));
1749 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1750 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
1752 memory = kmalloc (total, GFP_KERNEL);
1753 if (!memory) {
1754 PRINTK (KERN_ERR, "could not allocate queues");
1755 return -ENOMEM;
1757 if (check_area (memory, total)) {
1758 PRINTK (KERN_ERR, "queues allocated in nasty area");
1759 kfree (memory);
1760 return -ENOMEM;
1763 limit = memory + total;
1764 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
1766 PRINTD (DBG_CMD, "command queue at %p", memory);
1769 command * cmd = memory;
1770 amb_cq * cq = &dev->cq;
1772 cq->pending = 0;
1773 cq->high = 0;
1774 cq->maximum = cmds - 1;
1776 cq->ptrs.start = cmd;
1777 cq->ptrs.in = cmd;
1778 cq->ptrs.out = cmd;
1779 cq->ptrs.limit = cmd + cmds;
1781 memory = cq->ptrs.limit;
1784 PRINTD (DBG_TX, "TX queue pair at %p", memory);
1787 tx_in * in = memory;
1788 tx_out * out;
1789 amb_txq * txq = &dev->txq;
1791 txq->pending = 0;
1792 txq->high = 0;
1793 txq->filled = 0;
1794 txq->maximum = txs - 1;
1796 txq->in.start = in;
1797 txq->in.ptr = in;
1798 txq->in.limit = in + txs;
1800 memory = txq->in.limit;
1801 out = memory;
1803 txq->out.start = out;
1804 txq->out.ptr = out;
1805 txq->out.limit = out + txs;
1807 memory = txq->out.limit;
1810 PRINTD (DBG_RX, "RX queue pairs at %p", memory);
1812 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1813 rx_in * in = memory;
1814 rx_out * out;
1815 amb_rxq * rxq = &dev->rxq[pool];
1817 rxq->buffer_size = rx_buffer_sizes[pool];
1818 rxq->buffers_wanted = 0;
1820 rxq->pending = 0;
1821 rxq->low = rxs[pool] - 1;
1822 rxq->emptied = 0;
1823 rxq->maximum = rxs[pool] - 1;
1825 rxq->in.start = in;
1826 rxq->in.ptr = in;
1827 rxq->in.limit = in + rxs[pool];
1829 memory = rxq->in.limit;
1830 out = memory;
1832 rxq->out.start = out;
1833 rxq->out.ptr = out;
1834 rxq->out.limit = out + rxs[pool];
1836 memory = rxq->out.limit;
1839 if (memory == limit) {
1840 return 0;
1841 } else {
1842 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
1843 kfree (limit - total);
1844 return -ENOMEM;
1849 /********** destruction of communication queues **********/
1851 static void destroy_queues (amb_dev * dev) {
1852 // all queues assumed empty
1853 void * memory = dev->cq.ptrs.start;
1854 // includes txq.in, txq.out, rxq[].in and rxq[].out
1856 PRINTD (DBG_FLOW, "destroy_queues %p", dev);
1858 PRINTD (DBG_INIT, "freeing queues at %p", memory);
1859 kfree (memory);
1861 return;
1864 /********** basic loader commands and error handling **********/
1866 static int __init do_loader_command (volatile loader_block * lb,
1867 const amb_dev * dev, loader_command cmd) {
1868 // centisecond timeouts - guessing away here
1869 unsigned int command_timeouts [] = {
1870 [host_memory_test] = 15,
1871 [read_adapter_memory] = 2,
1872 [write_adapter_memory] = 2,
1873 [adapter_start] = 50,
1874 [get_version_number] = 10,
1875 [interrupt_host] = 1,
1876 [flash_erase_sector] = 1,
1877 [adap_download_block] = 1,
1878 [adap_erase_flash] = 1,
1879 [adap_run_in_iram] = 1,
1880 [adap_end_download] = 1
1883 unsigned int command_successes [] = {
1884 [host_memory_test] = COMMAND_PASSED_TEST,
1885 [read_adapter_memory] = COMMAND_READ_DATA_OK,
1886 [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
1887 [adapter_start] = COMMAND_COMPLETE,
1888 [get_version_number] = COMMAND_COMPLETE,
1889 [interrupt_host] = COMMAND_COMPLETE,
1890 [flash_erase_sector] = COMMAND_COMPLETE,
1891 [adap_download_block] = COMMAND_COMPLETE,
1892 [adap_erase_flash] = COMMAND_COMPLETE,
1893 [adap_run_in_iram] = COMMAND_COMPLETE,
1894 [adap_end_download] = COMMAND_COMPLETE
1897 int decode_loader_result (loader_command cmd, u32 result) {
1898 int res;
1899 const char * msg;
1901 if (result == command_successes[cmd])
1902 return 0;
1904 switch (result) {
1905 case BAD_COMMAND:
1906 res = -EINVAL;
1907 msg = "bad command";
1908 break;
1909 case COMMAND_IN_PROGRESS:
1910 res = -ETIMEDOUT;
1911 msg = "command in progress";
1912 break;
1913 case COMMAND_PASSED_TEST:
1914 res = 0;
1915 msg = "command passed test";
1916 break;
1917 case COMMAND_FAILED_TEST:
1918 res = -EIO;
1919 msg = "command failed test";
1920 break;
1921 case COMMAND_READ_DATA_OK:
1922 res = 0;
1923 msg = "command read data ok";
1924 break;
1925 case COMMAND_READ_BAD_ADDRESS:
1926 res = -EINVAL;
1927 msg = "command read bad address";
1928 break;
1929 case COMMAND_WRITE_DATA_OK:
1930 res = 0;
1931 msg = "command write data ok";
1932 break;
1933 case COMMAND_WRITE_BAD_ADDRESS:
1934 res = -EINVAL;
1935 msg = "command write bad address";
1936 break;
1937 case COMMAND_WRITE_FLASH_FAILURE:
1938 res = -EIO;
1939 msg = "command write flash failure";
1940 break;
1941 case COMMAND_COMPLETE:
1942 res = 0;
1943 msg = "command complete";
1944 break;
1945 case COMMAND_FLASH_ERASE_FAILURE:
1946 res = -EIO;
1947 msg = "command flash erase failure";
1948 break;
1949 case COMMAND_WRITE_BAD_DATA:
1950 res = -EINVAL;
1951 msg = "command write bad data";
1952 break;
1953 default:
1954 res = -EINVAL;
1955 msg = "unknown error";
1956 PRINTD (DBG_LOAD|DBG_ERR, "decode_loader_result got %d=%x !",
1957 result, result);
1958 break;
1961 PRINTK (KERN_ERR, "%s", msg);
1962 return res;
1965 unsigned long timeout;
1967 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
1969 /* do a command
1971 Set the return value to zero, set the command type and set the
1972 valid entry to the right magic value. The payload is already
1973 correctly byte-ordered so we leave it alone. Hit the doorbell
1974 with the bus address of this structure.
1978 lb->result = 0;
1979 lb->command = cpu_to_be32 (cmd);
1980 lb->valid = cpu_to_be32 (DMA_VALID);
1981 // dump_registers (dev);
1982 // dump_loader_block (lb);
1983 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
1985 timeout = command_timeouts[cmd] * HZ/100;
1987 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
1988 if (timeout) {
1989 timeout = schedule_timeout (timeout);
1990 } else {
1991 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
1992 dump_registers (dev);
1993 dump_loader_block (lb);
1994 return -ETIMEDOUT;
1997 if (cmd == adapter_start) {
1998 // wait for start command to acknowledge...
1999 timeout = HZ/10;
2000 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2001 if (timeout) {
2002 timeout = schedule_timeout (timeout);
2003 } else {
2004 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
2005 be32_to_cpu (lb->result));
2006 dump_registers (dev);
2007 return -ETIMEDOUT;
2009 return 0;
2010 } else {
2011 return decode_loader_result (cmd, be32_to_cpu (lb->result));
2016 /* loader: determine loader version */
2018 static int __init get_loader_version (loader_block * lb,
2019 const amb_dev * dev, u32 * version) {
2020 int res;
2022 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
2024 res = do_loader_command (lb, dev, get_version_number);
2025 if (res)
2026 return res;
2027 if (version)
2028 *version = be32_to_cpu (lb->payload.version);
2029 return 0;
2032 /* loader: write memory data blocks */
2034 static int __init loader_write (loader_block * lb,
2035 const amb_dev * dev, const u32 * data,
2036 u32 address, unsigned int count) {
2037 unsigned int i;
2038 transfer_block * tb = &lb->payload.transfer;
2040 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
2042 if (count > MAX_TRANSFER_DATA)
2043 return -EINVAL;
2044 tb->address = cpu_to_be32 (address);
2045 tb->count = cpu_to_be32 (count);
2046 for (i = 0; i < count; ++i)
2047 tb->data[i] = cpu_to_be32 (data[i]);
2048 return do_loader_command (lb, dev, write_adapter_memory);
2051 /* loader: verify memory data blocks */
2053 static int __init loader_verify (loader_block * lb,
2054 const amb_dev * dev, const u32 * data,
2055 u32 address, unsigned int count) {
2056 unsigned int i;
2057 transfer_block * tb = &lb->payload.transfer;
2058 int res;
2060 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
2062 if (count > MAX_TRANSFER_DATA)
2063 return -EINVAL;
2064 tb->address = cpu_to_be32 (address);
2065 tb->count = cpu_to_be32 (count);
2066 res = do_loader_command (lb, dev, read_adapter_memory);
2067 if (!res)
2068 for (i = 0; i < count; ++i)
2069 if (tb->data[i] != cpu_to_be32 (data[i])) {
2070 res = -EINVAL;
2071 break;
2073 return res;
2076 /* loader: start microcode */
2078 static int __init loader_start (loader_block * lb,
2079 const amb_dev * dev, u32 address) {
2080 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
2082 lb->payload.start = cpu_to_be32 (address);
2083 return do_loader_command (lb, dev, adapter_start);
2086 /********** reset card **********/
2088 static int amb_reset (amb_dev * dev, int diags) {
2089 u32 word;
2091 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
2093 word = rd_plain (dev, offsetof(amb_mem, reset_control));
2094 // put card into reset state
2095 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
2096 // wait a short while
2097 udelay (10);
2098 #if 1
2099 // put card into known good state
2100 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
2101 // clear all interrupts just in case
2102 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
2103 #endif
2104 // clear self-test done flag
2105 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
2106 // take card out of reset state
2107 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
2109 if (diags) {
2110 unsigned long timeout;
2111 // 4.2 second wait
2112 timeout = HZ*42/10;
2113 while (timeout)
2114 timeout = schedule_timeout (timeout);
2115 // half second time-out
2116 timeout = HZ/2;
2117 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
2118 if (timeout) {
2119 timeout = schedule_timeout (timeout);
2120 } else {
2121 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
2122 return -ETIMEDOUT;
2125 // get results of self-test
2126 // XXX double check byte-order
2127 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
2128 if (word & SELF_TEST_FAILURE) {
2129 void sf (const char * msg) {
2130 PRINTK (KERN_ERR, "self-test failed: %s", msg);
2132 if (word & GPINT_TST_FAILURE)
2133 sf ("interrupt");
2134 if (word & SUNI_DATA_PATTERN_FAILURE)
2135 sf ("SUNI data pattern");
2136 if (word & SUNI_DATA_BITS_FAILURE)
2137 sf ("SUNI data bits");
2138 if (word & SUNI_UTOPIA_FAILURE)
2139 sf ("SUNI UTOPIA interface");
2140 if (word & SUNI_FIFO_FAILURE)
2141 sf ("SUNI cell buffer FIFO");
2142 if (word & SRAM_FAILURE)
2143 sf ("bad SRAM");
2144 // better return value?
2145 return -EIO;
2149 return 0;
2152 /********** transfer and start the microcode **********/
2154 static int __init ucode_init (loader_block * lb, amb_dev * dev) {
2155 unsigned int i = 0;
2156 unsigned int total = 0;
2157 const u32 * pointer = ucode_data;
2158 u32 address;
2159 unsigned int count;
2160 int res;
2162 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
2164 while (address = ucode_regions[i].start,
2165 count = ucode_regions[i].count) {
2166 PRINTD (DBG_LOAD, "starting region (%x, %u)", address, count);
2167 while (count) {
2168 unsigned int words;
2169 if (count <= MAX_TRANSFER_DATA)
2170 words = count;
2171 else
2172 words = MAX_TRANSFER_DATA;
2173 total += words;
2174 res = loader_write (lb, dev, pointer, address, words);
2175 if (res)
2176 return res;
2177 res = loader_verify (lb, dev, pointer, address, words);
2178 if (res)
2179 return res;
2180 count -= words;
2181 address += sizeof(u32) * words;
2182 pointer += words;
2184 i += 1;
2186 if (*pointer == 0xdeadbeef) {
2187 return loader_start (lb, dev, ucode_start);
2188 } else {
2189 // cast needed as there is no %? for pointer differnces
2190 PRINTD (DBG_LOAD|DBG_ERR,
2191 "offset=%li, *pointer=%x, address=%x, total=%u",
2192 (long) (pointer - ucode_data), *pointer, address, total);
2193 PRINTK (KERN_ERR, "incorrect microcode data");
2194 return -ENOMEM;
2198 /********** give adapter parameters **********/
2200 static int __init amb_talk (amb_dev * dev) {
2201 adap_talk_block a;
2202 unsigned char pool;
2203 unsigned long timeout;
2205 u32 x (void * addr) {
2206 return cpu_to_be32 (virt_to_bus (addr));
2209 PRINTD (DBG_FLOW, "amb_talk %p", dev);
2211 a.command_start = x (dev->cq.ptrs.start);
2212 a.command_end = x (dev->cq.ptrs.limit);
2213 a.tx_start = x (dev->txq.in.start);
2214 a.tx_end = x (dev->txq.in.limit);
2215 a.txcom_start = x (dev->txq.out.start);
2216 a.txcom_end = x (dev->txq.out.limit);
2218 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
2219 // the other "a" items are set up by the adapter
2220 a.rec_struct[pool].buffer_start = x (dev->rxq[pool].in.start);
2221 a.rec_struct[pool].buffer_end = x (dev->rxq[pool].in.limit);
2222 a.rec_struct[pool].rx_start = x (dev->rxq[pool].out.start);
2223 a.rec_struct[pool].rx_end = x (dev->rxq[pool].out.limit);
2224 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
2227 #ifdef AMB_NEW_MICROCODE
2228 // disable fast PLX prefetching
2229 a.init_flags = 0;
2230 #endif
2232 // pass the structure
2233 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
2235 // 2.2 second wait (must not touch doorbell during 2 second DMA test)
2236 timeout = HZ*22/10;
2237 while (timeout)
2238 timeout = schedule_timeout (timeout);
2239 // give the adapter another half second?
2240 timeout = HZ/2;
2241 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2242 if (timeout) {
2243 timeout = schedule_timeout (timeout);
2244 } else {
2245 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
2246 return -ETIMEDOUT;
2249 return 0;
2252 // get microcode version
2253 static void __init amb_ucode_version (amb_dev * dev) {
2254 u32 major;
2255 u32 minor;
2256 command cmd;
2257 cmd.request = cpu_to_be32 (SRB_GET_VERSION);
2258 while (command_do (dev, &cmd))
2259 schedule();
2260 major = be32_to_cpu (cmd.args.version.major);
2261 minor = be32_to_cpu (cmd.args.version.minor);
2262 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
2265 // get end station address
2266 static void __init amb_esi (amb_dev * dev, u8 * esi) {
2267 u32 lower4;
2268 u16 upper2;
2269 command cmd;
2271 // swap bits within byte to get Ethernet ordering
2272 u8 bit_swap (u8 byte) {
2273 const u8 swap[] = {
2274 0x0, 0x8, 0x4, 0xc,
2275 0x2, 0xa, 0x6, 0xe,
2276 0x1, 0x9, 0x5, 0xd,
2277 0x3, 0xb, 0x7, 0xf
2279 return ((swap[byte & 0xf]<<4) | swap[byte>>4]);
2282 cmd.request = cpu_to_be32 (SRB_GET_BIA);
2283 while (command_do (dev, &cmd))
2284 schedule();
2285 lower4 = be32_to_cpu (cmd.args.bia.lower4);
2286 upper2 = be32_to_cpu (cmd.args.bia.upper2);
2287 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
2289 if (esi) {
2290 unsigned int i;
2292 PRINTDB (DBG_INIT, "ESI:");
2293 for (i = 0; i < ESI_LEN; ++i) {
2294 if (i < 4)
2295 esi[i] = bit_swap (lower4>>(8*i));
2296 else
2297 esi[i] = bit_swap (upper2>>(8*(i-4)));
2298 PRINTDM (DBG_INIT, " %02x", esi[i]);
2301 PRINTDE (DBG_INIT, "");
2304 return;
2307 static int __init amb_init (amb_dev * dev) {
2308 loader_block lb;
2310 void fixup_plx_window (void) {
2311 // fix up the PLX-mapped window base address to match the block
2312 unsigned long blb;
2313 u32 mapreg;
2314 blb = virt_to_bus (&lb);
2315 // the kernel stack had better not ever cross a 1Gb boundary!
2316 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
2317 mapreg &= ~onegigmask;
2318 mapreg |= blb & onegigmask;
2319 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
2320 return;
2323 u32 version;
2325 if (amb_reset (dev, 1)) {
2326 PRINTK (KERN_ERR, "card reset failed!");
2327 } else {
2328 fixup_plx_window ();
2330 if (get_loader_version (&lb, dev, &version)) {
2331 PRINTK (KERN_INFO, "failed to get loader version");
2332 } else {
2333 PRINTK (KERN_INFO, "loader version is %08x", version);
2335 if (ucode_init (&lb, dev)) {
2336 PRINTK (KERN_ERR, "microcode failure");
2337 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
2338 PRINTK (KERN_ERR, "failed to get memory for queues");
2339 } else {
2341 if (amb_talk (dev)) {
2342 PRINTK (KERN_ERR, "adapter did not accept queues");
2343 } else {
2345 amb_ucode_version (dev);
2346 return 0;
2348 } /* amb_talk */
2350 destroy_queues (dev);
2351 } /* create_queues, ucode_init */
2353 amb_reset (dev, 0);
2354 } /* get_loader_version */
2356 } /* amb_reset */
2358 return -1;
2361 static int __init amb_probe (void) {
2362 struct pci_dev * pci_dev;
2363 int devs;
2365 void do_pci_device (void) {
2366 amb_dev * dev;
2368 // read resources from PCI configuration space
2369 u8 irq = pci_dev->irq;
2370 u32 * membase = bus_to_virt (pci_resource_start (pci_dev, 0));
2371 u32 iobase = pci_resource_start (pci_dev, 1);
2373 void setup_dev (void) {
2374 unsigned char pool;
2375 memset (dev, 0, sizeof(amb_dev));
2377 // set up known dev items straight away
2378 dev->pci_dev = pci_dev;
2380 dev->iobase = iobase;
2381 dev->irq = irq;
2382 dev->membase = membase;
2384 // flags (currently only dead)
2385 dev->flags = 0;
2387 // Allocate cell rates (fibre)
2388 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
2389 // to be really pedantic, this should be ATM_OC3c_PCR
2390 dev->tx_avail = ATM_OC3_PCR;
2391 dev->rx_avail = ATM_OC3_PCR;
2393 #ifdef FILL_RX_POOLS_IN_BH
2394 // initialise bottom half
2395 INIT_LIST_HEAD(&dev->bh.list);
2396 dev->bh.sync = 0;
2397 dev->bh.routine = (void (*)(void *)) fill_rx_pools;
2398 dev->bh.data = dev;
2399 #endif
2401 // semaphore for txer/rxer modifications - we cannot use a
2402 // spinlock as the critical region needs to switch processes
2403 init_MUTEX (&dev->vcc_sf);
2404 // queue manipulation spinlocks; we want atomic reads and
2405 // writes to the queue descriptors (handles IRQ and SMP)
2406 // consider replacing "int pending" -> "atomic_t available"
2407 // => problem related to who gets to move queue pointers
2408 spin_lock_init (&dev->cq.lock);
2409 spin_lock_init (&dev->txq.lock);
2410 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2411 spin_lock_init (&dev->rxq[pool].lock);
2414 void setup_pci_dev (void) {
2415 unsigned char lat;
2417 /* XXX check return value */
2418 pci_enable_device (pci_dev);
2420 // enable bus master accesses
2421 pci_set_master (pci_dev);
2423 // frobnicate latency (upwards, usually)
2424 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
2425 if (pci_lat) {
2426 PRINTD (DBG_INIT, "%s PCI latency timer from %hu to %hu",
2427 "changing", lat, pci_lat);
2428 pci_write_config_byte (pci_dev, PCI_LATENCY_TIMER, pci_lat);
2429 } else if (lat < MIN_PCI_LATENCY) {
2430 PRINTK (KERN_INFO, "%s PCI latency timer from %hu to %hu",
2431 "increasing", lat, MIN_PCI_LATENCY);
2432 pci_write_config_byte (pci_dev, PCI_LATENCY_TIMER, MIN_PCI_LATENCY);
2436 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
2437 " IO %x, IRQ %u, MEM %p", iobase, irq, membase);
2439 // check IO region
2440 if (check_region (iobase, AMB_EXTENT)) {
2441 PRINTK (KERN_ERR, "IO range already in use!");
2442 return;
2445 dev = kmalloc (sizeof(amb_dev), GFP_KERNEL);
2446 if (!dev) {
2447 // perhaps we should be nice: deregister all adapters and abort?
2448 PRINTK (KERN_ERR, "out of memory!");
2449 return;
2452 setup_dev();
2454 if (amb_init (dev)) {
2455 PRINTK (KERN_ERR, "adapter initialisation failure");
2456 } else {
2458 setup_pci_dev();
2460 // grab (but share) IRQ and install handler
2461 if (request_irq (irq, interrupt_handler, SA_SHIRQ, DEV_LABEL, dev)) {
2462 PRINTK (KERN_ERR, "request IRQ failed!");
2463 // free_irq is at "endif"
2464 } else {
2466 // reserve IO region
2467 request_region (iobase, AMB_EXTENT, DEV_LABEL);
2469 dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL);
2470 if (!dev->atm_dev) {
2471 PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
2472 } else {
2474 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
2475 dev->atm_dev->number, dev, dev->atm_dev);
2476 dev->atm_dev->dev_data = (void *) dev;
2478 // register our address
2479 amb_esi (dev, dev->atm_dev->esi);
2481 // 0 bits for vpi, 10 bits for vci
2482 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
2483 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
2485 // update count and linked list
2486 ++devs;
2487 dev->prev = amb_devs;
2488 amb_devs = dev;
2490 // enable host interrupts
2491 interrupts_on (dev);
2493 // success
2494 return;
2496 // not currently reached
2497 atm_dev_deregister (dev->atm_dev);
2498 } /* atm_dev_register */
2500 release_region (iobase, AMB_EXTENT);
2501 free_irq (irq, dev);
2502 } /* request_region, request_irq */
2504 amb_reset (dev, 0);
2505 } /* amb_init */
2507 kfree (dev);
2508 } /* kmalloc, end-of-fn */
2510 PRINTD (DBG_FLOW, "amb_probe");
2512 if (!pci_present())
2513 return 0;
2515 devs = 0;
2516 pci_dev = NULL;
2517 while ((pci_dev = pci_find_device
2518 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, pci_dev)
2520 do_pci_device();
2522 pci_dev = NULL;
2523 while ((pci_dev = pci_find_device
2524 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, pci_dev)
2526 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2528 return devs;
2531 static void __init amb_check_args (void) {
2532 unsigned char pool;
2533 unsigned int max_rx_size;
2535 #ifdef DEBUG_AMBASSADOR
2536 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
2537 #else
2538 if (debug)
2539 PRINTK (KERN_NOTICE, "no debugging support");
2540 #endif
2542 if (cmds < MIN_QUEUE_SIZE)
2543 PRINTK (KERN_NOTICE, "cmds has been raised to %u",
2544 cmds = MIN_QUEUE_SIZE);
2546 if (txs < MIN_QUEUE_SIZE)
2547 PRINTK (KERN_NOTICE, "txs has been raised to %u",
2548 txs = MIN_QUEUE_SIZE);
2550 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2551 if (rxs[pool] < MIN_QUEUE_SIZE)
2552 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
2553 pool, rxs[pool] = MIN_QUEUE_SIZE);
2555 // buffers sizes should be greater than zero and strictly increasing
2556 max_rx_size = 0;
2557 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2558 if (rxs_bs[pool] <= max_rx_size)
2559 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
2560 pool, rxs_bs[pool]);
2561 else
2562 max_rx_size = rxs_bs[pool];
2564 if (rx_lats < MIN_RX_BUFFERS)
2565 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
2566 rx_lats = MIN_RX_BUFFERS);
2568 return;
2571 /********** module stuff **********/
2573 #ifdef MODULE
2574 EXPORT_NO_SYMBOLS;
2576 MODULE_AUTHOR(maintainer_string);
2577 MODULE_DESCRIPTION(description_string);
2578 MODULE_PARM(debug, "h");
2579 MODULE_PARM(cmds, "i");
2580 MODULE_PARM(txs, "i");
2581 MODULE_PARM(rxs, __MODULE_STRING(NUM_RX_POOLS) "i");
2582 MODULE_PARM(rxs_bs, __MODULE_STRING(NUM_RX_POOLS) "i");
2583 MODULE_PARM(rx_lats, "i");
2584 MODULE_PARM(pci_lat, "b");
2585 MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
2586 MODULE_PARM_DESC(cmds, "number of command queue entries");
2587 MODULE_PARM_DESC(txs, "number of TX queue entries");
2588 MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
2589 MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
2590 MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
2591 MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2593 /********** module entry **********/
2595 int init_module (void) {
2596 int devs;
2598 PRINTD (DBG_FLOW|DBG_INIT, "init_module");
2600 // sanity check - cast needed as printk does not support %Zu
2601 if (sizeof(amb_mem) != 4*16 + 4*12) {
2602 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2603 (unsigned long) sizeof(amb_mem));
2604 return -ENOMEM;
2607 show_version();
2609 amb_check_args();
2611 // get the juice
2612 devs = amb_probe();
2614 if (devs) {
2615 init_timer (&housekeeping);
2616 housekeeping.function = do_housekeeping;
2617 // paranoia
2618 housekeeping.data = 1;
2619 set_timer (&housekeeping, 0);
2620 } else {
2621 PRINTK (KERN_INFO, "no (usable) adapters found");
2624 return devs ? 0 : -ENODEV;
2627 /********** module exit **********/
2629 void cleanup_module (void) {
2630 amb_dev * dev;
2632 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
2634 // paranoia
2635 housekeeping.data = 0;
2636 del_timer (&housekeeping);
2638 while (amb_devs) {
2639 dev = amb_devs;
2640 amb_devs = dev->prev;
2642 PRINTD (DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
2643 // the drain should not be necessary
2644 drain_rx_pools (dev);
2645 interrupts_off (dev);
2646 amb_reset (dev, 0);
2647 destroy_queues (dev);
2648 atm_dev_deregister (dev->atm_dev);
2649 free_irq (dev->irq, dev);
2650 release_region (dev->iobase, AMB_EXTENT);
2651 kfree (dev);
2654 return;
2657 #else
2659 /********** monolithic entry **********/
2661 int __init amb_detect (void) {
2662 int devs;
2664 // sanity check - cast needed as printk does not support %Zu
2665 if (sizeof(amb_mem) != 4*16 + 4*12) {
2666 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2667 (unsigned long) sizeof(amb_mem));
2668 return 0;
2671 show_version();
2673 amb_check_args();
2675 // get the juice
2676 devs = amb_probe();
2678 if (devs) {
2679 init_timer (&housekeeping);
2680 housekeeping.function = do_housekeeping;
2681 // paranoia
2682 housekeeping.data = 1;
2683 set_timer (&housekeeping, 0);
2684 } else {
2685 PRINTK (KERN_INFO, "no (usable) adapters found");
2688 return devs;
2691 #endif