arch/sparc64/kernel/pci.c

   1 /* $Id: pci.c,v 1.20 2000/12/14 22:57:25 davem Exp $
   2  * pci.c: UltraSparc PCI controller support.
   3  *
   4  * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
   5  * Copyright (C) 1998, 1999 Eddie C. Dost   (ecd@skynet.be)
   6  * Copyright (C) 1999 Jakub Jelinek   (jj@ultra.linux.cz)
   7  */
   8
   9 #include <linux/config.h>
  10 #include <linux/kernel.h>
  11 #include <linux/string.h>
  12 #include <linux/sched.h>
  13 #include <linux/capability.h>
  14 #include <linux/errno.h>
  15 #include <linux/smp_lock.h>
  16 #include <linux/init.h>
  17
  18 #include <asm/uaccess.h>
  19 #include <asm/pbm.h>
  20 #include <asm/irq.h>
  21 #include <asm/ebus.h>
  22
  23 unsigned long pci_memspace_mask = 0xffffffffUL;
  24
  25 #ifndef CONFIG_PCI
  26 /* A "nop" PCI implementation. */
  27 asmlinkage int sys_pciconfig_read(unsigned long bus, unsigned long dfn,
  28                                   unsigned long off, unsigned long len,
  29                                   unsigned char *buf)
  30 {
  31         return 0;
  32 }
  33 asmlinkage int sys_pciconfig_write(unsigned long bus, unsigned long dfn,
  34                                    unsigned long off, unsigned long len,
  35                                    unsigned char *buf)
  36 {
  37         return 0;
  38 }
  39 #else
  40
  41 /* List of all PCI controllers found in the system. */
  42 spinlock_t pci_controller_lock = SPIN_LOCK_UNLOCKED;
  43 struct pci_controller_info *pci_controller_root = NULL;
  44
  45 /* Each PCI controller found gets a unique index. */
  46 int pci_num_controllers = 0;
  47
  48 /* Given an 8-bit PCI bus number, this yields the
  49  * controlling PBM module info.
  50  *
  51  * Some explanation is in order here.  The Linux APIs for
  52  * the PCI subsystem require that the configuration space
  53  * types are enough to signify PCI configuration space
  54  * accesses correctly.  This gives us 8-bits for the bus
  55  * number, however we have multiple PCI controllers on
  56  * UltraSparc systems.
  57  *
  58  * So what we do is give the PCI busses under each controller
  59  * a unique portion of the 8-bit PCI bus number space.
  60  * Therefore one can obtain the controller from the bus
  61  * number.  For example, say PSYCHO PBM-A a subordinate bus
  62  * space of 0 to 4, and PBM-B has a space of 0 to 2.  PBM-A
  63  * will use 0 to 4, and PBM-B will use 5 to 7.
  64  */
  65 struct pci_pbm_info *pci_bus2pbm[256];
  66 unsigned char pci_highest_busnum = 0;
  67
  68 /* At boot time the user can give the kernel a command
  69  * line option which controls if and how PCI devices
  70  * are reordered at PCI bus probing time.
  71  */
  72 int pci_device_reorder = 0;
  73
  74 spinlock_t pci_poke_lock = SPIN_LOCK_UNLOCKED;
  75 volatile int pci_poke_in_progress;
  76 volatile int pci_poke_faulted;
  77
  78 /* Probe for all PCI controllers in the system. */
  79 extern void sabre_init(int);
  80 extern void psycho_init(int);
  81
  82 static struct {
  83         char *model_name;
  84         void (*init)(int);
  85 } pci_controller_table[] = {
  86         { "SUNW,sabre", sabre_init },
  87         { "pci108e,a000", sabre_init },
  88         { "SUNW,psycho", psycho_init },
  89         { "pci108e,8000", psycho_init }
  90 };
  91 #define PCI_NUM_CONTROLLER_TYPES (sizeof(pci_controller_table) / \
  92                                   sizeof(pci_controller_table[0]))
  93
  94 static void pci_controller_init(char *model_name, int namelen, int node)
  95 {
  96         int i;
  97
  98         for (i = 0; i < PCI_NUM_CONTROLLER_TYPES; i++) {
  99                 if (!strncmp(model_name,
 100                              pci_controller_table[i].model_name,
 101                              namelen)) {
 102                         pci_controller_table[i].init(node);
 103                         return;
 104                 }
 105         }
 106         printk("PCI: Warning unknown controller, model name [%s]\n",
 107                model_name);
 108         printk("PCI: Ignoring controller...\n");
 109 }
 110
 111 /* Find each controller in the system, attach and initialize
 112  * software state structure for each and link into the
 113  * pci_controller_root.  Setup the controller enough such
 114  * that bus scanning can be done.
 115  */
 116 static void pci_controller_probe(void)
 117 {
 118         char namebuf[16];
 119         int node;
 120
 121         printk("PCI: Probing for controllers.\n");
 122         node = prom_getchild(prom_root_node);
 123         while ((node = prom_searchsiblings(node, "pci")) != 0) {
 124                 int len;
 125
 126                 len = prom_getproperty(node, "model",
 127                                        namebuf, sizeof(namebuf));
 128                 if (len > 0)
 129                         pci_controller_init(namebuf, len, node);
 130                 else {
 131                         len = prom_getproperty(node, "compatible",
 132                                                namebuf, sizeof(namebuf));
 133                         if (len > 0)
 134                                 pci_controller_init(namebuf, len, node);
 135                 }
 136                 node = prom_getsibling(node);
 137                 if (!node)
 138                         break;
 139         }
 140 }
 141
 142 static void pci_scan_each_controller_bus(void)
 143 {
 144         struct pci_controller_info *p;
 145         unsigned long flags;
 146
 147         spin_lock_irqsave(&pci_controller_lock, flags);
 148         for (p = pci_controller_root; p; p = p->next)
 149                 p->scan_bus(p);
 150         spin_unlock_irqrestore(&pci_controller_lock, flags);
 151 }
 152
 153 /* Reorder the pci_dev chain, so that onboard devices come first
 154  * and then come the pluggable cards.
 155  */
 156 static void __init pci_reorder_devs(void)
 157 {
 158         struct list_head *pci_onboard = &pci_devices;
 159         struct list_head *walk = pci_onboard->next;
 160
 161         while (walk != pci_onboard) {
 162                 struct pci_dev *pdev = pci_dev_g(walk);
 163                 struct list_head *walk_next = walk->next;
 164
 165                 if (pdev->irq && (__irq_ino(pdev->irq) & 0x20)) {
 166                         list_del(walk);
 167                         list_add(walk, pci_onboard);
 168                 }
 169
 170                 walk = walk_next;
 171         }
 172 }
 173
 174 void __init pcibios_init(void)
 175 {
 176         pci_controller_probe();
 177         if (pci_controller_root == NULL)
 178                 return;
 179
 180         pci_scan_each_controller_bus();
 181
 182         if (pci_device_reorder)
 183                 pci_reorder_devs();
 184
 185         ebus_init();
 186 }
 187
 188 struct pci_fixup pcibios_fixups[] = {
 189         { 0 }
 190 };
 191
 192 void pcibios_fixup_bus(struct pci_bus *pbus)
 193 {
 194 }
 195
 196 void pcibios_update_resource(struct pci_dev *pdev, struct resource *res1,
 197                              struct resource *res2, int index)
 198 {
 199 }
 200
 201 void pcibios_update_irq(struct pci_dev *pdev, int irq)
 202 {
 203 }
 204
 205 void pcibios_fixup_pbus_ranges(struct pci_bus *pbus,
 206                                struct pbus_set_ranges_data *pranges)
 207 {
 208 }
 209
 210 void pcibios_align_resource(void *data, struct resource *res, unsigned long size)
 211 {
 212 }
 213
 214 int pcibios_enable_device(struct pci_dev *pdev)
 215 {
 216         return 0;
 217 }
 218
 219 char * __init pcibios_setup(char *str)
 220 {
 221         if (!strcmp(str, "onboardfirst")) {
 222                 pci_device_reorder = 1;
 223                 return NULL;
 224         }
 225         if (!strcmp(str, "noreorder")) {
 226                 pci_device_reorder = 0;
 227                 return NULL;
 228         }
 229         return str;
 230 }
 231
 232 #endif /* !(CONFIG_PCI) */