arch/ppc/kernel/pmac_pci.c

   1 /*
   2  * Support for PCI bridges found on Power Macintoshes.
   3  * At present the "bandit" and "chaos" bridges are supported.
   4  * Fortunately you access configuration space in the same
   5  * way with either bridge.
   6  *
   7  * Copyright (C) 1997 Paul Mackerras (paulus@cs.anu.edu.au)
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/pci.h>
  17 #include <linux/delay.h>
  18 #include <linux/string.h>
  19 #include <linux/init.h>
  20 #include <linux/bootmem.h>
  21
  22 #include <asm/init.h>
  23 #include <asm/io.h>
  24 #include <asm/prom.h>
  25 #include <asm/pci-bridge.h>
  26 #include <asm/machdep.h>
  27
  28 #include "pci.h"
  29
  30 struct bridge_data **bridges, *bridge_list;
  31 static int max_bus;
  32
  33 struct uninorth_data {
  34         struct device_node*     node;
  35         volatile unsigned int*  cfg_addr;
  36         volatile unsigned int*  cfg_data;
  37         void*                   iobase;
  38         unsigned long           iobase_phys;
  39 };
  40
  41 static struct uninorth_data uninorth_bridges[3];
  42 static int uninorth_count;
  43 static int uninorth_default = -1;
  44
  45 static void add_bridges(struct device_node *dev);
  46
  47 /*
  48  * Magic constants for enabling cache coherency in the bandit/PSX bridge.
  49  */
  50 #define APPLE_VENDID    0x106b
  51 #define BANDIT_DEVID    1
  52 #define BANDIT_DEVID_2  8
  53 #define BANDIT_REVID    3
  54
  55 #define BANDIT_DEVNUM   11
  56 #define BANDIT_MAGIC    0x50
  57 #define BANDIT_COHERENT 0x40
  58
  59 /* Obsolete, should be replaced by pmac_pci_dev_io_base() (below) */
  60 __pmac
  61 void *pci_io_base(unsigned int bus)
  62 {
  63         struct bridge_data *bp;
  64
  65         if (bus > max_bus || (bp = bridges[bus]) == 0)
  66                 return 0;
  67         return bp->io_base;
  68 }
  69
  70 __pmac
  71 int pci_device_loc(struct device_node *dev, unsigned char *bus_ptr,
  72                    unsigned char *devfn_ptr)
  73 {
  74         unsigned int *reg;
  75         int len;
  76
  77         reg = (unsigned int *) get_property(dev, "reg", &len);
  78         if (reg == 0 || len < 5 * sizeof(unsigned int)) {
  79                 /* doesn't look like a PCI device */
  80                 *bus_ptr = 0xff;
  81                 *devfn_ptr = 0xff;
  82                 return -1;
  83         }
  84         *bus_ptr = reg[0] >> 16;
  85         *devfn_ptr = reg[0] >> 8;
  86         return 0;
  87 }
  88
  89 /* This routines figures out on which root bridge a given PCI device
  90  * is attached.
  91  */
  92 __pmac
  93 int
  94 pmac_pci_dev_root_bridge(unsigned char bus, unsigned char dev_fn)
  95 {
  96         struct device_node *node, *bridge_node;
  97         int bridge = uninorth_default;
  98
  99         if (uninorth_count == 0)
 100                 return 0;
 101         if (bus == 0 && PCI_SLOT(dev_fn) < 11)
 102                 return 0;
 103
 104         /* We look for the OF device corresponding to this bus/devfn pair. If we
 105          * don't find it, we default to the external PCI */
 106         bridge_node = NULL;
 107         node = find_pci_device_OFnode(bus, dev_fn & 0xf8);
 108         if (node) {
 109             /* note: we don't stop on the first occurence since we need to go
 110              * up to the root bridge */
 111             do {
 112                 if (node->type && !strcmp(node->type, "pci")
 113                         && device_is_compatible(node, "uni-north"))
 114                         bridge_node = node;
 115                 node=node->parent;
 116             } while (node);
 117         }
 118         if (bridge_node) {
 119             int i;
 120             for (i=0;i<uninorth_count;i++)
 121                 if (uninorth_bridges[i].node == bridge_node) {
 122                     bridge = i;
 123                     break;
 124                 }
 125         }
 126
 127         if (bridge == -1) {
 128                 printk(KERN_WARNING "pmac_pci: no default bridge !\n");
 129                 return 0;
 130         }
 131
 132         return bridge;
 133 }
 134
 135 __pmac
 136 void *
 137 pmac_pci_dev_io_base(unsigned char bus, unsigned char devfn, int physical)
 138 {
 139         int bridge = -1;
 140         if (uninorth_count != 0)
 141                 bridge = pmac_pci_dev_root_bridge(bus, devfn);
 142         if (bridge == -1) {
 143                 struct bridge_data *bp;
 144
 145                 if (bus > max_bus || (bp = bridges[bus]) == 0)
 146                         return 0;
 147                 return physical ? (void *) bp->io_base_phys : bp->io_base;
 148         }
 149         return physical ? (void *) uninorth_bridges[bridge].iobase_phys
 150                 : uninorth_bridges[bridge].iobase;
 151 }
 152
 153 __pmac
 154 void *
 155 pmac_pci_dev_mem_base(unsigned char bus, unsigned char devfn)
 156 {
 157         return 0;
 158 }
 159
 160 /* This function only works for bus 0, uni-N uses a different mecanism for
 161  * other busses (see below)
 162  */
 163 #define UNI_N_CFA0(devfn, off)  \
 164         ((1 << (unsigned long)PCI_SLOT(dev_fn)) \
 165         | (((unsigned long)PCI_FUNC(dev_fn)) << 8) \
 166         | (((unsigned long)(off)) & 0xFCUL))
 167
 168 /* This one is for type 1 config accesses */
 169 #define UNI_N_CFA1(bus, devfn, off)     \
 170         ((((unsigned long)(bus)) << 16) \
 171         |(((unsigned long)(devfn)) << 8) \
 172         |(((unsigned long)(off)) & 0xFCUL) \
 173         |1UL)
 174
 175 __pmac static
 176 unsigned int
 177 uni_north_access_data(unsigned char bus, unsigned char dev_fn,
 178                                 unsigned char offset)
 179 {
 180         int bridge;
 181         unsigned int caddr;
 182
 183         bridge = pmac_pci_dev_root_bridge(bus, dev_fn);
 184         if (bus == 0)
 185                 caddr = UNI_N_CFA0(dev_fn, offset);
 186         else
 187                 caddr = UNI_N_CFA1(bus, dev_fn, offset);
 188
 189         if (bridge == -1) {
 190                 printk(KERN_WARNING "pmac_pci: no default bridge !\n");
 191                 return 0;
 192         }
 193
 194         /* Uninorth will return garbage if we don't read back the value ! */
 195         out_le32(uninorth_bridges[bridge].cfg_addr, caddr);
 196         (void)in_le32(uninorth_bridges[bridge].cfg_addr);
 197         /* Yes, offset is & 7, not & 3 ! */
 198         return (unsigned int)(uninorth_bridges[bridge].cfg_data) + (offset & 0x07);
 199 }
 200
 201 __pmac
 202 int uni_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
 203                                   unsigned char offset, unsigned char *val)
 204 {
 205         unsigned int addr;
 206
 207         *val = 0xff;
 208         addr = uni_north_access_data(bus, dev_fn, offset);
 209         if (!addr)
 210                 return PCIBIOS_DEVICE_NOT_FOUND;
 211         *val = in_8((volatile unsigned char*)addr);
 212         return PCIBIOS_SUCCESSFUL;
 213 }
 214
 215 __pmac
 216 int uni_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 217                                   unsigned char offset, unsigned short *val)
 218 {
 219         unsigned int addr;
 220
 221         *val = 0xffff;
 222         addr = uni_north_access_data(bus, dev_fn, offset);
 223         if (!addr)
 224                 return PCIBIOS_DEVICE_NOT_FOUND;
 225         *val = in_le16((volatile unsigned short*)addr);
 226         return PCIBIOS_SUCCESSFUL;
 227 }
 228
 229 __pmac
 230 int uni_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 231                                    unsigned char offset, unsigned int *val)
 232 {
 233         unsigned int addr;
 234
 235         *val = 0xffff;
 236         addr = uni_north_access_data(bus, dev_fn, offset);
 237         if (!addr)
 238                 return PCIBIOS_DEVICE_NOT_FOUND;
 239         *val = in_le32((volatile unsigned int*)addr);
 240         return PCIBIOS_SUCCESSFUL;
 241 }
 242
 243 __pmac
 244 int uni_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 245                                    unsigned char offset, unsigned char val)
 246 {
 247         unsigned int addr;
 248
 249         addr = uni_north_access_data(bus, dev_fn, offset);
 250         if (!addr)
 251                 return PCIBIOS_DEVICE_NOT_FOUND;
 252         out_8((volatile unsigned char *)addr, val);
 253         (void)in_8((volatile unsigned char *)addr);
 254         return PCIBIOS_SUCCESSFUL;
 255 }
 256
 257 __pmac
 258 int uni_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 259                                    unsigned char offset, unsigned short val)
 260 {
 261         unsigned int addr;
 262
 263         addr = uni_north_access_data(bus, dev_fn, offset);
 264         if (!addr)
 265                 return PCIBIOS_DEVICE_NOT_FOUND;
 266         out_le16((volatile unsigned short *)addr, val);
 267         (void)in_le16((volatile unsigned short *)addr);
 268         return PCIBIOS_SUCCESSFUL;
 269 }
 270
 271 __pmac
 272 int uni_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 273                                     unsigned char offset, unsigned int val)
 274 {
 275         unsigned int addr;
 276
 277         addr = uni_north_access_data(bus, dev_fn, offset);
 278         if (!addr)
 279                 return PCIBIOS_DEVICE_NOT_FOUND;
 280         out_le32((volatile unsigned int *)addr, val);
 281         (void)in_le32((volatile unsigned int *)addr);
 282         return PCIBIOS_SUCCESSFUL;
 283 }
 284
 285 __pmac
 286 int pmac_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
 287                                   unsigned char offset, unsigned char *val)
 288 {
 289         struct bridge_data *bp;
 290
 291         *val = 0xff;
 292         if (bus > max_bus || (bp = bridges[bus]) == 0)
 293                 return PCIBIOS_DEVICE_NOT_FOUND;
 294         if (bus == bp->bus_number) {
 295                 if (dev_fn < (11 << 3))
 296                         return PCIBIOS_DEVICE_NOT_FOUND;
 297                 out_le32(bp->cfg_addr,
 298                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 299                          + (offset & ~3));
 300         } else {
 301                 /* Bus number once again taken into consideration.
 302                  * Change applied from 2.1.24. This makes devices located
 303                  * behind PCI-PCI bridges visible.
 304                  * -Ranjit Deshpande, 01/20/99
 305                  */
 306                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 307         }
 308         udelay(2);
 309         *val = in_8(bp->cfg_data + (offset & 3));
 310         return PCIBIOS_SUCCESSFUL;
 311 }
 312
 313 __pmac
 314 int pmac_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 315                                   unsigned char offset, unsigned short *val)
 316 {
 317         struct bridge_data *bp;
 318
 319         *val = 0xffff;
 320         if (bus > max_bus || (bp = bridges[bus]) == 0)
 321                 return PCIBIOS_DEVICE_NOT_FOUND;
 322         if ((offset & 1) != 0)
 323                 return PCIBIOS_BAD_REGISTER_NUMBER;
 324         if (bus == bp->bus_number) {
 325                 if (dev_fn < (11 << 3))
 326                         return PCIBIOS_DEVICE_NOT_FOUND;
 327                 out_le32(bp->cfg_addr,
 328                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 329                          + (offset & ~3));
 330         } else {
 331                 /* See pci_read_config_byte */
 332                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 333         }
 334         udelay(2);
 335         *val = in_le16((volatile unsigned short *)(bp->cfg_data + (offset & 3)));
 336         return PCIBIOS_SUCCESSFUL;
 337 }
 338
 339 __pmac
 340 int pmac_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 341                                    unsigned char offset, unsigned int *val)
 342 {
 343         struct bridge_data *bp;
 344
 345         *val = 0xffffffff;
 346         if (bus > max_bus || (bp = bridges[bus]) == 0)
 347                 return PCIBIOS_DEVICE_NOT_FOUND;
 348         if ((offset & 3) != 0)
 349                 return PCIBIOS_BAD_REGISTER_NUMBER;
 350         if (bus == bp->bus_number) {
 351                 if (dev_fn < (11 << 3))
 352                         return PCIBIOS_DEVICE_NOT_FOUND;
 353                 out_le32(bp->cfg_addr,
 354                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 355                          + offset);
 356         } else {
 357                 /* See pci_read_config_byte */
 358                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + offset + 1);
 359         }
 360         udelay(2);
 361         *val = in_le32((volatile unsigned int *)bp->cfg_data);
 362         return PCIBIOS_SUCCESSFUL;
 363 }
 364
 365 __pmac
 366 int pmac_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 367                                    unsigned char offset, unsigned char val)
 368 {
 369         struct bridge_data *bp;
 370
 371         if (bus > max_bus || (bp = bridges[bus]) == 0)
 372                 return PCIBIOS_DEVICE_NOT_FOUND;
 373         if (bus == bp->bus_number) {
 374                 if (dev_fn < (11 << 3))
 375                         return PCIBIOS_DEVICE_NOT_FOUND;
 376                 out_le32(bp->cfg_addr,
 377                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 378                          + (offset & ~3));
 379         } else {
 380                 /* See pci_read_config_byte */
 381                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 382         }
 383         udelay(2);
 384         out_8(bp->cfg_data + (offset & 3), val);
 385         return PCIBIOS_SUCCESSFUL;
 386 }
 387
 388 __pmac
 389 int pmac_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 390                                    unsigned char offset, unsigned short val)
 391 {
 392         struct bridge_data *bp;
 393
 394         if (bus > max_bus || (bp = bridges[bus]) == 0)
 395                 return PCIBIOS_DEVICE_NOT_FOUND;
 396         if ((offset & 1) != 0)
 397                 return PCIBIOS_BAD_REGISTER_NUMBER;
 398         if (bus == bp->bus_number) {
 399                 if (dev_fn < (11 << 3))
 400                         return PCIBIOS_DEVICE_NOT_FOUND;
 401                 out_le32(bp->cfg_addr,
 402                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 403                          + (offset & ~3));
 404         } else {
 405                 /* See pci_read_config_byte */
 406                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 407         }
 408         udelay(2);
 409         out_le16((volatile unsigned short *)(bp->cfg_data + (offset & 3)), val);
 410         return PCIBIOS_SUCCESSFUL;
 411 }
 412
 413 __pmac
 414 int pmac_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 415                                     unsigned char offset, unsigned int val)
 416 {
 417         struct bridge_data *bp;
 418
 419         if (bus > max_bus || (bp = bridges[bus]) == 0)
 420                 return PCIBIOS_DEVICE_NOT_FOUND;
 421         if ((offset & 3) != 0)
 422                 return PCIBIOS_BAD_REGISTER_NUMBER;
 423         if (bus == bp->bus_number) {
 424                 if (dev_fn < (11 << 3))
 425                         return PCIBIOS_DEVICE_NOT_FOUND;
 426                 out_le32(bp->cfg_addr,
 427                          (1UL << (dev_fn >> 3)) + ((dev_fn & 7) << 8)
 428                          + offset);
 429         } else {
 430                 /* See pci_read_config_byte */
 431                 out_le32(bp->cfg_addr, (bus << 16) + (dev_fn << 8) + (offset & ~3) + 1);
 432         }
 433         udelay(2);
 434         out_le32((volatile unsigned int *)bp->cfg_data, val);
 435         return PCIBIOS_SUCCESSFUL;
 436 }
 437
 438 #define GRACKLE_CFA(b, d, o)    (0x80 | ((b) << 8) | ((d) << 16) \
 439                                  | (((o) & ~3) << 24))
 440
 441 int grackle_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
 442                                      unsigned char offset, unsigned char *val)
 443 {
 444         struct bridge_data *bp;
 445
 446         *val = 0xff;
 447         if (bus > max_bus || (bp = bridges[bus]) == 0)
 448                 return PCIBIOS_DEVICE_NOT_FOUND;
 449         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 450         *val = in_8(bp->cfg_data + (offset & 3));
 451         return PCIBIOS_SUCCESSFUL;
 452 }
 453
 454 int grackle_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
 455                                      unsigned char offset, unsigned short *val)
 456 {
 457         struct bridge_data *bp;
 458
 459         *val = 0xffff;
 460         if (bus > max_bus || (bp = bridges[bus]) == 0)
 461                 return PCIBIOS_DEVICE_NOT_FOUND;
 462         if ((offset & 1) != 0)
 463                 return PCIBIOS_BAD_REGISTER_NUMBER;
 464         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 465         *val = in_le16((volatile unsigned short *)(bp->cfg_data + (offset&3)));
 466         return PCIBIOS_SUCCESSFUL;
 467 }
 468
 469 int grackle_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
 470                                       unsigned char offset, unsigned int *val)
 471 {
 472         struct bridge_data *bp;
 473
 474         *val = 0xffffffff;
 475         if (bus > max_bus || (bp = bridges[bus]) == 0)
 476                 return PCIBIOS_DEVICE_NOT_FOUND;
 477         if ((offset & 3) != 0)
 478                 return PCIBIOS_BAD_REGISTER_NUMBER;
 479         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 480         *val = in_le32((volatile unsigned int *)bp->cfg_data);
 481         return PCIBIOS_SUCCESSFUL;
 482 }
 483
 484 int grackle_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
 485                                       unsigned char offset, unsigned char val)
 486 {
 487         struct bridge_data *bp;
 488
 489         if (bus > max_bus || (bp = bridges[bus]) == 0)
 490                 return PCIBIOS_DEVICE_NOT_FOUND;
 491         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 492         out_8(bp->cfg_data + (offset & 3), val);
 493         return PCIBIOS_SUCCESSFUL;
 494 }
 495
 496 int grackle_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
 497                                       unsigned char offset, unsigned short val)
 498 {
 499         struct bridge_data *bp;
 500
 501         if (bus > max_bus || (bp = bridges[bus]) == 0)
 502                 return PCIBIOS_DEVICE_NOT_FOUND;
 503         if ((offset & 1) != 0)
 504                 return PCIBIOS_BAD_REGISTER_NUMBER;
 505         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 506         out_le16((volatile unsigned short *)(bp->cfg_data + (offset&3)), val);
 507         return PCIBIOS_SUCCESSFUL;
 508 }
 509
 510 int grackle_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
 511                                     unsigned char offset, unsigned int val)
 512 {
 513         struct bridge_data *bp;
 514
 515         if (bus > max_bus || (bp = bridges[bus]) == 0)
 516                 return PCIBIOS_DEVICE_NOT_FOUND;
 517         if ((offset & 1) != 0)
 518                 return PCIBIOS_BAD_REGISTER_NUMBER;
 519         out_be32(bp->cfg_addr, GRACKLE_CFA(bus, dev_fn, offset));
 520         out_le32((volatile unsigned int *)bp->cfg_data, val);
 521         return PCIBIOS_SUCCESSFUL;
 522 }
 523
 524 /*
 525  * For a bandit bridge, turn on cache coherency if necessary.
 526  * N.B. we can't use pcibios_*_config_* here because bridges[]
 527  * is not initialized yet.
 528  */
 529 static void __init init_bandit(struct bridge_data *bp)
 530 {
 531         unsigned int vendev, magic;
 532         int rev;
 533
 534         /* read the word at offset 0 in config space for device 11 */
 535         out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_VENDOR_ID);
 536         udelay(2);
 537         vendev = in_le32((volatile unsigned int *)bp->cfg_data);
 538         if (vendev == (BANDIT_DEVID << 16) + APPLE_VENDID) {
 539                 /* read the revision id */
 540                 out_le32(bp->cfg_addr,
 541                          (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);
 542                 udelay(2);
 543                 rev = in_8(bp->cfg_data);
 544                 if (rev != BANDIT_REVID)
 545                         printk(KERN_WARNING
 546                                "Unknown revision %d for bandit at %p\n",
 547                                rev, bp->io_base);
 548         } else if (vendev != (BANDIT_DEVID_2 << 16) + APPLE_VENDID) {
 549                 printk(KERN_WARNING "bandit isn't? (%x)\n", vendev);
 550                 return;
 551         }
 552
 553         /* read the revision id */
 554         out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + PCI_REVISION_ID);
 555         udelay(2);
 556         rev = in_8(bp->cfg_data);
 557         if (rev != BANDIT_REVID)
 558                 printk(KERN_WARNING "Unknown revision %d for bandit at %p\n",
 559                        rev, bp->io_base);
 560
 561         /* read the word at offset 0x50 */
 562         out_le32(bp->cfg_addr, (1UL << BANDIT_DEVNUM) + BANDIT_MAGIC);
 563         udelay(2);
 564         magic = in_le32((volatile unsigned int *)bp->cfg_data);
 565         if ((magic & BANDIT_COHERENT) != 0)
 566                 return;
 567         magic |= BANDIT_COHERENT;
 568         udelay(2);
 569         out_le32((volatile unsigned int *)bp->cfg_data, magic);
 570         printk(KERN_INFO "Cache coherency enabled for bandit/PSX at %p\n",
 571                bp->io_base);
 572 }
 573
 574 #define GRACKLE_PICR1_STG               0x00000040
 575 #define GRACKLE_PICR1_LOOPSNOOP         0x00000010
 576
 577 /* N.B. this is called before bridges is initialized, so we can't
 578    use grackle_pcibios_{read,write}_config_dword. */
 579 static inline void grackle_set_stg(struct bridge_data *bp, int enable)
 580 {
 581         unsigned int val;
 582
 583         out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
 584         val = in_le32((volatile unsigned int *)bp->cfg_data);
 585         val = enable? (val | GRACKLE_PICR1_STG) :
 586                 (val & ~GRACKLE_PICR1_STG);
 587         out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
 588         out_le32((volatile unsigned int *)bp->cfg_data, val);
 589 }
 590
 591 static inline void grackle_set_loop_snoop(struct bridge_data *bp, int enable)
 592 {
 593         unsigned int val;
 594
 595         out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
 596         val = in_le32((volatile unsigned int *)bp->cfg_data);
 597         val = enable? (val | GRACKLE_PICR1_LOOPSNOOP) :
 598                 (val & ~GRACKLE_PICR1_LOOPSNOOP);
 599         out_be32(bp->cfg_addr, GRACKLE_CFA(0, 0, 0xa8));
 600         out_le32((volatile unsigned int *)bp->cfg_data, val);
 601 }
 602
 603
 604 void __init pmac_find_bridges(void)
 605 {
 606         int bus;
 607         struct bridge_data *bridge;
 608
 609         bridge_list = 0;
 610         max_bus = 0;
 611         add_bridges(find_devices("bandit"));
 612         add_bridges(find_devices("chaos"));
 613         add_bridges(find_devices("pci"));
 614         bridges = (struct bridge_data **)
 615                 alloc_bootmem((max_bus + 1) * sizeof(struct bridge_data *));
 616         memset(bridges, 0, (max_bus + 1) * sizeof(struct bridge_data *));
 617         for (bridge = bridge_list; bridge != NULL; bridge = bridge->next)
 618                 for (bus = bridge->bus_number; bus <= bridge->max_bus; ++bus)
 619                         bridges[bus] = bridge;
 620 }
 621
 622 /*
 623  * We assume that if we have a G3 powermac, we have one bridge called
 624  * "pci" (a MPC106) and no bandit or chaos bridges, and contrariwise,
 625  * if we have one or more bandit or chaos bridges, we don't have a MPC106.
 626  */
 627 static void __init add_bridges(struct device_node *dev)
 628 {
 629         int *bus_range;
 630         int len;
 631         struct bridge_data *bp;
 632         struct reg_property *addr;
 633
 634         for (; dev != NULL; dev = dev->next) {
 635                 addr = (struct reg_property *) get_property(dev, "reg", &len);
 636                 if (addr == NULL || len < sizeof(*addr)) {
 637                         printk(KERN_WARNING "Can't use %s: no address\n",
 638                                dev->full_name);
 639                         continue;
 640                 }
 641                 bus_range = (int *) get_property(dev, "bus-range", &len);
 642                 if (bus_range == NULL || len < 2 * sizeof(int)) {
 643                         printk(KERN_WARNING "Can't get bus-range for %s\n",
 644                                dev->full_name);
 645                         continue;
 646                 }
 647                 if (bus_range[1] == bus_range[0])
 648                         printk(KERN_INFO "PCI bus %d", bus_range[0]);
 649                 else
 650                         printk(KERN_INFO "PCI buses %d..%d", bus_range[0],
 651                                bus_range[1]);
 652                 printk(" controlled by %s at %x\n", dev->name, addr->address);
 653                 if (device_is_compatible(dev, "uni-north")) {
 654                         int i = uninorth_count++;
 655                         uninorth_bridges[i].cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
 656                         uninorth_bridges[i].cfg_data = ioremap(addr->address + 0xc00000, 0x1000);
 657                         uninorth_bridges[i].node = dev;
 658                         uninorth_bridges[i].iobase_phys = addr->address;
 659                         /* is 0x10000 enough for io space ? */
 660                         uninorth_bridges[i].iobase = (void *)ioremap(addr->address, 0x10000);
 661                         /* XXX This is the bridge with the PCI expansion bus. This is also the
 662                          * address of the bus that will receive type 1 config accesses and io
 663                          * accesses. Appears to be correct for iMac DV and G4 Sawtooth too.
 664                          * That means that we cannot do io cycles on the AGP bus nor the internal
 665                          * ethernet/fw bus. Fortunately, they appear not to be needed on iMac DV
 666                          * and G4 neither.
 667                          */
 668                         if (addr->address == 0xf2000000)
 669                                 uninorth_default = i;
 670                         else
 671                                 continue;
 672                 }
 673
 674                 bp = (struct bridge_data *) alloc_bootmem(sizeof(*bp));
 675                 if (device_is_compatible(dev, "uni-north")) {
 676                         bp->cfg_addr = 0;
 677                         bp->cfg_data = 0;
 678                         bp->io_base = uninorth_bridges[uninorth_count-1].iobase;
 679                         bp->io_base_phys = uninorth_bridges[uninorth_count-1].iobase_phys;
 680                 } else if (strcmp(dev->name, "pci") == 0) {
 681                         /* XXX assume this is a mpc106 (grackle) */
 682                         bp->cfg_addr = (volatile unsigned int *)
 683                                 ioremap(0xfec00000, 0x1000);
 684                         bp->cfg_data = (volatile unsigned char *)
 685                                 ioremap(0xfee00000, 0x1000);
 686                         bp->io_base_phys = 0xfe000000;
 687                         bp->io_base = (void *) ioremap(0xfe000000, 0x20000);
 688                         if (machine_is_compatible("AAPL,PowerBook1998"))
 689                                 grackle_set_loop_snoop(bp, 1);
 690 #if 0                   /* Disabled for now, HW problems ??? */
 691                         grackle_set_stg(bp, 1);
 692 #endif
 693                 } else {
 694                         /* a `bandit' or `chaos' bridge */
 695                         bp->cfg_addr = (volatile unsigned int *)
 696                                 ioremap(addr->address + 0x800000, 0x1000);
 697                         bp->cfg_data = (volatile unsigned char *)
 698                                 ioremap(addr->address + 0xc00000, 0x1000);
 699                         bp->io_base_phys = addr->address;
 700                         bp->io_base = (void *) ioremap(addr->address, 0x10000);
 701                 }
 702                 if (isa_io_base == 0)
 703                         isa_io_base = (unsigned long) bp->io_base;
 704                 bp->bus_number = bus_range[0];
 705                 bp->max_bus = bus_range[1];
 706                 bp->next = bridge_list;
 707                 bp->node = dev;
 708                 bridge_list = bp;
 709                 if (bp->max_bus > max_bus)
 710                         max_bus = bp->max_bus;
 711
 712                 if (strcmp(dev->name, "bandit") == 0)
 713                         init_bandit(bp);
 714         }
 715 }
 716
 717 /* Recursively searches any node that is of type PCI-PCI bridge. Without
 718  * this, the old code would miss children of P2P bridges and hence not
 719  * fix IRQ's for cards located behind P2P bridges.
 720  * - Ranjit Deshpande, 01/20/99
 721  */
 722 void __init
 723 fix_intr(struct device_node *node, struct pci_dev *dev)
 724 {
 725         unsigned int *reg, *class_code;
 726
 727         for (; node != 0;node = node->sibling) {
 728                 class_code = (unsigned int *) get_property(node, "class-code", 0);
 729                 if(class_code && (*class_code >> 8) == PCI_CLASS_BRIDGE_PCI)
 730                         fix_intr(node->child, dev);
 731                 reg = (unsigned int *) get_property(node, "reg", 0);
 732                 if (reg == 0 || ((reg[0] >> 8) & 0xff) != dev->devfn)
 733                         continue;
 734                 /* this is the node, see if it has interrupts */
 735                 if (node->n_intrs > 0)
 736                         dev->irq = node->intrs[0].line;
 737                 break;
 738         }
 739 }
 740
 741 void __init
 742 pmac_pcibios_fixup(void)
 743 {
 744         struct pci_dev *dev;
 745
 746         /*
 747          * FIXME: This is broken: We should not assign IRQ's to IRQless
 748          *        devices (look at PCI_INTERRUPT_PIN) and we also should
 749          *        honor the existence of multi-function devices where
 750          *        different functions have different interrupt pins. [mj]
 751          */
 752         pci_for_each_dev(dev)
 753         {
 754                 /*
 755                  * Open Firmware often doesn't initialize the,
 756                  * PCI_INTERRUPT_LINE config register properly, so we
 757                  * should find the device node and se if it has an
 758                  * AAPL,interrupts property.
 759                  */
 760                 struct bridge_data *bp = bridges[dev->bus->number];
 761                 unsigned char pin;
 762
 763                 if (pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin) ||
 764                     !pin)
 765                         continue; /* No interrupt generated -> no fixup */
 766                 /* We iterate all instances of uninorth for now */
 767                 if (uninorth_count && dev->bus->number == 0) {
 768                         int i;
 769                         for (i=0;i<uninorth_count;i++)
 770                                 fix_intr(uninorth_bridges[i].node->child, dev);
 771                 } else
 772                         fix_intr(bp->node->child, dev);
 773         }
 774 }
 775
 776 void __init
 777 pmac_setup_pci_ptrs(void)
 778 {
 779         struct device_node* np;
 780
 781         np = find_devices("pci");
 782         if (np != 0)
 783         {
 784                 if (device_is_compatible(np, "uni-north"))
 785                 {
 786                         /* looks like an Core99 powermac */
 787                         set_config_access_method(uni);
 788                 } else
 789                 {
 790                         /* looks like a G3 powermac */
 791                         set_config_access_method(grackle);
 792                 }
 793         } else
 794         {
 795                 set_config_access_method(pmac);
 796         }
 797
 798         ppc_md.pcibios_fixup = pmac_pcibios_fixup;
 799 }
 800