arch/ppc/kernel/gemini_setup.c

   1 /*
   2  *  linux/arch/ppc/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995 Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Synergy Microsystems board support by Dan Cox (dan@synergymicro.com)
   8  *
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/errno.h>
  16 #include <linux/reboot.h>
  17 #include <linux/pci.h>
  18 #include <linux/time.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/types.h>
  21 #include <linux/major.h>
  22 #include <linux/blk.h>
  23 #include <linux/console.h>
  24 #include <linux/openpic.h>
  25
  26 #include <asm/system.h>
  27 #include <asm/pgtable.h>
  28 #include <asm/page.h>
  29 #include <asm/dma.h>
  30 #include <asm/io.h>
  31 #include <asm/m48t35.h>
  32 #include <asm/gemini.h>
  33
  34 #include <asm/time.h>
  35 #include "local_irq.h"
  36 #include "open_pic.h"
  37
  38 void gemini_setup_pci_ptrs(void);
  39 static int gemini_get_clock_speed(void);
  40 extern void gemini_pcibios_fixup(void);
  41
  42 static char *gemini_board_families[] = {
  43   "VGM", "VSS", "KGM", "VGR", "VCM", "VCS", "KCM", "VCR"
  44 };
  45 static int gemini_board_count = sizeof(gemini_board_families) /
  46                                  sizeof(gemini_board_families[0]);
  47
  48 static unsigned int cpu_7xx[16] = {
  49         0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
  50 };
  51 static unsigned int cpu_6xx[16] = {
  52         0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0
  53 };
  54
  55 int chrp_get_irq(struct pt_regs *);
  56 void chrp_post_irq(struct pt_regs* regs, int);
  57
  58 static inline unsigned long _get_HID1(void)
  59 {
  60         unsigned long val;
  61
  62         __asm__ __volatile__("mfspr %0,1009" : "=r" (val));
  63         return val;
  64 }
  65
  66 int
  67 gemini_get_cpuinfo(char *buffer)
  68 {
  69         int len;
  70         unsigned char reg, rev;
  71         char *family;
  72         unsigned int type;
  73
  74         reg = readb(GEMINI_FEAT);
  75         family = gemini_board_families[((reg>>4) & 0xf)];
  76         if (((reg>>4) & 0xf) > gemini_board_count)
  77                 printk(KERN_ERR "cpuinfo(): unable to determine board family\n");
  78
  79         reg = readb(GEMINI_BREV);
  80         type = (reg>>4) & 0xf;
  81         rev = reg & 0xf;
  82
  83         reg = readb(GEMINI_BECO);
  84
  85         len = sprintf( buffer, "machine\t\t: Gemini %s%d, rev %c, eco %d\n",
  86                        family, type, (rev + 'A'), (reg & 0xf));
  87
  88         len = sprintf(buffer, "board\t\t: Gemini %s", family);
  89         if (type > 9)
  90                 len += sprintf(buffer+len, "%c", (type - 10) + 'A');
  91         else
  92                 len += sprintf(buffer+len, "%d", type);
  93
  94         len += sprintf(buffer+len, ", rev %c, eco %d\n",
  95                        (rev + 'A'), (reg & 0xf));
  96
  97         len += sprintf(buffer+len, "clock\t\t: %dMhz\n",
  98                        gemini_get_clock_speed());
  99
 100         return len;
 101 }
 102
 103 static u_char gemini_openpic_initsenses[] = {
 104         1,
 105         1,
 106         1,
 107         1,
 108         0,
 109         0,
 110         1, /* remainder are level-triggered */
 111 };
 112
 113 #define GEMINI_MPIC_ADDR (0xfcfc0000)
 114 #define GEMINI_MPIC_PCI_CFG (0x80005800)
 115
 116 void __init gemini_openpic_init(void)
 117 {
 118
 119         OpenPIC = (volatile struct OpenPIC *)
 120                 grackle_read(0x80005800 + 0x10);
 121 #if 0
 122         grackle_write(GEMINI_MPIC_PCI_CFG + PCI_BASE_ADDRESS_0,
 123                       GEMINI_MPIC_ADDR);
 124         grackle_write(GEMINI_MPIC_PCI_CFG + PCI_COMMAND, PCI_COMMAND_MEMORY);
 125
 126         OpenPIC = (volatile struct OpenPIC *) GEMINI_MPIC_ADDR;
 127 #endif
 128         OpenPIC_InitSenses = gemini_openpic_initsenses;
 129         OpenPIC_NumInitSenses = sizeof( gemini_openpic_initsenses );
 130
 131         ioremap( GEMINI_MPIC_ADDR, sizeof( struct OpenPIC ));
 132 }
 133
 134
 135 extern unsigned long loops_per_sec;
 136 extern int root_mountflags;
 137 extern char cmd_line[];
 138
 139 void
 140 gemini_heartbeat(void)
 141 {
 142         static unsigned long led = GEMINI_LEDBASE+(4*8);
 143         static char direction = 8;
 144         *(char *)led = 0;
 145         if ( (led + direction) > (GEMINI_LEDBASE+(7*8)) ||
 146              (led + direction) < (GEMINI_LEDBASE+(4*8)) )
 147                 direction *= -1;
 148         led += direction;
 149         *(char *)led = 0xff;
 150         ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
 151 }
 152
 153 void __init gemini_setup_arch(void)
 154 {
 155         extern char cmd_line[];
 156
 157
 158         loops_per_sec = 50000000;
 159
 160 #ifdef CONFIG_BLK_DEV_INITRD
 161         /* bootable off CDROM */
 162         if (initrd_start)
 163                 ROOT_DEV = MKDEV(SCSI_CDROM_MAJOR, 0);
 164         else
 165 #endif
 166                 ROOT_DEV = to_kdev_t(0x0801);
 167
 168         /* nothing but serial consoles... */
 169         sprintf(cmd_line, "%s console=ttyS0", cmd_line);
 170
 171         printk("Boot arguments: %s\n", cmd_line);
 172
 173         ppc_md.heartbeat = gemini_heartbeat;
 174         ppc_md.heartbeat_reset = HZ/8;
 175         ppc_md.heartbeat_count = 1;
 176
 177         /* take special pains to map the MPIC, since it isn't mapped yet */
 178         gemini_openpic_init();
 179         /* start the L2 */
 180         gemini_init_l2();
 181 }
 182
 183
 184 int
 185 gemini_get_clock_speed(void)
 186 {
 187         unsigned long hid1, pvr = _get_PVR();
 188         int clock;
 189
 190         hid1 = (_get_HID1() >> 28) & 0xf;
 191         if (PVR_VER(pvr) == 8 ||
 192             PVR_VER(pvr) == 12)
 193                 hid1 = cpu_7xx[hid1];
 194         else
 195                 hid1 = cpu_6xx[hid1];
 196
 197         switch((readb(GEMINI_BSTAT) & 0xc) >> 2) {
 198
 199         case 0:
 200         default:
 201                 clock = (hid1*100)/3;
 202                 break;
 203
 204         case 1:
 205                 clock = (hid1*125)/3;
 206                 break;
 207
 208         case 2:
 209                 clock = (hid1*50);
 210                 break;
 211         }
 212
 213         return clock;
 214 }
 215
 216 #define L2CR_PIPE_LATEWR   (0x01800000)   /* late-write SRAM */
 217 #define L2CR_L2CTL         (0x00100000)   /* RAM control */
 218 #define L2CR_INST_DISABLE  (0x00400000)   /* disable for insn's */
 219 #define L2CR_L2I           (0x00200000)   /* global invalidate */
 220 #define L2CR_L2E           (0x80000000)   /* enable */
 221 #define L2CR_L2WT          (0x00080000)   /* write-through */
 222
 223 void __init gemini_init_l2(void)
 224 {
 225         unsigned char reg, brev, fam, creg;
 226         unsigned long cache;
 227         unsigned long pvr = _get_PVR();
 228
 229         reg = readb(GEMINI_L2CFG);
 230         brev = readb(GEMINI_BREV);
 231         fam = readb(GEMINI_FEAT);
 232
 233         switch(PVR_VER(pvr)) {
 234
 235         case 8:
 236                 if (reg & 0xc0)
 237                         cache = (((reg >> 6) & 0x3) << 28);
 238                 else
 239                         cache = 0x3 << 28;
 240
 241 #ifdef CONFIG_SMP
 242                 /* Pre-3.0 processor revs had snooping errata.  Leave
 243                    their L2's disabled with SMP. -- Dan */
 244                 if (PVR_CFG(pvr) < 3) {
 245                         printk("Pre-3.0 750; L2 left disabled!\n");
 246                         return;
 247                 }
 248 #endif /* CONFIG_SMP */
 249
 250                 /* Special case: VGM5-B's came before L2 ratios were set on
 251                    the board.  Processor speed shouldn't be too high, so
 252                    set L2 ratio to 1:1.5.  */
 253                 if ((brev == 0x51) && ((fam & 0xa0) >> 4) == 0)
 254                         reg |= 1;
 255
 256                 /* determine best cache ratio based upon what the board
 257                    tells us (which sometimes _may_ not be true) and
 258                    the processor speed. */
 259                 else {
 260                         if (gemini_get_clock_speed() > 250)
 261                                 reg = 2;
 262                 }
 263                 break;
 264         case 12:
 265         {
 266                 static unsigned long l2_size_val = 0;
 267
 268                 if (!l2_size_val)
 269                         l2_size_val = _get_L2CR();
 270                 cache = l2_size_val;
 271                 break;
 272         }
 273         case 4:
 274         case 9:
 275                 creg = readb(GEMINI_CPUSTAT);
 276                 if (((creg & 0xc) >> 2) != 1)
 277                         printk("Dual-604 boards don't support the use of L2\n");
 278                 else
 279                         writeb(1, GEMINI_L2CFG);
 280                 return;
 281         default:
 282                 printk("Unknown processor; L2 left disabled\n");
 283                 return;
 284         }
 285
 286         cache |= ((1<<reg) << 25);
 287         cache |= (L2CR_PIPE_LATEWR|L2CR_L2CTL|L2CR_INST_DISABLE);
 288         _set_L2CR(0);
 289         _set_L2CR(cache | L2CR_L2I | L2CR_L2E);
 290
 291 }
 292
 293 void
 294 gemini_restart(char *cmd)
 295 {
 296         __cli();
 297         /* make a clean restart, not via the MPIC */
 298         _gemini_reboot();
 299         for(;;);
 300 }
 301
 302 void
 303 gemini_power_off(void)
 304 {
 305         for(;;);
 306 }
 307
 308 void
 309 gemini_halt(void)
 310 {
 311         gemini_restart(NULL);
 312 }
 313
 314 void __init gemini_init_IRQ(void)
 315 {
 316         int i;
 317
 318         /* gemini has no 8259 */
 319         open_pic_irq_offset = 0;
 320         for( i=0; i < NR_IRQS; i++ )
 321                 irq_desc[i].handler = &open_pic;
 322         openpic_init(1);
 323 #ifdef CONFIG_SMP
 324         request_irq(OPENPIC_VEC_IPI, openpic_ipi_action,
 325                     0, "IPI0", 0);
 326         request_irq(OPENPIC_VEC_IPI+1, openpic_ipi_action,
 327                     0, "IPI1 (invalidate TLB)", 0);
 328         request_irq(OPENPIC_VEC_IPI+2, openpic_ipi_action,
 329                     0, "IPI2 (stop CPU)", 0);
 330         request_irq(OPENPIC_VEC_IPI+3, openpic_ipi_action,
 331                     0, "IPI3 (reschedule)", 0);
 332 #endif  /* CONFIG_SMP */
 333 }
 334
 335 #define gemini_rtc_read(x)       (readb(GEMINI_RTC+(x)))
 336 #define gemini_rtc_write(val,x)  (writeb((val),(GEMINI_RTC+(x))))
 337
 338 /* ensure that the RTC is up and running */
 339 long __init gemini_time_init(void)
 340 {
 341         unsigned char reg;
 342
 343         reg = gemini_rtc_read(M48T35_RTC_CONTROL);
 344
 345         if ( reg & M48T35_RTC_STOPPED ) {
 346                 printk(KERN_INFO "M48T35 real-time-clock was stopped. Now starting...\n");
 347                 gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL);
 348                 gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL);
 349         }
 350         return 0;
 351 }
 352
 353 #undef DEBUG_RTC
 354
 355 unsigned long
 356 gemini_get_rtc_time(void)
 357 {
 358         unsigned int year, mon, day, hour, min, sec;
 359         unsigned char reg;
 360
 361         reg = gemini_rtc_read(M48T35_RTC_CONTROL);
 362         gemini_rtc_write((reg|M48T35_RTC_READ), M48T35_RTC_CONTROL);
 363 #ifdef DEBUG_RTC
 364         printk("get rtc: reg = %x\n", reg);
 365 #endif
 366
 367         do {
 368                 sec = gemini_rtc_read(M48T35_RTC_SECONDS);
 369                 min = gemini_rtc_read(M48T35_RTC_MINUTES);
 370                 hour = gemini_rtc_read(M48T35_RTC_HOURS);
 371                 day = gemini_rtc_read(M48T35_RTC_DOM);
 372                 mon = gemini_rtc_read(M48T35_RTC_MONTH);
 373                 year = gemini_rtc_read(M48T35_RTC_YEAR);
 374         } while( sec != gemini_rtc_read(M48T35_RTC_SECONDS));
 375 #ifdef DEBUG_RTC
 376         printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n",
 377                sec, min, hour, day, mon, year);
 378 #endif
 379
 380         gemini_rtc_write(reg, M48T35_RTC_CONTROL);
 381
 382         BCD_TO_BIN(sec);
 383         BCD_TO_BIN(min);
 384         BCD_TO_BIN(hour);
 385         BCD_TO_BIN(day);
 386         BCD_TO_BIN(mon);
 387         BCD_TO_BIN(year);
 388
 389         if ((year += 1900) < 1970)
 390                 year += 100;
 391 #ifdef DEBUG_RTC
 392         printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n",
 393                sec, min, hour, day, mon, year);
 394 #endif
 395
 396         return mktime( year, mon, day, hour, min, sec );
 397 }
 398
 399
 400 int
 401 gemini_set_rtc_time( unsigned long now )
 402 {
 403         unsigned char reg;
 404         struct rtc_time tm;
 405
 406         to_tm( now, &tm );
 407
 408         reg = gemini_rtc_read(M48T35_RTC_CONTROL);
 409 #if DEBUG_RTC
 410         printk("set rtc: reg = %x\n", reg);
 411 #endif
 412
 413         gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL);
 414 #if DEBUG_RTC
 415         printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
 416                tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
 417 #endif
 418
 419         tm.tm_year -= 1900;
 420         BIN_TO_BCD(tm.tm_sec);
 421         BIN_TO_BCD(tm.tm_min);
 422         BIN_TO_BCD(tm.tm_hour);
 423         BIN_TO_BCD(tm.tm_mon);
 424         BIN_TO_BCD(tm.tm_mday);
 425         BIN_TO_BCD(tm.tm_year);
 426 #ifdef DEBUG_RTC
 427         printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
 428                tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
 429 #endif
 430
 431         gemini_rtc_write(tm.tm_sec, M48T35_RTC_SECONDS);
 432         gemini_rtc_write(tm.tm_min, M48T35_RTC_MINUTES);
 433         gemini_rtc_write(tm.tm_hour, M48T35_RTC_HOURS);
 434         gemini_rtc_write(tm.tm_mday, M48T35_RTC_DOM);
 435         gemini_rtc_write(tm.tm_mon, M48T35_RTC_MONTH);
 436         gemini_rtc_write(tm.tm_year, M48T35_RTC_YEAR);
 437
 438         /* done writing */
 439         gemini_rtc_write(reg, M48T35_RTC_CONTROL);
 440
 441         if ((time_state == TIME_ERROR) || (time_state == TIME_BAD))
 442                 time_state = TIME_OK;
 443
 444         return 0;
 445 }
 446
 447 /*  use the RTC to determine the decrementer count */
 448 void __init gemini_calibrate_decr(void)
 449 {
 450         int freq, divisor;
 451         unsigned char reg;
 452
 453         /* determine processor bus speed */
 454         reg = readb(GEMINI_BSTAT);
 455
 456         switch(((reg & 0x0c)>>2)&0x3) {
 457         case 0:
 458         default:
 459                 freq = 66;
 460                 break;
 461         case 1:
 462                 freq = 83;
 463                 break;
 464         case 2:
 465                 freq = 100;
 466                 break;
 467         }
 468
 469         freq *= 1000000;
 470         divisor = 4;
 471         decrementer_count = freq / HZ / divisor;
 472         count_period_num = divisor;
 473         count_period_den = freq / 1000000;
 474 }
 475
 476 int gemini_get_irq( struct pt_regs *regs )
 477 {
 478         int irq;
 479
 480         irq = openpic_irq( smp_processor_id() );
 481         if (irq == OPENPIC_VEC_SPURIOUS)
 482                 /*
 483                  * Spurious interrupts should never be
 484                  * acknowledged
 485                  */
 486                 irq = -1;
 487         /*
 488          * I would like to openpic_eoi here but there seem to be timing problems
 489          * between the openpic ack and the openpic eoi.
 490          *   -- Cort
 491          */
 492         return irq;
 493 }
 494
 495 void gemini_post_irq(struct pt_regs* regs, int irq)
 496 {
 497         /*
 498          * If it's an i8259 irq then we've already done the
 499          * openpic irq.  So we just check to make sure the controller
 500          * is an openpic and if it is then eoi
 501          *
 502          * We do it this way since our irq_desc[irq].handler can change
 503          * with RTL and no longer be open_pic -- Cort
 504          */
 505         if ( irq >= open_pic_irq_offset)
 506                 openpic_eoi( smp_processor_id() );
 507 }
 508
 509
 510 void __init gemini_init(unsigned long r3, unsigned long r4, unsigned long r5,
 511                         unsigned long r6, unsigned long r7)
 512 {
 513         int i;
 514         int chrp_get_irq( struct pt_regs * );
 515
 516         for(i = 0; i < GEMINI_LEDS; i++)
 517                 gemini_led_off(i);
 518
 519         gemini_setup_pci_ptrs();
 520
 521         ISA_DMA_THRESHOLD = 0;
 522         DMA_MODE_READ = 0;
 523         DMA_MODE_WRITE = 0;
 524
 525 #ifdef CONFIG_BLK_DEV_INITRD
 526         if ( r4 )
 527         {
 528                 initrd_start = r4 + KERNELBASE;
 529                 initrd_end = r5 + KERNELBASE;
 530         }
 531 #endif
 532
 533         ppc_md.setup_arch = gemini_setup_arch;
 534         ppc_md.setup_residual = NULL;
 535         ppc_md.get_cpuinfo = gemini_get_cpuinfo;
 536         ppc_md.irq_cannonicalize = NULL;
 537         ppc_md.init_IRQ = gemini_init_IRQ;
 538         ppc_md.get_irq = gemini_get_irq;
 539         ppc_md.post_irq = gemini_post_irq;
 540         ppc_md.init = NULL;
 541
 542         ppc_md.restart = gemini_restart;
 543         ppc_md.power_off = gemini_power_off;
 544         ppc_md.halt = gemini_halt;
 545
 546         ppc_md.time_init = gemini_time_init;
 547         ppc_md.set_rtc_time = gemini_set_rtc_time;
 548         ppc_md.get_rtc_time = gemini_get_rtc_time;
 549         ppc_md.calibrate_decr = gemini_calibrate_decr;
 550
 551         /* no keyboard/mouse/video stuff yet.. */
 552         ppc_md.kbd_setkeycode = NULL;
 553         ppc_md.kbd_getkeycode = NULL;
 554         ppc_md.kbd_translate = NULL;
 555         ppc_md.kbd_unexpected_up = NULL;
 556         ppc_md.kbd_leds = NULL;
 557         ppc_md.kbd_init_hw = NULL;
 558 #ifdef CONFIG_MAGIC_SYSRQ
 559         ppc_md.ppc_kbd_sysrq_xlate = NULL;
 560 #endif
 561         ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup;
 562 }