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- Alan Cox: synch. PA-RISC arch and bitops cleanups
[davej-history.git] / drivers / net / tokenring / abyss.c
bloba020b21ddc71362c119aec80c52e76a591acb078
1 /*
2 * abyss.c: Network driver for the Madge Smart 16/4 PCI Mk2 token ring card.
3 *
4 * Written 1999-2000 by Adam Fritzler
5 *
6 * This software may be used and distributed according to the terms
7 * of the GNU Public License, incorporated herein by reference.
8 *
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 PCI Mk2
11 *
12 * Maintainer(s):
13 * AF Adam Fritzler mid@auk.cx
14 *
15 * Modification History:
16 * 30-Dec-99 AF Split off from the tms380tr driver.
17 * 22-Jan-00 AF Updated to use indirect read/writes
18 * 23-Nov-00 JG New PCI API, cleanups
19 *
20 *
21 * TODO:
22 * 1. See if we can use MMIO instead of inb/outb/inw/outw
23 * 2. Add support for Mk1 (has AT24 attached to the PCI
24 * config registers)
25 *
26 */
27
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/errno.h>
32 #include <linux/pci.h>
33 #include <linux/init.h>
34
35 #include <asm/system.h>
36 #include <asm/io.h>
37 #include <asm/irq.h>
38
39 #include <linux/netdevice.h>
40 #include <linux/trdevice.h>
41 #include "tms380tr.h"
42 #include "abyss.h" /* Madge-specific constants */
43
44 static char version[] __initdata =
45 "abyss.c: v1.02 23/11/2000 by Adam Fritzler\n";
46
47 #define ABYSS_IO_EXTENT 64
48
49 static struct pci_device_id abyss_pci_tbl[] __initdata = {
50 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_MK2,
51 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_TOKEN_RING << 8, 0x00ffffff, },
52 { } /* Terminating entry */
53 };
54 MODULE_DEVICE_TABLE(pci, abyss_pci_tbl);
55
56 static int abyss_open(struct net_device *dev);
57 static int abyss_close(struct net_device *dev);
58 static void abyss_enable(struct net_device *dev);
59 static int abyss_chipset_init(struct net_device *dev);
60 static void abyss_read_eeprom(struct net_device *dev);
61 static unsigned short abyss_setnselout_pins(struct net_device *dev);
62
63 static void at24_writedatabyte(unsigned long regaddr, unsigned char byte);
64 static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr);
65 static int at24_sendcmd(unsigned long regaddr, unsigned char cmd);
66 static unsigned char at24_readdatabit(unsigned long regaddr);
67 static unsigned char at24_readdatabyte(unsigned long regaddr);
68 static int at24_waitforack(unsigned long regaddr);
69 static int at24_waitfornack(unsigned long regaddr);
70 static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data);
71 static void at24_start(unsigned long regaddr);
72 static unsigned char at24_readb(unsigned long regaddr, unsigned char addr);
73
74 static unsigned short abyss_sifreadb(struct net_device *dev, unsigned short reg)
75 {
76 return inb(dev->base_addr + reg);
77 }
78
79 static unsigned short abyss_sifreadw(struct net_device *dev, unsigned short reg)
80 {
81 return inw(dev->base_addr + reg);
82 }
83
84 static void abyss_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
85 {
86 outb(val, dev->base_addr + reg);
87 }
88
89 static void abyss_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
90 {
91 outw(val, dev->base_addr + reg);
92 }
93
94 static int __init abyss_attach(struct pci_dev *pdev, const struct pci_device_id *ent)
95 {
96 static int versionprinted;
97 struct net_device *dev;
98 struct net_local *tp;
99 int i, ret, pci_irq_line;
100 unsigned long pci_ioaddr;
101
102 if (versionprinted++ == 0)
103 printk("%s", version);
104
105 if (pci_enable_device(pdev))
106 return -EIO;
107
108 /* Remove I/O space marker in bit 0. */
109 pci_irq_line = pdev->irq;
110 pci_ioaddr = pci_resource_start (pdev, 0);
111
112 /* At this point we have found a valid card. */
113
114 dev = init_trdev(NULL, 0);
115 if (!dev)
116 return -ENOMEM;
117 SET_MODULE_OWNER(dev);
118
119 if (!request_region(pci_ioaddr, ABYSS_IO_EXTENT, dev->name)) {
120 ret = -EBUSY;
121 goto err_out_trdev;
122 }
123
124 ret = request_irq(pdev->irq, tms380tr_interrupt, SA_SHIRQ,
125 dev->name, dev);
126 if (ret)
127 goto err_out_region;
128
129 dev->base_addr = pci_ioaddr;
130 dev->irq = pci_irq_line;
131
132 printk("%s: Madge Smart 16/4 PCI Mk2 (Abyss)\n", dev->name);
133 printk("%s: IO: %#4lx IRQ: %d\n",
134 dev->name, pci_ioaddr, dev->irq);
135 /*
136 * The TMS SIF registers lay 0x10 above the card base address.
137 */
138 dev->base_addr += 0x10;
139
140 ret = tmsdev_init(dev);
141 if (ret) {
142 printk("%s: unable to get memory for dev->priv.\n",
143 dev->name);
144 goto err_out_irq;
145 }
146
147 abyss_read_eeprom(dev);
148
149 printk("%s: Ring Station Address: ", dev->name);
150 printk("%2.2x", dev->dev_addr[0]);
151 for (i = 1; i < 6; i++)
152 printk(":%2.2x", dev->dev_addr[i]);
153 printk("\n");
154
155 tp = dev->priv;
156 tp->dmalimit = 0; /* XXX: should be the max PCI32 DMA max */
157 tp->setnselout = abyss_setnselout_pins;
158 tp->sifreadb = abyss_sifreadb;
159 tp->sifreadw = abyss_sifreadw;
160 tp->sifwriteb = abyss_sifwriteb;
161 tp->sifwritew = abyss_sifwritew;
162
163 memcpy(tp->ProductID, "Madge PCI 16/4 Mk2", PROD_ID_SIZE + 1);
164
165 dev->open = abyss_open;
166 dev->stop = abyss_close;
167
168 ret = register_trdev(dev);
169 if (ret)
170 goto err_out_tmsdev;
171
172 pci_set_drvdata(pdev, dev);
173 return 0;
174
175 err_out_tmsdev:
176 kfree(dev->priv);
177 err_out_irq:
178 free_irq(pdev->irq, dev);
179 err_out_region:
180 release_region(pci_ioaddr, ABYSS_IO_EXTENT);
181 err_out_trdev:
182 unregister_netdev(dev);
183 kfree(dev);
184 return ret;
185 }
186
187 static unsigned short abyss_setnselout_pins(struct net_device *dev)
188 {
189 unsigned short val = 0;
190 struct net_local *tp = (struct net_local *)dev->priv;
191
192 if(tp->DataRate == SPEED_4)
193 val |= 0x01; /* Set 4Mbps */
194 else
195 val |= 0x00; /* Set 16Mbps */
196
197 return val;
198 }
199
200 /*
201 * The following Madge boards should use this code:
202 * - Smart 16/4 PCI Mk2 (Abyss)
203 * - Smart 16/4 PCI Mk1 (PCI T)
204 * - Smart 16/4 Client Plus PnP (Big Apple)
205 * - Smart 16/4 Cardbus Mk2
206 *
207 * These access an Atmel AT24 SEEPROM using their glue chip registers.
208 *
209 */
210 static void at24_writedatabyte(unsigned long regaddr, unsigned char byte)
211 {
212 int i;
213
214 for (i = 0; i < 8; i++) {
215 at24_setlines(regaddr, 0, (byte >> (7-i))&0x01);
216 at24_setlines(regaddr, 1, (byte >> (7-i))&0x01);
217 at24_setlines(regaddr, 0, (byte >> (7-i))&0x01);
218 }
219 }
220
221 static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr)
222 {
223 if (at24_sendcmd(regaddr, cmd)) {
224 at24_writedatabyte(regaddr, addr);
225 return at24_waitforack(regaddr);
226 }
227 return 0;
228 }
229
230 static int at24_sendcmd(unsigned long regaddr, unsigned char cmd)
231 {
232 int i;
233
234 for (i = 0; i < 10; i++) {
235 at24_start(regaddr);
236 at24_writedatabyte(regaddr, cmd);
237 if (at24_waitforack(regaddr))
238 return 1;
239 }
240 return 0;
241 }
242
243 static unsigned char at24_readdatabit(unsigned long regaddr)
244 {
245 unsigned char val;
246
247 at24_setlines(regaddr, 0, 1);
248 at24_setlines(regaddr, 1, 1);
249 val = (inb(regaddr) & AT24_DATA)?1:0;
250 at24_setlines(regaddr, 1, 1);
251 at24_setlines(regaddr, 0, 1);
252 return val;
253 }
254
255 static unsigned char at24_readdatabyte(unsigned long regaddr)
256 {
257 unsigned char data = 0;
258 int i;
259
260 for (i = 0; i < 8; i++) {
261 data <<= 1;
262 data |= at24_readdatabit(regaddr);
263 }
264
265 return data;
266 }
267
268 static int at24_waitforack(unsigned long regaddr)
269 {
270 int i;
271
272 for (i = 0; i < 10; i++) {
273 if ((at24_readdatabit(regaddr) & 0x01) == 0x00)
274 return 1;
275 }
276 return 0;
277 }
278
279 static int at24_waitfornack(unsigned long regaddr)
280 {
281 int i;
282 for (i = 0; i < 10; i++) {
283 if ((at24_readdatabit(regaddr) & 0x01) == 0x01)
284 return 1;
285 }
286 return 0;
287 }
288
289 static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data)
290 {
291 unsigned char val = AT24_ENABLE;
292 if (clock)
293 val |= AT24_CLOCK;
294 if (data)
295 val |= AT24_DATA;
296
297 outb(val, regaddr);
298 tms380tr_wait(20); /* Very necessary. */
299 }
300
301 static void at24_start(unsigned long regaddr)
302 {
303 at24_setlines(regaddr, 0, 1);
304 at24_setlines(regaddr, 1, 1);
305 at24_setlines(regaddr, 1, 0);
306 at24_setlines(regaddr, 0, 1);
307 }
308
309 static unsigned char at24_readb(unsigned long regaddr, unsigned char addr)
310 {
311 unsigned char data = 0xff;
312
313 if (at24_sendfullcmd(regaddr, AT24_WRITE, addr)) {
314 if (at24_sendcmd(regaddr, AT24_READ)) {
315 data = at24_readdatabyte(regaddr);
316 if (!at24_waitfornack(regaddr))
317 data = 0xff;
318 }
319 }
320 return data;
321 }
322
323
324 /*
325 * Enable basic functions of the Madge chipset needed
326 * for initialization.
327 */
328 static void abyss_enable(struct net_device *dev)
329 {
330 unsigned char reset_reg;
331 unsigned long ioaddr;
332
333 ioaddr = dev->base_addr;
334 reset_reg = inb(ioaddr + PCIBM2_RESET_REG);
335 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
336 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
337 tms380tr_wait(100);
338 }
339
340 /*
341 * Enable the functions of the Madge chipset needed for
342 * full working order.
343 */
344 static int abyss_chipset_init(struct net_device *dev)
345 {
346 unsigned char reset_reg;
347 unsigned long ioaddr;
348
349 ioaddr = dev->base_addr;
350
351 reset_reg = inb(ioaddr + PCIBM2_RESET_REG);
352
353 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
354 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
355
356 reset_reg &= ~(PCIBM2_RESET_REG_CHIP_NRES |
357 PCIBM2_RESET_REG_FIFO_NRES |
358 PCIBM2_RESET_REG_SIF_NRES);
359 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
360
361 tms380tr_wait(100);
362
363 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
364 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
365
366 reset_reg |= PCIBM2_RESET_REG_SIF_NRES;
367 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
368
369 reset_reg |= PCIBM2_RESET_REG_FIFO_NRES;
370 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
371
372 outb(PCIBM2_INT_CONTROL_REG_SINTEN |
373 PCIBM2_INT_CONTROL_REG_PCI_ERR_ENABLE,
374 ioaddr + PCIBM2_INT_CONTROL_REG);
375
376 outb(30, ioaddr + PCIBM2_FIFO_THRESHOLD);
377
378 return 0;
379 }
380
381 static inline void abyss_chipset_close(struct net_device *dev)
382 {
383 unsigned long ioaddr;
384
385 ioaddr = dev->base_addr;
386 outb(0, ioaddr + PCIBM2_RESET_REG);
387 }
388
389 /*
390 * Read configuration data from the AT24 SEEPROM on Madge cards.
391 *
392 */
393 static void abyss_read_eeprom(struct net_device *dev)
394 {
395 struct net_local *tp;
396 unsigned long ioaddr;
397 unsigned short val;
398 int i;
399
400 tp = (struct net_local *)dev->priv;
401 ioaddr = dev->base_addr;
402
403 /* Must enable glue chip first */
404 abyss_enable(dev);
405
406 val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
407 PCIBM2_SEEPROM_RING_SPEED);
408 tp->DataRate = val?SPEED_4:SPEED_16; /* set open speed */
409 printk("%s: SEEPROM: ring speed: %dMb/sec\n", dev->name, tp->DataRate);
410
411 val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
412 PCIBM2_SEEPROM_RAM_SIZE) * 128;
413 printk("%s: SEEPROM: adapter RAM: %dkb\n", dev->name, val);
414
415 dev->addr_len = 6;
416 for (i = 0; i < 6; i++)
417 dev->dev_addr[i] = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
418 PCIBM2_SEEPROM_BIA+i);
419 }
420
421 static int abyss_open(struct net_device *dev)
422 {
423 abyss_chipset_init(dev);
424 tms380tr_open(dev);
425 return 0;
426 }
427
428 static int abyss_close(struct net_device *dev)
429 {
430 tms380tr_close(dev);
431 abyss_chipset_close(dev);
432 return 0;
433 }
434
435 static void __exit abyss_detach (struct pci_dev *pdev)
436 {
437 struct net_device *dev = pci_get_drvdata(pdev);
438
439 if (!dev)
440 BUG();
441 unregister_netdev(dev);
442 release_region(dev->base_addr-0x10, ABYSS_IO_EXTENT);
443 free_irq(dev->irq, dev);
444 kfree(dev->priv);
445 kfree(dev);
446 pci_set_drvdata(pdev, NULL);
447 }
448
449 static struct pci_driver abyss_driver = {
450 name: "abyss",
451 id_table: abyss_pci_tbl,
452 probe: abyss_attach,
453 remove: abyss_detach,
454 };
455
456 static int __init abyss_init (void)
457 {
458 int rc = pci_register_driver (&abyss_driver);
459 if (rc < 0)
460 return rc;
461 if (rc == 0) {
462 pci_unregister_driver (&abyss_driver);
463 return -ENODEV;
464 }
465 return 0;
466 }
467
468 static void __exit abyss_rmmod (void)
469 {
470 pci_unregister_driver (&abyss_driver);
471 }
472
473 module_init(abyss_init);
474 module_exit(abyss_rmmod);
475
476 \f
477 /*
478 * Local variables:
479 * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c abyss.c"
480 * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c abyss.c"
481 * c-set-style "K&R"
482 * c-indent-level: 8
483 * c-basic-offset: 8
484 * tab-width: 8
485 * End:
486 */
Copy of Dave Jones history.git as used by http://archive.org/details/git-history-of-linux