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Import 2.3.30
[davej-history.git] / drivers / sound / trident.c
blob08c4acfa13a3ed6351130637b57a2ca02973b313
1 /*****************************************************************************
2 *
3 * Trident 4D-Wave OSS driver for Linux 2.2.x
4 *
5 * Driver: Alan Cox <alan@redhat.com>
6 *
7 * Built from:
8 * Low level code: <audio@tridentmicro.com> from ALSA
9 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
10 * Extended by: Zach Brown <zab@redhat.com>
11 *
12 * Hacked up by:
13 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
14 *
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 *
30 */
31
32 /*****************************************************************************/
33
34
35 #include <linux/config.h>
36 #include <linux/module.h>
37 #include <linux/version.h>
38 #include <linux/string.h>
39 #include <linux/ctype.h>
40 #include <linux/ioport.h>
41 #include <linux/sched.h>
42 #include <linux/delay.h>
43 #include <linux/sound.h>
44 #include <linux/malloc.h>
45 #include <linux/soundcard.h>
46 #include <linux/pci.h>
47 #include <asm/io.h>
48 #include <asm/dma.h>
49 #include <linux/init.h>
50 #include <linux/poll.h>
51 #include <linux/spinlock.h>
52 #include <asm/uaccess.h>
53 #include <asm/hardirq.h>
54
55 #ifdef CONFIG_APM
56 #include <linux/apm_bios.h>
57 #endif
58
59 #include "trident.h"
60 #include "ac97.h"
61
62 /* --------------------------------------------------------------------- */
63
64 #define M_DEBUG 1
65
66 #ifdef M_DEBUG
67 static int debug=0;
68 #define M_printk(args...) {if (debug) printk(args);}
69 #else
70 #define M_printk(x)
71 #endif
72
73 /* --------------------------------------------------------------------- */
74 #define DRIVER_VERSION "0.01"
75
76 #define TRIDENT_FMT_STEREO 0x01
77 #define TRIDENT_FMT_16BIT 0x02
78 #define TRIDENT_FMT_MASK 0x03
79 #define TRIDENT_DAC_SHIFT 0
80 #define TRIDENT_ADC_SHIFT 4
81
82 #define TRIDENT_ENABLE_PE 1
83 #define TRIDENT_ENABLE_RE 2
84
85
86 #define TRIDENT_CARD_MAGIC 0x5072696E
87 #define TRIDENT_STATE_MAGIC 0x63657373
88
89 #define DAC_RUNNING 1
90 #define ADC_RUNNING 2
91
92 #define NR_DSPS 8
93
94 #define SND_DEV_DSP16 5
95
96 static const unsigned sample_size[] = { 1, 2, 2, 4 };
97 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
98
99 enum card_types_t {
100 TYPE_4DWAVE_DX,
101 TYPE_4DWAVE_NX
102 };
103
104 static const char *card_names[]={
105 [TYPE_4DWAVE_DX] = "Trident 4DWave DX",
106 [TYPE_4DWAVE_NX] = "Trident 4DWave NX",
107 };
108
109
110 typedef struct tChannelControl
111 {
112 // register data
113 unsigned int * lpChStart;
114 unsigned int * lpChStop;
115 unsigned int * lpChAint;
116 unsigned int * lpChAinten;
117
118 // register addresses
119 unsigned int * lpAChStart;
120 unsigned int * lpAChStop;
121 unsigned int * lpAChAint;
122 unsigned int * lpAChAinten;
123
124 unsigned int data[16];
125
126 } CHANNELCONTROL;
127
128 /* --------------------------------------------------------------------- */
129
130 struct trident_state {
131 unsigned int magic;
132 int channel;
133 struct trident_card *card; /* Card info */
134 /* wave stuff */
135 unsigned int rateadc, ratedac;
136 unsigned char fmt, enable;
137
138 struct semaphore open_sem;
139 mode_t open_mode;
140 wait_queue_head_t open_wait;
141
142 /* soundcore stuff */
143 int dev_audio;
144
145 struct dmabuf {
146 void *rawbuf;
147 unsigned buforder;
148 unsigned numfrag;
149 unsigned fragshift;
150 int chan[2]; /* Hardware channel */
151 /* XXX zab - swptr only in here so that it can be referenced by
152 clear_advance, as far as I can tell :( */
153 unsigned hwptr, swptr;
154 unsigned total_bytes;
155 int count;
156 unsigned error; /* over/underrun */
157 wait_queue_head_t wait;
158 /* redundant, but makes calculations easier */
159 unsigned fragsize;
160 unsigned dmasize;
161 unsigned fragsamples;
162 /* OSS stuff */
163 unsigned mapped:1;
164 unsigned ready:1;
165 unsigned endcleared:1;
166 unsigned ossfragshift;
167 int ossmaxfrags;
168 unsigned subdivision;
169 u16 base; /* Offset for ptr */
170 } dma_dac, dma_adc;
171
172 u8 bDMAStart;
173
174 };
175
176 struct trident_card {
177 unsigned int magic;
178
179 /* We keep trident cards in a linked list */
180 struct trident_card *next;
181
182 /* The trident has a certain amount of cross channel interaction
183 so we use a single per card lock */
184
185 spinlock_t lock;
186
187 int dev_mixer;
188
189 int card_type;
190
191 /* as most of this is static,
192 perhaps it should be a pointer to a global struct */
193 struct mixer_goo {
194 int modcnt;
195 int supported_mixers;
196 int stereo_mixers;
197 int record_sources;
198 /* the caller must guarantee arg sanity before calling these */
199 /* int (*read_mixer)(struct trident_card *card, int index);*/
200 void (*write_mixer)(struct trident_card *card,int mixer, unsigned int left,unsigned int right);
201 int (*recmask_io)(struct trident_card *card,int rw,int mask);
202 unsigned int mixer_state[SOUND_MIXER_NRDEVICES];
203 } mix;
204
205 struct trident_state channels[NR_DSPS];
206
207 /* hardware resources */
208 unsigned long iobase;
209 u32 irq;
210
211 u32 ChanMap[2];
212 int ChanPCMcnt;
213 int ChanPCM;
214 CHANNELCONTROL ChRegs;
215 int ChanDwordCount;
216 };
217
218 static struct timer_list debug_timer;
219
220 #define IWriteAinten( x ) \
221 {int i; \
222 for( i= 0; i < ChanDwordCount; i++) \
223 outl((x)->lpChAinten[i], TRID_REG(trident, (x)->lpAChAinten[i]));}
224
225 #define IReadAinten( x ) \
226 {int i; \
227 for( i= 0; i < ChanDwordCount; i++) \
228 (x)->lpChAinten[i] = inl(TRID_REG(trident, (x)->lpAChAinten[i]));}
229
230 #define ReadAint( x ) \
231 IReadAint( x )
232
233 #define WriteAint( x ) \
234 IWriteAint( x )
235
236 #define IWriteAint( x ) \
237 {int i; \
238 for( i= 0; i < ChanDwordCount; i++) \
239 outl((x)->lpChAint[i], TRID_REG(trident, (x)->lpAChAint[i]));}
240
241 #define IReadAint( x ) \
242 {int i; \
243 for( i= 0; i < ChanDwordCount; i++) \
244 (x)->lpChAint[i] = inl(TRID_REG(trident, (x)->lpAChAint[i]));}
245
246
247 /*
248 * Trident support library routines
249 */
250
251 /*---------------------------------------------------------------------------
252 void ResetAinten( struct trident_state *trident, int ChannelNum)
253
254 Description: This routine will disable interrupts and ack any
255 existing interrupts for specified channel.
256
257 Parameters: trident - pointer to target device class for 4DWave.
258 ChannelNum - channel number
259
260 returns: TRUE if everything went ok, else FALSE.
261
262 ---------------------------------------------------------------------------*/
263
264 static void ResetAinten(struct trident_card * trident, int ChannelNum)
265 {
266 unsigned int dwMask;
267 unsigned int x = ChannelNum >> 5;
268 unsigned int ChanDwordCount = trident->ChanDwordCount;
269
270 IReadAinten(&trident->ChRegs);
271 dwMask = 1 << (ChannelNum & 0x1f);
272 trident->ChRegs.lpChAinten[x] &= ~dwMask;
273 IWriteAinten(&trident->ChRegs);
274 // Ack the channel in case the interrupt was set before we disable it.
275 outl(dwMask, TRID_REG(trident, trident->ChRegs.lpAChAint[x]));
276 }
277
278 /*---------------------------------------------------------------------------
279 void EnableEndInterrupts( struct trident_card *trident)
280
281 Description: This routine will enable end of loop interrupts.
282 End of loop interrupts will occur when a running
283 channel reaches ESO.
284
285 Parameters: trident - pointer to target device class for 4DWave.
286
287 returns: TRUE if everything went ok, else FALSE.
288
289 ---------------------------------------------------------------------------*/
290
291 static int EnableEndInterrupts(struct trident_card * trident)
292 {
293 unsigned int GlobalControl;
294
295 GlobalControl = inb(TRID_REG(trident, T4D_LFO_GC_CIR + 1));
296 GlobalControl |= 0x10;
297 outb(GlobalControl, TRID_REG(trident, T4D_LFO_GC_CIR + 1));
298
299 M_printk("(trident) globctl=%02X\n", GlobalControl);
300 M_printk("(trident) enabled end interrupts\n");
301 return (TRUE);
302 }
303
304 /*---------------------------------------------------------------------------
305 e void DisableEndInterrupts( struct trident_card *trident)
306
307 Description: This routine will disable end of loop interrupts.
308 End of loop interrupts will occur when a running
309 channel reaches ESO.
310
311 Parameters:
312 trident - pointer to target device class for 4DWave.
313
314 returns: TRUE if everything went ok, else FALSE.
315
316 ---------------------------------------------------------------------------*/
317
318 static int DisableEndInterrupts(struct trident_card * trident)
319 {
320 unsigned int GlobalControl;
321
322 GlobalControl = inb(TRID_REG(trident, T4D_LFO_GC_CIR + 1));
323 GlobalControl &= ~0x10;
324 outb(GlobalControl, TRID_REG(trident, T4D_LFO_GC_CIR + 1));
325
326 M_printk("(trident) disabled end interrupts\n");
327 M_printk("(trident) globctl=%02X\n", GlobalControl);
328 return (TRUE);
329 }
330
331 /*---------------------------------------------------------------------------
332 void trident_enable_voice_irq( unsigned int HwChannel )
333
334 Description: Enable an interrupt channel, any channel 0 thru n.
335 This routine automatically handles the fact that there are
336 more than 32 channels available.
337
338 Parameters : HwChannel - Channel number 0 thru n.
339 trident - pointer to target device class for 4DWave.
340
341 Return Value: None.
342
343 ---------------------------------------------------------------------------*/
344 void trident_enable_voice_irq(struct trident_card * trident, unsigned int HwChannel)
345 {
346 unsigned int x, Data, ChanDwordCount;
347
348 x = HwChannel >> 5;
349 Data = 1 << (HwChannel & 0x1f);
350 ChanDwordCount = trident->ChanDwordCount;
351 IReadAinten(&trident->ChRegs);
352 trident->ChRegs.lpChAinten[x] |= Data;
353 IWriteAinten(&trident->ChRegs);
354 M_printk("(trident) enabled voice IRQ %d\n", HwChannel);
355 }
356
357 /*---------------------------------------------------------------------------
358 void trident_disable_voice_irq( unsigned int HwChannel )
359
360 Description: Disable an interrupt channel, any channel 0 thru n.
361 This routine automatically handles the fact that there are
362 more than 32 channels available.
363
364 Parameters : HwChannel - Channel number 0 thru n.
365 trident - pointer to target device class for 4DWave.
366
367 Return Value: None.
368
369 ---------------------------------------------------------------------------*/
370 void trident_disable_voice_irq(struct trident_card * trident, unsigned int HwChannel)
371 {
372 unsigned int x, Data, ChanDwordCount;
373
374 x = HwChannel >> 5;
375 Data = 1 << (HwChannel & 0x1f);
376 ChanDwordCount = trident->ChanDwordCount;
377 IReadAinten(&trident->ChRegs);
378 trident->ChRegs.lpChAinten[x] &= ~Data;
379 IWriteAinten(&trident->ChRegs);
380 M_printk("(trident) disabled voice IRQ %d\n", HwChannel);
381 }
382
383 /*---------------------------------------------------------------------------
384 unsigned int AllocateChannelPCM( void )
385
386 Description: Allocate hardware channel by reverse order (63-0).
387
388 Parameters : trident - pointer to target device class for 4DWave.
389
390 Return Value: hardware channel - 0-63 or -1 when no channel is available
391
392 ---------------------------------------------------------------------------*/
393
394 static int AllocateChannelPCM(struct trident_card *trident)
395 {
396 int idx;
397
398 if (trident->ChanPCMcnt >= trident->ChanPCM)
399 {
400 M_printk(KERN_DEBUG "(trident) no channels available.\n");
401 return -1;
402 }
403 for (idx = 31; idx >= 0; idx--) {
404 if (!(trident->ChanMap[1] & (1 << idx))) {
405 trident->ChanMap[1] |= 1 << idx;
406 trident->ChanPCMcnt++;
407 return idx + 32;
408 }
409 }
410 for (idx = 31; idx >= 0; idx--) {
411 if (!(trident->ChanMap[0] & (1 << idx))) {
412 trident->ChanMap[0] |= 1 << idx;
413 trident->ChanPCMcnt++;
414 return idx;
415 }
416 }
417 return -1;
418 }
419
420 /*---------------------------------------------------------------------------
421 void FreeChannelPCM( int channel )
422
423 Description: Free hardware channel.
424
425 Parameters : trident - pointer to target device class for 4DWave.
426 channel - hardware channel number 0-63
427
428 Return Value: none
429
430 ---------------------------------------------------------------------------*/
431
432 static void FreeChannelPCM(struct trident_card *trident, int channel)
433 {
434 if (channel < 0 || channel > 63)
435 return;
436 if (trident->ChanMap[channel>>5] & (1 << (channel & 0x1f))) {
437 trident->ChanMap[channel>>5] &= ~(1 << (channel & 0x1f));
438 trident->ChanPCMcnt--;
439 }
440 }
441
442 /*---------------------------------------------------------------------------
443 void trident_start_voice( ULONG HwChannel )
444
445 Description: Start a channel, any channel 0 thru n.
446 This routine automatically handles the fact that there are
447 more than 32 channels available.
448
449 Parameters : HwChannel - Channel number 0 thru n.
450 trident - pointer to target device class for 4DWave.
451
452 Return Value: None.
453
454 ---------------------------------------------------------------------------*/
455 void trident_start_voice(struct trident_card * trident, unsigned int HwChannel)
456 {
457 unsigned int x = HwChannel >> 5;
458 unsigned int Data = 1 << (HwChannel & 0x1f);
459
460 outl(Data, TRID_REG(trident, trident->ChRegs.lpAChStart[x]));
461 M_printk("(trident) start voice %d\n", HwChannel);
462 }
463
464 /*---------------------------------------------------------------------------
465 void trident_stop_voice( ULONG HwChannel )
466
467 Description: Stop a channel, any channel 0 thru n.
468 This routine automatically handles the fact that there are
469 more than 32 channels available.
470
471 Parameters : HwChannel - Channel number 0 thru n.
472 trident - pointer to target device class for 4DWave.
473
474 Return Value: None.
475
476 ---------------------------------------------------------------------------*/
477 void trident_stop_voice(struct trident_card * trident, unsigned int HwChannel)
478 {
479 unsigned int x = HwChannel >> 5;
480 unsigned int Data = 1 << (HwChannel & 0x1f);
481
482 outl(Data, TRID_REG(trident, trident->ChRegs.lpAChStop[x]));
483 M_printk("(trident) stop voice %d\n", HwChannel);
484 }
485
486 /*---------------------------------------------------------------------------
487 int DidChannelInterrupt( )
488
489 Description: Check if interrupt channel occurred.
490
491 Parameters : trident - pointer to target device class for 4DWave.
492
493 Return Value: TRUE if interrupt occurred, else FALSE.
494
495 ---------------------------------------------------------------------------*/
496 static int DidChannelInterrupt(struct trident_card * trident, int channel)
497 {
498 unsigned int ChanDwordCount = trident->ChanDwordCount;
499 unsigned int x = channel >> 5;
500 unsigned int dwMask = 1 << (channel & 0x1f);
501
502 ReadAint(&trident->ChRegs);
503 return (trident->ChRegs.lpChAint[x] & dwMask) ? TRUE : FALSE;
504 }
505
506 /*---------------------------------------------------------------------------
507 void AckChannelInterrupt( )
508
509 Description: Acknowledge the interrupt bit for channel intrs.
510
511 Parameters : trident - pointer to target device class for 4DWave.
512
513 Return Value: None
514
515 ---------------------------------------------------------------------------*/
516 static void AckChannelInterrupt(struct trident_card * trident, int channel)
517 {
518 unsigned int ChanDwordCount = trident->ChanDwordCount;
519 unsigned int x = channel >> 5;
520 unsigned int dwMask = 1 << (channel & 0x1f);
521
522 ReadAint(&trident->ChRegs);
523 trident->ChRegs.lpChAint[x] &= dwMask;
524 IWriteAint(&trident->ChRegs);
525 }
526
527 /*---------------------------------------------------------------------------
528 int LoadDeltaHw( unsigned int HwChannel, unsigned int Delta )
529
530 Description: This routine writes Delta to the hardware.
531
532 Parameters: Delta - data to write (2 Bytes only)
533 HwChannel - Hardware channel to write to.
534 trident - pointer to target device class for 4DWave.
535
536 Returns: TRUE if all goes well, else FALSE.
537
538 ---------------------------------------------------------------------------*/
539 static int LoadDeltaHw(struct trident_card * trident, unsigned int HwChannel, unsigned int Delta)
540 {
541
542 outb(HwChannel, TRID_REG(trident, T4D_LFO_GC_CIR));
543
544 if (trident->card_type != TYPE_4DWAVE_NX) {
545 outw((unsigned short) Delta, TRID_REG(trident, CH_DX_ESO_DELTA));
546 }
547 else // ID_4DWAVE_NX
548 {
549 outb((unsigned char) Delta, TRID_REG(trident, CH_NX_DELTA_CSO + 3));
550 outb((unsigned char) (Delta >> 8), TRID_REG(trident, CH_NX_DELTA_ESO + 3));
551 }
552
553 return TRUE;
554 }
555
556 /*---------------------------------------------------------------------------
557 int LoadVirtualChannel( ULONG *Data, ULONG HwChannel)
558
559 Description: This routine writes all required channel registers to hardware.
560
561 Parameters: *Data - a pointer to the data to write (5 ULONGS always).
562 HwChannel - Hardware channel to write to.
563 trident - pointer to target device class for 4DWave.
564
565 Returns: TRUE if all goes well, else FALSE.
566
567 ---------------------------------------------------------------------------*/
568 static int LoadVirtualChannel(struct trident_card * trident, unsigned int *Data, unsigned int HwChannel)
569 {
570 unsigned int ChanData[CHANNEL_REGS];
571 unsigned int ULONGSToDo = CHANNEL_REGS;
572 unsigned int i;
573 unsigned int Address = CHANNEL_START;
574
575 /* Copy the data first... Hack... Before mucking with Volume! */
576 memcpy((unsigned char *) ChanData, (unsigned char *) Data, ULONGSToDo * 4);
577
578 outb((unsigned char) HwChannel, TRID_REG(trident, T4D_LFO_GC_CIR));
579
580 for (i = 0; i < ULONGSToDo; i++, Address += 4)
581 outl(ChanData[i], TRID_REG(trident, Address));
582
583 M_printk("(trident) load virtual channel %d\n", HwChannel);
584 return TRUE;
585 }
586
587 /*---------------------------------------------------------------------------
588 trident_write_voice_regs
589
590 Description: This routine will write the 5 hardware channel registers
591 to hardware.
592
593 Paramters: trident - pointer to target device class for 4DWave.
594 Channel - Real or Virtual channel number.
595 Each register field.
596
597 Returns: TRUE if all goes well, else FALSE.
598
599 ---------------------------------------------------------------------------*/
600 int trident_write_voice_regs(struct trident_card * trident,
601 unsigned int Channel,
602 unsigned int LBA,
603 unsigned int CSO,
604 unsigned int ESO,
605 unsigned int DELTA,
606 unsigned int ALPHA_FMS,
607 unsigned int FMC_RVOL_CVOL,
608 unsigned int GVSEL,
609 unsigned int PAN,
610 unsigned int VOL,
611 unsigned int CTRL,
612 unsigned int EC)
613 {
614 unsigned int ChanData[CHANNEL_REGS + 1], FmcRvolCvol;
615
616 ChanData[1] = LBA;
617 ChanData[4] = (GVSEL << 31) |
618 ((PAN & 0x0000007f) << 24) |
619 ((VOL & 0x000000ff) << 16) |
620 ((CTRL & 0x0000000f) << 12) |
621 (EC & 0x00000fff);
622
623 FmcRvolCvol = FMC_RVOL_CVOL & 0x0000ffff;
624
625 if (trident->card_type != TYPE_4DWAVE_NX)
626 {
627 ChanData[0] = (CSO << 16) | (ALPHA_FMS & 0x0000ffff);
628 ChanData[2] = (ESO << 16) | (DELTA & 0x0ffff);
629 ChanData[3] = FmcRvolCvol;
630 }
631 else // ID_4DWAVE_NX
632 {
633 ChanData[0] = (DELTA << 24) | (CSO & 0x00ffffff);
634 ChanData[2] = ((DELTA << 16) & 0xff000000) | (ESO & 0x00ffffff);
635 ChanData[3] = (ALPHA_FMS << 16) | FmcRvolCvol;
636 }
637
638 LoadVirtualChannel(trident, ChanData, Channel);
639
640 return TRUE;
641 }
642
643 static int compute_rate(u32 rate)
644 {
645 int delta;
646 // We special case 44100 and 8000 since rounding with the equation
647 // does not give us an accurate enough value. For 11025 and 22050
648 // the equation gives us the best answer. All other frequencies will
649 // also use the equation. JDW
650 if (rate == 44100)
651 delta = 0xeb3;
652 else if (rate == 8000)
653 delta = 0x2ab;
654 else if (rate == 48000)
655 delta = 0x1000;
656 else
657 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
658 return delta;
659 }
660
661 /*---------------------------------------------------------------------------
662 trident_set_dac_rate
663
664 Description: This routine will set the sample rate for playback.
665
666 Paramters: trident - pointer to target device class for 4DWave.
667 rate - desired sample rate
668 set - actually write hardware if set is true.
669
670 Returns: The rate allowed by device.
671
672 ---------------------------------------------------------------------------*/
673
674 static unsigned int trident_set_dac_rate(struct trident_state * trident,
675 unsigned int rate, int set)
676 {
677 unsigned int delta;
678
679
680 if (rate > 48000)
681 rate = 48000;
682 if (rate < 4000)
683 rate = 4000;
684
685 delta = compute_rate(rate);
686
687 if(set)
688 {
689 //Select channel window
690 outb(trident->dma_dac.chan[1], TRID_REG(trident->card, T4D_LFO_GC_CIR));
691
692 if (trident->card->card_type != TYPE_4DWAVE_NX)
693 outw(delta,TRID_REG(trident->card,CH_DX_ESO_DELTA+2));
694 else // ID_4DWAVE_NX
695 {
696 outb( delta & 0xff,TRID_REG(trident->card,CH_NX_DELTA_CSO));
697 outb((delta>>8) & 0xff,TRID_REG(trident->card,CH_NX_DELTA_ESO));
698 }
699 }
700
701 M_printk("(trident) called trident_set_dac_rate : rate = %d, set = %d delta = %4x\n",
702 rate, set,delta);
703
704 trident->ratedac = rate;
705 return rate;
706 }
707
708 /*---------------------------------------------------------------------------
709 trident_set_adc_rate
710
711 Description: This routine will set the sample rate for capture.
712
713 Paramters: trident - pointer to target device class for 4DWave.
714 rate - desired sample rate
715 set - actually write hardware if set is true.
716
717 Returns: The rate allowed by device.
718
719 ---------------------------------------------------------------------------*/
720
721 static unsigned int trident_set_adc_rate(struct trident_state * trident,
722 unsigned int rate,
723 int set)
724 {
725 //snd_printk("trid: called trident_set_adc_rate\n");
726 if (rate > 48000)
727 rate = 48000;
728 if (rate < 4000)
729 rate = 4000;
730
731 trident->rateadc = rate;
732 /*
733 * FIXME: hit the hardware
734 */
735
736 return rate;
737 }
738
739 extern __inline__ unsigned ld2(unsigned int x)
740 {
741 unsigned r = 0;
742
743 if (x >= 0x10000) {
744 x >>= 16;
745 r += 16;
746 }
747 if (x >= 0x100) {
748 x >>= 8;
749 r += 8;
750 }
751 if (x >= 0x10) {
752 x >>= 4;
753 r += 4;
754 }
755 if (x >= 4) {
756 x >>= 2;
757 r += 2;
758 }
759 if (x >= 2)
760 r++;
761 return r;
762 }
763
764
765 /* --------------------------------------------------------------------- */
766
767 static struct trident_card *devs = NULL;
768
769 /* --------------------------------------------------------------------- */
770
771
772 /*
773 * Trident AC97 codec programming interface.
774 */
775
776 static void trident_ac97_set(struct trident_card *trident, u8 cmd, u16 val)
777 {
778 unsigned int address, data;
779 unsigned short count = 0xffff;
780
781 data = ((unsigned long)val) << 16;
782
783 if (trident->card_type != TYPE_4DWAVE_NX)
784 {
785 address = DX_ACR0_AC97_W;
786 /* read AC-97 write register status */
787 do
788 {
789 if ((inw(TRID_REG(trident,address))&0x8000) == 0)
790 break;
791 }
792 while(count--);
793
794 data |= (0x8000 | (cmd & 0x000000ff));
795 }
796 else // ID_4DWAVE_NX
797 {
798 address = NX_ACR1_AC97_W;
799 /* read AC-97 write register status */
800 do
801 {
802 if ((inw(TRID_REG(trident, address )) & 0x0800) == 0)
803 break;
804 }
805 while (count--);
806 data |= (0x0800 | (cmd & 0x000000ff));
807 }
808 if (count == 0)
809 {
810 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n");
811 return;
812 }
813
814 outl(data, TRID_REG(trident, address));
815 }
816
817 static u16 trident_ac97_get(struct trident_card *trident, u8 cmd)
818 {
819 unsigned int data = 0;
820 unsigned short count = 0xffff;
821
822 if (trident->card_type != TYPE_4DWAVE_NX)
823 {
824 data = (0x00008000L | (cmd & 0x000000ff));
825 outl(data, TRID_REG(trident, DX_ACR1_AC97_R));
826 do
827 {
828 data = inl(TRID_REG(trident, DX_ACR1_AC97_R));
829 if ( ( data & 0x0008000 ) == 0 )
830 break;
831 }
832 while(count--);
833 }
834 else // ID_4DWAVE_NX
835 {
836 data = (0x00000800L | (cmd & 0x000000ff));
837 outl(data, TRID_REG(trident, NX_ACR2_AC97_R_PRIMARY));
838 do
839 {
840 data = inl(TRID_REG(trident, NX_ACR2_AC97_R_PRIMARY));
841 if ( ( data & 0x00000C00 ) == 0 )
842 break;
843 }
844 while(count--);
845 }
846 if ( count == 0 )
847 {
848 printk("trident: AC97 CODEC read timed out.\n");
849 data = 0;
850 }
851 return ((unsigned short)(data >> 16));
852 }
853
854 /* OSS interface to the ac97s.. */
855
856 #define AC97_STEREO_MASK (SOUND_MASK_VOLUME|\
857 SOUND_MASK_PCM|SOUND_MASK_LINE|SOUND_MASK_CD|\
858 SOUND_MASK_VIDEO|SOUND_MASK_LINE1|SOUND_MASK_IGAIN)
859
860 #define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \
861 SOUND_MASK_BASS|SOUND_MASK_TREBLE|SOUND_MASK_MIC|\
862 SOUND_MASK_SPEAKER)
863
864 #define AC97_RECORD_MASK (SOUND_MASK_MIC|\
865 SOUND_MASK_CD| SOUND_MASK_VIDEO| SOUND_MASK_LINE1| SOUND_MASK_LINE|\
866 SOUND_MASK_PHONEIN)
867
868 #define supported_mixer(CARD,FOO) ( CARD->mix.supported_mixers & (1<<FOO) )
869
870 /* this table has default mixer values for all OSS mixers.
871 be sure to fill it in if you add oss mixers
872 to anyone's supported mixer defines */
873
874 /* possible __init */
875 static struct mixer_defaults {
876 int mixer;
877 unsigned int value;
878 } mixer_defaults[SOUND_MIXER_NRDEVICES] = {
879 /* all values 0 -> 100 in bytes */
880 {SOUND_MIXER_VOLUME, 0x3232},
881 {SOUND_MIXER_BASS, 0x3232},
882 {SOUND_MIXER_TREBLE, 0x3232},
883 {SOUND_MIXER_SPEAKER, 0x3232},
884 {SOUND_MIXER_MIC, 0x3232},
885 {SOUND_MIXER_LINE, 0x3232},
886 {SOUND_MIXER_CD, 0x3232},
887 {SOUND_MIXER_VIDEO, 0x3232},
888 {SOUND_MIXER_LINE1, 0x3232},
889 {SOUND_MIXER_PCM, 0x3232},
890 {SOUND_MIXER_IGAIN, 0x3232},
891 {-1,0}
892 };
893
894 static struct ac97_mixer_hw {
895 unsigned char offset;
896 int scale;
897 } ac97_hw[SOUND_MIXER_NRDEVICES]= {
898 [SOUND_MIXER_VOLUME] = {0x02,63},
899 [SOUND_MIXER_BASS] = {0x08,15},
900 [SOUND_MIXER_TREBLE] = {0x08,15},
901 [SOUND_MIXER_SPEAKER] = {0x0a,15},
902 [SOUND_MIXER_MIC] = {0x0e,31},
903 [SOUND_MIXER_LINE] = {0x10,31},
904 [SOUND_MIXER_CD] = {0x12,31},
905 [SOUND_MIXER_VIDEO] = {0x14,31},
906 [SOUND_MIXER_LINE1] = {0x16,31},
907 [SOUND_MIXER_PCM] = {0x18,31},
908 [SOUND_MIXER_IGAIN] = {0x1c,31}
909 };
910
911 #if 0 /* *shrug* removed simply because we never used it.
912 feel free to implement again if needed */
913
914 /* reads the given OSS mixer from the ac97
915 the caller must have insured that the ac97 knows
916 about that given mixer, and should be holding a
917 spinlock for the card */
918 static int ac97_read_mixer(struct trident_card *card, int mixer)
919 {
920 u16 val;
921 int ret=0;
922 struct ac97_mixer_hw *mh = &ac97_hw[mixer];
923
924 val = trident_ac97_get(card , mh->offset);
925
926 if(AC97_STEREO_MASK & (1<<mixer)) {
927 /* nice stereo mixers .. */
928 int left,right;
929
930 left = (val >> 8) & 0x7f;
931 right = val & 0x7f;
932
933 if (mixer == SOUND_MIXER_IGAIN) {
934 right = (right * 100) / mh->scale;
935 left = (left * 100) / mh->scale;
936 else {
937 right = 100 - ((right * 100) / mh->scale);
938 left = 100 - ((left * 100) / mh->scale);
939 }
940
941 ret = left | (right << 8);
942 } else if (mixer == SOUND_MIXER_SPEAKER) {
943 ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale);
944 } else if (mixer == SOUND_MIXER_MIC) {
945 ret = 100 - (((val & 0x1f) * 100) / mh->scale);
946 /* the low bit is optional in the tone sliders and masking
947 it lets is avoid the 0xf 'bypass'.. */
948 } else if (mixer == SOUND_MIXER_BASS) {
949 ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale);
950 } else if (mixer == SOUND_MIXER_TREBLE) {
951 ret = 100 - (((val & 0xe) * 100) / mh->scale);
952 }
953
954 printk("read mixer %d (0x%x) %x -> %x\n",mixer,mh->offset,val,ret);
955
956 return ret;
957 }
958 #endif
959
960 /* write the OSS encoded volume to the given OSS encoded mixer,
961 again caller's job to make sure all is well in arg land,
962 call with spinlock held */
963 static void ac97_write_mixer(struct trident_card *card, int mixer, unsigned int left, unsigned int right)
964 {
965 u16 val=0;
966 struct ac97_mixer_hw *mh = &ac97_hw[mixer];
967
968 printk("(trident) wrote ac97 mixer %d (0x%x) %d,%d",mixer,mh->offset,left,right);
969
970 if(AC97_STEREO_MASK & (1<<mixer)) {
971 /* stereo mixers */
972
973
974 if (mixer == SOUND_MIXER_IGAIN) {
975 right = (right * mh->scale) / 100;
976 left = (left * mh->scale) / 100;
977 } else {
978 right = ((100 - right) * mh->scale) / 100;
979 left = ((100 - left) * mh->scale) / 100;
980 }
981
982 val = (left << 8) | right;
983
984 } else if (mixer == SOUND_MIXER_SPEAKER) {
985 val = (((100 - left) * mh->scale) / 100) << 1;
986 } else if (mixer == SOUND_MIXER_MIC) {
987 val = trident_ac97_get(card , mh->offset) & ~0x801f;
988 val |= (((100 - left) * mh->scale) / 100);
989 /* the low bit is optional in the tone sliders and masking
990 it lets us avoid the 0xf 'bypass'.. */
991 } else if (mixer == SOUND_MIXER_BASS) {
992 val = trident_ac97_get(card , mh->offset) & ~0x0f00;
993 val |= ((((100 - left) * mh->scale) / 100) << 8) & 0x0e00;
994 } else if (mixer == SOUND_MIXER_TREBLE) {
995 val = trident_ac97_get(card , mh->offset) & ~0x000f;
996 val |= (((100 - left) * mh->scale) / 100) & 0x000e;
997 }
998
999 trident_ac97_set(card, mh->offset, val);
1000
1001 printk(" -> %x\n",val);
1002 }
1003
1004 /* the following tables allow us to go from
1005 OSS <-> ac97 quickly. */
1006
1007 enum ac97_recsettings {
1008 AC97_REC_MIC=0,
1009 AC97_REC_CD,
1010 AC97_REC_VIDEO,
1011 AC97_REC_AUX,
1012 AC97_REC_LINE,
1013 AC97_REC_STEREO, /* combination of all enabled outputs.. */
1014 AC97_REC_MONO, /*.. or the mono equivalent */
1015 AC97_REC_PHONE
1016 };
1017
1018 static unsigned int ac97_rm2oss[] = {
1019 [AC97_REC_MIC] = SOUND_MIXER_MIC,
1020 [AC97_REC_CD] = SOUND_MIXER_CD,
1021 [AC97_REC_VIDEO] = SOUND_MIXER_VIDEO,
1022 [AC97_REC_AUX] = SOUND_MIXER_LINE1,
1023 [AC97_REC_LINE] = SOUND_MIXER_LINE,
1024 [AC97_REC_PHONE] = SOUND_MIXER_PHONEIN
1025 };
1026
1027 /* indexed by bit position */
1028 static unsigned int ac97_oss_rm[] = {
1029 [SOUND_MIXER_MIC] = AC97_REC_MIC,
1030 [SOUND_MIXER_CD] = AC97_REC_CD,
1031 [SOUND_MIXER_VIDEO] = AC97_REC_VIDEO,
1032 [SOUND_MIXER_LINE1] = AC97_REC_AUX,
1033 [SOUND_MIXER_LINE] = AC97_REC_LINE,
1034 [SOUND_MIXER_PHONEIN] = AC97_REC_PHONE
1035 };
1036
1037 /* read or write the recmask
1038 the ac97 can really have left and right recording
1039 inputs independantly set, but OSS doesn't seem to
1040 want us to express that to the user.
1041 the caller guarantees that we have a supported bit set,
1042 and they must be holding the card's spinlock */
1043
1044 static int ac97_recmask_io(struct trident_card *card, int rw, int mask)
1045 {
1046 unsigned int val;
1047
1048 if (rw) {
1049 /* read it from the card */
1050 val = trident_ac97_get(card, 0x1a) & 0x7;
1051 return ac97_rm2oss[val];
1052 }
1053
1054 /* else, write the first set in the mask as the
1055 output */
1056
1057 val = ffs(mask);
1058 val = ac97_oss_rm[val-1];
1059 val |= val << 8; /* set both channels */
1060
1061 printk("trident: setting ac97 recmask to 0x%x\n",val);
1062
1063 trident_ac97_set(card,0x1a,val);
1064
1065 return 0;
1066 };
1067
1068 /*
1069 * Generic AC97 codec initialisation. Need to check there are no
1070 * quirks for the Trident cards.
1071 */
1072
1073 static u16 trident_ac97_init(struct trident_card *trident)
1074 {
1075 trident->mix.supported_mixers = AC97_SUPPORTED_MASK;
1076 trident->mix.stereo_mixers = AC97_STEREO_MASK;
1077 trident->mix.record_sources = AC97_RECORD_MASK;
1078 /* trident->mix.read_mixer = ac97_read_mixer;*/
1079 trident->mix.write_mixer = ac97_write_mixer;
1080 trident->mix.recmask_io = ac97_recmask_io;
1081
1082 if(trident->card_type == TYPE_4DWAVE_NX)
1083 {
1084 unsigned short VendorID1, VendorID2;
1085
1086 outl(0x02, TRID_REG(trident, NX_ACR0_AC97_COM_STAT));
1087
1088 // 4 Speaker Codec initialization
1089 VendorID1 = trident_ac97_get(trident, AC97_VENDOR_ID1);
1090 VendorID2 = trident_ac97_get(trident, AC97_VENDOR_ID2);
1091
1092 if( (VendorID1 == 0x8384) && (VendorID2 == 0x7608) )
1093 {
1094 // Sigmatel 9708.
1095
1096 unsigned short TestReg;
1097 unsigned int DTemp;
1098
1099 trident_ac97_set(trident, AC97_SIGMATEL_CIC1, 0xABBAL);
1100 trident_ac97_set(trident, AC97_SIGMATEL_CIC2, 0x1000L);
1101
1102 TestReg = trident_ac97_get(trident, AC97_SIGMATEL_BIAS2);
1103
1104 if( TestReg != 0x8000 ) // Errata Notice.
1105 {
1106 trident_ac97_set(trident, AC97_SIGMATEL_BIAS1, 0xABBAL );
1107 trident_ac97_set(trident, AC97_SIGMATEL_BIAS2, 0x0007L );
1108 }
1109 else // Newer version
1110 {
1111 trident_ac97_set(trident, AC97_SIGMATEL_CIC2, 0x1001L ); // recommended
1112 trident_ac97_set(trident, AC97_SIGMATEL_DAC2INVERT, 0x0008L );
1113 }
1114
1115 trident_ac97_set( trident, AC97_SURROUND_MASTER, 0x0000L );
1116 trident_ac97_set( trident, AC97_HEADPHONE_VOL, 0x8000L );
1117
1118 DTemp = (unsigned int)trident_ac97_get( trident, AC97_GENERAL_PURPOSE );
1119 trident_ac97_set( trident, AC97_GENERAL_PURPOSE, DTemp & 0x0000FDFFL ); // bit9 = 0.
1120
1121 DTemp = (unsigned int)trident_ac97_get( trident, AC97_MIC_VOL );
1122 trident_ac97_set( trident, AC97_MIC_VOL, DTemp | 0x00008000L ); // bit15 = 1.
1123
1124 DTemp = inl(TRID_REG(trident, NX_ACR0_AC97_COM_STAT));
1125 outl(DTemp | 0x0010, TRID_REG(trident, NX_ACR0_AC97_COM_STAT));
1126
1127 }
1128 else if((VendorID1 == 0x5452) && (VendorID2 == 0x4108) )
1129 { // TriTech TR28028
1130 trident_ac97_set( trident, AC97_SURROUND_MASTER, 0x0000L );
1131 trident_ac97_set( trident, AC97_EXTENDED_STATUS, 0x0000L );
1132 }
1133 else if((VendorID1 == 0x574D) &&
1134 (VendorID2 >= 0x4C00) && (VendorID2 <= 0x4C0f))
1135 { // Wolfson WM9704
1136 trident_ac97_set( trident, AC97_SURROUND_MASTER, 0x0000L );
1137 }
1138 else
1139 {
1140 #if 0
1141 printk("trident: No four Speaker Support with on board CODEC\n") ;
1142 #endif
1143 }
1144
1145 // S/PDIF C Channel bits 0-31 : 48khz, SCMS disabled
1146 outl(0x200004, TRID_REG(trident, NX_SPCSTATUS));
1147 // Enable S/PDIF out, 48khz only from ac97 fifo
1148 outb(0x28, TRID_REG(trident, NX_SPCTRL_SPCSO+3));
1149 }
1150 else
1151 {
1152 outl(0x02, TRID_REG(trident, DX_ACR2_AC97_COM_STAT));
1153 }
1154 return 0;
1155 }
1156
1157
1158 /* this only fixes the output apu mode to be later set by start_dac and
1159 company. output apu modes are set in trident_rec_setup */
1160 static void set_fmt(struct trident_state *s, unsigned char mask, unsigned char data)
1161 {
1162 s->fmt = (s->fmt & mask) | data;
1163 /* Set the chip ? */
1164 }
1165
1166
1167 /*
1168 * Native play back driver
1169 */
1170
1171 /* the mode passed should be already shifted and masked */
1172
1173 static void trident_play_setup(struct trident_state *trident, int mode, u32 rate, void *buffer, int size)
1174 {
1175 unsigned int LBA;
1176 unsigned int Delta;
1177 unsigned int ESO;
1178 unsigned int CTRL;
1179 unsigned int FMC_RVOL_CVOL;
1180 unsigned int GVSEL;
1181 unsigned int PAN;
1182 unsigned int VOL;
1183 unsigned int EC;
1184
1185
1186
1187 /* set Loop Back Address */
1188 LBA = virt_to_bus(buffer);
1189
1190 Delta = compute_rate(rate);
1191
1192 M_printk("(trident) rate, delta = %d %d\n", rate, Delta);
1193
1194 /* set ESO */
1195 ESO = size;
1196 if (mode & TRIDENT_FMT_16BIT)
1197 ESO /= 2;
1198 if (mode & TRIDENT_FMT_STEREO)
1199 ESO /= 2;
1200
1201 ESO = ESO - 1;
1202 //snd_printk("trid: ESO = %d\n", ESO);
1203
1204 /* set ctrl mode
1205 CTRL default: 8-bit (unsigned) mono, loop mode enabled
1206 */
1207 CTRL = 0x00000001;
1208 if (mode & TRIDENT_FMT_16BIT)
1209 {
1210 CTRL |= 0x00000008; // 16-bit data
1211 CTRL |= 0x00000002; // signed data
1212 }
1213 if (mode&TRIDENT_FMT_STEREO)
1214 CTRL |= 0x00000004; // stereo data
1215
1216 //FMC_RVOL_CVOL = 0x0000c000;
1217 FMC_RVOL_CVOL = 0x0000ffff;
1218 GVSEL = 1;
1219 PAN = 0;
1220 VOL = 0;
1221 EC = 0;
1222
1223 trident_write_voice_regs(trident->card,
1224 trident->dma_dac.chan[1],
1225 LBA,
1226 0, /* cso */
1227 ESO,
1228 Delta,
1229 0, /* alpha */
1230 FMC_RVOL_CVOL,
1231 GVSEL,
1232 PAN,
1233 VOL,
1234 CTRL,
1235 EC);
1236
1237 }
1238
1239 /*
1240 * Native record driver
1241 */
1242
1243 /* again, passed mode is alrady shifted/masked */
1244
1245 static void trident_rec_setup(struct trident_state *trident, int mode, u32 rate, void *buffer, int size)
1246 {
1247 unsigned int LBA;
1248 unsigned int Delta;
1249 unsigned int ESO;
1250 unsigned int CTRL;
1251 unsigned int FMC_RVOL_CVOL;
1252 unsigned int GVSEL;
1253 unsigned int PAN;
1254 unsigned int VOL;
1255 unsigned int EC;
1256 unsigned char bValue;
1257 unsigned short wValue;
1258 unsigned int dwValue;
1259 unsigned short wRecCODECSamples;
1260 unsigned int dwChanFlags;
1261 struct trident_card *card = trident->card;
1262
1263 // Enable AC-97 ADC (capture), disable capture interrupt
1264 if (trident->card->card_type != TYPE_4DWAVE_NX)
1265 {
1266 bValue = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1267 outb(bValue | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
1268 }
1269 else
1270 {
1271 wValue = inw(TRID_REG(card, T4D_MISCINT));
1272 outw(wValue | 0x1000, TRID_REG(card, T4D_MISCINT));
1273 }
1274
1275 // Initilize the channel and set channel Mode
1276 outb(0, TRID_REG(card, LEGACY_DMAR15));
1277
1278 // Set DMA channel operation mode register
1279 bValue = inb(TRID_REG(card, LEGACY_DMAR11)) & 0x03;
1280 outb(bValue | 0x54, TRID_REG(card, LEGACY_DMAR11));
1281
1282 // Set channel buffer Address
1283 LBA = virt_to_bus(buffer);
1284 outl(LBA, TRID_REG(card, LEGACY_DMAR0));
1285
1286 /* set ESO */
1287 ESO = size;
1288
1289 dwValue = inl(TRID_REG(card, LEGACY_DMAR4)) & 0xff000000;
1290 dwValue |= (ESO - 1) & 0x0000ffff;
1291 outl(dwValue, TRID_REG(card, LEGACY_DMAR4));
1292
1293 // Set channel sample rate , 4.12 format
1294 dwValue = (((unsigned int) 48000L << 12) / (unsigned long) (rate));
1295 outw((unsigned short) dwValue, TRID_REG(card, T4D_SBDELTA_DELTA_R));
1296
1297 // Set channel interrupt blk length
1298 if (mode & TRIDENT_FMT_16BIT) {
1299 wRecCODECSamples = (unsigned short) ((ESO >> 1) - 1);
1300 dwChanFlags = 0xffffb000;
1301 } else {
1302 wRecCODECSamples = (unsigned short) (ESO - 1);
1303 dwChanFlags = 0xffff1000;
1304 }
1305
1306 dwValue = ((unsigned int) wRecCODECSamples) << 16;
1307 dwValue |= (unsigned int) (wRecCODECSamples) & 0x0000ffff;
1308 outl(dwValue, TRID_REG(card, T4D_SBBL_SBCL));
1309
1310 // Right now, set format and start to run capturing,
1311 // continuous run loop enable.
1312 trident->bDMAStart = 0x19; // 0001 1001b
1313
1314 if (mode & TRIDENT_FMT_16BIT)
1315 trident->bDMAStart |= 0xa0;
1316 if (mode & TRIDENT_FMT_STEREO)
1317 trident->bDMAStart |= 0x40;
1318
1319 // Prepare capture intr channel
1320
1321 Delta = ((((unsigned int) rate) << 12) / ((unsigned long) (48000L)));
1322
1323 /* set Loop Back Address */
1324 LBA = virt_to_bus(buffer);
1325
1326 /* set ESO */
1327 ESO = size;
1328 if (mode & TRIDENT_FMT_16BIT)
1329 ESO /= 2;
1330 if (mode & TRIDENT_FMT_STEREO)
1331 ESO /= 2;
1332
1333 ESO = ESO - 1;
1334 //snd_printk("trid: ESO = %d\n", ESO);
1335
1336 /* set ctrl mode
1337 CTRL default: 8-bit (unsigned) mono, loop mode enabled
1338 */
1339 CTRL = 0x00000001;
1340 if (mode & TRIDENT_FMT_16BIT)
1341 CTRL |= 0x00000008; // 16-bit data
1342 /* XXX DO UNSIGNED XXX */
1343 //if (!(mode & SND_PCM1_MODE_U))
1344 // CTRL |= 0x00000002; // signed data
1345 if (mode& TRIDENT_FMT_STEREO)
1346 CTRL |= 0x00000004; // stereo data
1347
1348 FMC_RVOL_CVOL = 0x0000ffff;
1349 GVSEL = 1;
1350 PAN = 0xff;
1351 VOL = 0xff;
1352 EC = 0;
1353
1354 trident_write_voice_regs(card,
1355 trident->dma_adc.chan[0],
1356 LBA,
1357 0, /* cso */
1358 ESO,
1359 Delta,
1360 0, /* alpha */
1361 FMC_RVOL_CVOL,
1362 GVSEL,
1363 PAN,
1364 VOL,
1365 CTRL,
1366 EC);
1367
1368 }
1369
1370 /* Playback pointer */
1371 __inline__ unsigned int get_dmaa(struct trident_state *trident)
1372 {
1373 unsigned int cso;
1374 unsigned int eso;
1375
1376 #if 0
1377 if (!(trident->enable & ADC_RUNNING))
1378 return 0;
1379 #endif
1380
1381 outb(trident->dma_dac.chan[1], TRID_REG(trident->card, T4D_LFO_GC_CIR));
1382
1383 if (trident->card->card_type != TYPE_4DWAVE_NX)
1384 {
1385 cso = inw(TRID_REG(trident->card, CH_DX_CSO_ALPHA_FMS + 2));
1386 eso = inw(TRID_REG(trident->card, CH_DX_ESO_DELTA + 2));
1387 }
1388 else // ID_4DWAVE_NX
1389 {
1390 cso = (unsigned int) inl(TRID_REG(trident->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
1391 eso = (unsigned int) inl(TRID_REG(trident->card, CH_NX_DELTA_ESO)) & 0x00ffffff;
1392 }
1393 M_printk("(trident) get_dmaa: chip reported %d.%d\n", cso, eso);
1394 cso++;
1395
1396 if (cso > eso)
1397 cso = eso;
1398
1399 if (trident->fmt & TRIDENT_FMT_16BIT)
1400 cso *= 2;
1401 if (trident->fmt & TRIDENT_FMT_STEREO)
1402 cso *= 2;
1403 return cso;
1404 }
1405
1406 /* Record pointer */
1407 extern __inline__ unsigned get_dmac(struct trident_state *trident)
1408 {
1409 unsigned int cso;
1410
1411 if (!(trident->enable&DAC_RUNNING))
1412 return 0;
1413
1414 outb(trident->dma_adc.chan[0], TRID_REG(trident->card, T4D_LFO_GC_CIR));
1415
1416 if (trident->card->card_type != TYPE_4DWAVE_NX) {
1417 cso = inw(TRID_REG(trident->card, CH_DX_CSO_ALPHA_FMS + 2));
1418 } else { // ID_4DWAVE_NX
1419 cso = (unsigned int) inl(TRID_REG(trident->card, CH_NX_DELTA_CSO)) & 0x00ffffff;
1420 }
1421
1422 printk("(trident) get_dmac: chip reported %d\n", cso);
1423
1424 cso++;
1425
1426 if (trident->fmt & TRIDENT_FMT_16BIT)
1427 cso *= 2;
1428 if (trident->fmt & TRIDENT_FMT_STEREO)
1429 cso *= 2;
1430 return cso;
1431 }
1432
1433 static void trident_interrupt(int irq, void *dev_id, struct pt_regs *regs);
1434
1435 static void trident_kick(unsigned long plop)
1436 {
1437 trident_interrupt(5, (void *)plop, NULL);
1438 debug_timer.expires=jiffies+1;
1439 add_timer(&debug_timer);
1440 }
1441
1442 /* Stop recording (lock held) */
1443
1444 extern inline void __stop_adc(struct trident_state *s)
1445 {
1446 struct trident_card *trident = s->card;
1447
1448 M_printk("(trident) stopping ADC\n");
1449
1450
1451 s->enable &= ~ADC_RUNNING;
1452 trident_disable_voice_irq(trident, s->dma_adc.chan[0]);
1453 outb(0x00, TRID_REG(trident, T4D_SBCTRL_SBE2R_SBDD));
1454 trident_disable_voice_irq(trident, s->dma_adc.chan[0]);
1455 trident_stop_voice(trident, s->dma_adc.chan[0]);
1456 ResetAinten(trident, s->dma_adc.chan[0]);
1457 }
1458
1459 extern inline void stop_adc(struct trident_state *s)
1460 {
1461 unsigned long flags;
1462 struct trident_card *trident = s->card;
1463
1464 spin_lock_irqsave(&trident->lock, flags);
1465 __stop_adc(s);
1466 spin_unlock_irqrestore(&trident->lock, flags);
1467 }
1468
1469 /* stop playback (lock held) */
1470
1471 extern inline void __stop_dac(struct trident_state *s)
1472 {
1473 struct trident_card *trident = s->card;
1474
1475 M_printk("(trident) stopping DAC\n");
1476
1477 //trident_stop_voice(trident, s->dma_dac.chan[0]);
1478 //trident_disable_voice_irq(trident, s->dma_dac.chan[0]);
1479 trident_stop_voice(trident, s->dma_dac.chan[1]);
1480 trident_disable_voice_irq(trident, s->dma_dac.chan[1]);
1481 s->enable &= ~DAC_RUNNING;
1482 }
1483
1484 extern inline void stop_dac(struct trident_state *s)
1485 {
1486 struct trident_card *trident = s->card;
1487 unsigned long flags;
1488
1489 spin_lock_irqsave(&trident->lock, flags);
1490 __stop_dac(s);
1491 spin_unlock_irqrestore(&trident->lock, flags);
1492 }
1493
1494 static void start_dac(struct trident_state *s)
1495 {
1496 unsigned long flags;
1497 struct trident_card *trident = s->card;
1498
1499 spin_lock_irqsave(&s->card->lock, flags);
1500 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready)
1501 {
1502 s->enable |= DAC_RUNNING;
1503 trident_enable_voice_irq(trident, s->dma_dac.chan[1]);
1504 trident_start_voice(trident, s->dma_dac.chan[1]);
1505 //trident_start_voice(trident, s->dma_dac.chan[0]);
1506 M_printk("(trident) starting DAC\n");
1507
1508 }
1509 spin_unlock_irqrestore(&s->card->lock, flags);
1510 }
1511
1512 static void start_adc(struct trident_state *s)
1513 {
1514 unsigned long flags;
1515
1516 spin_lock_irqsave(&s->card->lock, flags);
1517 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
1518 && s->dma_adc.ready) {
1519 s->enable |= ADC_RUNNING;
1520 trident_enable_voice_irq(s->card, s->dma_adc.chan[0]);
1521 outb(s->bDMAStart, TRID_REG(s->card, T4D_SBCTRL_SBE2R_SBDD));
1522 trident_start_voice(s->card, s->dma_adc.chan[0]);
1523 M_printk("(trident) starting ADC\n");
1524
1525 }
1526 spin_unlock_irqrestore(&s->card->lock, flags);
1527 }
1528
1529 /* --------------------------------------------------------------------- */
1530
1531 /* we allocate both buffers at once */
1532 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
1533 #define DMABUF_MINORDER 2
1534
1535 static void dealloc_dmabuf(struct dmabuf *db)
1536 {
1537 unsigned long map, mapend;
1538
1539 if (db->rawbuf)
1540 {
1541 M_printk("(trident) freeing %p\n",db->rawbuf);
1542 /* undo marking the pages as reserved */
1543 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
1544 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
1545 clear_bit(PG_reserved, &mem_map[map].flags);
1546 free_pages((unsigned long)db->rawbuf, db->buforder);
1547 }
1548 db->rawbuf = NULL;
1549 db->mapped = db->ready = 0;
1550 }
1551
1552 static int prog_dmabuf(struct trident_state *s, unsigned rec)
1553 {
1554 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
1555 unsigned rate = rec ? s->rateadc : s->ratedac;
1556 int order;
1557 unsigned bytepersec;
1558 unsigned bufs;
1559 unsigned long map, mapend;
1560 unsigned char fmt;
1561 unsigned long flags;
1562
1563 spin_lock_irqsave(&s->card->lock, flags);
1564 fmt = s->fmt;
1565 if (rec) {
1566 s->enable &= ~TRIDENT_ENABLE_RE;
1567 fmt >>= TRIDENT_ADC_SHIFT;
1568 } else {
1569 s->enable &= ~TRIDENT_ENABLE_PE;
1570 fmt >>= TRIDENT_DAC_SHIFT;
1571 }
1572 spin_unlock_irqrestore(&s->card->lock, flags);
1573 fmt &= TRIDENT_FMT_MASK;
1574
1575 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
1576
1577 if (!db->rawbuf) {
1578 void *rawbuf;
1579 /* haha, this thing is hacked to hell and back.
1580 this is so ugly. */
1581 s->dma_dac.ready = s->dma_dac.mapped = 0;
1582 s->dma_adc.ready = s->dma_adc.mapped = 0;
1583
1584 /* alloc as big a chunk as we can */
1585 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
1586 if((rawbuf = (void *)__get_free_pages(GFP_KERNEL|GFP_DMA, order)))
1587
1588 break;
1589
1590 if (!rawbuf)
1591 return -ENOMEM;
1592
1593
1594 /* we allocated both buffers */
1595 s->dma_adc.rawbuf = rawbuf;
1596 s->dma_dac.rawbuf = rawbuf + ( PAGE_SIZE << (order - 1) );
1597
1598 M_printk("(trident) allocated %ld bytes at %p\n",PAGE_SIZE<<order, db->rawbuf);
1599
1600 s->dma_adc.buforder = s->dma_dac.buforder = order - 1;
1601
1602 /* XXX these checks are silly now */
1603 #if 0
1604 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << order) - 1)) & ~0xffff)
1605 printk(KERN_DEBUG "trident: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
1606 virt_to_bus(db->rawbuf), PAGE_SIZE << order);
1607
1608 #endif
1609 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << order) - 1) & ~0xffffff)
1610 M_printk(KERN_DEBUG "(trident) DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
1611 virt_to_bus(db->rawbuf), PAGE_SIZE << order);
1612
1613 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
1614 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << order) - 1);
1615 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
1616 set_bit(PG_reserved, &mem_map[map].flags);
1617 }
1618 bytepersec = rate << sample_shift[fmt];
1619 bufs = PAGE_SIZE << db->buforder;
1620 if (db->ossfragshift) {
1621 if ((1000 << db->ossfragshift) < bytepersec)
1622 db->fragshift = ld2(bytepersec/1000);
1623 else
1624 db->fragshift = db->ossfragshift;
1625 } else {
1626 /* lets hand out reasonable big ass buffers by default */
1627 db->fragshift = (db->buforder + PAGE_SHIFT -2);
1628 #if 0
1629 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
1630 if (db->fragshift < 3)
1631 db->fragshift = 3;
1632 #endif
1633 }
1634 db->numfrag = bufs >> db->fragshift;
1635 while (db->numfrag < 4 && db->fragshift > 3) {
1636 db->fragshift--;
1637 db->numfrag = bufs >> db->fragshift;
1638 }
1639 db->fragsize = 1 << db->fragshift;
1640 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
1641 db->numfrag = db->ossmaxfrags;
1642 db->fragsamples = db->fragsize >> sample_shift[fmt];
1643 db->dmasize = db->numfrag << db->fragshift;
1644
1645 memset(db->rawbuf, (fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80, db->dmasize);
1646
1647 spin_lock_irqsave(&s->card->lock, flags);
1648 if (rec) {
1649 trident_rec_setup(s, fmt, s->rateadc,
1650 db->rawbuf, db->numfrag << db->fragshift);
1651 } else {
1652 trident_play_setup(s, fmt, s->ratedac,
1653 db->rawbuf, db->numfrag << db->fragshift);
1654 }
1655 spin_unlock_irqrestore(&s->card->lock, flags);
1656 db->ready = 1;
1657
1658 return 0;
1659 }
1660
1661 /* only called by trident_write */
1662
1663 extern __inline__ void clear_advance(struct trident_state *s)
1664 {
1665 unsigned char c = ((s->fmt >> TRIDENT_DAC_SHIFT) & TRIDENT_FMT_16BIT) ? 0 : 0x80;
1666 unsigned char *buf = s->dma_dac.rawbuf;
1667 unsigned bsize = s->dma_dac.dmasize;
1668 unsigned bptr = s->dma_dac.swptr;
1669 unsigned len = s->dma_dac.fragsize;
1670
1671 if (bptr + len > bsize) {
1672 unsigned x = bsize - bptr;
1673 memset(buf + bptr, c, x);
1674 /* account for wrapping? */
1675 bptr = 0;
1676 len -= x;
1677 }
1678 memset(buf + bptr, c, len);
1679 }
1680
1681 /* call with spinlock held! */
1682 static void trident_update_ptr(struct trident_state *s)
1683 {
1684 unsigned hwptr;
1685 int diff;
1686
1687 /* update ADC pointer */
1688 if (s->dma_adc.ready) {
1689 hwptr = get_dmac(s) % s->dma_adc.dmasize;
1690 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
1691 s->dma_adc.hwptr = hwptr;
1692 s->dma_adc.total_bytes += diff;
1693 s->dma_adc.count += diff;
1694 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1695 wake_up(&s->dma_adc.wait);
1696 if (!s->dma_adc.mapped) {
1697 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1698 s->enable &= ~TRIDENT_ENABLE_RE;
1699 __stop_adc(s);
1700 s->dma_adc.error++;
1701 }
1702 }
1703 }
1704 /* update DAC pointer */
1705 if (s->dma_dac.ready)
1706 {
1707 /* this is so gross. */
1708 hwptr = (/*s->dma_dac.dmasize -*/ get_dmaa(s)) % s->dma_dac.dmasize;
1709 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
1710 M_printk("(trident) updating dac: hwptr: %d diff: %d\n",hwptr,diff);
1711 s->dma_dac.hwptr = hwptr;
1712 s->dma_dac.total_bytes += diff;
1713 if (s->dma_dac.mapped)
1714 {
1715 s->dma_dac.count += diff;
1716 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1717 wake_up(&s->dma_dac.wait);
1718 }
1719 else
1720 {
1721 s->dma_dac.count -= diff;
1722 M_printk("(trident) trident_update_ptr: diff: %d, count: %d\n", diff, s->dma_dac.count);
1723 if (s->dma_dac.count <= 0)
1724 {
1725 s->enable &= ~TRIDENT_ENABLE_PE;
1726 /* Lock already held */
1727 __stop_dac(s);
1728 /* brute force everyone back in sync, sigh */
1729 s->dma_dac.count = 0;
1730 s->dma_dac.swptr = 0;
1731 s->dma_dac.hwptr = 0;
1732 s->dma_dac.error++;
1733 }
1734 else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize &&
1735 !s->dma_dac.endcleared)
1736 {
1737 clear_advance(s);
1738 s->dma_dac.endcleared = 1;
1739 }
1740
1741 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
1742 wake_up(&s->dma_dac.wait);
1743 }
1744 }
1745 }
1746
1747 /*
1748 * Trident interrupt handlers.
1749 */
1750
1751 static void trident_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1752 {
1753 struct trident_state *s;
1754 struct trident_card *c = (struct trident_card *)dev_id;
1755 int i;
1756 u32 event;
1757
1758 spin_lock(&c->lock);
1759
1760 event = inl(TRID_REG(c, T4D_MISCINT));
1761
1762 // if(event & 0x28)
1763 // printk("IRQ %04X (%08lX, %08lX)\n", event, c->iobase, TRID_REG(c, T4D_MISCINT));
1764
1765 if(event & 8)
1766 {
1767 /* Midi - TODO */
1768 }
1769
1770 if(event & 0x20)
1771 {
1772 /*
1773 * Update the pointers for all channels we are running.
1774 */
1775
1776 for(i=0;i<NR_DSPS;i++)
1777 {
1778 s=&c->channels[i];
1779 if(DidChannelInterrupt(c, i))
1780 {
1781 AckChannelInterrupt(c,i);
1782 if(s->dev_audio != -1)
1783 trident_update_ptr(s);
1784 else
1785 {
1786 /* Spurious ? */
1787 M_printk("(trident) spurious channel irq %d.\n", i);
1788 trident_stop_voice(c, i);
1789 trident_disable_voice_irq(c,i);
1790 }
1791 }
1792 }
1793
1794 }
1795 spin_unlock(&c->lock);
1796 }
1797
1798
1799 /* --------------------------------------------------------------------- */
1800
1801 static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n";
1802
1803 #define VALIDATE_MAGIC(FOO,MAG) \
1804 ({ \
1805 if (!(FOO) || (FOO)->magic != MAG) { \
1806 printk(invalid_magic,__FUNCTION__); \
1807 return -ENXIO; \
1808 } \
1809 })
1810
1811 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,TRIDENT_STATE_MAGIC)
1812 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,TRIDENT_CARD_MAGIC)
1813
1814 static void set_mixer(struct trident_card *card,unsigned int mixer, unsigned int val )
1815 {
1816 unsigned int left,right;
1817 /* cleanse input a little */
1818 right = ((val >> 8) & 0xff) ;
1819 left = (val & 0xff) ;
1820
1821 if(right > 100) right = 100;
1822 if(left > 100) left = 100;
1823
1824 card->mix.mixer_state[mixer]=(right << 8) | left;
1825 card->mix.write_mixer(card,mixer,left,right);
1826 }
1827
1828 static int mixer_ioctl(struct trident_card *card, unsigned int cmd, unsigned long arg)
1829 {
1830 unsigned long flags;
1831 int i, val=0;
1832
1833 VALIDATE_CARD(card);
1834 if (cmd == SOUND_MIXER_INFO) {
1835 mixer_info info;
1836 strncpy(info.id, card_names[card->card_type], sizeof(info.id));
1837 strncpy(info.name,card_names[card->card_type],sizeof(info.name));
1838 info.modify_counter = card->mix.modcnt;
1839 if (copy_to_user((void *)arg, &info, sizeof(info)))
1840 return -EFAULT;
1841 return 0;
1842 }
1843 if (cmd == SOUND_OLD_MIXER_INFO) {
1844 _old_mixer_info info;
1845 strncpy(info.id, card_names[card->card_type], sizeof(info.id));
1846 strncpy(info.name,card_names[card->card_type],sizeof(info.name));
1847 if (copy_to_user((void *)arg, &info, sizeof(info)))
1848 return -EFAULT;
1849 return 0;
1850 }
1851 if (cmd == OSS_GETVERSION)
1852 return put_user(SOUND_VERSION, (int *)arg);
1853
1854 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1855 return -EINVAL;
1856
1857 if (_IOC_DIR(cmd) == _IOC_READ) {
1858 switch (_IOC_NR(cmd)) {
1859 case SOUND_MIXER_RECSRC: /* give them the current record source */
1860
1861 if(!card->mix.recmask_io) {
1862 val = 0;
1863 } else {
1864 spin_lock_irqsave(&card->lock, flags);
1865 val = card->mix.recmask_io(card,1,0);
1866 spin_unlock_irqrestore(&card->lock, flags);
1867 }
1868 break;
1869
1870 case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
1871 val = card->mix.supported_mixers;
1872 break;
1873
1874 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1875 val = card->mix.record_sources;
1876 break;
1877
1878 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1879 val = card->mix.stereo_mixers;
1880 break;
1881
1882 case SOUND_MIXER_CAPS:
1883 val = SOUND_CAP_EXCL_INPUT;
1884 break;
1885
1886 default: /* read a specific mixer */
1887 i = _IOC_NR(cmd);
1888
1889 if ( ! supported_mixer(card,i))
1890 return -EINVAL;
1891
1892 /* do we ever want to touch the hardware? */
1893 /* spin_lock_irqsave(&s->lock, flags);
1894 val = card->mix.read_mixer(card,i);
1895 spin_unlock_irqrestore(&s->lock, flags);*/
1896
1897 val = card->mix.mixer_state[i];
1898 /* printk("returned 0x%x for mixer %d\n",val,i);*/
1899
1900 break;
1901 }
1902 return put_user(val,(int *)arg);
1903 }
1904
1905 if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ))
1906 return -EINVAL;
1907
1908 card->mix.modcnt++;
1909
1910 get_user_ret(val, (int *)arg, -EFAULT);
1911
1912 switch (_IOC_NR(cmd)) {
1913 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1914
1915 if (!card->mix.recmask_io) return -EINVAL;
1916 if(! (val &= card->mix.record_sources)) return -EINVAL;
1917
1918 spin_lock_irqsave(&card->lock, flags);
1919 card->mix.recmask_io(card,0,val);
1920 spin_unlock_irqrestore(&card->lock, flags);
1921 return 0;
1922
1923 default:
1924 i = _IOC_NR(cmd);
1925
1926 if ( ! supported_mixer(card,i))
1927 return -EINVAL;
1928
1929 spin_lock_irqsave(&card->lock, flags);
1930 set_mixer(card,i,val);
1931 spin_unlock_irqrestore(&card->lock, flags);
1932
1933 return 0;
1934 }
1935 }
1936
1937 /* --------------------------------------------------------------------- */
1938
1939 static loff_t trident_llseek(struct file *file, loff_t offset, int origin)
1940 {
1941 return -ESPIPE;
1942 }
1943
1944 /* --------------------------------------------------------------------- */
1945
1946 static int trident_open_mixdev(struct inode *inode, struct file *file)
1947 {
1948 int minor = MINOR(inode->i_rdev);
1949 struct trident_card *card = devs;
1950
1951 while (card && card->dev_mixer != minor)
1952 card = card->next;
1953 if (!card)
1954 return -ENODEV;
1955
1956 file->private_data = card;
1957 //FIXME put back in
1958 //MOD_INC_USE_COUNT;
1959 return 0;
1960 }
1961
1962 static int trident_release_mixdev(struct inode *inode, struct file *file)
1963 {
1964 struct trident_card *card = (struct trident_card *)file->private_data;
1965
1966 VALIDATE_CARD(card);
1967
1968 //FIXME put back in
1969 //MOD_DEC_USE_COUNT;
1970 return 0;
1971 }
1972
1973 static int trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1974 {
1975 struct trident_card *card = (struct trident_card *)file->private_data;
1976
1977 VALIDATE_CARD(card);
1978
1979 return mixer_ioctl(card, cmd, arg);
1980 }
1981
1982 static /*const*/ struct file_operations trident_mixer_fops = {
1983 &trident_llseek,
1984 NULL, /* read */
1985 NULL, /* write */
1986 NULL, /* readdir */
1987 NULL, /* poll */
1988 &trident_ioctl_mixdev,
1989 NULL, /* mmap */
1990 &trident_open_mixdev,
1991 NULL, /* flush */
1992 &trident_release_mixdev,
1993 NULL, /* fsync */
1994 NULL, /* fasync */
1995 NULL, /* check_media_change */
1996 NULL, /* revalidate */
1997 NULL, /* lock */
1998 };
1999
2000 /* --------------------------------------------------------------------- */
2001
2002 static int drain_dac(struct trident_state *s, int nonblock)
2003 {
2004 DECLARE_WAITQUEUE(wait, current);
2005 unsigned long flags;
2006 int count;
2007 signed long tmo;
2008
2009 if (s->dma_dac.mapped || !s->dma_dac.ready)
2010 return 0;
2011 current->state = TASK_INTERRUPTIBLE;
2012 add_wait_queue(&s->dma_dac.wait, &wait);
2013
2014 for (;;)
2015 {
2016 spin_lock_irqsave(&s->card->lock, flags);
2017 count = s->dma_dac.count;
2018 spin_unlock_irqrestore(&s->card->lock, flags);
2019
2020 if (count <= 0)
2021 break;
2022
2023 if (signal_pending(current))
2024 break;
2025
2026 if (nonblock)
2027 {
2028 remove_wait_queue(&s->dma_dac.wait, &wait);
2029 current->state = TASK_RUNNING;
2030 return -EBUSY;
2031 }
2032
2033 tmo = (count * HZ) / s->ratedac;
2034 tmo >>= sample_shift[(s->fmt >> TRIDENT_DAC_SHIFT) & TRIDENT_FMT_MASK];
2035
2036 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
2037 or something. who cares. - zach */
2038 if (!schedule_timeout(tmo ? tmo : 1) && tmo)
2039 printk(KERN_DEBUG "trident: dma timed out?? %ld\n",jiffies);
2040 }
2041 remove_wait_queue(&s->dma_dac.wait, &wait);
2042 current->state = TASK_RUNNING;
2043 if (signal_pending(current))
2044 return -ERESTARTSYS;
2045 return 0;
2046 }
2047
2048 /* --------------------------------------------------------------------- */
2049
2050 /* in this loop, dma_adc.count signifies the amount of data thats waiting
2051 to be copied to the user's buffer. it is filled by the interrupt
2052 handler and drained by this loop. */
2053 static ssize_t trident_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2054 {
2055 struct trident_state *s = (struct trident_state *)file->private_data;
2056 ssize_t ret;
2057 unsigned long flags;
2058 unsigned swptr;
2059 int cnt;
2060
2061 VALIDATE_STATE(s);
2062 if (ppos != &file->f_pos)
2063 return -ESPIPE;
2064 if (s->dma_adc.mapped)
2065 return -ENXIO;
2066 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2067 return ret;
2068 if (!access_ok(VERIFY_WRITE, buffer, count))
2069 return -EFAULT;
2070 ret = 0;
2071
2072 while (count > 0) {
2073 spin_lock_irqsave(&s->card->lock, flags);
2074 /* remember, all these things are expressed in bytes to be
2075 sent to the user.. hence the evil / 2 down below */
2076 swptr = s->dma_adc.swptr;
2077 cnt = s->dma_adc.dmasize-swptr;
2078 if (s->dma_adc.count < cnt)
2079 cnt = s->dma_adc.count;
2080 spin_unlock_irqrestore(&s->card->lock, flags);
2081
2082 if (cnt > count)
2083 cnt = count;
2084
2085 if (cnt <= 0) {
2086 start_adc(s);
2087 if (file->f_flags & O_NONBLOCK)
2088 {
2089 ret = ret ? ret : -EAGAIN;
2090 return ret;
2091 }
2092 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
2093 M_printk(KERN_DEBUG "(trident) read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2094 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
2095 s->dma_adc.hwptr, s->dma_adc.swptr);
2096 stop_adc(s);
2097 spin_lock_irqsave(&s->card->lock, flags);
2098 // set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
2099 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
2100 spin_unlock_irqrestore(&s->card->lock, flags);
2101 }
2102 if (signal_pending(current))
2103 {
2104 ret = ret ? ret : -ERESTARTSYS;
2105 return ret;
2106 }
2107 continue;
2108 }
2109
2110 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
2111 ret = ret ? ret : -EFAULT;
2112 return ret;
2113 }
2114
2115 swptr = (swptr + cnt) % s->dma_adc.dmasize;
2116 spin_lock_irqsave(&s->card->lock, flags);
2117 s->dma_adc.swptr = swptr;
2118 s->dma_adc.count -= cnt;
2119 spin_unlock_irqrestore(&s->card->lock, flags);
2120 count -= cnt;
2121 buffer += cnt;
2122 ret += cnt;
2123 start_adc(s);
2124 }
2125
2126 return ret;
2127 }
2128
2129 static ssize_t trident_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2130 {
2131 struct trident_state *s = (struct trident_state *)file->private_data;
2132 ssize_t ret;
2133 unsigned long flags;
2134 unsigned swptr;
2135 int cnt;
2136 int mode = (s->fmt >> TRIDENT_DAC_SHIFT) & TRIDENT_FMT_MASK;
2137
2138 M_printk("(trident) trident_write: count %d\n", count);
2139
2140 VALIDATE_STATE(s);
2141 if (ppos != &file->f_pos)
2142 return -ESPIPE;
2143 if (s->dma_dac.mapped)
2144 return -ENXIO;
2145 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2146 return ret;
2147 if (!access_ok(VERIFY_READ, buffer, count))
2148 return -EFAULT;
2149 ret = 0;
2150
2151 while (count > 0) {
2152 spin_lock_irqsave(&s->card->lock, flags);
2153
2154 if (s->dma_dac.count < 0)
2155 {
2156 s->dma_dac.count = 0;
2157 s->dma_dac.swptr = s->dma_dac.hwptr;
2158 }
2159 swptr = s->dma_dac.swptr;
2160
2161 cnt = s->dma_dac.dmasize-swptr;
2162
2163 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
2164 cnt = s->dma_dac.dmasize - s->dma_dac.count;
2165
2166 spin_unlock_irqrestore(&s->card->lock, flags);
2167
2168 if (cnt > count)
2169 cnt = count;
2170
2171 if (cnt <= 0)
2172 {
2173 /* buffer is full, wait for it to be played */
2174 start_dac(s);
2175 if (file->f_flags & O_NONBLOCK)
2176 {
2177 if(!ret) ret = -EAGAIN;
2178 return ret;
2179 }
2180 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ))
2181 {
2182 M_printk(KERN_DEBUG
2183 "trident: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
2184 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count, s->dma_dac.hwptr,
2185 s->dma_dac.swptr);
2186 stop_dac(s);
2187 spin_lock_irqsave(&s->card->lock, flags);
2188 // set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
2189 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
2190 spin_unlock_irqrestore(&s->card->lock, flags);
2191 }
2192 if (signal_pending(current))
2193 {
2194 if (!ret) ret = -ERESTARTSYS;
2195 return ret;
2196 }
2197 continue;
2198 }
2199 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
2200 {
2201 if (!ret)
2202 ret = -EFAULT;
2203 return ret;
2204 }
2205
2206 swptr = (swptr + cnt) % s->dma_dac.dmasize;
2207
2208 spin_lock_irqsave(&s->card->lock, flags);
2209 s->dma_dac.swptr = swptr;
2210 s->dma_dac.count += cnt;
2211 s->dma_dac.endcleared = 0;
2212 spin_unlock_irqrestore(&s->card->lock, flags);
2213 count -= cnt;
2214 buffer += cnt;
2215 ret += cnt;
2216 start_dac(s);
2217 }
2218 return ret;
2219 }
2220
2221 static unsigned int trident_poll(struct file *file, struct poll_table_struct *wait)
2222 {
2223 struct trident_state *s = (struct trident_state *)file->private_data;
2224 unsigned long flags;
2225 unsigned int mask = 0;
2226
2227 VALIDATE_STATE(s);
2228 if (file->f_mode & FMODE_WRITE)
2229 poll_wait(file, &s->dma_dac.wait, wait);
2230 if (file->f_mode & FMODE_READ)
2231 poll_wait(file, &s->dma_adc.wait, wait);
2232 spin_lock_irqsave(&s->card->lock, flags);
2233 trident_update_ptr(s);
2234 if (file->f_mode & FMODE_READ) {
2235 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
2236 mask |= POLLIN | POLLRDNORM;
2237 }
2238 if (file->f_mode & FMODE_WRITE) {
2239 if (s->dma_dac.mapped) {
2240 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
2241 mask |= POLLOUT | POLLWRNORM;
2242 } else {
2243 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
2244 mask |= POLLOUT | POLLWRNORM;
2245 }
2246 }
2247 spin_unlock_irqrestore(&s->card->lock, flags);
2248 return mask;
2249 }
2250
2251 /* this needs to be fixed to deal with the dual apus/buffers */
2252 #if 0
2253 static int trident_mmap(struct file *file, struct vm_area_struct *vma)
2254 {
2255 struct trident_state *s = (struct trident_state *)file->private_data;
2256 struct dmabuf *db;
2257 int ret;
2258 unsigned long size;
2259
2260 VALIDATE_STATE(s);
2261 if (vma->vm_flags & VM_WRITE) {
2262 if ((ret = prog_dmabuf(s, 1)) != 0)
2263 return ret;
2264 db = &s->dma_dac;
2265 } else if (vma->vm_flags & VM_READ) {
2266 if ((ret = prog_dmabuf(s, 0)) != 0)
2267 return ret;
2268 db = &s->dma_adc;
2269 } else
2270 return -EINVAL;
2271 if (vma->vm_offset != 0)
2272 return -EINVAL;
2273 size = vma->vm_end - vma->vm_start;
2274 if (size > (PAGE_SIZE << db->buforder))
2275 return -EINVAL;
2276 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
2277 return -EAGAIN;
2278 db->mapped = 1;
2279 return 0;
2280 }
2281 #endif
2282
2283 static int trident_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2284 {
2285 struct trident_state *s = (struct trident_state *)file->private_data;
2286 unsigned long flags;
2287 audio_buf_info abinfo;
2288 count_info cinfo;
2289 int val, mapped, ret;
2290 unsigned char fmtm, fmtd;
2291
2292 /* printk("trident: trident_ioctl: cmd %d\n", cmd);*/
2293
2294 VALIDATE_STATE(s);
2295 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
2296 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
2297
2298 switch (cmd)
2299 {
2300 case OSS_GETVERSION:
2301 return put_user(SOUND_VERSION, (int *)arg);
2302
2303 case SNDCTL_DSP_SYNC:
2304 if (file->f_mode & FMODE_WRITE)
2305 return drain_dac(s, file->f_flags & O_NONBLOCK);
2306 return 0;
2307
2308 case SNDCTL_DSP_SETDUPLEX:
2309 /* XXX fix */
2310 return 0;
2311
2312 case SNDCTL_DSP_GETCAPS:
2313 return put_user(0/*DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP*/, (int *)arg);
2314
2315 case SNDCTL_DSP_RESET:
2316 if (file->f_mode & FMODE_WRITE)
2317 {
2318 stop_dac(s);
2319 synchronize_irq();
2320 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
2321 }
2322 if (file->f_mode & FMODE_READ)
2323 {
2324 stop_adc(s);
2325 synchronize_irq();
2326 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
2327 }
2328 return 0;
2329
2330 case SNDCTL_DSP_SPEED:
2331 get_user_ret(val, (int *)arg, -EFAULT);
2332 if (val >= 0)
2333 {
2334 if (file->f_mode & FMODE_READ)
2335 {
2336 stop_adc(s);
2337 s->dma_adc.ready = 0;
2338 trident_set_adc_rate(s, val, 1);
2339 }
2340 if (file->f_mode & FMODE_WRITE)
2341 {
2342 stop_dac(s);
2343 s->dma_dac.ready = 0;
2344 trident_set_dac_rate(s, val, 1);
2345 }
2346 }
2347 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2348
2349 case SNDCTL_DSP_STEREO:
2350 get_user_ret(val, (int *)arg, -EFAULT);
2351 fmtd = 0;
2352 fmtm = ~0;
2353 if (file->f_mode & FMODE_READ)
2354 {
2355 stop_adc(s);
2356 s->dma_adc.ready = 0;
2357 if (val)
2358 fmtd |= TRIDENT_FMT_STEREO << TRIDENT_ADC_SHIFT;
2359 else
2360 fmtm &= ~(TRIDENT_FMT_STEREO << TRIDENT_ADC_SHIFT);
2361 }
2362 if (file->f_mode & FMODE_WRITE)
2363 {
2364 stop_dac(s);
2365 s->dma_dac.ready = 0;
2366 if (val)
2367 fmtd |= TRIDENT_FMT_STEREO << TRIDENT_DAC_SHIFT;
2368 else
2369 fmtm &= ~(TRIDENT_FMT_STEREO << TRIDENT_DAC_SHIFT);
2370 }
2371 set_fmt(s, fmtm, fmtd);
2372
2373 return 0;
2374
2375 case SNDCTL_DSP_CHANNELS:
2376 get_user_ret(val, (int *)arg, -EFAULT);
2377 if (val != 0)
2378 {
2379 fmtd = 0;
2380 fmtm = ~0;
2381
2382 if (file->f_mode & FMODE_READ)
2383 {
2384 stop_adc(s);
2385 s->dma_adc.ready = 0;
2386 if (val >= 2)
2387 fmtd |= TRIDENT_FMT_STEREO << TRIDENT_ADC_SHIFT;
2388 else
2389 fmtm &= ~(TRIDENT_FMT_STEREO << TRIDENT_ADC_SHIFT);
2390 }
2391
2392 if (file->f_mode & FMODE_WRITE)
2393 {
2394 stop_dac(s);
2395 s->dma_dac.ready = 0;
2396 if (val >= 2)
2397 fmtd |= TRIDENT_FMT_STEREO << TRIDENT_DAC_SHIFT;
2398 else
2399 fmtm &= ~(TRIDENT_FMT_STEREO << TRIDENT_DAC_SHIFT);
2400 }
2401 set_fmt(s, fmtm, fmtd);
2402 }
2403 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2404 (TRIDENT_FMT_STEREO << TRIDENT_ADC_SHIFT) :
2405 (TRIDENT_FMT_STEREO << TRIDENT_DAC_SHIFT))) ? 2 : 1, (int *)arg);
2406
2407 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2408 return put_user(AFMT_S8|AFMT_S16_LE, (int *)arg);
2409
2410 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2411 get_user_ret(val, (int *)arg, -EFAULT);
2412 if (val != AFMT_QUERY)
2413 {
2414 fmtd = 0;
2415 fmtm = ~0;
2416 if (file->f_mode & FMODE_READ)
2417 {
2418 stop_adc(s);
2419 s->dma_adc.ready = 0;
2420 /* fixed at 16bit for now */
2421 fmtd |= TRIDENT_FMT_16BIT << TRIDENT_ADC_SHIFT;
2422 #if 0
2423 if (val == AFMT_S16_LE)
2424 fmtd |= TRIDENT_FMT_16BIT << TRIDENT_ADC_SHIFT;
2425 else
2426 fmtm &= ~(TRIDENT_FMT_16BIT << TRIDENT_ADC_SHIFT);
2427 #endif
2428 }
2429 if (file->f_mode & FMODE_WRITE)
2430 {
2431 stop_dac(s);
2432 s->dma_dac.ready = 0;
2433 if (val == AFMT_S16_LE)
2434 fmtd |= TRIDENT_FMT_16BIT << TRIDENT_DAC_SHIFT;
2435 else
2436 fmtm &= ~(TRIDENT_FMT_16BIT << TRIDENT_DAC_SHIFT);
2437 }
2438 set_fmt(s, fmtm, fmtd);
2439 }
2440 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2441 (TRIDENT_FMT_16BIT << TRIDENT_ADC_SHIFT) :
2442 (TRIDENT_FMT_16BIT << TRIDENT_DAC_SHIFT))) ?
2443 AFMT_S16_LE : AFMT_S8, (int *)arg);
2444
2445 case SNDCTL_DSP_POST:
2446 return 0;
2447
2448 case SNDCTL_DSP_GETTRIGGER:
2449 val = 0;
2450 if (file->f_mode & FMODE_READ && s->enable & TRIDENT_ENABLE_RE)
2451 val |= PCM_ENABLE_INPUT;
2452 if (file->f_mode & FMODE_WRITE && s->enable & TRIDENT_ENABLE_PE)
2453 val |= PCM_ENABLE_OUTPUT;
2454 return put_user(val, (int *)arg);
2455
2456 case SNDCTL_DSP_SETTRIGGER:
2457 get_user_ret(val, (int *)arg, -EFAULT);
2458 if (file->f_mode & FMODE_READ)
2459 {
2460 if (val & PCM_ENABLE_INPUT)
2461 {
2462 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
2463 return ret;
2464 start_adc(s);
2465 }
2466 else
2467 stop_adc(s);
2468 }
2469 if (file->f_mode & FMODE_WRITE)
2470 {
2471 if (val & PCM_ENABLE_OUTPUT)
2472 {
2473 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
2474 return ret;
2475 start_dac(s);
2476 }
2477 else
2478 stop_dac(s);
2479 }
2480 return 0;
2481
2482 case SNDCTL_DSP_GETOSPACE:
2483 if (!(file->f_mode & FMODE_WRITE))
2484 return -EINVAL;
2485 if (!(s->enable & TRIDENT_ENABLE_PE) && (val = prog_dmabuf(s, 0)) != 0)
2486 return val;
2487 spin_lock_irqsave(&s->card->lock, flags);
2488 trident_update_ptr(s);
2489 abinfo.fragsize = s->dma_dac.fragsize;
2490 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
2491 abinfo.fragstotal = s->dma_dac.numfrag;
2492 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
2493 spin_unlock_irqrestore(&s->card->lock, flags);
2494 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2495
2496 case SNDCTL_DSP_GETISPACE:
2497 if (!(file->f_mode & FMODE_READ))
2498 return -EINVAL;
2499 if (!(s->enable & TRIDENT_ENABLE_RE) && (val = prog_dmabuf(s, 1)) != 0)
2500 return val;
2501 spin_lock_irqsave(&s->card->lock, flags);
2502 trident_update_ptr(s);
2503 abinfo.fragsize = s->dma_adc.fragsize;
2504 abinfo.bytes = s->dma_adc.count;
2505 abinfo.fragstotal = s->dma_adc.numfrag;
2506 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
2507 spin_unlock_irqrestore(&s->card->lock, flags);
2508 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2509
2510 case SNDCTL_DSP_NONBLOCK:
2511 file->f_flags |= O_NONBLOCK;
2512 return 0;
2513
2514 case SNDCTL_DSP_GETODELAY:
2515 if (!(file->f_mode & FMODE_WRITE))
2516 return -EINVAL;
2517 spin_lock_irqsave(&s->card->lock, flags);
2518 trident_update_ptr(s);
2519 val = s->dma_dac.count;
2520 spin_unlock_irqrestore(&s->card->lock, flags);
2521 return put_user(val, (int *)arg);
2522
2523 case SNDCTL_DSP_GETIPTR:
2524 if (!(file->f_mode & FMODE_READ))
2525 return -EINVAL;
2526 spin_lock_irqsave(&s->card->lock, flags);
2527 trident_update_ptr(s);
2528 cinfo.bytes = s->dma_adc.total_bytes;
2529 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
2530 cinfo.ptr = s->dma_adc.hwptr;
2531 if (s->dma_adc.mapped)
2532 s->dma_adc.count &= s->dma_adc.fragsize-1;
2533 spin_unlock_irqrestore(&s->card->lock, flags);
2534 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2535
2536 case SNDCTL_DSP_GETOPTR:
2537 if (!(file->f_mode & FMODE_WRITE))
2538 return -EINVAL;
2539 spin_lock_irqsave(&s->card->lock, flags);
2540 trident_update_ptr(s);
2541 cinfo.bytes = s->dma_dac.total_bytes;
2542 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
2543 cinfo.ptr = s->dma_dac.hwptr;
2544 if (s->dma_dac.mapped)
2545 s->dma_dac.count &= s->dma_dac.fragsize-1;
2546 spin_unlock_irqrestore(&s->card->lock, flags);
2547 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2548
2549 case SNDCTL_DSP_GETBLKSIZE:
2550 if (file->f_mode & FMODE_WRITE)
2551 {
2552 if ((val = prog_dmabuf(s, 0)))
2553 return val;
2554 return put_user(s->dma_dac.fragsize, (int *)arg);
2555 }
2556 if ((val = prog_dmabuf(s, 1)))
2557 return val;
2558 return put_user(s->dma_adc.fragsize, (int *)arg);
2559
2560 case SNDCTL_DSP_SETFRAGMENT:
2561 get_user_ret(val, (int *)arg, -EFAULT);
2562 if (file->f_mode & FMODE_READ)
2563 {
2564 s->dma_adc.ossfragshift = val & 0xffff;
2565 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
2566 if (s->dma_adc.ossfragshift < 4)
2567 s->dma_adc.ossfragshift = 4;
2568 if (s->dma_adc.ossfragshift > 15)
2569 s->dma_adc.ossfragshift = 15;
2570 if (s->dma_adc.ossmaxfrags < 4)
2571 s->dma_adc.ossmaxfrags = 4;
2572 }
2573 if (file->f_mode & FMODE_WRITE)
2574 {
2575 s->dma_dac.ossfragshift = val & 0xffff;
2576 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
2577 if (s->dma_dac.ossfragshift < 4)
2578 s->dma_dac.ossfragshift = 4;
2579 if (s->dma_dac.ossfragshift > 15)
2580 s->dma_dac.ossfragshift = 15;
2581 if (s->dma_dac.ossmaxfrags < 4)
2582 s->dma_dac.ossmaxfrags = 4;
2583 }
2584 return 0;
2585
2586 case SNDCTL_DSP_SUBDIVIDE:
2587 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
2588 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
2589 return -EINVAL;
2590 get_user_ret(val, (int *)arg, -EFAULT);
2591 if (val != 1 && val != 2 && val != 4)
2592 return -EINVAL;
2593 if (file->f_mode & FMODE_READ)
2594 s->dma_adc.subdivision = val;
2595 if (file->f_mode & FMODE_WRITE)
2596 s->dma_dac.subdivision = val;
2597 return 0;
2598
2599 case SOUND_PCM_READ_RATE:
2600 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
2601
2602 case SOUND_PCM_READ_CHANNELS:
2603 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2604 (TRIDENT_FMT_STEREO << TRIDENT_ADC_SHIFT) :
2605 (TRIDENT_FMT_STEREO << TRIDENT_DAC_SHIFT))) ? 2 : 1, (int *)arg);
2606
2607 case SOUND_PCM_READ_BITS:
2608 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ?
2609 (TRIDENT_FMT_16BIT << TRIDENT_ADC_SHIFT) :
2610 (TRIDENT_FMT_16BIT << TRIDENT_DAC_SHIFT))) ? 16 : 8, (int *)arg);
2611
2612 case SOUND_PCM_WRITE_FILTER:
2613 case SNDCTL_DSP_SETSYNCRO:
2614 case SOUND_PCM_READ_FILTER:
2615 return -EINVAL;
2616
2617 }
2618 return -EINVAL;
2619 }
2620
2621 static int trident_open(struct inode *inode, struct file *file)
2622 {
2623 int minor = MINOR(inode->i_rdev);
2624 struct trident_card *c = devs;
2625 struct trident_state *s = NULL, *sp;
2626 int i;
2627 unsigned char fmtm = ~0, fmts = 0;
2628
2629 /*
2630 * Scan the cards and find the channel. We only
2631 * do this at open time so it is ok
2632 */
2633
2634 while (c!=NULL)
2635 {
2636 for(i=0;i<NR_DSPS;i++)
2637 {
2638 sp=&c->channels[i];
2639 if(sp->dev_audio < 0)
2640 continue;
2641 if((sp->dev_audio ^ minor) & ~0xf)
2642 continue;
2643 s=sp;
2644 }
2645 c=c->next;
2646 }
2647
2648 if (!s)
2649 return -ENODEV;
2650
2651 VALIDATE_STATE(s);
2652 file->private_data = s;
2653 /* wait for device to become free */
2654 down(&s->open_sem);
2655 while (s->open_mode & file->f_mode)
2656 {
2657 if (file->f_flags & O_NONBLOCK)
2658 {
2659 up(&s->open_sem);
2660 return -EWOULDBLOCK;
2661 }
2662 up(&s->open_sem);
2663 interruptible_sleep_on(&s->open_wait);
2664 if (signal_pending(current))
2665 return -ERESTARTSYS;
2666 down(&s->open_sem);
2667 }
2668 if (file->f_mode & FMODE_READ)
2669 {
2670 /*
2671 fmtm &= ~((TRIDENT_FMT_STEREO | TRIDENT_FMT_16BIT) << TRIDENT_ADC_SHIFT);
2672 if ((minor & 0xf) == SND_DEV_DSP16)
2673 fmts |= TRIDENT_FMT_16BIT << TRIDENT_ADC_SHIFT; */
2674
2675 fmtm = (TRIDENT_FMT_STEREO|TRIDENT_FMT_16BIT) << TRIDENT_ADC_SHIFT;
2676
2677 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2678 trident_set_adc_rate(s, 8000, 0);
2679 }
2680 if (file->f_mode & FMODE_WRITE)
2681 {
2682 fmtm &= ~((TRIDENT_FMT_STEREO | TRIDENT_FMT_16BIT) << TRIDENT_DAC_SHIFT);
2683 if ((minor & 0xf) == SND_DEV_DSP16)
2684 fmts |= TRIDENT_FMT_16BIT << TRIDENT_DAC_SHIFT;
2685 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
2686 trident_set_dac_rate(s, 8000, 1);
2687 }
2688 set_fmt(s, fmtm, fmts);
2689 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2690
2691 up(&s->open_sem);
2692 //FIXME put back in
2693 //MOD_INC_USE_COUNT;
2694 return 0;
2695 }
2696
2697 static int trident_release(struct inode *inode, struct file *file)
2698 {
2699 struct trident_state *s = (struct trident_state *)file->private_data;
2700
2701 VALIDATE_STATE(s);
2702 if (file->f_mode & FMODE_WRITE)
2703 drain_dac(s, file->f_flags & O_NONBLOCK);
2704 down(&s->open_sem);
2705 if (file->f_mode & FMODE_WRITE) {
2706 stop_dac(s);
2707 }
2708 if (file->f_mode & FMODE_READ) {
2709 stop_adc(s);
2710 }
2711
2712 /* free our shared dma buffers */
2713 dealloc_dmabuf(&s->dma_adc);
2714 dealloc_dmabuf(&s->dma_dac);
2715
2716 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2717 /* we're covered by the open_sem */
2718 up(&s->open_sem);
2719 wake_up(&s->open_wait);
2720 //FIXME put back in
2721 //MOD_DEC_USE_COUNT;
2722 return 0;
2723 }
2724
2725 static /*const*/ struct file_operations trident_audio_fops = {
2726 &trident_llseek,
2727 &trident_read,
2728 &trident_write,
2729 NULL, /* readdir */
2730 &trident_poll,
2731 &trident_ioctl,
2732 NULL, /* XXX &trident_mmap, */
2733 &trident_open,
2734 NULL, /* flush */
2735 &trident_release,
2736 NULL, /* fsync */
2737 NULL, /* fasync */
2738 NULL, /* check_media_change */
2739 NULL, /* revalidate */
2740 NULL, /* lock */
2741 };
2742
2743 #ifdef CONFIG_APM
2744 int trident_apm_callback(apm_event_t ae) {
2745 }
2746 #endif
2747
2748 /* --------------------------------------------------------------------- */
2749
2750 static int trident_install(struct pci_dev *pcidev, int card_type)
2751 {
2752 u16 w;
2753 u32 l;
2754 unsigned long iobase;
2755 int i;
2756 struct trident_card *card;
2757 struct trident_state *trident;
2758 int num = 0;
2759 u32 ChanDwordCount;
2760
2761 iobase = pcidev->resource[0].start;
2762
2763 if(check_region(iobase, 256))
2764 {
2765 M_printk(KERN_WARNING "(trident) can't allocate 256 bytes I/O at 0x%4.4lx\n", iobase);
2766 return 0;
2767 }
2768
2769 /* this was tripping up some machines */
2770 if(pcidev->irq == 0)
2771 {
2772 printk(KERN_WARNING "(trident) pci subsystem reports irq 0, this might not be correct.\n");
2773 }
2774
2775 /* just to be sure */
2776 pci_set_master(pcidev);
2777
2778 pci_read_config_word(pcidev, PCI_COMMAND, &w);
2779 if((w&(PCI_COMMAND_IO|PCI_COMMAND_MASTER)) != (PCI_COMMAND_IO|PCI_COMMAND_MASTER))
2780 {
2781 printk("(trident) BIOS did not enable I/O access.\n");
2782 w|=PCI_COMMAND_IO|PCI_COMMAND_MASTER;
2783 pci_write_config_word(pcidev, PCI_COMMAND,w);
2784 }
2785
2786 card = kmalloc(sizeof(struct trident_card), GFP_KERNEL);
2787
2788 if(card == NULL)
2789 {
2790 printk(KERN_WARNING "(trident) out of memory\n");
2791 return 0;
2792 }
2793
2794 memset(card, 0, sizeof(*card));
2795
2796 #ifdef CONFIG_APM
2797 printk("(trident) apm_reg_callback: %d\n",apm_register_callback(trident_apm_callback));
2798 #endif
2799
2800 card->iobase = iobase;
2801 card->card_type = card_type;
2802 card->irq = pcidev->irq;
2803 card->next = devs;
2804 card->magic = TRIDENT_CARD_MAGIC;
2805 devs = card;
2806
2807 ChanDwordCount = card->ChanDwordCount = 2;
2808 card->ChanPCM = 32;
2809
2810 card->ChRegs.lpChStart = card->ChRegs.data;
2811 card->ChRegs.lpChStop = card->ChRegs.lpChStart + ChanDwordCount;
2812 card->ChRegs.lpChAint = card->ChRegs.lpChStop + ChanDwordCount;
2813 card->ChRegs.lpChAinten = card->ChRegs.lpChAint + ChanDwordCount;
2814 card->ChRegs.lpAChStart = card->ChRegs.lpChAinten + ChanDwordCount;
2815 card->ChRegs.lpAChStop = card->ChRegs.lpAChStart + ChanDwordCount;
2816 card->ChRegs.lpAChAint = card->ChRegs.lpAChStop + ChanDwordCount;
2817 card->ChRegs.lpAChAinten = card->ChRegs.lpAChAint + ChanDwordCount;
2818 // Assign addresses.
2819 card->ChRegs.lpAChStart[0] = T4D_START_A;
2820 card->ChRegs.lpAChStop[0] = T4D_STOP_A;
2821 card->ChRegs.lpAChAint[0] = T4D_AINT_A;
2822 card->ChRegs.lpAChAinten[0] = T4D_AINTEN_A;
2823
2824
2825 card->ChRegs.lpAChStart[1] = T4D_START_B;
2826 card->ChRegs.lpAChStop[1] = T4D_STOP_B;
2827 card->ChRegs.lpAChAint[1] = T4D_AINT_B;
2828 card->ChRegs.lpAChAinten[1] = T4D_AINTEN_B;
2829
2830
2831 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL));
2832 trident_ac97_set(card, 0x0L , 0L);
2833 trident_ac97_set(card, 0x02L , 0L);
2834 trident_ac97_set(card, 0x18L , 0L);
2835
2836 if(card->card_type == TYPE_4DWAVE_NX)
2837 {
2838 // Enable rear channels
2839 outl(0x12, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
2840 // ...or not, since they sound ugly. :)
2841 // outl(0x02, TRID_REG(card, NX_ACR0_AC97_COM_STAT));
2842 // S/PDIF C Channel bits 0-31 : 48khz, SCMS disabled
2843 // outl(0x200004, TRID_REG(card, NX_SPCSTATUS));
2844 // Disable S/PDIF out, 48khz only from ac97 fifo
2845 // outb(0x00, TRID_REG(card, NX_SPCTRL_SPCSO + 3));
2846 }
2847 else
2848 {
2849 outl(0x02, TRID_REG(card, DX_ACR2_AC97_COM_STAT));
2850 }
2851
2852 for(i=0;i<NR_DSPS;i++)
2853 {
2854 struct trident_state *s=&card->channels[i];
2855
2856 s->card = card;
2857 init_waitqueue_head(&s->dma_adc.wait);
2858 init_waitqueue_head(&s->dma_dac.wait);
2859 init_waitqueue_head(&s->open_wait);
2860 init_MUTEX(&s->open_sem);
2861 s->magic = TRIDENT_STATE_MAGIC;
2862 s->channel = i;
2863
2864 if(s->dma_adc.ready || s->dma_dac.ready || s->dma_adc.rawbuf)
2865 printk("(trident) BOTCH!\n");
2866
2867 /*
2868 * Now allocate the hardware resources
2869 */
2870
2871 //s->dma_dac.chan[0] = AllocateChannelPCM(card);
2872 s->dma_dac.chan[1] = AllocateChannelPCM(card);
2873 //s->dma_adc.chan[0] = AllocateChannelPCM(card);
2874
2875 /* register devices */
2876 if ((s->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0)
2877 break;
2878 }
2879
2880 num = i;
2881
2882 /* clear the rest if we ran out of slots to register */
2883 for(;i<NR_DSPS;i++)
2884 {
2885 struct trident_state *s=&card->channels[i];
2886 s->dev_audio = -1;
2887 }
2888
2889 trident = &card->channels[0];
2890
2891 /*
2892 * Ok card ready. Begin setup proper
2893 */
2894
2895 printk(KERN_INFO "(trident) Configuring %s found at IO 0x%04lX IRQ %d\n",
2896 card_names[card_type],card->iobase,card->irq);
2897
2898
2899 /* stake our claim on the iospace */
2900 request_region(iobase, 256, card_names[card_type]);
2901
2902 /*
2903 * Reset the CODEC
2904 */
2905
2906 trident_ac97_init(card);
2907
2908 if ((card->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1)) < 0)
2909 {
2910 printk("(trident) couldn't register mixer!\n");
2911 }
2912 else
2913 {
2914 int i;
2915 for(i = 0 ; i < SOUND_MIXER_NRDEVICES ; i++)
2916 {
2917 struct mixer_defaults *md = &mixer_defaults[i];
2918
2919 if(md->mixer == -1)
2920 break;
2921 if(!supported_mixer(card,md->mixer))
2922 continue;
2923 set_mixer(card,md->mixer,md->value);
2924 }
2925 }
2926
2927 if(request_irq(card->irq, trident_interrupt, SA_SHIRQ, card_names[card_type], card))
2928 {
2929 printk(KERN_ERR "(trident) unable to allocate irq %d,\n", card->irq);
2930 unregister_sound_mixer(card->dev_mixer);
2931 for(i=0;i<NR_DSPS;i++)
2932 {
2933 struct trident_state *s = &card->channels[i];
2934 if(s->dev_audio != -1)
2935 unregister_sound_dsp(s->dev_audio);
2936 }
2937 release_region(card->iobase, 256);
2938 kfree(card);
2939 return 0;
2940 }
2941
2942 init_timer(&debug_timer);
2943 debug_timer.function = trident_kick;
2944 debug_timer.data = (unsigned long)card;
2945 debug_timer.expires = jiffies+1;
2946
2947 // add_timer(&debug_timer);
2948
2949 printk("(trident) %d channels configured.\n", num);
2950
2951 EnableEndInterrupts(card);
2952 return 1;
2953 }
2954
2955 #ifdef MODULE
2956 int init_module(void)
2957 #else
2958 int __init init_trident(void)
2959 #endif
2960 {
2961 struct pci_dev *pcidev = NULL;
2962 int foundone = 0;
2963
2964 if (!pci_present()) /* No PCI bus in this machine! */
2965 return -ENODEV;
2966 printk(KERN_INFO "(trident) version " DRIVER_VERSION " time " __TIME__ " " __DATE__ "\n");
2967
2968 pcidev = NULL;
2969
2970 /*
2971 * Find the 4DWave DX
2972 */
2973
2974 while( (pcidev = pci_find_device(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX, pcidev))!=NULL
2975 &&
2976 ( trident_install(pcidev, TYPE_4DWAVE_DX) )) {
2977 foundone=1;
2978 }
2979
2980 /*
2981 * Find the 4DWave NX
2982 */
2983
2984 while((pcidev = pci_find_device(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX, pcidev))!=NULL
2985 &&
2986 ( trident_install(pcidev, TYPE_4DWAVE_NX) )) {
2987 foundone=1;
2988 }
2989
2990 if( ! foundone )
2991 return -ENODEV;
2992 return 0;
2993 }
2994
2995 /* --------------------------------------------------------------------- */
2996
2997 #ifdef MODULE
2998
2999 MODULE_AUTHOR("Alan Cox <alan@redhat.com>");
3000 MODULE_DESCRIPTION("Trident 4DWave Driver");
3001 #ifdef M_DEBUG
3002 MODULE_PARM(debug,"i");
3003 #endif
3004
3005 void cleanup_module(void)
3006 {
3007 struct trident_card *s;
3008
3009 #ifdef CONFIG_APM
3010 apm_unregister_callback(trident_apm_callback);
3011 #endif
3012
3013 del_timer(&debug_timer);
3014
3015 while ((s = devs)) {
3016 int i;
3017 devs = devs->next;
3018
3019
3020 /* Kill interrupts, and SP/DIF */
3021
3022 DisableEndInterrupts(s);
3023 if(s->card_type == TYPE_4DWAVE_NX)
3024 outb(0x00, TRID_REG(s, NX_SPCTRL_SPCSO+3));
3025
3026 free_irq(s->irq, s);
3027 unregister_sound_mixer(s->dev_mixer);
3028 for(i=0;i<NR_DSPS;i++)
3029 {
3030 struct trident_state *trident = &s->channels[i];
3031 if(trident->dev_audio != -1)
3032 unregister_sound_dsp(trident->dev_audio);
3033 }
3034 release_region(s->iobase, 256);
3035 kfree(s);
3036 }
3037 printk("(trident) unloading\n");
3038 }
3039
3040 #endif /* MODULE */
3041
3042
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