include/pcmcia/cisreg.h

   1 /*
   2  * cisreg.h 1.13 1999/08/28 04:12:32
   3  *
   4  * The contents of this file are subject to the Mozilla Public License
   5  * Version 1.1 (the "License"); you may not use this file except in
   6  * compliance with the License. You may obtain a copy of the License
   7  * at http://www.mozilla.org/MPL/
   8  *
   9  * Software distributed under the License is distributed on an "AS IS"
  10  * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
  11  * the License for the specific language governing rights and
  12  * limitations under the License.
  13  *
  14  * The initial developer of the original code is David A. Hinds
  15  * <dhinds@hyper.stanford.edu>.  Portions created by David A. Hinds
  16  * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
  17  *
  18  * Alternatively, the contents of this file may be used under the
  19  * terms of the GNU Public License version 2 (the "GPL"), in which
  20  * case the provisions of the GPL are applicable instead of the
  21  * above.  If you wish to allow the use of your version of this file
  22  * only under the terms of the GPL and not to allow others to use
  23  * your version of this file under the MPL, indicate your decision by
  24  * deleting the provisions above and replace them with the notice and
  25  * other provisions required by the GPL.  If you do not delete the
  26  * provisions above, a recipient may use your version of this file
  27  * under either the MPL or the GPL.
  28  */
  29
  30 #ifndef _LINUX_CISREG_H
  31 #define _LINUX_CISREG_H
  32
  33 /* Offsets from ConfigBase for CIS registers */
  34 #define CISREG_COR              0x00
  35 #define CISREG_CCSR             0x02
  36 #define CISREG_PRR              0x04
  37 #define CISREG_SCR              0x06
  38 #define CISREG_ESR              0x08
  39 #define CISREG_IOBASE_0         0x0a
  40 #define CISREG_IOBASE_1         0x0c
  41 #define CISREG_IOBASE_2         0x0e
  42 #define CISREG_IOBASE_3         0x10
  43 #define CISREG_IOSIZE           0x12
  44
  45 /*
  46  * Configuration Option Register
  47  */
  48 #define COR_CONFIG_MASK         0x3f
  49 #define COR_MFC_CONFIG_MASK     0x38
  50 #define COR_FUNC_ENA            0x01
  51 #define COR_ADDR_DECODE         0x02
  52 #define COR_IREQ_ENA            0x04
  53 #define COR_LEVEL_REQ           0x40
  54 #define COR_SOFT_RESET          0x80
  55
  56 /*
  57  * Card Configuration and Status Register
  58  */
  59 #define CCSR_INTR_ACK           0x01
  60 #define CCSR_INTR_PENDING       0x02
  61 #define CCSR_POWER_DOWN         0x04
  62 #define CCSR_AUDIO_ENA          0x08
  63 #define CCSR_IOIS8              0x20
  64 #define CCSR_SIGCHG_ENA         0x40
  65 #define CCSR_CHANGED            0x80
  66
  67 /*
  68  * Pin Replacement Register
  69  */
  70 #define PRR_WP_STATUS           0x01
  71 #define PRR_READY_STATUS        0x02
  72 #define PRR_BVD2_STATUS         0x04
  73 #define PRR_BVD1_STATUS         0x08
  74 #define PRR_WP_EVENT            0x10
  75 #define PRR_READY_EVENT         0x20
  76 #define PRR_BVD2_EVENT          0x40
  77 #define PRR_BVD1_EVENT          0x80
  78
  79 /*
  80  * Socket and Copy Register
  81  */
  82 #define SCR_SOCKET_NUM          0x0f
  83 #define SCR_COPY_NUM            0x70
  84
  85 /*
  86  * Extended Status Register
  87  */
  88 #define ESR_REQ_ATTN_ENA        0x01
  89 #define ESR_REQ_ATTN            0x10
  90
  91 /*
  92  * CardBus Function Status Registers
  93  */
  94 #define CBFN_EVENT              0x00
  95 #define CBFN_MASK               0x04
  96 #define CBFN_STATE              0x08
  97 #define CBFN_FORCE              0x0c
  98
  99 /*
 100  * These apply to all the CardBus function registers
 101  */
 102 #define CBFN_WP                 0x0001
 103 #define CBFN_READY              0x0002
 104 #define CBFN_BVD2               0x0004
 105 #define CBFN_BVD1               0x0008
 106 #define CBFN_GWAKE              0x0010
 107 #define CBFN_INTR               0x8000
 108
 109 /*
 110  * Extra bits in the Function Event Mask Register
 111  */
 112 #define FEMR_BAM_ENA            0x0020
 113 #define FEMR_PWM_ENA            0x0040
 114 #define FEMR_WKUP_MASK          0x4000
 115
 116 #endif /* _LINUX_CISREG_H */