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1 /* $Id: processor.h,v 1.18 1998/10/14 20:31:12 ralf Exp $
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
7 * Copyright (C) 1994 Waldorf GMBH
8 * Copyright (C) 1995, 1996, 1997, 1998 Ralf Baechle
9 * Modified further for R[236]000 compatibility by Paul M. Antoine
11 #ifndef __ASM_MIPS_PROCESSOR_H
12 #define __ASM_MIPS_PROCESSOR_H
15 * Default implementation of macro that returns current
16 * instruction pointer ("program counter").
18 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
20 #if !defined (_LANGUAGE_ASSEMBLY)
21 #include <asm/cachectl.h>
22 #include <asm/mipsregs.h>
23 #include <asm/reg.h>
24 #include <asm/system.h>
26 struct mips_cpuinfo {
27 unsigned long *pgd_quick;
28 unsigned long *pte_quick;
29 unsigned long pgtable_cache_sz;
33 * System setup and hardware flags..
34 * XXX: Should go into mips_cpuinfo.
36 extern char wait_available; /* only available on R4[26]00 */
37 extern char cyclecounter_available; /* only available from R4000 upwards. */
38 extern char dedicated_iv_available; /* some embedded MIPS like Nevada */
39 extern char vce_available; /* Supports VCED / VCEI exceptions */
41 extern struct mips_cpuinfo boot_cpu_data;
42 extern unsigned int vced_count, vcei_count;
44 #ifdef __SMP__
45 extern struct mips_cpuinfo cpu_data[];
46 #define current_cpu_data cpu_data[smp_processor_id()]
47 #else
48 #define cpu_data &boot_cpu_data
49 #define current_cpu_data boot_cpu_data
50 #endif
53 * Bus types (default is ISA, but people can check others with these..)
54 * MCA_bus hardcoded to 0 for now.
56 * This needs to be extended since MIPS systems are being delivered with
57 * numerous different types of bus systems.
59 extern int EISA_bus;
60 #define MCA_bus 0
61 #define MCA_bus__is_a_macro /* for versions in ksyms.c */
64 * MIPS has no problems with write protection
66 #define wp_works_ok 1
67 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */
69 /* Lazy FPU handling on uni-processor */
70 extern struct task_struct *last_task_used_math;
73 * User space process size: 2GB. This is hardcoded into a few places,
74 * so don't change it unless you know what you are doing. TASK_SIZE
75 * for a 64 bit kernel expandable to 8192EB, of which the current MIPS
76 * implementations will "only" be able to use 1TB ...
78 #define TASK_SIZE (0x80000000UL)
80 /* This decides where the kernel will search for a free chunk of vm
81 * space during mmap's.
83 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
86 * Size of io_bitmap in longwords: 32 is ports 0-0x3ff.
88 #define IO_BITMAP_SIZE 32
90 #define NUM_FPU_REGS 32
92 struct mips_fpu_hard_struct {
93 double fp_regs[NUM_FPU_REGS];
94 unsigned int control;
98 * FIXME: no fpu emulator yet (but who cares anyway?)
100 struct mips_fpu_soft_struct {
101 long dummy;
104 union mips_fpu_union {
105 struct mips_fpu_hard_struct hard;
106 struct mips_fpu_soft_struct soft;
109 #define INIT_FPU { \
110 {{0,},} \
113 typedef struct {
114 unsigned long seg;
115 } mm_segment_t;
118 * If you change thread_struct remember to change the #defines below too!
120 struct thread_struct {
121 /* Saved main processor registers. */
122 unsigned long reg16;
123 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
124 unsigned long reg29, reg30, reg31;
126 /* Saved cp0 stuff. */
127 unsigned long cp0_status;
129 /* Saved fpu/fpu emulator stuff. */
130 union mips_fpu_union fpu;
132 /* Other stuff associated with the thread. */
133 unsigned long cp0_badvaddr; /* Last user fault */
134 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
135 unsigned long error_code;
136 unsigned long trap_no;
137 unsigned long pg_dir; /* used in tlb refill */
138 #define MF_FIXADE 1 /* Fix address errors in software */
139 #define MF_LOGADE 2 /* Log address errors to syslog */
140 unsigned long mflags;
141 mm_segment_t current_ds;
142 unsigned long irix_trampoline; /* Wheee... */
143 unsigned long irix_oldctx;
146 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
148 #define INIT_MMAP { &init_mm, KSEG0, KSEG1, NULL, PAGE_SHARED, \
149 VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
151 #define INIT_TSS { \
152 /* \
153 * saved main processor registers \
154 */ \
155 0, 0, 0, 0, 0, 0, 0, 0, \
156 0, 0, 0, \
157 /* \
158 * saved cp0 stuff \
159 */ \
160 0, \
161 /* \
162 * saved fpu/fpu emulator stuff \
163 */ \
164 INIT_FPU, \
165 /* \
166 * Other stuff associated with the process \
167 */ \
168 0, 0, 0, 0, (unsigned long) swapper_pg_dir, \
169 /* \
170 * For now the default is to fix address errors \
171 */ \
172 MF_FIXADE, { 0 }, 0, 0 \
175 #ifdef __KERNEL__
177 #define KERNEL_STACK_SIZE 8192
179 #if !defined (_LANGUAGE_ASSEMBLY)
181 /* Free all resources held by a thread. */
182 extern void release_thread(struct task_struct *);
183 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
185 /* Copy and release all segment info associated with a VM */
186 #define copy_segments(nr, p, mm) do { } while(0)
187 #define release_segments(mm) do { } while(0)
188 #define forget_segments() do { } while (0)
191 * Return saved PC of a blocked thread.
193 extern inline unsigned long thread_saved_pc(struct thread_struct *t)
195 extern void ret_from_sys_call(void);
197 /* New born processes are a special case */
198 if (t->reg31 == (unsigned long) ret_from_sys_call)
199 return t->reg31;
201 return ((unsigned long*)t->reg29)[17];
205 * Do necessary setup to start up a newly executed thread.
207 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
209 /* Allocation and freeing of basic task resources. */
211 * NOTE! The task struct and the stack go together
213 #define alloc_task_struct() \
214 ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
215 #define free_task_struct(p) free_pages((unsigned long)(p),1)
217 #define init_task (init_task_union.task)
218 #define init_stack (init_task_union.stack)
220 #endif /* !defined (_LANGUAGE_ASSEMBLY) */
221 #endif /* __KERNEL__ */
224 * Return_address is a replacement for __builtin_return_address(count)
225 * which on certain architectures cannot reasonably be implemented in GCC
226 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
227 * Note that __builtin_return_address(x>=1) is forbidden because GCC
228 * aborts compilation on some CPUs. It's simply not possible to unwind
229 * some CPU's stackframes.
231 #if (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 8))
233 * __builtin_return_address works only for non-leaf functions. We avoid the
234 * overhead of a function call by forcing the compiler to save the return
235 * address register on the stack.
237 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
238 #else
240 * __builtin_return_address is not implemented at all. Calling it
241 * will return senseless values. Return NULL which at least is an obviously
242 * senseless value.
244 #define return_address() NULL
245 #endif
247 #endif /* __ASM_MIPS_PROCESSOR_H */