include/asm-alpha/core_polaris.h

   1 #ifndef __ALPHA_POLARIS__H__
   2 #define __ALPHA_POLARIS__H__
   3
   4 #include <linux/types.h>
   5 #include <asm/compiler.h>
   6
   7 /*
   8  * POLARIS is the internal name for a core logic chipset which provides
   9  * memory controller and PCI access for the 21164PC chip based systems.
  10  *
  11  * This file is based on:
  12  *
  13  * Polaris System Controller
  14  * Device Functional Specification
  15  * 22-Jan-98
  16  * Rev. 4.2
  17  *
  18  */
  19
  20 /* Polaris memory regions */
  21 #define POLARIS_SPARSE_MEM_BASE         (IDENT_ADDR + 0xf800000000)
  22 #define POLARIS_DENSE_MEM_BASE          (IDENT_ADDR + 0xf900000000)
  23 #define POLARIS_SPARSE_IO_BASE          (IDENT_ADDR + 0xf980000000)
  24 #define POLARIS_SPARSE_CONFIG_BASE      (IDENT_ADDR + 0xf9c0000000)
  25 #define POLARIS_IACK_BASE               (IDENT_ADDR + 0xf9f8000000)
  26 #define POLARIS_DENSE_IO_BASE           (IDENT_ADDR + 0xf9fc000000)
  27 #define POLARIS_DENSE_CONFIG_BASE       (IDENT_ADDR + 0xf9fe000000)
  28
  29 #define POLARIS_IACK_SC                 POLARIS_IACK_BASE
  30
  31 /* The Polaris command/status registers live in PCI Config space for
  32  * bus 0/device 0.  As such, they may be bytes, words, or doublewords.
  33  */
  34 #define POLARIS_W_VENID         (POLARIS_DENSE_CONFIG_BASE)
  35 #define POLARIS_W_DEVID         (POLARIS_DENSE_CONFIG_BASE+2)
  36 #define POLARIS_W_CMD           (POLARIS_DENSE_CONFIG_BASE+4)
  37 #define POLARIS_W_STATUS        (POLARIS_DENSE_CONFIG_BASE+6)
  38
  39 /* No HAE address.  Polaris has no concept of an HAE, since it
  40  * supports transfers of all sizes in dense space.
  41  */
  42
  43 #define POLARIS_DMA_WIN_BASE    0x80000000UL    /* fixed, 2G @ 2G */
  44 #define POLARIS_DMA_WIN_SIZE    0x80000000UL    /* fixed, 2G @ 2G */
  45
  46
  47 /*
  48  * Data structure for handling POLARIS machine checks:
  49  */
  50 struct el_POLARIS_sysdata_mcheck {
  51     u_long      psc_status;
  52     u_long      psc_pcictl0;
  53     u_long      psc_pcictl1;
  54     u_long      psc_pcictl2;
  55 };
  56
  57 #ifdef __KERNEL__
  58
  59 #ifndef __EXTERN_INLINE
  60 #define __EXTERN_INLINE extern inline
  61 #define __IO_EXTERN_INLINE
  62 #endif
  63
  64 __EXTERN_INLINE unsigned long polaris_virt_to_bus(void * address)
  65 {
  66         return virt_to_phys(address) + POLARIS_DMA_WIN_BASE;
  67 }
  68
  69 __EXTERN_INLINE void * polaris_bus_to_virt(unsigned long address)
  70 {
  71         return phys_to_virt(address - POLARIS_DMA_WIN_BASE);
  72 }
  73
  74 /*
  75  * I/O functions:
  76  *
  77  * POLARIS, the PCI/memory support chipset for the PCA56 (21164PC)
  78  * processors, can use either a sparse address  mapping scheme, or the
  79  * so-called byte-word PCI address space, to get at PCI memory and I/O.
  80  *
  81  * However, we will support only the BWX form.
  82  */
  83
  84 #define vucp    volatile unsigned char *
  85 #define vusp    volatile unsigned short *
  86 #define vuip    volatile unsigned int  *
  87 #define vulp    volatile unsigned long  *
  88
  89 __EXTERN_INLINE unsigned int polaris_inb(unsigned long addr)
  90 {
  91         /* ??? I wish I could get rid of this.  But there's no ioremap
  92            equivalent for I/O space.  PCI I/O can be forced into the
  93            POLARIS I/O region, but that doesn't take care of legacy
  94            ISA crap.  */
  95
  96         return __kernel_ldbu(*(vucp)(addr + POLARIS_DENSE_IO_BASE));
  97 }
  98
  99 __EXTERN_INLINE void polaris_outb(unsigned char b, unsigned long addr)
 100 {
 101         __kernel_stb(b, *(vucp)(addr + POLARIS_DENSE_IO_BASE));
 102         mb();
 103 }
 104
 105 __EXTERN_INLINE unsigned int polaris_inw(unsigned long addr)
 106 {
 107         return __kernel_ldwu(*(vusp)(addr + POLARIS_DENSE_IO_BASE));
 108 }
 109
 110 __EXTERN_INLINE void polaris_outw(unsigned short b, unsigned long addr)
 111 {
 112         __kernel_stw(b, *(vusp)(addr + POLARIS_DENSE_IO_BASE));
 113         mb();
 114 }
 115
 116 __EXTERN_INLINE unsigned int polaris_inl(unsigned long addr)
 117 {
 118         return *(vuip)(addr + POLARIS_DENSE_IO_BASE);
 119 }
 120
 121 __EXTERN_INLINE void polaris_outl(unsigned int b, unsigned long addr)
 122 {
 123         *(vuip)(addr + POLARIS_DENSE_IO_BASE) = b;
 124         mb();
 125 }
 126
 127 /*
 128  * Memory functions.  Polaris allows all accesses (byte/word
 129  * as well as long/quad) to be done through dense space.
 130  *
 131  * We will only support DENSE access via BWX insns.
 132  */
 133
 134 __EXTERN_INLINE unsigned long polaris_readb(unsigned long addr)
 135 {
 136         return __kernel_ldbu(*(vucp)addr);
 137 }
 138
 139 __EXTERN_INLINE unsigned long polaris_readw(unsigned long addr)
 140 {
 141         return __kernel_ldwu(*(vusp)addr);
 142 }
 143
 144 __EXTERN_INLINE unsigned long polaris_readl(unsigned long addr)
 145 {
 146         return *(vuip)addr;
 147 }
 148
 149 __EXTERN_INLINE unsigned long polaris_readq(unsigned long addr)
 150 {
 151         return *(vulp)addr;
 152 }
 153
 154 __EXTERN_INLINE void polaris_writeb(unsigned char b, unsigned long addr)
 155 {
 156         __kernel_stb(b, *(vucp)addr);
 157 }
 158
 159 __EXTERN_INLINE void polaris_writew(unsigned short b, unsigned long addr)
 160 {
 161         __kernel_stw(b, *(vusp)addr);
 162 }
 163
 164 __EXTERN_INLINE void polaris_writel(unsigned int b, unsigned long addr)
 165 {
 166         *(vuip)addr = b;
 167 }
 168
 169 __EXTERN_INLINE void polaris_writeq(unsigned long b, unsigned long addr)
 170 {
 171         *(vulp)addr = b;
 172 }
 173
 174 __EXTERN_INLINE unsigned long polaris_ioremap(unsigned long addr)
 175 {
 176         return addr + POLARIS_DENSE_MEM_BASE;
 177 }
 178
 179 __EXTERN_INLINE int polaris_is_ioaddr(unsigned long addr)
 180 {
 181         return addr >= POLARIS_SPARSE_MEM_BASE;
 182 }
 183
 184 #undef vucp
 185 #undef vusp
 186 #undef vuip
 187 #undef vulp
 188
 189 #ifdef __WANT_IO_DEF
 190
 191 #define virt_to_bus     polaris_virt_to_bus
 192 #define bus_to_virt     polaris_bus_to_virt
 193
 194 #define __inb           polaris_inb
 195 #define __inw           polaris_inw
 196 #define __inl           polaris_inl
 197 #define __outb          polaris_outb
 198 #define __outw          polaris_outw
 199 #define __outl          polaris_outl
 200 #define __readb         polaris_readb
 201 #define __readw         polaris_readw
 202 #define __writeb        polaris_writeb
 203 #define __writew        polaris_writew
 204 #define __readl         polaris_readl
 205 #define __readq         polaris_readq
 206 #define __writel        polaris_writel
 207 #define __writeq        polaris_writeq
 208 #define __ioremap       polaris_ioremap
 209 #define __is_ioaddr     polaris_is_ioaddr
 210
 211 #define inb(port)       __inb((port))
 212 #define inw(port)       __inw((port))
 213 #define inl(port)       __inl((port))
 214 #define outb(v, port)   __outb((v),(port))
 215 #define outw(v, port)   __outw((v),(port))
 216 #define outl(v, port)   __outl((v),(port))
 217
 218 #define __raw_readb(a)          __readb((unsigned long)(a))
 219 #define __raw_readw(a)          __readw((unsigned long)(a))
 220 #define __raw_readl(a)          __readl((unsigned long)(a))
 221 #define __raw_readq(a)          __readq((unsigned long)(a))
 222 #define __raw_writeb(v,a)       __writeb((v),(unsigned long)(a))
 223 #define __raw_writew(v,a)       __writew((v),(unsigned long)(a))
 224 #define __raw_writel(v,a)       __writel((v),(unsigned long)(a))
 225 #define __raw_writeq(v,a)       __writeq((v),(unsigned long)(a))
 226
 227 #endif /* __WANT_IO_DEF */
 228
 229 #ifdef __IO_EXTERN_INLINE
 230 #undef __EXTERN_INLINE
 231 #undef __IO_EXTERN_INLINE
 232 #endif
 233
 234 #endif /* __KERNEL__ */
 235
 236 #endif /* __ALPHA_POLARIS__H__ */