Import 2.3.18pre1
[davej-history.git] / drivers / scsi / mac53c94.c
blob5f883856b56c8ee80396ef7b86808fcc72ac067b
1 /*
2 * SCSI low-level driver for the 53c94 SCSI bus adaptor found
3 * on Power Macintosh computers, controlling the external SCSI chain.
4 * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA)
5 * controller.
7 * Paul Mackerras, August 1996.
8 * Copyright (C) 1996 Paul Mackerras.
9 */
10 #include <linux/kernel.h>
11 #include <linux/delay.h>
12 #include <linux/types.h>
13 #include <linux/string.h>
14 #include <linux/malloc.h>
15 #include <linux/blk.h>
16 #include <linux/proc_fs.h>
17 #include <linux/stat.h>
18 #include <linux/spinlock.h>
19 #include <asm/dbdma.h>
20 #include <asm/io.h>
21 #include <asm/pgtable.h>
22 #include <asm/prom.h>
23 #include <asm/system.h>
25 #include "scsi.h"
26 #include "hosts.h"
27 #include "mac53c94.h"
29 struct proc_dir_entry proc_scsi_mac53c94 = {
30 PROC_SCSI_53C94, 5, "53c94",
31 S_IFDIR | S_IRUGO | S_IXUGO, 2
34 enum fsc_phase {
35 idle,
36 selecting,
37 dataing,
38 completing,
39 busfreeing,
42 struct fsc_state {
43 volatile struct mac53c94_regs *regs;
44 int intr;
45 volatile struct dbdma_regs *dma;
46 int dmaintr;
47 int clk_freq;
48 struct Scsi_Host *host;
49 struct fsc_state *next;
50 Scsi_Cmnd *request_q;
51 Scsi_Cmnd *request_qtail;
52 Scsi_Cmnd *current_req; /* req we're currently working on */
53 enum fsc_phase phase; /* what we're currently trying to do */
54 struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */
57 static struct fsc_state *all_53c94s;
59 static void mac53c94_init(struct fsc_state *);
60 static void mac53c94_start(struct fsc_state *);
61 static void mac53c94_interrupt(int, void *, struct pt_regs *);
62 static void do_mac53c94_interrupt(int, void *, struct pt_regs *);
63 static void cmd_done(struct fsc_state *, int result);
64 static void set_dma_cmds(struct fsc_state *, Scsi_Cmnd *);
65 static int data_goes_out(Scsi_Cmnd *);
67 int
68 mac53c94_detect(Scsi_Host_Template *tp)
70 struct device_node *node;
71 int nfscs;
72 struct fsc_state *state, **prev_statep;
73 struct Scsi_Host *host;
74 void *dma_cmd_space;
75 unsigned char *clkprop;
76 int proplen;
78 nfscs = 0;
79 prev_statep = &all_53c94s;
80 for (node = find_devices("53c94"); node != 0; node = node->next) {
81 if (node->n_addrs != 2 || node->n_intrs != 2)
82 panic("53c94: expected 2 addrs and intrs (got %d/%d)",
83 node->n_addrs, node->n_intrs);
84 host = scsi_register(tp, sizeof(struct fsc_state));
85 if (host == 0)
86 panic("couldn't register 53c94 host");
87 host->unique_id = nfscs;
88 note_scsi_host(node, host);
90 state = (struct fsc_state *) host->hostdata;
91 if (state == 0)
92 panic("no 53c94 state");
93 state->host = host;
94 state->regs = (volatile struct mac53c94_regs *)
95 ioremap(node->addrs[0].address, 0x1000);
96 state->intr = node->intrs[0].line;
97 state->dma = (volatile struct dbdma_regs *)
98 ioremap(node->addrs[1].address, 0x1000);
99 state->dmaintr = node->intrs[1].line;
101 clkprop = get_property(node, "clock-frequency", &proplen);
102 if (clkprop == NULL || proplen != sizeof(int)) {
103 printk(KERN_ERR "%s: can't get clock frequency\n",
104 node->full_name);
105 state->clk_freq = 25000000;
106 } else
107 state->clk_freq = *(int *)clkprop;
109 /* Space for dma command list: +1 for stop command,
110 +1 to allow for aligning. */
111 dma_cmd_space = kmalloc((host->sg_tablesize + 2) *
112 sizeof(struct dbdma_cmd), GFP_KERNEL);
113 if (dma_cmd_space == 0)
114 panic("53c94: couldn't allocate dma command space");
115 state->dma_cmds = (struct dbdma_cmd *)
116 DBDMA_ALIGN(dma_cmd_space);
117 memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
118 * sizeof(struct dbdma_cmd));
120 *prev_statep = state;
121 prev_statep = &state->next;
123 if (request_irq(state->intr, do_mac53c94_interrupt, 0,
124 "53C94", state)) {
125 printk(KERN_ERR "mac53C94: can't get irq %d\n", state->intr);
128 mac53c94_init(state);
130 ++nfscs;
132 return nfscs;
136 mac53c94_queue(Scsi_Cmnd *cmd, void (*done)(Scsi_Cmnd *))
138 unsigned long flags;
139 struct fsc_state *state;
141 #if 0
142 if (data_goes_out(cmd)) {
143 int i;
144 printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd);
145 for (i = 0; i < cmd->cmd_len; ++i)
146 printk(" %.2x", cmd->cmnd[i]);
147 printk("\n" KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n",
148 cmd->use_sg, cmd->request_bufflen, cmd->request_buffer);
150 #endif
152 cmd->scsi_done = done;
153 cmd->host_scribble = NULL;
155 state = (struct fsc_state *) cmd->host->hostdata;
157 save_flags(flags);
158 cli();
159 if (state->request_q == NULL)
160 state->request_q = cmd;
161 else
162 state->request_qtail->host_scribble = (void *) cmd;
163 state->request_qtail = cmd;
165 if (state->phase == idle)
166 mac53c94_start(state);
168 restore_flags(flags);
169 return 0;
173 mac53c94_abort(Scsi_Cmnd *cmd)
175 return SCSI_ABORT_SNOOZE;
179 mac53c94_reset(Scsi_Cmnd *cmd, unsigned how)
181 struct fsc_state *state = (struct fsc_state *) cmd->host->hostdata;
182 volatile struct mac53c94_regs *regs = state->regs;
183 volatile struct dbdma_regs *dma = state->dma;
184 unsigned long flags;
186 save_flags(flags);
187 cli();
188 st_le32(&dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
189 regs->command = CMD_SCSI_RESET; /* assert RST */
190 eieio();
191 udelay(100); /* leave it on for a while (>= 25us) */
192 regs->command = CMD_RESET;
193 eieio();
194 udelay(20);
195 mac53c94_init(state);
196 regs->command = CMD_NOP;
197 eieio();
198 restore_flags(flags);
199 return SCSI_RESET_PENDING;
203 mac53c94_command(Scsi_Cmnd *cmd)
205 printk(KERN_DEBUG "whoops... mac53c94_command called\n");
206 return -1;
209 static void
210 mac53c94_init(struct fsc_state *state)
212 volatile struct mac53c94_regs *regs = state->regs;
213 volatile struct dbdma_regs *dma = state->dma;
214 int x;
216 regs->config1 = state->host->this_id | CF1_PAR_ENABLE;
217 regs->sel_timeout = TIMO_VAL(250); /* 250ms */
218 regs->clk_factor = CLKF_VAL(state->clk_freq);
219 regs->config2 = CF2_FEATURE_EN;
220 regs->config3 = 0;
221 regs->sync_period = 0;
222 regs->sync_offset = 0;
223 eieio();
224 x = regs->interrupt;
225 st_le32(&dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
229 * Start the next command for a 53C94.
230 * Should be called with interrupts disabled.
232 static void
233 mac53c94_start(struct fsc_state *state)
235 Scsi_Cmnd *cmd;
236 volatile struct mac53c94_regs *regs = state->regs;
237 int i;
239 if (state->phase != idle || state->current_req != NULL)
240 panic("inappropriate mac53c94_start (state=%p)", state);
241 if (state->request_q == NULL)
242 return;
243 state->current_req = cmd = state->request_q;
244 state->request_q = (Scsi_Cmnd *) cmd->host_scribble;
246 /* Off we go */
247 regs->count_lo = 0;
248 regs->count_mid = 0;
249 regs->count_hi = 0;
250 eieio();
251 regs->command = CMD_NOP + CMD_DMA_MODE;
252 udelay(1);
253 eieio();
254 regs->command = CMD_FLUSH;
255 udelay(1);
256 eieio();
257 regs->dest_id = cmd->target;
258 regs->sync_period = 0;
259 regs->sync_offset = 0;
260 eieio();
262 /* load the command into the FIFO */
263 for (i = 0; i < cmd->cmd_len; ++i) {
264 regs->fifo = cmd->cmnd[i];
265 eieio();
268 /* do select without ATN XXX */
269 regs->command = CMD_SELECT;
270 state->phase = selecting;
272 if (cmd->use_sg > 0 || cmd->request_bufflen != 0)
273 set_dma_cmds(state, cmd);
276 static void
277 do_mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
279 unsigned long flags;
281 spin_lock_irqsave(&io_request_lock, flags);
282 mac53c94_interrupt(irq, dev_id, ptregs);
283 spin_unlock_irqrestore(&io_request_lock, flags);
286 static void
287 mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
289 struct fsc_state *state = (struct fsc_state *) dev_id;
290 volatile struct mac53c94_regs *regs = state->regs;
291 volatile struct dbdma_regs *dma = state->dma;
292 Scsi_Cmnd *cmd = state->current_req;
293 int nb, stat, seq, intr;
294 static int mac53c94_errors;
297 * Apparently, reading the interrupt register unlatches
298 * the status and sequence step registers.
300 seq = regs->seqstep;
301 stat = regs->status;
302 intr = regs->interrupt;
304 #if 0
305 printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
306 intr, stat, seq, state->phase);
307 #endif
309 if (intr & INTR_RESET) {
310 /* SCSI bus was reset */
311 printk(KERN_INFO "external SCSI bus reset detected\n");
312 regs->command = CMD_NOP;
313 st_le32(&dma->control, RUN << 16); /* stop dma */
314 cmd_done(state, DID_RESET << 16);
315 return;
317 if (intr & INTR_ILL_CMD) {
318 printk(KERN_ERR "53c94: illegal cmd, intr=%x stat=%x seq=%x phase=%d\n",
319 intr, stat, seq, state->phase);
320 cmd_done(state, DID_ERROR << 16);
321 return;
323 if (stat & STAT_ERROR) {
324 #if 0
325 /* XXX these seem to be harmless? */
326 printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n",
327 intr, stat, seq, state->phase);
328 #endif
329 ++mac53c94_errors;
330 regs->command = CMD_NOP + CMD_DMA_MODE;
331 eieio();
333 if (cmd == 0) {
334 printk(KERN_DEBUG "53c94: interrupt with no command active?\n");
335 return;
337 if (stat & STAT_PARITY) {
338 printk(KERN_ERR "mac53c94: parity error\n");
339 cmd_done(state, DID_PARITY << 16);
340 return;
342 switch (state->phase) {
343 case selecting:
344 if (intr & INTR_DISCONNECT) {
345 /* selection timed out */
346 cmd_done(state, DID_BAD_TARGET << 16);
347 return;
349 if (intr != INTR_BUS_SERV + INTR_DONE) {
350 printk(KERN_DEBUG "got intr %x during selection\n", intr);
351 cmd_done(state, DID_ERROR << 16);
352 return;
354 if ((seq & SS_MASK) != SS_DONE) {
355 printk(KERN_DEBUG "seq step %x after command\n", seq);
356 cmd_done(state, DID_ERROR << 16);
357 return;
359 regs->command = CMD_NOP;
360 /* set DMA controller going if any data to transfer */
361 if ((stat & (STAT_MSG|STAT_CD)) == 0
362 && (cmd->use_sg > 0 || cmd->request_bufflen != 0)) {
363 nb = cmd->SCp.this_residual;
364 if (nb > 0xfff0)
365 nb = 0xfff0;
366 cmd->SCp.this_residual -= nb;
367 regs->count_lo = nb;
368 regs->count_mid = nb >> 8;
369 eieio();
370 regs->command = CMD_DMA_MODE + CMD_NOP;
371 eieio();
372 st_le32(&dma->cmdptr, virt_to_phys(state->dma_cmds));
373 st_le32(&dma->control, (RUN << 16) | RUN);
374 eieio();
375 regs->command = CMD_DMA_MODE + CMD_XFER_DATA;
376 state->phase = dataing;
377 break;
378 } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) {
379 /* up to status phase already */
380 regs->command = CMD_I_COMPLETE;
381 state->phase = completing;
382 } else {
383 printk(KERN_DEBUG "in unexpected phase %x after cmd\n",
384 stat & STAT_PHASE);
385 cmd_done(state, DID_ERROR << 16);
386 return;
388 break;
390 case dataing:
391 if (intr != INTR_BUS_SERV) {
392 printk(KERN_DEBUG "got intr %x before status\n", intr);
393 cmd_done(state, DID_ERROR << 16);
394 return;
396 if (cmd->SCp.this_residual != 0
397 && (stat & (STAT_MSG|STAT_CD)) == 0) {
398 /* Set up the count regs to transfer more */
399 nb = cmd->SCp.this_residual;
400 if (nb > 0xfff0)
401 nb = 0xfff0;
402 cmd->SCp.this_residual -= nb;
403 regs->count_lo = nb;
404 regs->count_mid = nb >> 8;
405 eieio();
406 regs->command = CMD_DMA_MODE + CMD_NOP;
407 eieio();
408 regs->command = CMD_DMA_MODE + CMD_XFER_DATA;
409 break;
411 if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
412 printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
414 st_le32(&dma->control, RUN << 16); /* stop dma */
415 /* should check dma status */
416 regs->command = CMD_I_COMPLETE;
417 state->phase = completing;
418 break;
419 case completing:
420 if (intr != INTR_DONE) {
421 printk(KERN_DEBUG "got intr %x on completion\n", intr);
422 cmd_done(state, DID_ERROR << 16);
423 return;
425 cmd->SCp.Status = regs->fifo; eieio();
426 cmd->SCp.Message = regs->fifo; eieio();
427 cmd->result =
428 regs->command = CMD_ACCEPT_MSG;
429 state->phase = busfreeing;
430 break;
431 case busfreeing:
432 if (intr != INTR_DISCONNECT) {
433 printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);
435 cmd_done(state, (DID_OK << 16) + (cmd->SCp.Message << 8)
436 + cmd->SCp.Status);
437 break;
438 default:
439 printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
443 static void
444 cmd_done(struct fsc_state *state, int result)
446 Scsi_Cmnd *cmd;
448 cmd = state->current_req;
449 if (cmd != 0) {
450 cmd->result = result;
451 (*cmd->scsi_done)(cmd);
452 state->current_req = NULL;
454 state->phase = idle;
455 mac53c94_start(state);
459 * Set up DMA commands for transferring data.
461 static void
462 set_dma_cmds(struct fsc_state *state, Scsi_Cmnd *cmd)
464 int i, dma_cmd, total;
465 struct scatterlist *scl;
466 struct dbdma_cmd *dcmds;
468 dma_cmd = data_goes_out(cmd)? OUTPUT_MORE: INPUT_MORE;
469 dcmds = state->dma_cmds;
470 if (cmd->use_sg > 0) {
471 total = 0;
472 scl = (struct scatterlist *) cmd->buffer;
473 for (i = 0; i < cmd->use_sg; ++i) {
474 if (scl->length > 0xffff)
475 panic("mac53c94: scatterlist element >= 64k");
476 total += scl->length;
477 st_le16(&dcmds->req_count, scl->length);
478 st_le16(&dcmds->command, dma_cmd);
479 st_le32(&dcmds->phy_addr, virt_to_phys(scl->address));
480 dcmds->xfer_status = 0;
481 ++scl;
482 ++dcmds;
484 } else {
485 total = cmd->request_bufflen;
486 if (total > 0xffff)
487 panic("mac53c94: transfer size >= 64k");
488 st_le16(&dcmds->req_count, total);
489 st_le32(&dcmds->phy_addr, virt_to_phys(cmd->request_buffer));
490 dcmds->xfer_status = 0;
491 ++dcmds;
493 dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
494 st_le16(&dcmds[-1].command, dma_cmd);
495 st_le16(&dcmds->command, DBDMA_STOP);
496 cmd->SCp.this_residual = total;
500 * Work out whether data will be going out from the host adaptor or into it.
501 * (If this information is available from somewhere else in the scsi
502 * code, somebody please let me know :-)
504 static int
505 data_goes_out(Scsi_Cmnd *cmd)
507 switch (cmd->cmnd[0]) {
508 case CHANGE_DEFINITION:
509 case COMPARE:
510 case COPY:
511 case COPY_VERIFY:
512 case FORMAT_UNIT:
513 case LOG_SELECT:
514 case MEDIUM_SCAN:
515 case MODE_SELECT:
516 case MODE_SELECT_10:
517 case REASSIGN_BLOCKS:
518 case RESERVE:
519 case SEARCH_EQUAL:
520 case SEARCH_EQUAL_12:
521 case SEARCH_HIGH:
522 case SEARCH_HIGH_12:
523 case SEARCH_LOW:
524 case SEARCH_LOW_12:
525 case SEND_DIAGNOSTIC:
526 case SEND_VOLUME_TAG:
527 case SET_WINDOW:
528 case UPDATE_BLOCK:
529 case WRITE_BUFFER:
530 case WRITE_6:
531 case WRITE_10:
532 case WRITE_12:
533 case WRITE_LONG:
534 case WRITE_LONG_2: /* alternate code for WRITE_LONG */
535 case WRITE_SAME:
536 case WRITE_VERIFY:
537 case WRITE_VERIFY_12:
538 return 1;
539 default:
540 return 0;