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[davej-history.git] / drivers / net / pcnet32.c
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1 /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */
2 /*
3 * Copyright 1996-1999 Thomas Bogendoerfer
4 *
5 * Derived from the lance driver written 1993,1994,1995 by Donald Becker.
6 *
7 * Copyright 1993 United States Government as represented by the
8 * Director, National Security Agency.
9 *
10 * This software may be used and distributed according to the terms
11 * of the GNU Public License, incorporated herein by reference.
13 * This driver is for PCnet32 and PCnetPCI based ethercards
16 static const char *version = "pcnet32.c:v1.23 6.7.1999 tsbogend@alpha.franken.de\n";
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #ifdef MODVERSIONS
21 #include <linux/modversions.h>
22 #endif
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/malloc.h>
31 #include <linux/interrupt.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <asm/bitops.h>
36 #include <asm/io.h>
37 #include <asm/dma.h>
39 #include <linux/netdevice.h>
40 #include <linux/etherdevice.h>
41 #include <linux/skbuff.h>
43 static unsigned int pcnet32_portlist[] __initdata = {0x300, 0x320, 0x340, 0x360, 0};
45 static int pcnet32_debug = 1;
47 #ifdef MODULE
48 static struct net_device *pcnet32_dev = NULL;
49 #endif
51 static const int max_interrupt_work = 20;
52 static const int rx_copybreak = 200;
54 #define PORT_AUI 0x00
55 #define PORT_10BT 0x01
56 #define PORT_GPSI 0x02
57 #define PORT_MII 0x03
59 #define PORT_PORTSEL 0x03
60 #define PORT_ASEL 0x04
61 #define PORT_100 0x40
62 #define PORT_FD 0x80
66 * table to translate option values from tulip
67 * to internal options
69 static unsigned char options_mapping[] = {
70 PORT_ASEL, /* 0 Auto-select */
71 PORT_AUI, /* 1 BNC/AUI */
72 PORT_AUI, /* 2 AUI/BNC */
73 PORT_ASEL, /* 3 not supported */
74 PORT_10BT | PORT_FD, /* 4 10baseT-FD */
75 PORT_ASEL, /* 5 not supported */
76 PORT_ASEL, /* 6 not supported */
77 PORT_ASEL, /* 7 not supported */
78 PORT_ASEL, /* 8 not supported */
79 PORT_MII, /* 9 MII 10baseT */
80 PORT_MII | PORT_FD, /* 10 MII 10baseT-FD */
81 PORT_MII, /* 11 MII (autosel) */
82 PORT_10BT, /* 12 10BaseT */
83 PORT_MII | PORT_100, /* 13 MII 100BaseTx */
84 PORT_MII | PORT_100 | PORT_FD, /* 14 MII 100BaseTx-FD */
85 PORT_ASEL /* 15 not supported */
88 #define MAX_UNITS 8
89 static int options[MAX_UNITS] = {0, };
90 static int full_duplex[MAX_UNITS] = {0, };
93 * Theory of Operation
95 * This driver uses the same software structure as the normal lance
96 * driver. So look for a verbose description in lance.c. The differences
97 * to the normal lance driver is the use of the 32bit mode of PCnet32
98 * and PCnetPCI chips. Because these chips are 32bit chips, there is no
99 * 16MB limitation and we don't need bounce buffers.
103 * History:
104 * v0.01: Initial version
105 * only tested on Alpha Noname Board
106 * v0.02: changed IRQ handling for new interrupt scheme (dev_id)
107 * tested on a ASUS SP3G
108 * v0.10: fixed an odd problem with the 79C974 in a Compaq Deskpro XL
109 * looks like the 974 doesn't like stopping and restarting in a
110 * short period of time; now we do a reinit of the lance; the
111 * bug was triggered by doing ifconfig eth0 <ip> broadcast <addr>
112 * and hangs the machine (thanks to Klaus Liedl for debugging)
113 * v0.12: by suggestion from Donald Becker: Renamed driver to pcnet32,
114 * made it standalone (no need for lance.c)
115 * v0.13: added additional PCI detecting for special PCI devices (Compaq)
116 * v0.14: stripped down additional PCI probe (thanks to David C Niemi
117 * and sveneric@xs4all.nl for testing this on their Compaq boxes)
118 * v0.15: added 79C965 (VLB) probe
119 * added interrupt sharing for PCI chips
120 * v0.16: fixed set_multicast_list on Alpha machines
121 * v0.17: removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c
122 * v0.19: changed setting of autoselect bit
123 * v0.20: removed additional Compaq PCI probe; there is now a working one
124 * in arch/i386/bios32.c
125 * v0.21: added endian conversion for ppc, from work by cort@cs.nmt.edu
126 * v0.22: added printing of status to ring dump
127 * v0.23: changed enet_statistics to net_devive_stats
128 * v0.90: added multicast filter
129 * added module support
130 * changed irq probe to new style
131 * added PCnetFast chip id
132 * added fix for receive stalls with Intel saturn chipsets
133 * added in-place rx skbs like in the tulip driver
134 * minor cleanups
135 * v0.91: added PCnetFast+ chip id
136 * back port to 2.0.x
137 * v1.00: added some stuff from Donald Becker's 2.0.34 version
138 * added support for byte counters in net_dev_stats
139 * v1.01: do ring dumps, only when debugging the driver
140 * increased the transmit timeout
141 * v1.02: fixed memory leak in pcnet32_init_ring()
142 * v1.10: workaround for stopped transmitter
143 * added port selection for modules
144 * detect special T1/E1 WAN card and setup port selection
145 * v1.11: fixed wrong checking of Tx errors
146 * v1.20: added check of return value kmalloc (cpeterso@cs.washington.edu)
147 * added save original kmalloc addr for freeing (mcr@solidum.com)
148 * added support for PCnetHome chip (joe@MIT.EDU)
149 * rewritten PCI card detection
150 * added dwio mode to get driver working on some PPC machines
151 * v1.21: added mii selection and mii ioctl
152 * v1.22: changed pci scanning code to make PPC people happy
153 * fixed switching to 32bit mode in pcnet32_open() (thanks
154 * to Michael Richard <mcr@solidum.com> for noticing this one)
155 * added sub vendor/device id matching (thanks again to
156 * Michael Richard <mcr@solidum.com>)
157 * added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>)
158 * v1.23 fixed small bug, when manual selecting MII speed/duplex
163 * Set the number of Tx and Rx buffers, using Log_2(# buffers).
164 * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
165 * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4).
167 #ifndef PCNET32_LOG_TX_BUFFERS
168 #define PCNET32_LOG_TX_BUFFERS 4
169 #define PCNET32_LOG_RX_BUFFERS 4
170 #endif
172 #define TX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS))
173 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
174 #define TX_RING_LEN_BITS ((PCNET32_LOG_TX_BUFFERS) << 12)
176 #define RX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS))
177 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
178 #define RX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4)
180 #define PKT_BUF_SZ 1544
182 /* Offsets from base I/O address. */
183 #define PCNET32_WIO_RDP 0x10
184 #define PCNET32_WIO_RAP 0x12
185 #define PCNET32_WIO_RESET 0x14
186 #define PCNET32_WIO_BDP 0x16
188 #define PCNET32_DWIO_RDP 0x10
189 #define PCNET32_DWIO_RAP 0x14
190 #define PCNET32_DWIO_RESET 0x18
191 #define PCNET32_DWIO_BDP 0x1C
193 #define PCNET32_TOTAL_SIZE 0x20
195 /* some PCI ids */
196 #ifndef PCI_DEVICE_ID_AMD_LANCE
197 #define PCI_VENDOR_ID_AMD 0x1022
198 #define PCI_DEVICE_ID_AMD_LANCE 0x2000
199 #endif
200 #ifndef PCI_DEVICE_ID_AMD_PCNETHOME
201 #define PCI_DEVICE_ID_AMD_PCNETHOME 0x2001
202 #endif
205 #define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
207 /* The PCNET32 Rx and Tx ring descriptors. */
208 struct pcnet32_rx_head {
209 u32 base;
210 s16 buf_length;
211 s16 status;
212 u32 msg_length;
213 u32 reserved;
216 struct pcnet32_tx_head {
217 u32 base;
218 s16 length;
219 s16 status;
220 u32 misc;
221 u32 reserved;
224 /* The PCNET32 32-Bit initialization block, described in databook. */
225 struct pcnet32_init_block {
226 u16 mode;
227 u16 tlen_rlen;
228 u8 phys_addr[6];
229 u16 reserved;
230 u32 filter[2];
231 /* Receive and transmit ring base, along with extra bits. */
232 u32 rx_ring;
233 u32 tx_ring;
236 /* PCnet32 access functions */
237 struct pcnet32_access {
238 u16 (*read_csr)(unsigned long, int);
239 void (*write_csr)(unsigned long, int, u16);
240 u16 (*read_bcr)(unsigned long, int);
241 void (*write_bcr)(unsigned long, int, u16);
242 u16 (*read_rap)(unsigned long);
243 void (*write_rap)(unsigned long, u16);
244 void (*reset)(unsigned long);
247 struct pcnet32_private {
248 /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */
249 struct pcnet32_rx_head rx_ring[RX_RING_SIZE];
250 struct pcnet32_tx_head tx_ring[TX_RING_SIZE];
251 struct pcnet32_init_block init_block;
252 const char *name;
253 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
254 struct sk_buff *tx_skbuff[TX_RING_SIZE];
255 struct sk_buff *rx_skbuff[RX_RING_SIZE];
256 struct pcnet32_access a;
257 void *origmem;
258 int cur_rx, cur_tx; /* The next free ring entry */
259 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
260 struct net_device_stats stats;
261 char tx_full;
262 int options;
263 int shared_irq:1, /* shared irq possible */
264 full_duplex:1, /* full duplex possible */
265 mii:1; /* mii port available */
266 #ifdef MODULE
267 struct net_device *next;
268 #endif
271 int pcnet32_probe(struct net_device *);
272 static int pcnet32_probe1(struct net_device *, unsigned long, unsigned char, int, int);
273 static int pcnet32_open(struct net_device *);
274 static int pcnet32_init_ring(struct net_device *);
275 static int pcnet32_start_xmit(struct sk_buff *, struct net_device *);
276 static int pcnet32_rx(struct net_device *);
277 static void pcnet32_interrupt(int, void *, struct pt_regs *);
278 static int pcnet32_close(struct net_device *);
279 static struct net_device_stats *pcnet32_get_stats(struct net_device *);
280 static void pcnet32_set_multicast_list(struct net_device *);
281 #ifdef HAVE_PRIVATE_IOCTL
282 static int pcnet32_mii_ioctl(struct net_device *, struct ifreq *, int);
283 #endif
285 enum pci_flags_bit {
286 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
287 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
290 struct pcnet32_pci_id_info {
291 const char *name;
292 u16 vendor_id, device_id, svid, sdid, flags;
293 int io_size;
294 int (*probe1) (struct net_device *, unsigned long, unsigned char, int, int);
297 static struct pcnet32_pci_id_info pcnet32_tbl[] = {
298 { "AMD PCnetPCI series",
299 PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, 0, 0,
300 PCI_USES_IO|PCI_USES_MASTER, PCNET32_TOTAL_SIZE,
301 pcnet32_probe1},
302 { "AMD PCnetHome series",
303 PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PCNETHOME, 0, 0,
304 PCI_USES_IO|PCI_USES_MASTER, PCNET32_TOTAL_SIZE,
305 pcnet32_probe1},
306 {0,}
309 static u16 pcnet32_wio_read_csr (unsigned long addr, int index)
311 outw (index, addr+PCNET32_WIO_RAP);
312 return inw (addr+PCNET32_WIO_RDP);
315 static void pcnet32_wio_write_csr (unsigned long addr, int index, u16 val)
317 outw (index, addr+PCNET32_WIO_RAP);
318 outw (val, addr+PCNET32_WIO_RDP);
321 static u16 pcnet32_wio_read_bcr (unsigned long addr, int index)
323 outw (index, addr+PCNET32_WIO_RAP);
324 return inw (addr+PCNET32_WIO_BDP);
327 static void pcnet32_wio_write_bcr (unsigned long addr, int index, u16 val)
329 outw (index, addr+PCNET32_WIO_RAP);
330 outw (val, addr+PCNET32_WIO_BDP);
333 static u16 pcnet32_wio_read_rap (unsigned long addr)
335 return inw (addr+PCNET32_WIO_RAP);
338 static void pcnet32_wio_write_rap (unsigned long addr, u16 val)
340 outw (val, addr+PCNET32_WIO_RAP);
343 static void pcnet32_wio_reset (unsigned long addr)
345 inw (addr+PCNET32_WIO_RESET);
348 static int pcnet32_wio_check (unsigned long addr)
350 outw (88, addr+PCNET32_WIO_RAP);
351 return (inw (addr+PCNET32_WIO_RAP) == 88);
354 static struct pcnet32_access pcnet32_wio = {
355 pcnet32_wio_read_csr,
356 pcnet32_wio_write_csr,
357 pcnet32_wio_read_bcr,
358 pcnet32_wio_write_bcr,
359 pcnet32_wio_read_rap,
360 pcnet32_wio_write_rap,
361 pcnet32_wio_reset
364 static u16 pcnet32_dwio_read_csr (unsigned long addr, int index)
366 outl (index, addr+PCNET32_DWIO_RAP);
367 return (inl (addr+PCNET32_DWIO_RDP) & 0xffff);
370 static void pcnet32_dwio_write_csr (unsigned long addr, int index, u16 val)
372 outl (index, addr+PCNET32_DWIO_RAP);
373 outl (val, addr+PCNET32_DWIO_RDP);
376 static u16 pcnet32_dwio_read_bcr (unsigned long addr, int index)
378 outl (index, addr+PCNET32_DWIO_RAP);
379 return (inl (addr+PCNET32_DWIO_BDP) & 0xffff);
382 static void pcnet32_dwio_write_bcr (unsigned long addr, int index, u16 val)
384 outl (index, addr+PCNET32_DWIO_RAP);
385 outl (val, addr+PCNET32_DWIO_BDP);
388 static u16 pcnet32_dwio_read_rap (unsigned long addr)
390 return (inl (addr+PCNET32_DWIO_RAP) & 0xffff);
393 static void pcnet32_dwio_write_rap (unsigned long addr, u16 val)
395 outl (val, addr+PCNET32_DWIO_RAP);
398 static void pcnet32_dwio_reset (unsigned long addr)
400 inl (addr+PCNET32_DWIO_RESET);
403 static int pcnet32_dwio_check (unsigned long addr)
405 outl (88, addr+PCNET32_DWIO_RAP);
406 return (inl (addr+PCNET32_DWIO_RAP) == 88);
409 static struct pcnet32_access pcnet32_dwio = {
410 pcnet32_dwio_read_csr,
411 pcnet32_dwio_write_csr,
412 pcnet32_dwio_read_bcr,
413 pcnet32_dwio_write_bcr,
414 pcnet32_dwio_read_rap,
415 pcnet32_dwio_write_rap,
416 pcnet32_dwio_reset
422 int __init pcnet32_probe (struct net_device *dev)
424 unsigned long ioaddr = dev ? dev->base_addr: 0;
425 unsigned int irq_line = dev ? dev->irq : 0;
426 int *port;
427 int cards_found = 0;
430 #ifndef __powerpc__
431 if (ioaddr > 0x1ff) {
432 if (check_region(ioaddr, PCNET32_TOTAL_SIZE) == 0)
433 return pcnet32_probe1(dev, ioaddr, irq_line, 0, 0);
434 else
435 return ENODEV;
436 } else
437 #endif
438 if(ioaddr != 0)
439 return ENXIO;
441 #if defined(CONFIG_PCI)
442 if (pci_present()) {
443 struct pci_dev *pdev = NULL;
445 printk("pcnet32.c: PCI bios is present, checking for devices...\n");
446 while ((pdev = pci_find_class (PCI_CLASS_NETWORK_ETHERNET<<8, pdev))) {
447 u16 pci_command;
448 int chip_idx;
449 u16 sdid,svid;
451 pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &sdid);
452 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &svid);
453 for (chip_idx = 0; pcnet32_tbl[chip_idx].vendor_id; chip_idx++)
454 if ((pdev->vendor == pcnet32_tbl[chip_idx].vendor_id) &&
455 (pdev->device == pcnet32_tbl[chip_idx].device_id) &&
456 (pcnet32_tbl[chip_idx].svid == 0 ||
457 (svid == pcnet32_tbl[chip_idx].svid)) &&
458 (pcnet32_tbl[chip_idx].sdid == 0 ||
459 (sdid == pcnet32_tbl[chip_idx].sdid)))
460 break;
461 if (pcnet32_tbl[chip_idx].vendor_id == 0)
462 continue;
464 ioaddr = pdev->resource[0].start;
465 irq_line = pdev->irq;
467 /* Avoid already found cards from previous pcnet32_probe() calls */
468 if ((pcnet32_tbl[chip_idx].flags & PCI_USES_IO) &&
469 check_region(ioaddr, pcnet32_tbl[chip_idx].io_size))
470 continue;
472 /* PCI Spec 2.1 states that it is either the driver or PCI card's
473 * responsibility to set the PCI Master Enable Bit if needed.
474 * (From Mark Stockton <marks@schooner.sys.hou.compaq.com>)
476 pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
477 if ( ! (pci_command & PCI_COMMAND_MASTER)) {
478 printk("PCI Master Bit has not been set. Setting...\n");
479 pci_command |= PCI_COMMAND_MASTER|PCI_COMMAND_IO;
480 pci_write_config_word(pdev, PCI_COMMAND, pci_command);
482 printk("Found PCnet/PCI at %#lx, irq %d.\n", ioaddr, irq_line);
484 if (pcnet32_tbl[chip_idx].probe1(dev, ioaddr, irq_line, 1, cards_found) == 0) {
485 cards_found++;
486 dev = NULL;
489 } else
490 #endif /* defined(CONFIG_PCI) */
492 /* now look for PCnet32 VLB cards */
493 for (port = pcnet32_portlist; *port; port++) {
494 unsigned long ioaddr = *port;
496 if ( check_region(ioaddr, PCNET32_TOTAL_SIZE) == 0) {
497 /* check if there is really a pcnet chip on that ioaddr */
498 if ((inb(ioaddr + 14) == 0x57) &&
499 (inb(ioaddr + 15) == 0x57) &&
500 (pcnet32_probe1(dev, ioaddr, 0, 0, 0) == 0))
501 cards_found++;
504 return cards_found ? 0: ENODEV;
508 /* pcnet32_probe1 */
509 static int __init
510 pcnet32_probe1(struct net_device *dev, unsigned long ioaddr, unsigned char irq_line, int shared, int card_idx)
512 struct pcnet32_private *lp;
513 int i,media,fdx = 0, mii = 0;
514 int chip_version;
515 char *chipname;
516 char *priv;
517 struct pcnet32_access *a;
519 /* reset the chip */
520 pcnet32_dwio_reset(ioaddr);
521 pcnet32_wio_reset(ioaddr);
523 if (pcnet32_wio_read_csr (ioaddr, 0) == 4 && pcnet32_wio_check (ioaddr)) {
524 a = &pcnet32_wio;
525 } else {
526 if (pcnet32_dwio_read_csr (ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) {
527 a = &pcnet32_dwio;
528 } else
529 return ENODEV;
532 chip_version = a->read_csr (ioaddr, 88) | (a->read_csr (ioaddr,89) << 16);
533 if (pcnet32_debug > 2)
534 printk(" PCnet chip version is %#x.\n", chip_version);
535 if ((chip_version & 0xfff) != 0x003)
536 return ENODEV;
537 chip_version = (chip_version >> 12) & 0xffff;
538 switch (chip_version) {
539 case 0x2420:
540 chipname = "PCnet/PCI 79C970";
541 break;
542 case 0x2430:
543 if (shared)
544 chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */
545 else
546 chipname = "PCnet/32 79C965";
547 break;
548 case 0x2621:
549 chipname = "PCnet/PCI II 79C970A";
550 fdx = 1;
551 break;
552 case 0x2623:
553 chipname = "PCnet/FAST 79C971";
554 fdx = 1; mii = 1;
555 break;
556 case 0x2624:
557 chipname = "PCnet/FAST+ 79C972";
558 fdx = 1; mii = 1;
559 break;
560 case 0x2625:
561 chipname = "PCnet/FAST III 79C973";
562 fdx = 1; mii = 1;
563 break;
564 case 0x2626:
565 chipname = "PCnet/Home 79C978";
566 fdx = 1;
568 * This is based on specs published at www.amd.com. This section
569 * assumes that a card with a 79C978 wants to go into 1Mb HomePNA
570 * mode. The 79C978 can also go into standard ethernet, and there
571 * probably should be some sort of module option to select the
572 * mode by which the card should operate
574 /* switch to home wiring mode */
575 media = a->read_bcr (ioaddr, 49);
576 if (pcnet32_debug > 2)
577 printk("pcnet32: pcnet32 media value %#x.\n", media);
578 media &= ~3;
579 media |= 1;
580 if (pcnet32_debug > 2)
581 printk("pcnet32: pcnet32 media reset to %#x.\n", media);
582 a->write_bcr (ioaddr, 49, media);
583 break;
584 case 0x2627:
585 chipname = "PCnet/FAST III 79C975";
586 fdx = 1; mii = 1;
587 default:
588 printk("pcnet32: PCnet version %#x, no PCnet32 chip.\n",chip_version);
589 return ENODEV;
592 dev = init_etherdev(dev, 0);
594 printk(KERN_INFO "%s: %s at %#3lx,", dev->name, chipname, ioaddr);
596 /* There is a 16 byte station address PROM at the base address.
597 The first six bytes are the station address. */
598 for (i = 0; i < 6; i++)
599 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
601 dev->base_addr = ioaddr;
602 request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname);
604 if ((priv = kmalloc(sizeof(*lp)+15,GFP_KERNEL)) == NULL)
605 return ENOMEM;
608 * Make certain the data structures used by
609 * the PCnet32 are 16byte aligned
611 lp = (struct pcnet32_private *)(((unsigned long)priv+15) & ~15);
613 memset(lp, 0, sizeof(*lp));
614 dev->priv = lp;
615 lp->name = chipname;
616 lp->shared_irq = shared;
617 lp->full_duplex = fdx;
618 lp->mii = mii;
619 if (options[card_idx] > sizeof (options_mapping))
620 lp->options = PORT_ASEL;
621 else
622 lp->options = options_mapping[options[card_idx]];
624 if (fdx && !(lp->options & PORT_ASEL) && full_duplex[card_idx])
625 lp->options |= PORT_FD;
627 lp->origmem = priv;
628 lp->a = *a;
630 /* detect special T1/E1 WAN card by checking for MAC address */
631 if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 && dev->dev_addr[2] == 0x75)
632 lp->options = PORT_FD | PORT_GPSI;
634 lp->init_block.mode = le16_to_cpu(0x0003); /* Disable Rx and Tx. */
635 lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS);
636 for (i = 0; i < 6; i++)
637 lp->init_block.phys_addr[i] = dev->dev_addr[i];
638 lp->init_block.filter[0] = 0x00000000;
639 lp->init_block.filter[1] = 0x00000000;
640 lp->init_block.rx_ring = (u32)le32_to_cpu(virt_to_bus(lp->rx_ring));
641 lp->init_block.tx_ring = (u32)le32_to_cpu(virt_to_bus(lp->tx_ring));
643 /* switch pcnet32 to 32bit mode */
644 a->write_bcr (ioaddr, 20, 2);
646 a->write_csr (ioaddr, 1, virt_to_bus(&lp->init_block) & 0xffff);
647 a->write_csr (ioaddr, 2, virt_to_bus(&lp->init_block) >> 16);
649 if (irq_line) {
650 dev->irq = irq_line;
653 if (dev->irq >= 2)
654 printk(" assigned IRQ %d.\n", dev->irq);
655 else {
656 unsigned long irq_mask = probe_irq_on();
659 * To auto-IRQ we enable the initialization-done and DMA error
660 * interrupts. For ISA boards we get a DMA error, but VLB and PCI
661 * boards will work.
663 /* Trigger an initialization just for the interrupt. */
664 a->write_csr (ioaddr, 0, 0x41);
665 mdelay (1);
667 dev->irq = probe_irq_off (irq_mask);
668 if (dev->irq)
669 printk(", probed IRQ %d.\n", dev->irq);
670 else {
671 printk(", failed to detect IRQ line.\n");
672 return ENODEV;
676 if (pcnet32_debug > 0)
677 printk(version);
679 /* The PCNET32-specific entries in the device structure. */
680 dev->open = &pcnet32_open;
681 dev->hard_start_xmit = &pcnet32_start_xmit;
682 dev->stop = &pcnet32_close;
683 dev->get_stats = &pcnet32_get_stats;
684 dev->set_multicast_list = &pcnet32_set_multicast_list;
685 #ifdef HAVE_PRIVATE_IOCTL
686 dev->do_ioctl = &pcnet32_mii_ioctl;
687 #endif
690 #ifdef MODULE
691 lp->next = pcnet32_dev;
692 pcnet32_dev = dev;
693 #endif
695 /* Fill in the generic fields of the device structure. */
696 ether_setup(dev);
697 return 0;
701 static int
702 pcnet32_open(struct net_device *dev)
704 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
705 unsigned long ioaddr = dev->base_addr;
706 u16 val;
707 int i;
709 if (dev->irq == 0 ||
710 request_irq(dev->irq, &pcnet32_interrupt,
711 lp->shared_irq ? SA_SHIRQ : 0, lp->name, (void *)dev)) {
712 return -EAGAIN;
715 /* Reset the PCNET32 */
716 lp->a.reset (ioaddr);
718 /* switch pcnet32 to 32bit mode */
719 lp->a.write_bcr (ioaddr, 20, 2);
721 if (pcnet32_debug > 1)
722 printk("%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n",
723 dev->name, dev->irq,
724 (u32) virt_to_bus(lp->tx_ring),
725 (u32) virt_to_bus(lp->rx_ring),
726 (u32) virt_to_bus(&lp->init_block));
728 /* set/reset autoselect bit */
729 val = lp->a.read_bcr (ioaddr, 2) & ~2;
730 if (lp->options & PORT_ASEL)
731 val |= 2;
732 lp->a.write_bcr (ioaddr, 2, val);
734 /* handle full duplex setting */
735 if (lp->full_duplex) {
736 val = lp->a.read_bcr (ioaddr, 9) & ~3;
737 if (lp->options & PORT_FD) {
738 val |= 1;
739 if (lp->options == (PORT_FD | PORT_AUI))
740 val |= 2;
742 lp->a.write_bcr (ioaddr, 9, val);
745 /* set/reset GPSI bit in test register */
746 val = lp->a.read_csr (ioaddr, 124) & ~0x10;
747 if ((lp->options & PORT_PORTSEL) == PORT_GPSI)
748 val |= 0x10;
749 lp->a.write_csr (ioaddr, 124, val);
751 if (lp->mii & !(lp->options & PORT_ASEL)) {
752 val = lp->a.read_bcr (ioaddr, 32) & ~0x38; /* disable Auto Negotiation, set 10Mpbs, HD */
753 if (lp->options & PORT_FD)
754 val |= 0x10;
755 if (lp->options & PORT_100)
756 val |= 0x08;
757 lp->a.write_bcr (ioaddr, 32, val);
760 lp->init_block.mode = le16_to_cpu((lp->options & PORT_PORTSEL) << 7);
761 lp->init_block.filter[0] = 0x00000000;
762 lp->init_block.filter[1] = 0x00000000;
763 if (pcnet32_init_ring(dev))
764 return -ENOMEM;
766 /* Re-initialize the PCNET32, and start it when done. */
767 lp->a.write_csr (ioaddr, 1, virt_to_bus(&lp->init_block) &0xffff);
768 lp->a.write_csr (ioaddr, 2, virt_to_bus(&lp->init_block) >> 16);
770 lp->a.write_csr (ioaddr, 4, 0x0915);
771 lp->a.write_csr (ioaddr, 0, 0x0001);
773 dev->tbusy = 0;
774 dev->interrupt = 0;
775 dev->start = 1;
776 i = 0;
777 while (i++ < 100)
778 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
779 break;
781 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
782 * reports that doing so triggers a bug in the '974.
784 lp->a.write_csr (ioaddr, 0, 0x0042);
786 if (pcnet32_debug > 2)
787 printk("%s: PCNET32 open after %d ticks, init block %#x csr0 %4.4x.\n",
788 dev->name, i, (u32) virt_to_bus(&lp->init_block),
789 lp->a.read_csr (ioaddr, 0));
791 MOD_INC_USE_COUNT;
793 return 0; /* Always succeed */
797 * The LANCE has been halted for one reason or another (busmaster memory
798 * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
799 * etc.). Modern LANCE variants always reload their ring-buffer
800 * configuration when restarted, so we must reinitialize our ring
801 * context before restarting. As part of this reinitialization,
802 * find all packets still on the Tx ring and pretend that they had been
803 * sent (in effect, drop the packets on the floor) - the higher-level
804 * protocols will time out and retransmit. It'd be better to shuffle
805 * these skbs to a temp list and then actually re-Tx them after
806 * restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
809 static void
810 pcnet32_purge_tx_ring(struct net_device *dev)
812 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
813 int i;
815 for (i = 0; i < TX_RING_SIZE; i++) {
816 if (lp->tx_skbuff[i]) {
817 dev_kfree_skb(lp->tx_skbuff[i]);
818 lp->tx_skbuff[i] = NULL;
824 /* Initialize the PCNET32 Rx and Tx rings. */
825 static int
826 pcnet32_init_ring(struct net_device *dev)
828 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
829 int i;
831 lp->tx_full = 0;
832 lp->cur_rx = lp->cur_tx = 0;
833 lp->dirty_rx = lp->dirty_tx = 0;
835 for (i = 0; i < RX_RING_SIZE; i++) {
836 if (lp->rx_skbuff[i] == NULL) {
837 if (!(lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) {
838 /* there is not much, we can do at this point */
839 printk ("%s: pcnet32_init_ring dev_alloc_skb failed.\n",dev->name);
840 return -1;
842 skb_reserve (lp->rx_skbuff[i], 2);
844 lp->rx_ring[i].base = (u32)le32_to_cpu(virt_to_bus(lp->rx_skbuff[i]->tail));
845 lp->rx_ring[i].buf_length = le16_to_cpu(-PKT_BUF_SZ);
846 lp->rx_ring[i].status = le16_to_cpu(0x8000);
848 /* The Tx buffer address is filled in as needed, but we do need to clear
849 the upper ownership bit. */
850 for (i = 0; i < TX_RING_SIZE; i++) {
851 lp->tx_ring[i].base = 0;
852 lp->tx_ring[i].status = 0;
855 lp->init_block.tlen_rlen = TX_RING_LEN_BITS | RX_RING_LEN_BITS;
856 for (i = 0; i < 6; i++)
857 lp->init_block.phys_addr[i] = dev->dev_addr[i];
858 lp->init_block.rx_ring = (u32)le32_to_cpu(virt_to_bus(lp->rx_ring));
859 lp->init_block.tx_ring = (u32)le32_to_cpu(virt_to_bus(lp->tx_ring));
860 return 0;
863 static void
864 pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)
866 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
867 unsigned long ioaddr = dev->base_addr;
868 int i;
870 pcnet32_purge_tx_ring(dev);
871 if (pcnet32_init_ring(dev))
872 return;
874 /* ReInit Ring */
875 lp->a.write_csr (ioaddr, 0, 1);
876 i = 0;
877 while (i++ < 100)
878 if (lp->a.read_csr (ioaddr, 0) & 0x0100)
879 break;
881 lp->a.write_csr (ioaddr, 0, csr0_bits);
884 static int
885 pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev)
887 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
888 unsigned int ioaddr = dev->base_addr;
889 int entry;
890 unsigned long flags;
892 /* Transmitter timeout, serious problems. */
893 if (dev->tbusy) {
894 int tickssofar = jiffies - dev->trans_start;
895 if (tickssofar < HZ/2)
896 return 1;
897 printk("%s: transmit timed out, status %4.4x, resetting.\n",
898 dev->name, lp->a.read_csr (ioaddr, 0));
899 lp->a.write_csr (ioaddr, 0, 0x0004);
900 lp->stats.tx_errors++;
901 if (pcnet32_debug > 2) {
902 int i;
903 printk(" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
904 lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "",
905 lp->cur_rx);
906 for (i = 0 ; i < RX_RING_SIZE; i++)
907 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
908 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
909 lp->rx_ring[i].msg_length, (unsigned)lp->rx_ring[i].status);
910 for (i = 0 ; i < TX_RING_SIZE; i++)
911 printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ",
912 lp->tx_ring[i].base, -lp->tx_ring[i].length,
913 lp->tx_ring[i].misc, (unsigned)lp->tx_ring[i].status);
914 printk("\n");
916 pcnet32_restart(dev, 0x0042);
918 dev->tbusy = 0;
919 dev->trans_start = jiffies;
920 dev_kfree_skb(skb);
921 return 0;
924 if (pcnet32_debug > 3) {
925 printk("%s: pcnet32_start_xmit() called, csr0 %4.4x.\n",
926 dev->name, lp->a.read_csr (ioaddr, 0));
929 /* Block a timer-based transmit from overlapping. This could better be
930 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
931 if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
932 printk("%s: Transmitter access conflict.\n", dev->name);
933 return 1;
936 save_flags (flags);
937 cli ();
939 /* Fill in a Tx ring entry */
941 /* Mask to ring buffer boundary. */
942 entry = lp->cur_tx & TX_RING_MOD_MASK;
944 /* Caution: the write order is important here, set the base address
945 with the "ownership" bits last. */
947 lp->tx_ring[entry].length = le16_to_cpu(-skb->len);
949 lp->tx_ring[entry].misc = 0x00000000;
951 lp->tx_skbuff[entry] = skb;
952 lp->tx_ring[entry].base = (u32)le32_to_cpu(virt_to_bus(skb->data));
953 lp->tx_ring[entry].status = le16_to_cpu(0x8300);
955 lp->cur_tx++;
956 lp->stats.tx_bytes += skb->len;
958 /* Trigger an immediate send poll. */
959 lp->a.write_csr (ioaddr, 0, 0x0048);
961 dev->trans_start = jiffies;
963 if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base == 0)
964 clear_bit (0, (void *)&dev->tbusy);
965 else
966 lp->tx_full = 1;
967 restore_flags(flags);
968 return 0;
971 /* The PCNET32 interrupt handler. */
972 static void
973 pcnet32_interrupt(int irq, void *dev_id, struct pt_regs * regs)
975 struct net_device *dev = (struct net_device *)dev_id;
976 struct pcnet32_private *lp;
977 unsigned long ioaddr;
978 u16 csr0,rap;
979 int boguscnt = max_interrupt_work;
980 int must_restart;
982 if (dev == NULL) {
983 printk ("pcnet32_interrupt(): irq %d for unknown device.\n", irq);
984 return;
987 ioaddr = dev->base_addr;
988 lp = (struct pcnet32_private *)dev->priv;
989 if (dev->interrupt)
990 printk("%s: Re-entering the interrupt handler.\n", dev->name);
992 dev->interrupt = 1;
994 rap = lp->a.read_rap(ioaddr);
995 while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8600 && --boguscnt >= 0) {
996 /* Acknowledge all of the current interrupt sources ASAP. */
997 lp->a.write_csr (ioaddr, 0, csr0 & ~0x004f);
999 must_restart = 0;
1001 if (pcnet32_debug > 5)
1002 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1003 dev->name, csr0, lp->a.read_csr (ioaddr, 0));
1005 if (csr0 & 0x0400) /* Rx interrupt */
1006 pcnet32_rx(dev);
1008 if (csr0 & 0x0200) { /* Tx-done interrupt */
1009 int dirty_tx = lp->dirty_tx;
1011 while (dirty_tx < lp->cur_tx) {
1012 int entry = dirty_tx & TX_RING_MOD_MASK;
1013 int status = (short)le16_to_cpu(lp->tx_ring[entry].status);
1015 if (status < 0)
1016 break; /* It still hasn't been Txed */
1018 lp->tx_ring[entry].base = 0;
1020 if (status & 0x4000) {
1021 /* There was an major error, log it. */
1022 int err_status = le32_to_cpu(lp->tx_ring[entry].misc);
1023 lp->stats.tx_errors++;
1024 if (err_status & 0x04000000) lp->stats.tx_aborted_errors++;
1025 if (err_status & 0x08000000) lp->stats.tx_carrier_errors++;
1026 if (err_status & 0x10000000) lp->stats.tx_window_errors++;
1027 if (err_status & 0x40000000) {
1028 /* Ackk! On FIFO errors the Tx unit is turned off! */
1029 lp->stats.tx_fifo_errors++;
1030 /* Remove this verbosity later! */
1031 printk("%s: Tx FIFO error! Status %4.4x.\n",
1032 dev->name, csr0);
1033 must_restart = 1;
1035 } else {
1036 if (status & 0x1800)
1037 lp->stats.collisions++;
1038 lp->stats.tx_packets++;
1041 /* We must free the original skb */
1042 if (lp->tx_skbuff[entry]) {
1043 dev_kfree_skb(lp->tx_skbuff[entry]);
1044 lp->tx_skbuff[entry] = 0;
1046 dirty_tx++;
1049 #ifndef final_version
1050 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1051 printk("out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
1052 dirty_tx, lp->cur_tx, lp->tx_full);
1053 dirty_tx += TX_RING_SIZE;
1055 #endif
1056 if (lp->tx_full && dev->tbusy
1057 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
1058 /* The ring is no longer full, clear tbusy. */
1059 lp->tx_full = 0;
1060 clear_bit(0, (void *)&dev->tbusy);
1061 mark_bh(NET_BH);
1063 lp->dirty_tx = dirty_tx;
1066 /* Log misc errors. */
1067 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1068 if (csr0 & 0x1000) {
1070 * this happens when our receive ring is full. This shouldn't
1071 * be a problem as we will see normal rx interrupts for the frames
1072 * in the receive ring. But there are some PCI chipsets (I can reproduce
1073 * this on SP3G with Intel saturn chipset) which have sometimes problems
1074 * and will fill up the receive ring with error descriptors. In this
1075 * situation we don't get a rx interrupt, but a missed frame interrupt sooner
1076 * or later. So we try to clean up our receive ring here.
1078 pcnet32_rx(dev);
1079 lp->stats.rx_errors++; /* Missed a Rx frame. */
1081 if (csr0 & 0x0800) {
1082 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1083 dev->name, csr0);
1084 /* unlike for the lance, there is no restart needed */
1087 if (must_restart) {
1088 /* stop the chip to clear the error condition, then restart */
1089 lp->a.write_csr (ioaddr, 0, 0x0004);
1090 pcnet32_restart(dev, 0x0002);
1094 /* Clear any other interrupt, and set interrupt enable. */
1095 lp->a.write_csr (ioaddr, 0, 0x7940);
1096 lp->a.write_rap(ioaddr,rap);
1098 if (pcnet32_debug > 4)
1099 printk("%s: exiting interrupt, csr0=%#4.4x.\n",
1100 dev->name, lp->a.read_csr (ioaddr, 0));
1102 dev->interrupt = 0;
1103 return;
1106 static int
1107 pcnet32_rx(struct net_device *dev)
1109 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1110 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1111 int i;
1113 /* If we own the next entry, it's a new packet. Send it up. */
1114 while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) {
1115 int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8;
1117 if (status != 0x03) { /* There was an error. */
1119 * There is a tricky error noted by John Murphy,
1120 * <murf@perftech.com> to Russ Nelson: Even with full-sized
1121 * buffers it's possible for a jabber packet to use two
1122 * buffers, with only the last correctly noting the error.
1124 if (status & 0x01) /* Only count a general error at the */
1125 lp->stats.rx_errors++; /* end of a packet.*/
1126 if (status & 0x20) lp->stats.rx_frame_errors++;
1127 if (status & 0x10) lp->stats.rx_over_errors++;
1128 if (status & 0x08) lp->stats.rx_crc_errors++;
1129 if (status & 0x04) lp->stats.rx_fifo_errors++;
1130 lp->rx_ring[entry].status &= le16_to_cpu(0x03ff);
1131 } else {
1132 /* Malloc up new buffer, compatible with net-2e. */
1133 short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4;
1134 struct sk_buff *skb;
1136 if(pkt_len < 60) {
1137 printk("%s: Runt packet!\n",dev->name);
1138 lp->stats.rx_errors++;
1139 } else {
1140 int rx_in_place = 0;
1142 if (pkt_len > rx_copybreak) {
1143 struct sk_buff *newskb;
1145 if ((newskb = dev_alloc_skb (PKT_BUF_SZ))) {
1146 skb_reserve (newskb, 2);
1147 skb = lp->rx_skbuff[entry];
1148 skb_put (skb, pkt_len);
1149 lp->rx_skbuff[entry] = newskb;
1150 newskb->dev = dev;
1151 lp->rx_ring[entry].base = le32_to_cpu(virt_to_bus(newskb->tail));
1152 rx_in_place = 1;
1153 } else
1154 skb = NULL;
1155 } else
1156 skb = dev_alloc_skb(pkt_len+2);
1158 if (skb == NULL) {
1159 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1160 for (i=0; i < RX_RING_SIZE; i++)
1161 if ((short)le16_to_cpu(lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].status) < 0)
1162 break;
1164 if (i > RX_RING_SIZE -2) {
1165 lp->stats.rx_dropped++;
1166 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1167 lp->cur_rx++;
1169 break;
1171 skb->dev = dev;
1172 if (!rx_in_place) {
1173 skb_reserve(skb,2); /* 16 byte align */
1174 skb_put(skb,pkt_len); /* Make room */
1175 eth_copy_and_sum(skb,
1176 (unsigned char *)bus_to_virt(le32_to_cpu(lp->rx_ring[entry].base)),
1177 pkt_len,0);
1179 lp->stats.rx_bytes += skb->len;
1180 skb->protocol=eth_type_trans(skb,dev);
1181 netif_rx(skb);
1182 lp->stats.rx_packets++;
1186 * The docs say that the buffer length isn't touched, but Andrew Boyd
1187 * of QNX reports that some revs of the 79C965 clear it.
1189 lp->rx_ring[entry].buf_length = le16_to_cpu(-PKT_BUF_SZ);
1190 lp->rx_ring[entry].status |= le16_to_cpu(0x8000);
1191 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1194 return 0;
1197 static int
1198 pcnet32_close(struct net_device *dev)
1200 unsigned long ioaddr = dev->base_addr;
1201 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1202 int i;
1204 dev->start = 0;
1205 set_bit (0, (void *)&dev->tbusy);
1207 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
1209 if (pcnet32_debug > 1)
1210 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1211 dev->name, lp->a.read_csr (ioaddr, 0));
1213 /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */
1214 lp->a.write_csr (ioaddr, 0, 0x0004);
1217 * Switch back to 16bit mode to avoid problems with dumb
1218 * DOS packet driver after a warm reboot
1220 lp->a.write_bcr (ioaddr, 20, 4);
1222 free_irq(dev->irq, dev);
1224 /* free all allocated skbuffs */
1225 for (i = 0; i < RX_RING_SIZE; i++) {
1226 lp->rx_ring[i].status = 0;
1227 if (lp->rx_skbuff[i])
1228 dev_kfree_skb(lp->rx_skbuff[i]);
1229 lp->rx_skbuff[i] = NULL;
1232 for (i = 0; i < TX_RING_SIZE; i++) {
1233 if (lp->tx_skbuff[i])
1234 dev_kfree_skb(lp->tx_skbuff[i]);
1235 lp->rx_skbuff[i] = NULL;
1238 MOD_DEC_USE_COUNT;
1240 return 0;
1243 static struct net_device_stats *
1244 pcnet32_get_stats(struct net_device *dev)
1246 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1247 unsigned long ioaddr = dev->base_addr;
1248 u16 saved_addr;
1249 unsigned long flags;
1251 save_flags(flags);
1252 cli();
1253 saved_addr = lp->a.read_rap(ioaddr);
1254 lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112);
1255 lp->a.write_rap(ioaddr, saved_addr);
1256 restore_flags(flags);
1258 return &lp->stats;
1261 /* taken from the sunlance driver, which it took from the depca driver */
1262 static void pcnet32_load_multicast (struct net_device *dev)
1264 struct pcnet32_private *lp = (struct pcnet32_private *) dev->priv;
1265 volatile struct pcnet32_init_block *ib = &lp->init_block;
1266 volatile u16 *mcast_table = (u16 *)&ib->filter;
1267 struct dev_mc_list *dmi=dev->mc_list;
1268 char *addrs;
1269 int i, j, bit, byte;
1270 u32 crc, poly = CRC_POLYNOMIAL_LE;
1272 /* set all multicast bits */
1273 if (dev->flags & IFF_ALLMULTI){
1274 ib->filter [0] = 0xffffffff;
1275 ib->filter [1] = 0xffffffff;
1276 return;
1278 /* clear the multicast filter */
1279 ib->filter [0] = 0;
1280 ib->filter [1] = 0;
1282 /* Add addresses */
1283 for (i = 0; i < dev->mc_count; i++){
1284 addrs = dmi->dmi_addr;
1285 dmi = dmi->next;
1287 /* multicast address? */
1288 if (!(*addrs & 1))
1289 continue;
1291 crc = 0xffffffff;
1292 for (byte = 0; byte < 6; byte++)
1293 for (bit = *addrs++, j = 0; j < 8; j++, bit >>= 1) {
1294 int test;
1296 test = ((bit ^ crc) & 0x01);
1297 crc >>= 1;
1299 if (test) {
1300 crc = crc ^ poly;
1304 crc = crc >> 26;
1305 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1307 return;
1312 * Set or clear the multicast filter for this adaptor.
1314 static void pcnet32_set_multicast_list(struct net_device *dev)
1316 unsigned long ioaddr = dev->base_addr;
1317 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1319 if (dev->flags&IFF_PROMISC) {
1320 /* Log any net taps. */
1321 printk("%s: Promiscuous mode enabled.\n", dev->name);
1322 lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PORT_PORTSEL) << 7);
1323 } else {
1324 lp->init_block.mode = le16_to_cpu((lp->options & PORT_PORTSEL) << 7);
1325 pcnet32_load_multicast (dev);
1328 lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */
1330 pcnet32_restart(dev, 0x0042); /* Resume normal operation */
1333 #ifdef HAVE_PRIVATE_IOCTL
1334 static int pcnet32_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1336 unsigned long ioaddr = dev->base_addr;
1337 struct pcnet32_private *lp = (struct pcnet32_private *)dev->priv;
1338 u16 *data = (u16 *)&rq->ifr_data;
1339 int phyaddr = lp->a.read_bcr (ioaddr, 33);
1341 if (lp->mii) {
1342 switch(cmd) {
1343 case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */
1344 data[0] = (phyaddr >> 5) & 0x1f;
1345 /* Fall Through */
1346 case SIOCDEVPRIVATE+1: /* Read the specified MII register. */
1347 lp->a.write_bcr (ioaddr, 33, ((data[0] & 0x1f) << 5) | (data[1] & 0x1f));
1348 data[3] = lp->a.read_bcr (ioaddr, 34);
1349 lp->a.write_bcr (ioaddr, 33, phyaddr);
1350 return 0;
1351 case SIOCDEVPRIVATE+2: /* Write the specified MII register */
1352 if (!suser())
1353 return -EPERM;
1354 lp->a.write_bcr (ioaddr, 33, ((data[0] & 0x1f) << 5) | (data[1] & 0x1f));
1355 lp->a.write_bcr (ioaddr, 34, data[2]);
1356 lp->a.write_bcr (ioaddr, 33, phyaddr);
1357 return 0;
1358 default:
1359 return -EOPNOTSUPP;
1362 return -EOPNOTSUPP;
1364 #endif /* HAVE_PRIVATE_IOCTL */
1366 #ifdef MODULE
1367 MODULE_PARM(debug, "i");
1368 MODULE_PARM(max_interrupt_work, "i");
1369 MODULE_PARM(rx_copybreak, "i");
1370 MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");
1371 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
1374 /* An additional parameter that may be passed in... */
1375 static int debug = -1;
1378 init_module(void)
1380 if (debug > 0)
1381 pcnet32_debug = debug;
1383 pcnet32_dev = NULL;
1384 return pcnet32_probe(NULL);
1387 void
1388 cleanup_module(void)
1390 struct net_device *next_dev;
1392 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
1393 while (pcnet32_dev) {
1394 next_dev = ((struct pcnet32_private *) pcnet32_dev->priv)->next;
1395 unregister_netdev(pcnet32_dev);
1396 release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE);
1397 kfree(((struct pcnet32_private *)pcnet32_dev->priv)->origmem);
1398 kfree(pcnet32_dev);
1399 pcnet32_dev = next_dev;
1402 #endif /* MODULE */
1407 * Local variables:
1408 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c pcnet32.c"
1409 * c-indent-level: 4
1410 * tab-width: 4
1411 * End: