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1 /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
2 /*
3 Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
5 This software may be used and distributed according to the terms
6 of the GNU Public License, incorporated herein by reference.
8 This drivers was written with the following sources of reference:
9 - The driver for the Riebl Lance card by the TU Vienna.
10 - The modified TUW driver for PAM's VME cards
11 - The PC-Linux driver for Lance cards (but this is for bus master
12 cards, not the shared memory ones)
13 - The Amiga Ariadne driver
15 v1.0: (in 1.2.13pl4/0.9.13)
16 Initial version
17 v1.1: (in 1.2.13pl5)
18 more comments
19 deleted some debugging stuff
20 optimized register access (keep AREG pointing to CSR0)
21 following AMD, CSR0_STRT should be set only after IDON is detected
22 use memcpy() for data transfers, that also employs long word moves
23 better probe procedure for 24-bit systems
24 non-VME-RieblCards need extra delays in memcpy
25 must also do write test, since 0xfxe00000 may hit ROM
26 use 8/32 tx/rx buffers, which should give better NFS performance;
27 this is made possible by shifting the last packet buffer after the
28 RieblCard reserved area
29 v1.2: (in 1.2.13pl8)
30 again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
31 and thus RAM, in case of no Lance found all memory contents have to
32 be restored!
33 Now possible to compile as module.
34 v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
35 Several little 1.3 adaptions
36 When the lance is stopped it jumps back into little-endian
37 mode. It is therefore necessary to put it back where it
38 belongs, in big endian mode, in order to make things work.
39 This might be the reason why multicast-mode didn't work
40 before, but I'm not able to test it as I only got an Amiga
41 (we had similar problems with the A2065 driver).
45 static char *version = "atarilance.c: v1.3 04/04/96 "
46 "Roman.Hodek@informatik.uni-erlangen.de\n";
48 #include <linux/module.h>
50 #include <linux/stddef.h>
51 #include <linux/kernel.h>
52 #include <linux/sched.h>
53 #include <linux/string.h>
54 #include <linux/ptrace.h>
55 #include <linux/errno.h>
56 #include <linux/malloc.h>
57 #include <linux/interrupt.h>
58 #include <linux/init.h>
60 #include <asm/setup.h>
61 #include <asm/irq.h>
62 #include <asm/atarihw.h>
63 #include <asm/atariints.h>
64 #include <asm/bitops.h>
65 #include <asm/io.h>
67 #include <linux/netdevice.h>
68 #include <linux/etherdevice.h>
69 #include <linux/skbuff.h>
71 /* Debug level:
72 * 0 = silent, print only serious errors
73 * 1 = normal, print error messages
74 * 2 = debug, print debug infos
75 * 3 = debug, print even more debug infos (packet data)
78 #define LANCE_DEBUG 1
80 #ifdef LANCE_DEBUG
81 static int lance_debug = LANCE_DEBUG;
82 #else
83 static int lance_debug = 1;
84 #endif
85 MODULE_PARM(lance_debug, "i");
87 /* Print debug messages on probing? */
88 #undef LANCE_DEBUG_PROBE
90 #define DPRINTK(n,a) \
91 do { \
92 if (lance_debug >= n) \
93 printk a; \
94 } while( 0 )
96 #ifdef LANCE_DEBUG_PROBE
97 # define PROBE_PRINT(a) printk a
98 #else
99 # define PROBE_PRINT(a)
100 #endif
102 /* These define the number of Rx and Tx buffers as log2. (Only powers
103 * of two are valid)
104 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
105 * is more time critical then sending and packets may have to remain in the
106 * board's memory when main memory is low.
109 #define TX_LOG_RING_SIZE 3
110 #define RX_LOG_RING_SIZE 5
112 /* These are the derived values */
114 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
115 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
116 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
118 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
119 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
120 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
122 /* The LANCE Rx and Tx ring descriptors. */
123 struct lance_rx_head {
124 unsigned short base; /* Low word of base addr */
125 volatile unsigned char flag;
126 unsigned char base_hi; /* High word of base addr (unused) */
127 short buf_length; /* This length is 2s complement! */
128 volatile short msg_length; /* This length is "normal". */
131 struct lance_tx_head {
132 unsigned short base; /* Low word of base addr */
133 volatile unsigned char flag;
134 unsigned char base_hi; /* High word of base addr (unused) */
135 short length; /* Length is 2s complement! */
136 volatile short misc;
139 struct ringdesc {
140 unsigned short adr_lo; /* Low 16 bits of address */
141 unsigned char len; /* Length bits */
142 unsigned char adr_hi; /* High 8 bits of address (unused) */
145 /* The LANCE initialization block, described in databook. */
146 struct lance_init_block {
147 unsigned short mode; /* Pre-set mode */
148 unsigned char hwaddr[6]; /* Physical ethernet address */
149 unsigned filter[2]; /* Multicast filter (unused). */
150 /* Receive and transmit ring base, along with length bits. */
151 struct ringdesc rx_ring;
152 struct ringdesc tx_ring;
155 /* The whole layout of the Lance shared memory */
156 struct lance_memory {
157 struct lance_init_block init;
158 struct lance_tx_head tx_head[TX_RING_SIZE];
159 struct lance_rx_head rx_head[RX_RING_SIZE];
160 char packet_area[0]; /* packet data follow after the
161 * init block and the ring
162 * descriptors and are located
163 * at runtime */
166 /* RieblCard specifics:
167 * The original TOS driver for these cards reserves the area from offset
168 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
169 * Ethernet address there, and the magic for verifying the data's validity.
170 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
171 * is reserved for the interrupt vector number.
173 #define RIEBL_RSVD_START 0xee70
174 #define RIEBL_RSVD_END 0xeec0
175 #define RIEBL_MAGIC 0x09051990
176 #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a))
177 #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e))
178 #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe))
180 /* This is a default address for the old RieblCards without a battery
181 * that have no ethernet address at boot time. 00:00:36:04 is the
182 * prefix for Riebl cards, the 00:00 at the end is arbitrary.
185 static unsigned char OldRieblDefHwaddr[6] = {
186 0x00, 0x00, 0x36, 0x04, 0x00, 0x00
190 /* I/O registers of the Lance chip */
192 struct lance_ioreg {
193 /* base+0x0 */ volatile unsigned short data;
194 /* base+0x2 */ volatile unsigned short addr;
195 unsigned char _dummy1[3];
196 /* base+0x7 */ volatile unsigned char ivec;
197 unsigned char _dummy2[5];
198 /* base+0xd */ volatile unsigned char eeprom;
199 unsigned char _dummy3;
200 /* base+0xf */ volatile unsigned char mem;
203 /* Types of boards this driver supports */
205 enum lance_type {
206 OLD_RIEBL, /* old Riebl card without battery */
207 NEW_RIEBL, /* new Riebl card with battery */
208 PAM_CARD /* PAM card with EEPROM */
211 static char *lance_names[] = {
212 "Riebl-Card (without battery)",
213 "Riebl-Card (with battery)",
214 "PAM intern card"
217 /* The driver's private device structure */
219 struct lance_private {
220 enum lance_type cardtype;
221 struct lance_ioreg *iobase;
222 struct lance_memory *mem;
223 int cur_rx, cur_tx; /* The next free ring entry */
224 int dirty_tx; /* Ring entries to be freed. */
225 /* copy function */
226 void *(*memcpy_f)( void *, const void *, size_t );
227 struct net_device_stats stats;
228 /* These two must be ints for set_bit() */
229 int tx_full;
230 int lock;
233 /* I/O register access macros */
235 #define MEM lp->mem
236 #define DREG IO->data
237 #define AREG IO->addr
238 #define REGA(a) ( AREG = (a), DREG )
240 /* Definitions for packet buffer access: */
241 #define PKT_BUF_SZ 1544
242 /* Get the address of a packet buffer corresponding to a given buffer head */
243 #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base)
245 /* Possible memory/IO addresses for probing */
247 struct lance_addr {
248 unsigned long memaddr;
249 unsigned long ioaddr;
250 int slow_flag;
251 } lance_addr_list[] = {
252 { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */
253 { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE
254 (highest byte stripped) */
255 { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST
256 (highest byte stripped) */
257 { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to
258 avoid conflict with ROM
259 (highest byte stripped) */
260 { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE
261 (highest byte stripped) */
262 { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE
263 (highest byte stripped) */
266 #define N_LANCE_ADDR (sizeof(lance_addr_list)/sizeof(*lance_addr_list))
269 /* Definitions for the Lance */
271 /* tx_head flags */
272 #define TMD1_ENP 0x01 /* end of packet */
273 #define TMD1_STP 0x02 /* start of packet */
274 #define TMD1_DEF 0x04 /* deferred */
275 #define TMD1_ONE 0x08 /* one retry needed */
276 #define TMD1_MORE 0x10 /* more than one retry needed */
277 #define TMD1_ERR 0x40 /* error summary */
278 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
280 #define TMD1_OWN_CHIP TMD1_OWN
281 #define TMD1_OWN_HOST 0
283 /* tx_head misc field */
284 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
285 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
286 #define TMD3_LCAR 0x0800 /* carrier lost */
287 #define TMD3_LCOL 0x1000 /* late collision */
288 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
289 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
291 /* rx_head flags */
292 #define RMD1_ENP 0x01 /* end of packet */
293 #define RMD1_STP 0x02 /* start of packet */
294 #define RMD1_BUFF 0x04 /* buffer error */
295 #define RMD1_CRC 0x08 /* CRC error */
296 #define RMD1_OFLO 0x10 /* overflow */
297 #define RMD1_FRAM 0x20 /* framing error */
298 #define RMD1_ERR 0x40 /* error summary */
299 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
301 #define RMD1_OWN_CHIP RMD1_OWN
302 #define RMD1_OWN_HOST 0
304 /* register names */
305 #define CSR0 0 /* mode/status */
306 #define CSR1 1 /* init block addr (low) */
307 #define CSR2 2 /* init block addr (high) */
308 #define CSR3 3 /* misc */
309 #define CSR8 8 /* address filter */
310 #define CSR15 15 /* promiscuous mode */
312 /* CSR0 */
313 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
314 #define CSR0_INIT 0x0001 /* initialize (RS) */
315 #define CSR0_STRT 0x0002 /* start (RS) */
316 #define CSR0_STOP 0x0004 /* stop (RS) */
317 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
318 #define CSR0_TXON 0x0010 /* transmitter on (R) */
319 #define CSR0_RXON 0x0020 /* receiver on (R) */
320 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
321 #define CSR0_INTR 0x0080 /* interrupt active (R) */
322 #define CSR0_IDON 0x0100 /* initialization done (RC) */
323 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
324 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
325 #define CSR0_MERR 0x0800 /* memory error (RC) */
326 #define CSR0_MISS 0x1000 /* missed frame (RC) */
327 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
328 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
329 #define CSR0_ERR 0x8000 /* error (RC) */
331 /* CSR3 */
332 #define CSR3_BCON 0x0001 /* byte control */
333 #define CSR3_ACON 0x0002 /* ALE control */
334 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
338 /***************************** Prototypes *****************************/
340 static int addr_accessible( volatile void *regp, int wordflag, int
341 writeflag );
342 static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
343 *init_rec );
344 static int lance_open( struct net_device *dev );
345 static void lance_init_ring( struct net_device *dev );
346 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
347 static void lance_interrupt( int irq, void *dev_id, struct pt_regs *fp );
348 static int lance_rx( struct net_device *dev );
349 static int lance_close( struct net_device *dev );
350 static struct net_device_stats *lance_get_stats( struct net_device *dev );
351 static void set_multicast_list( struct net_device *dev );
352 static int lance_set_mac_address( struct net_device *dev, void *addr );
354 /************************* End of Prototypes **************************/
360 void *slow_memcpy( void *dst, const void *src, size_t len )
362 { char *cto = dst;
363 const char *cfrom = src;
365 while( len-- ) {
366 *cto++ = *cfrom++;
367 MFPDELAY();
369 return( dst );
373 int __init atarilance_probe( struct net_device *dev )
375 int i;
376 static int found = 0;
378 if (!MACH_IS_ATARI || found)
379 /* Assume there's only one board possible... That seems true, since
380 * the Riebl/PAM board's address cannot be changed. */
381 return( ENODEV );
383 for( i = 0; i < N_LANCE_ADDR; ++i ) {
384 if (lance_probe1( dev, &lance_addr_list[i] )) {
385 found = 1;
386 return( 0 );
390 return( ENODEV );
394 /* Derived from hwreg_present() in atari/config.c: */
396 static int __init addr_accessible( volatile void *regp, int wordflag, int writeflag )
398 int ret;
399 long flags;
400 long *vbr, save_berr;
402 save_flags(flags);
403 cli();
405 __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : );
406 save_berr = vbr[2];
408 __asm__ __volatile__
409 ( "movel %/sp,%/d1\n\t"
410 "movel #Lberr,%2@\n\t"
411 "moveq #0,%0\n\t"
412 "tstl %3\n\t"
413 "bne 1f\n\t"
414 "moveb %1@,%/d0\n\t"
415 "nop \n\t"
416 "bra 2f\n"
417 "1: movew %1@,%/d0\n\t"
418 "nop \n"
419 "2: tstl %4\n\t"
420 "beq 2f\n\t"
421 "tstl %3\n\t"
422 "bne 1f\n\t"
423 "clrb %1@\n\t"
424 "nop \n\t"
425 "moveb %/d0,%1@\n\t"
426 "nop \n\t"
427 "bra 2f\n"
428 "1: clrw %1@\n\t"
429 "nop \n\t"
430 "movew %/d0,%1@\n\t"
431 "nop \n"
432 "2: moveq #1,%0\n"
433 "Lberr: movel %/d1,%/sp"
434 : "=&d" (ret)
435 : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
436 : "d0", "d1", "memory"
439 vbr[2] = save_berr;
440 restore_flags(flags);
442 return( ret );
446 static unsigned long __init lance_probe1( struct net_device *dev,
447 struct lance_addr *init_rec )
449 volatile unsigned short *memaddr =
450 (volatile unsigned short *)init_rec->memaddr;
451 volatile unsigned short *ioaddr =
452 (volatile unsigned short *)init_rec->ioaddr;
453 struct lance_private *lp;
454 struct lance_ioreg *IO;
455 int i;
456 static int did_version = 0;
457 unsigned short save1, save2;
459 PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
460 (long)memaddr, (long)ioaddr ));
462 /* Test whether memory readable and writable */
463 PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
464 if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
466 /* Written values should come back... */
467 PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
468 save1 = *memaddr;
469 *memaddr = 0x0001;
470 if (*memaddr != 0x0001) goto probe_fail;
471 PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
472 *memaddr = 0x0000;
473 if (*memaddr != 0x0000) goto probe_fail;
474 *memaddr = save1;
476 /* First port should be readable and writable */
477 PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
478 if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
480 /* and written values should be readable */
481 PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
482 save2 = ioaddr[1];
483 ioaddr[1] = 0x0001;
484 if (ioaddr[1] != 0x0001) goto probe_fail;
486 /* The CSR0_INIT bit should not be readable */
487 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
488 save1 = ioaddr[0];
489 ioaddr[1] = CSR0;
490 ioaddr[0] = CSR0_INIT | CSR0_STOP;
491 if (ioaddr[0] != CSR0_STOP) {
492 ioaddr[0] = save1;
493 ioaddr[1] = save2;
494 goto probe_fail;
496 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
497 ioaddr[0] = CSR0_STOP;
498 if (ioaddr[0] != CSR0_STOP) {
499 ioaddr[0] = save1;
500 ioaddr[1] = save2;
501 goto probe_fail;
504 /* Now ok... */
505 PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
506 goto probe_ok;
508 probe_fail:
509 return( 0 );
511 probe_ok:
512 init_etherdev( dev, sizeof(struct lance_private) );
513 if (!dev->priv)
514 dev->priv = kmalloc( sizeof(struct lance_private), GFP_KERNEL );
515 lp = (struct lance_private *)dev->priv;
516 MEM = (struct lance_memory *)memaddr;
517 IO = lp->iobase = (struct lance_ioreg *)ioaddr;
518 dev->base_addr = (unsigned long)ioaddr; /* informational only */
519 lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
521 REGA( CSR0 ) = CSR0_STOP;
523 /* Now test for type: If the eeprom I/O port is readable, it is a
524 * PAM card */
525 if (addr_accessible( &(IO->eeprom), 0, 0 )) {
526 /* Switch back to Ram */
527 i = IO->mem;
528 lp->cardtype = PAM_CARD;
530 else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
531 lp->cardtype = NEW_RIEBL;
533 else
534 lp->cardtype = OLD_RIEBL;
536 if (lp->cardtype == PAM_CARD ||
537 memaddr == (unsigned short *)0xffe00000) {
538 /* PAMs card and Riebl on ST use level 5 autovector */
539 request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO,
540 "PAM/Riebl-ST Ethernet", dev);
541 dev->irq = (unsigned short)IRQ_AUTO_5;
543 else {
544 /* For VME-RieblCards, request a free VME int;
545 * (This must be unsigned long, since dev->irq is short and the
546 * IRQ_MACHSPEC bit would be cut off...)
548 unsigned long irq = atari_register_vme_int();
549 if (!irq) {
550 printk( "Lance: request for VME interrupt failed\n" );
551 return( 0 );
553 request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,
554 "Riebl-VME Ethernet", dev);
555 dev->irq = irq;
558 printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
559 dev->name, lance_names[lp->cardtype],
560 (unsigned long)ioaddr,
561 (unsigned long)memaddr,
562 dev->irq,
563 init_rec->slow_flag ? " (slow memcpy)" : "" );
565 /* Get the ethernet address */
566 switch( lp->cardtype ) {
567 case OLD_RIEBL:
568 /* No ethernet address! (Set some default address) */
569 memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 );
570 break;
571 case NEW_RIEBL:
572 lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 );
573 break;
574 case PAM_CARD:
575 i = IO->eeprom;
576 for( i = 0; i < 6; ++i )
577 dev->dev_addr[i] =
578 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
579 ((((unsigned short *)MEM)[i*2+1] & 0x0f));
580 i = IO->mem;
581 break;
583 for( i = 0; i < 6; ++i )
584 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
585 if (lp->cardtype == OLD_RIEBL) {
586 printk( "%s: Warning: This is a default ethernet address!\n",
587 dev->name );
588 printk( " Use \"ifconfig hw ether ...\" to set the address.\n" );
591 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */
592 for( i = 0; i < 6; i++ )
593 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
594 MEM->init.filter[0] = 0x00000000;
595 MEM->init.filter[1] = 0x00000000;
596 MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
597 MEM->init.rx_ring.adr_hi = 0;
598 MEM->init.rx_ring.len = RX_RING_LEN_BITS;
599 MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
600 MEM->init.tx_ring.adr_hi = 0;
601 MEM->init.tx_ring.len = TX_RING_LEN_BITS;
603 if (lp->cardtype == PAM_CARD)
604 IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
605 else
606 *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
608 if (did_version++ == 0)
609 DPRINTK( 1, ( version ));
611 /* The LANCE-specific entries in the device structure. */
612 dev->open = &lance_open;
613 dev->hard_start_xmit = &lance_start_xmit;
614 dev->stop = &lance_close;
615 dev->get_stats = &lance_get_stats;
616 dev->set_multicast_list = &set_multicast_list;
617 dev->set_mac_address = &lance_set_mac_address;
618 dev->start = 0;
620 memset( &lp->stats, 0, sizeof(lp->stats) );
622 return( 1 );
626 static int lance_open( struct net_device *dev )
628 { struct lance_private *lp = (struct lance_private *)dev->priv;
629 struct lance_ioreg *IO = lp->iobase;
630 int i;
632 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
634 lance_init_ring(dev);
635 /* Re-initialize the LANCE, and start it when done. */
637 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
638 REGA( CSR2 ) = 0;
639 REGA( CSR1 ) = 0;
640 REGA( CSR0 ) = CSR0_INIT;
641 /* From now on, AREG is kept to point to CSR0 */
643 i = 1000000;
644 while (--i > 0)
645 if (DREG & CSR0_IDON)
646 break;
647 if (i < 0 || (DREG & CSR0_ERR)) {
648 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
649 dev->name, i, DREG ));
650 DREG = CSR0_STOP;
651 return( -EIO );
653 DREG = CSR0_IDON;
654 DREG = CSR0_STRT;
655 DREG = CSR0_INEA;
657 dev->tbusy = 0;
658 dev->interrupt = 0;
659 dev->start = 1;
661 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
662 MOD_INC_USE_COUNT;
664 return( 0 );
668 /* Initialize the LANCE Rx and Tx rings. */
670 static void lance_init_ring( struct net_device *dev )
672 { struct lance_private *lp = (struct lance_private *)dev->priv;
673 int i;
674 unsigned offset;
676 lp->lock = 0;
677 lp->tx_full = 0;
678 lp->cur_rx = lp->cur_tx = 0;
679 lp->dirty_tx = 0;
681 offset = offsetof( struct lance_memory, packet_area );
683 /* If the packet buffer at offset 'o' would conflict with the reserved area
684 * of RieblCards, advance it */
685 #define CHECK_OFFSET(o) \
686 do { \
687 if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \
688 if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
689 : (o) < RIEBL_RSVD_END) \
690 (o) = RIEBL_RSVD_END; \
692 } while(0)
694 for( i = 0; i < TX_RING_SIZE; i++ ) {
695 CHECK_OFFSET(offset);
696 MEM->tx_head[i].base = offset;
697 MEM->tx_head[i].flag = TMD1_OWN_HOST;
698 MEM->tx_head[i].base_hi = 0;
699 MEM->tx_head[i].length = 0;
700 MEM->tx_head[i].misc = 0;
701 offset += PKT_BUF_SZ;
704 for( i = 0; i < RX_RING_SIZE; i++ ) {
705 CHECK_OFFSET(offset);
706 MEM->rx_head[i].base = offset;
707 MEM->rx_head[i].flag = TMD1_OWN_CHIP;
708 MEM->rx_head[i].base_hi = 0;
709 MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
710 MEM->rx_head[i].msg_length = 0;
711 offset += PKT_BUF_SZ;
716 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
718 { struct lance_private *lp = (struct lance_private *)dev->priv;
719 struct lance_ioreg *IO = lp->iobase;
720 int entry, len;
721 struct lance_tx_head *head;
722 unsigned long flags;
724 /* Transmitter timeout, serious problems. */
725 if (dev->tbusy) {
726 int tickssofar = jiffies - dev->trans_start;
727 if (tickssofar < 20)
728 return( 1 );
729 AREG = CSR0;
730 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
731 dev->name, DREG ));
732 DREG = CSR0_STOP;
734 * Always set BSWP after a STOP as STOP puts it back into
735 * little endian mode.
737 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
738 lp->stats.tx_errors++;
739 #ifndef final_version
740 { int i;
741 DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
742 lp->dirty_tx, lp->cur_tx,
743 lp->tx_full ? " (full)" : "",
744 lp->cur_rx ));
745 for( i = 0 ; i < RX_RING_SIZE; i++ )
746 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
747 i, MEM->rx_head[i].base,
748 -MEM->rx_head[i].buf_length,
749 MEM->rx_head[i].msg_length ));
750 for( i = 0 ; i < TX_RING_SIZE; i++ )
751 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
752 i, MEM->tx_head[i].base,
753 -MEM->tx_head[i].length,
754 MEM->tx_head[i].misc ));
756 #endif
757 lance_init_ring(dev);
758 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
760 dev->tbusy = 0;
761 dev->trans_start = jiffies;
763 return( 0 );
766 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
767 dev->name, DREG ));
769 /* Block a timer-based transmit from overlapping. This could better be
770 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
771 if (test_and_set_bit( 0, (void*)&dev->tbusy ) != 0) {
772 DPRINTK( 0, ( "%s: Transmitter access conflict.\n", dev->name ));
773 return 1;
776 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
777 DPRINTK( 0, ( "%s: tx queue lock!.\n", dev->name ));
778 /* don't clear dev->tbusy flag. */
779 return 1;
782 /* Fill in a Tx ring entry */
783 if (lance_debug >= 3) {
784 u_char *p;
785 int i;
786 printk( "%s: TX pkt type 0x%04x from ", dev->name,
787 ((u_short *)skb->data)[6]);
788 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
789 printk("%02x%s", *p++, i != 5 ? ":" : "" );
790 printk(" to ");
791 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
792 printk("%02x%s", *p++, i != 5 ? ":" : "" );
793 printk(" data at 0x%08x len %d\n", (int)skb->data,
794 (int)skb->len );
797 /* We're not prepared for the int until the last flags are set/reset. And
798 * the int may happen already after setting the OWN_CHIP... */
799 save_flags(flags);
800 cli();
802 /* Mask to ring buffer boundary. */
803 entry = lp->cur_tx & TX_RING_MOD_MASK;
804 head = &(MEM->tx_head[entry]);
806 /* Caution: the write order is important here, set the "ownership" bits
807 * last.
810 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
811 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
812 /* PAM-Card has a bug: Can only send packets with even number of bytes! */
813 if (lp->cardtype == PAM_CARD && (len & 1))
814 ++len;
816 head->length = -len;
817 head->misc = 0;
818 lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
819 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
820 dev_kfree_skb( skb );
821 lp->cur_tx++;
822 lp->stats.tx_bytes += skb->len;
823 while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
824 lp->cur_tx -= TX_RING_SIZE;
825 lp->dirty_tx -= TX_RING_SIZE;
828 /* Trigger an immediate send poll. */
829 DREG = CSR0_INEA | CSR0_TDMD;
830 dev->trans_start = jiffies;
832 lp->lock = 0;
833 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
834 TMD1_OWN_HOST)
835 dev->tbusy = 0;
836 else
837 lp->tx_full = 1;
838 restore_flags(flags);
840 return 0;
843 /* The LANCE interrupt handler. */
845 static void lance_interrupt( int irq, void *dev_id, struct pt_regs *fp)
847 struct net_device *dev = dev_id;
848 struct lance_private *lp;
849 struct lance_ioreg *IO;
850 int csr0, boguscnt = 10;
852 if (dev == NULL) {
853 DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
854 return;
857 lp = (struct lance_private *)dev->priv;
858 IO = lp->iobase;
859 AREG = CSR0;
861 if (dev->interrupt)
862 DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev->name ));
863 dev->interrupt = 1;
865 while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
866 --boguscnt >= 0) {
867 /* Acknowledge all of the current interrupt sources ASAP. */
868 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
869 CSR0_TDMD | CSR0_INEA);
871 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
872 dev->name, csr0, DREG ));
874 if (csr0 & CSR0_RINT) /* Rx interrupt */
875 lance_rx( dev );
877 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
878 int dirty_tx = lp->dirty_tx;
880 while( dirty_tx < lp->cur_tx) {
881 int entry = dirty_tx & TX_RING_MOD_MASK;
882 int status = MEM->tx_head[entry].flag;
884 if (status & TMD1_OWN_CHIP)
885 break; /* It still hasn't been Txed */
887 MEM->tx_head[entry].flag = 0;
889 if (status & TMD1_ERR) {
890 /* There was an major error, log it. */
891 int err_status = MEM->tx_head[entry].misc;
892 lp->stats.tx_errors++;
893 if (err_status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
894 if (err_status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
895 if (err_status & TMD3_LCOL) lp->stats.tx_window_errors++;
896 if (err_status & TMD3_UFLO) {
897 /* Ackk! On FIFO errors the Tx unit is turned off! */
898 lp->stats.tx_fifo_errors++;
899 /* Remove this verbosity later! */
900 DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
901 dev->name, csr0 ));
902 /* Restart the chip. */
903 DREG = CSR0_STRT;
905 } else {
906 if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
907 lp->stats.collisions++;
908 lp->stats.tx_packets++;
910 dirty_tx++;
913 #ifndef final_version
914 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
915 DPRINTK( 0, ( "out-of-sync dirty pointer,"
916 " %d vs. %d, full=%d.\n",
917 dirty_tx, lp->cur_tx, lp->tx_full ));
918 dirty_tx += TX_RING_SIZE;
920 #endif
922 if (lp->tx_full && dev->tbusy
923 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
924 /* The ring is no longer full, clear tbusy. */
925 lp->tx_full = 0;
926 dev->tbusy = 0;
927 mark_bh( NET_BH );
930 lp->dirty_tx = dirty_tx;
933 /* Log misc errors. */
934 if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
935 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
936 if (csr0 & CSR0_MERR) {
937 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
938 "status %04x.\n", dev->name, csr0 ));
939 /* Restart the chip. */
940 DREG = CSR0_STRT;
944 /* Clear any other interrupt, and set interrupt enable. */
945 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
946 CSR0_IDON | CSR0_INEA;
948 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
949 dev->name, DREG ));
950 dev->interrupt = 0;
951 return;
955 static int lance_rx( struct net_device *dev )
957 { struct lance_private *lp = (struct lance_private *)dev->priv;
958 int entry = lp->cur_rx & RX_RING_MOD_MASK;
959 int i;
961 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
962 MEM->rx_head[entry].flag ));
964 /* If we own the next entry, it's a new packet. Send it up. */
965 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
966 struct lance_rx_head *head = &(MEM->rx_head[entry]);
967 int status = head->flag;
969 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
970 /* There is a tricky error noted by John Murphy,
971 <murf@perftech.com> to Russ Nelson: Even with full-sized
972 buffers it's possible for a jabber packet to use two
973 buffers, with only the last correctly noting the error. */
974 if (status & RMD1_ENP) /* Only count a general error at the */
975 lp->stats.rx_errors++; /* end of a packet.*/
976 if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
977 if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
978 if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
979 if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
980 head->flag &= (RMD1_ENP|RMD1_STP);
981 } else {
982 /* Malloc up new buffer, compatible with net-3. */
983 short pkt_len = head->msg_length & 0xfff;
984 struct sk_buff *skb;
986 if (pkt_len < 60) {
987 printk( "%s: Runt packet!\n", dev->name );
988 lp->stats.rx_errors++;
990 else {
991 skb = dev_alloc_skb( pkt_len+2 );
992 if (skb == NULL) {
993 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
994 dev->name ));
995 for( i = 0; i < RX_RING_SIZE; i++ )
996 if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
997 RMD1_OWN_CHIP)
998 break;
1000 if (i > RX_RING_SIZE - 2) {
1001 lp->stats.rx_dropped++;
1002 head->flag |= RMD1_OWN_CHIP;
1003 lp->cur_rx++;
1005 break;
1008 if (lance_debug >= 3) {
1009 u_char *data = PKTBUF_ADDR(head), *p;
1010 printk( "%s: RX pkt type 0x%04x from ", dev->name,
1011 ((u_short *)data)[6]);
1012 for( p = &data[6], i = 0; i < 6; i++ )
1013 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1014 printk(" to ");
1015 for( p = data, i = 0; i < 6; i++ )
1016 printk("%02x%s", *p++, i != 5 ? ":" : "" );
1017 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
1018 "len %d\n",
1019 data[15], data[16], data[17], data[18],
1020 data[19], data[20], data[21], data[22],
1021 pkt_len );
1024 skb->dev = dev;
1025 skb_reserve( skb, 2 ); /* 16 byte align */
1026 skb_put( skb, pkt_len ); /* Make room */
1027 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1028 skb->protocol = eth_type_trans( skb, dev );
1029 netif_rx( skb );
1030 lp->stats.rx_packets++;
1031 lp->stats.rx_bytes += skb->len;
1035 head->flag |= RMD1_OWN_CHIP;
1036 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1038 lp->cur_rx &= RX_RING_MOD_MASK;
1040 /* From lance.c (Donald Becker): */
1041 /* We should check that at least two ring entries are free. If not,
1042 we should free one and mark stats->rx_dropped++. */
1044 return 0;
1048 static int lance_close( struct net_device *dev )
1050 { struct lance_private *lp = (struct lance_private *)dev->priv;
1051 struct lance_ioreg *IO = lp->iobase;
1053 dev->start = 0;
1054 dev->tbusy = 1;
1056 AREG = CSR0;
1058 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1059 dev->name, DREG ));
1061 /* We stop the LANCE here -- it occasionally polls
1062 memory if we don't. */
1063 DREG = CSR0_STOP;
1065 MOD_DEC_USE_COUNT;
1066 return 0;
1070 static struct net_device_stats *lance_get_stats( struct net_device *dev )
1072 { struct lance_private *lp = (struct lance_private *)dev->priv;
1074 return &lp->stats;
1078 /* Set or clear the multicast filter for this adaptor.
1079 num_addrs == -1 Promiscuous mode, receive all packets
1080 num_addrs == 0 Normal mode, clear multicast list
1081 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1082 best-effort filtering.
1085 static void set_multicast_list( struct net_device *dev )
1087 { struct lance_private *lp = (struct lance_private *)dev->priv;
1088 struct lance_ioreg *IO = lp->iobase;
1090 if (!dev->start)
1091 /* Only possible if board is already started */
1092 return;
1094 /* We take the simple way out and always enable promiscuous mode. */
1095 DREG = CSR0_STOP; /* Temporarily stop the lance. */
1097 if (dev->flags & IFF_PROMISC) {
1098 /* Log any net taps. */
1099 DPRINTK( 1, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1100 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1101 } else {
1102 short multicast_table[4];
1103 int num_addrs = dev->mc_count;
1104 int i;
1105 /* We don't use the multicast table, but rely on upper-layer
1106 * filtering. */
1107 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1108 sizeof(multicast_table) );
1109 for( i = 0; i < 4; i++ )
1110 REGA( CSR8+i ) = multicast_table[i];
1111 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1115 * Always set BSWP after a STOP as STOP puts it back into
1116 * little endian mode.
1118 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1120 /* Resume normal operation and reset AREG to CSR0 */
1121 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1125 /* This is needed for old RieblCards and possible for new RieblCards */
1127 static int lance_set_mac_address( struct net_device *dev, void *addr )
1129 { struct lance_private *lp = (struct lance_private *)dev->priv;
1130 struct sockaddr *saddr = addr;
1131 int i;
1133 if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1134 return( -EOPNOTSUPP );
1136 if (dev->start) {
1137 /* Only possible while card isn't started */
1138 DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1139 dev->name ));
1140 return( -EIO );
1143 memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1144 for( i = 0; i < 6; i++ )
1145 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1146 lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1147 /* set also the magic for future sessions */
1148 *RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1150 return( 0 );
1154 #ifdef MODULE
1155 static char devicename[9] = { 0, };
1157 static struct net_device atarilance_dev =
1159 devicename, /* filled in by register_netdev() */
1160 0, 0, 0, 0, /* memory */
1161 0, 0, /* base, irq */
1162 0, 0, 0, NULL, atarilance_probe,
1165 int init_module(void)
1167 { int err;
1169 if ((err = register_netdev( &atarilance_dev ))) {
1170 if (err == -EIO) {
1171 printk( "No Atari Lance board found. Module not loaded.\n");
1173 return( err );
1175 return( 0 );
1178 void cleanup_module(void)
1181 unregister_netdev( &atarilance_dev );
1184 #endif /* MODULE */
1188 * Local variables:
1189 * c-indent-level: 4
1190 * tab-width: 4
1191 * End: