include/linux/i2o.h

   1 #ifndef _I2O_H
   2 #define _I2O_H
   3
   4 /*
   5  *      Tunable parameters first
   6  */
   7
   8 /* How many different OSM's are we allowing */
   9 #define MAX_I2O_MODULES         64
  10 /* How many controllers are we allowing */
  11 #define MAX_I2O_CONTROLLERS     32
  12
  13 #include <linux/ioctl.h>
  14
  15 /*
  16  * I2O Control IOCTLs and structures
  17  */
  18 #define I2O_MAGIC_NUMBER        'i'
  19 #define I2OGETIOPS              _IOR(I2O_MAGIC_NUMBER,0,u8[MAX_I2O_CONTROLLERS])
  20 #define I2OHRTGET               _IOWR(I2O_MAGIC_NUMBER,1,struct i2o_cmd_hrtlct)
  21 #define I2OLCTGET               _IOWR(I2O_MAGIC_NUMBER,2,struct i2o_cmd_hrtlct)
  22 #define I2OPARMSET              _IOWR(I2O_MAGIC_NUMBER,3,struct i2o_cmd_psetget)
  23 #define I2OPARMGET              _IOWR(I2O_MAGIC_NUMBER,4,struct i2o_cmd_psetget)
  24 #define I2OSWDL                 _IOWR(I2O_MAGIC_NUMBER,5,struct i2o_sw_xfer)
  25 #define I2OSWUL                 _IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer)
  26 #define I2OSWDEL                _IOWR(I2O_MAGIC_NUMBER,7,struct i2o_sw_xfer)
  27 #define I2OVALIDATE             _IOR(I2O_MAGIC_NUMBER,8,u32)
  28 #define I2OHTML                 _IOWR(I2O_MAGIC_NUMBER,9,struct i2o_html)
  29
  30 /* On hold until we figure this out
  31 #define I2OEVTREG               _IO(I2O_MAGIC_NUMBER,10)
  32 #define I2OEVTCLR               _IO(I2O_MAGIC_NUMBER,11)
  33 #define I2OEVTGET               _IO(I2O_MAGIC_NUMBER,12)
  34  */
  35
  36 struct i2o_cmd_hrtlct
  37 {
  38         unsigned int iop;       /* IOP unit number */
  39         void *resbuf;           /* Buffer for result */
  40         unsigned int *reslen;   /* Buffer length in bytes */
  41 };
  42
  43 struct i2o_cmd_psetget
  44 {
  45         unsigned int iop;       /* IOP unit number */
  46         unsigned int tid;       /* Target device TID */
  47         void *opbuf;            /* Operation List buffer */
  48         unsigned int oplen;     /* Operation List buffer length in bytes */
  49         void *resbuf;           /* Result List buffer */
  50         unsigned int *reslen;   /* Result List buffer length in bytes */
  51 };
  52
  53 struct i2o_sw_xfer
  54 {
  55         unsigned int iop;       /* IOP unit number */
  56         unsigned char flags;    /* Flags field */
  57         unsigned char sw_type;  /* Software type */
  58         unsigned int sw_id;     /* Software ID */
  59         void *buf;              /* Pointer to software buffer */
  60         unsigned int *swlen;    /* Length of software data */
  61         unsigned int *maxfrag;  /* Maximum fragment count */
  62         unsigned int *curfrag;  /* Current fragment count */
  63 };
  64
  65 struct i2o_html
  66 {
  67         unsigned int iop;       /* IOP unit number */
  68         unsigned int tid;       /* Target device ID */
  69         unsigned int page;      /* HTML page */
  70         void *resbuf;           /* Buffer for reply HTML page */
  71         unsigned int *reslen;   /* Length in bytes of reply buffer */
  72         void *qbuf;             /* Pointer to HTTP query string */
  73         unsigned int qlen;      /* Length in bytes of query string buffer */
  74 };
  75
  76
  77 /**************************************************************************
  78  * HRT related constants and structures
  79  **************************************************************************/
  80 #define I2O_BUS_LOCAL   0
  81 #define I2O_BUS_ISA     1
  82 #define I2O_BUS_EISA    2
  83 #define I2O_BUS_MCA     3
  84 #define I2O_BUS_PCI     4
  85 #define I2O_BUS_PCMCIA  5
  86 #define I2O_BUS_NUBUS   6
  87 #define I2O_BUS_CARDBUS 7
  88 #define I2O_BUS_UNKNOWN 0x80
  89
  90 #ifndef __KERNEL__
  91 typedef unsigned char u8;
  92 typedef unsigned short u16;
  93 typedef unsigned int u32;
  94 #endif /* __KERNEL__ */
  95
  96 typedef struct _i2o_pci_bus {
  97         u8 PciFunctionNumber;
  98         u8 PciDeviceNumber;
  99         u8 PciBusNumber;
 100         u8 reserved;
 101         u16 PciVendorID;
 102         u16 PciDeviceID;
 103 } i2o_pci_bus, *pi2o_pci_bus;
 104
 105 typedef struct _i2o_local_bus {
 106         u16 LbBaseIOPort;
 107         u16 reserved;
 108         u32 LbBaseMemoryAddress;
 109 } i2o_local_bus, *pi2o_local_bus;
 110
 111 typedef struct _i2o_isa_bus {
 112         u16 IsaBaseIOPort;
 113         u8 CSN;
 114         u8 reserved;
 115         u32 IsaBaseMemoryAddress;
 116 } i2o_isa_bus, *pi2o_isa_bus;
 117
 118 typedef struct _i2o_eisa_bus_info {
 119         u16 EisaBaseIOPort;
 120         u8 reserved;
 121         u8 EisaSlotNumber;
 122         u32 EisaBaseMemoryAddress;
 123 } i2o_eisa_bus, *pi2o_eisa_bus;
 124
 125 typedef struct _i2o_mca_bus {
 126         u16 McaBaseIOPort;
 127         u8 reserved;
 128         u8 McaSlotNumber;
 129         u32 McaBaseMemoryAddress;
 130 } i2o_mca_bus, *pi2o_mca_bus;
 131
 132 typedef struct _i2o_other_bus {
 133         u16 BaseIOPort;
 134         u16 reserved;
 135         u32 BaseMemoryAddress;
 136 } i2o_other_bus, *pi2o_other_bus;
 137
 138 typedef struct _i2o_hrt_entry {
 139         u32 adapter_id;
 140         u32 parent_tid:12;
 141         u32 state:4;
 142         u32 bus_num:8;
 143         u32 bus_type:8;
 144         union {
 145                 i2o_pci_bus pci_bus;
 146                 i2o_local_bus local_bus;
 147                 i2o_isa_bus isa_bus;
 148                 i2o_eisa_bus eisa_bus;
 149                 i2o_mca_bus mca_bus;
 150                 i2o_other_bus other_bus;
 151         } bus;
 152 } i2o_hrt_entry, *pi2o_hrt_entry;
 153
 154 typedef struct _i2o_hrt {
 155         u16 num_entries;
 156         u8 entry_len;
 157         u8 hrt_version;
 158         u32 change_ind;
 159         i2o_hrt_entry hrt_entry[1];
 160 } i2o_hrt, *pi2o_hrt;
 161
 162 typedef struct _i2o_lct_entry {
 163         u32 entry_size:16;
 164         u32 tid:12;
 165         u32 reserved:4;
 166         u32 change_ind;
 167         u32 device_flags;
 168         u32 class_id:12;
 169         u32 version:4;
 170         u32 vendor_id:16;
 171         u32 sub_class;
 172         u32 user_tid:12;
 173         u32 parent_tid:12;
 174         u32 bios_info:8;
 175         u8 identity_tag[8];
 176         u32 event_capabilities;
 177 } i2o_lct_entry, *pi2o_lct_entry;
 178
 179 typedef struct _i2o_lct {
 180         u32 table_size:16;
 181         u32 boot_tid:12;
 182         u32 lct_ver:4;
 183         u32 iop_flags;
 184         u32 current_change_ind;
 185         i2o_lct_entry lct_entry[1];
 186 } i2o_lct, *pi2o_lct;
 187
 188 typedef struct _i2o_status_block {
 189         u16 org_id;
 190         u16 reserved;
 191         u16 iop_id:12;
 192         u16 reserved1:4;
 193         u16 host_unit_id;
 194         u16 segment_number:12;
 195         u16 i2o_version:4;
 196         u8 iop_state;
 197         u8 msg_type;
 198         u16 inbound_frame_size;
 199         u8 init_code;
 200         u8 reserved2;
 201         u32 max_inbound_frames;
 202         u32 max_outbound_frames;
 203         char product_id[24];
 204         u32 expected_lct_size;
 205         u32 iop_capabilities;
 206         u32 desired_mem_size;
 207         u32 current_mem_size;
 208         u32 current_mem_base;
 209         u32 desired_io_size;
 210         u32 current_io_size;
 211         u32 current_io_base;
 212         u32 reserved3:24;
 213         u32 cmd_status:8;
 214 } i2o_status_block, *pi2o_status_block;
 215
 216
 217
 218 #ifdef __KERNEL__   /* ioctl stuff only thing exported to users */
 219
 220 #define I2O_MAX_MANAGERS        4
 221
 222 /*
 223  *      I2O Interface Objects
 224  */
 225
 226 #include <linux/config.h>
 227 #include <linux/notifier.h>
 228 #include <asm/atomic.h>
 229
 230 /*
 231  * message structures
 232  */
 233
 234 struct i2o_message
 235 {
 236         u32     version_size;
 237         u32     function_addr;
 238         u32     initiator_context;
 239         /* List follows */
 240 };
 241
 242 /*
 243  *      Each I2O device entity has one or more of these. There is one
 244  *      per device. *FIXME* how to handle multiple types on one unit.
 245  */
 246
 247 struct i2o_device
 248 {
 249         pi2o_lct_entry lct_data;/* Device LCT information */
 250         u32 flags;
 251         int i2oversion;         /* I2O version supported. Actually there
 252                                  * should be high and low version */
 253
 254         struct proc_dir_entry* proc_entry;      /* /proc dir */
 255
 256         /* Primary user */
 257         struct i2o_handler *owner;
 258
 259         /* Management users */
 260         struct i2o_handler *managers[I2O_MAX_MANAGERS];
 261         int num_managers;
 262
 263         struct i2o_controller *controller;      /* Controlling IOP */
 264         struct i2o_device *next;        /* Chain */
 265         char dev_name[8];               /* linux /dev name if available */
 266 };
 267
 268 /*
 269  *      Resource data for each PCI I2O controller
 270  */
 271 struct i2o_pci
 272 {
 273         int irq;
 274 #ifdef CONFIG_MTRR
 275         int mtrr_reg;
 276 #endif
 277 };
 278
 279
 280 /*
 281  *      Each I2O controller has one of these objects
 282  */
 283
 284 struct i2o_controller
 285 {
 286         char name[16];
 287         int unit;
 288         int type;
 289
 290 #define I2O_TYPE_PCI            0x01            /* PCI I2O controller */
 291
 292         struct notifier_block *event_notifer;   /* Events */
 293         atomic_t users;
 294         struct i2o_device *devices;             /* I2O device chain */
 295         struct i2o_controller *next;            /* Controller chain */
 296         volatile u32 *post_port;                /* Messaging ports */
 297         volatile u32 *reply_port;
 298         volatile u32 *irq_mask;                 /* Interrupt port */
 299
 300         pi2o_status_block status_block;         /* IOP status block */
 301         pi2o_lct lct;
 302         pi2o_hrt hrt;
 303
 304         u32 mem_offset;                         /* MFA offset */
 305         u32 mem_phys;                           /* MFA physical */
 306
 307         u32 priv_mem;
 308         u32 priv_mem_size;
 309         u32 priv_io;
 310         u32 priv_io_size;
 311
 312         struct proc_dir_entry* proc_entry;      /* /proc dir */
 313
 314         union
 315         {                                       /* Bus information */
 316                 struct i2o_pci pci;
 317         } bus;
 318         /* Bus specific destructor */
 319         void (*destructor)(struct i2o_controller *);
 320         /* Bus specific attach/detach */
 321         int (*bind)(struct i2o_controller *, struct i2o_device *);
 322         /* Bus specific initiator */
 323         int (*unbind)(struct i2o_controller *, struct i2o_device *);
 324         /* Bus specific enable/disable */
 325         void (*bus_enable)(struct i2o_controller *c);
 326         void (*bus_disable)(struct i2o_controller *c);
 327
 328         void *page_frame;               /* Message buffers */
 329         int inbound_size;               /* Inbound queue size */
 330 };
 331
 332 struct i2o_handler
 333 {
 334         void (*reply)(struct i2o_handler *, struct i2o_controller *, struct i2o_message *);
 335         char *name;
 336         int context;            /* Low 8 bits of the transaction info */
 337         u32 class;                      /* I2O classes that this driver handles */
 338         /* User data follows */
 339 };
 340
 341 #ifdef MODULE
 342 /*
 343  * Used by bus specific modules to communicate with the core
 344  *
 345  * This is needed because the bus modules cannot make direct
 346  * calls to the core as this results in the i2o_bus_specific_module
 347  * being dependent on the core, not the otherway around.
 348  * In that case, a 'modprobe i2o_lan' loads i2o_core & i2o_lan,
 349  * but _not_ i2o_pci...which makes the whole thing pretty useless :)
 350  *
 351  */
 352 struct i2o_core_func_table
 353 {
 354         int     (*install)(struct i2o_controller *);
 355         int     (*activate)(struct i2o_controller *);
 356         struct  i2o_controller* (*find)(int);
 357         void    (*unlock)(struct i2o_controller *);
 358         void    (*run_queue)(struct i2o_controller *c);
 359         int     (*delete)(struct i2o_controller *);
 360 };
 361 #endif
 362
 363 /*
 364  * I2O System table entry
 365  */
 366 struct i2o_sys_tbl_entry
 367 {
 368         u16     org_id;
 369         u16     reserved1;
 370         u32     iop_id:12;
 371         u32     reserved2:20;
 372         u16     seg_num:12;
 373         u16     i2o_version:4;
 374         u8      iop_state;
 375         u8      msg_type;
 376         u16     frame_size;
 377         u16     reserved3;
 378         u32     last_changed;
 379         u32     iop_capabilities;
 380         u32     inbound_low;
 381         u32     inbound_high;
 382 };
 383
 384 struct i2o_sys_tbl
 385 {
 386         u8      num_entries;
 387         u8      version;
 388         u16     reserved1;
 389         u32     change_ind;
 390         u32     reserved2;
 391         u32     reserved3;
 392         struct i2o_sys_tbl_entry iops[0];
 393 };
 394
 395 /*
 396  *      Messenger inlines
 397  */
 398 extern inline u32 I2O_POST_READ32(struct i2o_controller *c)
 399 {
 400         return *c->post_port;
 401 }
 402
 403 extern inline void I2O_POST_WRITE32(struct i2o_controller *c, u32 Val)
 404 {
 405         *c->post_port = Val;
 406 }
 407
 408
 409 extern inline u32 I2O_REPLY_READ32(struct i2o_controller *c)
 410 {
 411         return *c->reply_port;
 412 }
 413
 414 extern inline void I2O_REPLY_WRITE32(struct i2o_controller *c, u32 Val)
 415 {
 416         *c->reply_port= Val;
 417 }
 418
 419
 420 extern inline u32 I2O_IRQ_READ32(struct i2o_controller *c)
 421 {
 422         return *c->irq_mask;
 423 }
 424
 425 extern inline void I2O_IRQ_WRITE32(struct i2o_controller *c, u32 Val)
 426 {
 427         *c->irq_mask = Val;
 428 }
 429
 430
 431 extern inline void i2o_post_message(struct i2o_controller *c, u32 m)
 432 {
 433         /* The second line isnt spurious - thats forcing PCI posting */
 434         I2O_POST_WRITE32(c,m);
 435         (void) I2O_IRQ_READ32(c);
 436 }
 437
 438 extern inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
 439 {
 440         I2O_REPLY_WRITE32(c,m);
 441 }
 442
 443
 444 struct i2o_controller *i2o_controller_chain;
 445
 446 extern int i2o_quiesce_controller(struct i2o_controller *);
 447 extern int i2o_clear_controller(struct i2o_controller *);
 448 extern int i2o_install_controller(struct i2o_controller *);
 449 extern int i2o_delete_controller(struct i2o_controller *);
 450 extern int i2o_activate_controller(struct i2o_controller *);
 451 extern void i2o_unlock_controller(struct i2o_controller *);
 452 extern struct i2o_controller *i2o_find_controller(int);
 453 extern int i2o_status_get(struct i2o_controller *);
 454 extern int i2o_num_controllers;
 455
 456 extern int i2o_install_handler(struct i2o_handler *);
 457 extern int i2o_remove_handler(struct i2o_handler *);
 458
 459 extern int i2o_install_device(struct i2o_controller *, struct i2o_device *);
 460 extern int i2o_delete_device(struct i2o_device *);
 461 extern int i2o_claim_device(struct i2o_device *, struct i2o_handler *, u32);
 462 extern int i2o_release_device(struct i2o_device *, struct i2o_handler *, u32);
 463
 464 extern int i2o_post_this(struct i2o_controller *, u32 *, int);
 465 extern int i2o_post_wait(struct i2o_controller *, u32 *, int, int);
 466 extern int i2o_issue_claim(struct i2o_controller *, int, int, int, int *, u32);
 467 extern int i2o_issue_params(int, struct i2o_controller *, int, void *,
 468                             int, void *, int);
 469
 470 extern int i2o_query_scalar(struct i2o_controller *, int, int, int,
 471                         void *, int);
 472 extern int i2o_set_scalar(struct i2o_controller *, int, int, int,
 473                         void *, int);
 474
 475 extern int i2o_query_table(int, struct i2o_controller *, int, int, int,
 476                         void *, int, void *, int);
 477 extern int i2o_clear_table(struct i2o_controller *, int, int);
 478 extern int i2o_row_add_table(struct i2o_controller *, int, int, int,
 479                         void *, int);
 480 extern int i2o_row_delete_table(struct i2o_controller *, int, int, int,
 481                         void *, int);
 482
 483 extern void i2o_run_queue(struct i2o_controller *);
 484 extern void i2o_report_status(const char *, const char *, u32 *);
 485
 486 extern const char *i2o_get_class_name(int);
 487
 488
 489 /*
 490  *      I2O classes / subclasses
 491  */
 492
 493 /*  Class ID and Code Assignments
 494  *  (LCT.ClassID.Version field)
 495  */
 496 #define    I2O_CLASS_VERSION_10                        0x00
 497 #define    I2O_CLASS_VERSION_11                        0x01
 498
 499 /*  Class code names
 500  *  (from v1.5 Table 6-1 Class Code Assignments.)
 501  */
 502
 503 #define    I2O_CLASS_EXECUTIVE                         0x000
 504 #define    I2O_CLASS_DDM                               0x001
 505 #define    I2O_CLASS_RANDOM_BLOCK_STORAGE              0x010
 506 #define    I2O_CLASS_SEQUENTIAL_STORAGE                0x011
 507 #define    I2O_CLASS_LAN                               0x020
 508 #define    I2O_CLASS_WAN                               0x030
 509 #define    I2O_CLASS_FIBRE_CHANNEL_PORT                0x040
 510 #define    I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL          0x041
 511 #define    I2O_CLASS_SCSI_PERIPHERAL                   0x051
 512 #define    I2O_CLASS_ATE_PORT                          0x060
 513 #define    I2O_CLASS_ATE_PERIPHERAL                    0x061
 514 #define    I2O_CLASS_FLOPPY_CONTROLLER                 0x070
 515 #define    I2O_CLASS_FLOPPY_DEVICE                     0x071
 516 #define    I2O_CLASS_BUS_ADAPTER_PORT                  0x080
 517 #define    I2O_CLASS_PEER_TRANSPORT_AGENT              0x090
 518 #define    I2O_CLASS_PEER_TRANSPORT                    0x091
 519
 520 /*  Rest of 0x092 - 0x09f reserved for peer-to-peer classes
 521  */
 522
 523 #define    I2O_CLASS_MATCH_ANYCLASS                    0xffffffff
 524
 525 /*  Subclasses
 526  */
 527
 528 #define    I2O_SUBCLASS_i960                           0x001
 529 #define    I2O_SUBCLASS_HDM                            0x020
 530 #define    I2O_SUBCLASS_ISM                            0x021
 531
 532 /* Operation functions */
 533
 534 #define I2O_PARAMS_FIELD_GET    0x0001
 535 #define I2O_PARAMS_LIST_GET     0x0002
 536 #define I2O_PARAMS_MORE_GET     0x0003
 537 #define I2O_PARAMS_SIZE_GET     0x0004
 538 #define I2O_PARAMS_TABLE_GET    0x0005
 539 #define I2O_PARAMS_FIELD_SET    0x0006
 540 #define I2O_PARAMS_LIST_SET     0x0007
 541 #define I2O_PARAMS_ROW_ADD      0x0008
 542 #define I2O_PARAMS_ROW_DELETE   0x0009
 543 #define I2O_PARAMS_TABLE_CLEAR  0x000A
 544
 545 /*
 546  *      I2O serial number conventions / formats
 547  *      (circa v1.5)
 548  */
 549
 550 #define    I2O_SNFORMAT_UNKNOWN                        0
 551 #define    I2O_SNFORMAT_BINARY                         1
 552 #define    I2O_SNFORMAT_ASCII                          2
 553 #define    I2O_SNFORMAT_UNICODE                        3
 554 #define    I2O_SNFORMAT_LAN48_MAC                      4
 555 #define    I2O_SNFORMAT_WAN                            5
 556
 557 /* Plus new in v2.0 (Yellowstone pdf doc)
 558  */
 559
 560 #define    I2O_SNFORMAT_LAN64_MAC                      6
 561 #define    I2O_SNFORMAT_DDM                            7
 562 #define    I2O_SNFORMAT_IEEE_REG64                     8
 563 #define    I2O_SNFORMAT_IEEE_REG128                    9
 564 #define    I2O_SNFORMAT_UNKNOWN2                       0xff
 565
 566 /* Transaction Reply Lists (TRL) Control Word structure */
 567
 568 #define TRL_SINGLE_FIXED_LENGTH         0x00
 569 #define TRL_SINGLE_VARIABLE_LENGTH      0x40
 570 #define TRL_MULTIPLE_FIXED_LENGTH       0x80
 571
 572 /*
 573  *      Messaging API values
 574  */
 575
 576 #define I2O_CMD_ADAPTER_ASSIGN          0xB3
 577 #define I2O_CMD_ADAPTER_READ            0xB2
 578 #define I2O_CMD_ADAPTER_RELEASE         0xB5
 579 #define I2O_CMD_BIOS_INFO_SET           0xA5
 580 #define I2O_CMD_BOOT_DEVICE_SET         0xA7
 581 #define I2O_CMD_CONFIG_VALIDATE         0xBB
 582 #define I2O_CMD_CONN_SETUP              0xCA
 583 #define I2O_CMD_DDM_DESTROY             0xB1
 584 #define I2O_CMD_DDM_ENABLE              0xD5
 585 #define I2O_CMD_DDM_QUIESCE             0xC7
 586 #define I2O_CMD_DDM_RESET               0xD9
 587 #define I2O_CMD_DDM_SUSPEND             0xAF
 588 #define I2O_CMD_DEVICE_ASSIGN           0xB7
 589 #define I2O_CMD_DEVICE_RELEASE          0xB9
 590 #define I2O_CMD_HRT_GET                 0xA8
 591 #define I2O_CMD_ADAPTER_CLEAR           0xBE
 592 #define I2O_CMD_ADAPTER_CONNECT         0xC9
 593 #define I2O_CMD_ADAPTER_RESET           0xBD
 594 #define I2O_CMD_LCT_NOTIFY              0xA2
 595 #define I2O_CMD_OUTBOUND_INIT           0xA1
 596 #define I2O_CMD_PATH_ENABLE             0xD3
 597 #define I2O_CMD_PATH_QUIESCE            0xC5
 598 #define I2O_CMD_PATH_RESET              0xD7
 599 #define I2O_CMD_STATIC_MF_CREATE        0xDD
 600 #define I2O_CMD_STATIC_MF_RELEASE       0xDF
 601 #define I2O_CMD_STATUS_GET              0xA0
 602 #define I2O_CMD_SW_DOWNLOAD             0xA9
 603 #define I2O_CMD_SW_UPLOAD               0xAB
 604 #define I2O_CMD_SW_REMOVE               0xAD
 605 #define I2O_CMD_SYS_ENABLE              0xD1
 606 #define I2O_CMD_SYS_MODIFY              0xC1
 607 #define I2O_CMD_SYS_QUIESCE             0xC3
 608 #define I2O_CMD_SYS_TAB_SET             0xA3
 609
 610 #define I2O_CMD_UTIL_NOP                0x00
 611 #define I2O_CMD_UTIL_ABORT              0x01
 612 #define I2O_CMD_UTIL_CLAIM              0x09
 613 #define I2O_CMD_UTIL_RELEASE            0x0B
 614 #define I2O_CMD_UTIL_PARAMS_GET         0x06
 615 #define I2O_CMD_UTIL_PARAMS_SET         0x05
 616 #define I2O_CMD_UTIL_EVT_REGISTER       0x13
 617 #define I2O_CMD_UTIL_ACK                0x14
 618 #define I2O_CMD_UTIL_CONFIG_DIALOG      0x10
 619 #define I2O_CMD_UTIL_DEVICE_RESERVE     0x0D
 620 #define I2O_CMD_UTIL_DEVICE_RELEASE     0x0F
 621 #define I2O_CMD_UTIL_LOCK               0x17
 622 #define I2O_CMD_UTIL_LOCK_RELEASE       0x19
 623 #define I2O_CMD_UTIL_REPLY_FAULT_NOTIFY 0x15
 624
 625 #define I2O_CMD_SCSI_EXEC               0x81
 626 #define I2O_CMD_SCSI_ABORT              0x83
 627 #define I2O_CMD_SCSI_BUSRESET           0x27
 628
 629 #define I2O_CMD_BLOCK_READ              0x30
 630 #define I2O_CMD_BLOCK_WRITE             0x31
 631 #define I2O_CMD_BLOCK_CFLUSH            0x37
 632 #define I2O_CMD_BLOCK_MLOCK             0x49
 633 #define I2O_CMD_BLOCK_MUNLOCK           0x4B
 634 #define I2O_CMD_BLOCK_MMOUNT            0x41
 635 #define I2O_CMD_BLOCK_MEJECT            0x43
 636
 637 #define I2O_PRIVATE_MSG                 0xFF
 638
 639 /*
 640  *      Init Outbound Q status
 641  */
 642
 643 #define I2O_CMD_OUTBOUND_INIT_IN_PROGRESS       0x01
 644 #define I2O_CMD_OUTBOUND_INIT_REJECTED          0x02
 645 #define I2O_CMD_OUTBOUND_INIT_FAILED            0x03
 646 #define I2O_CMD_OUTBOUND_INIT_COMPLETE          0x04
 647
 648 /*
 649  *      I2O Get Status State values
 650  */
 651
 652 #define ADAPTER_STATE_INITIALIZING              0x01
 653 #define ADAPTER_STATE_RESET                     0x02
 654 #define ADAPTER_STATE_HOLD                      0x04
 655 #define ADAPTER_STATE_READY                     0x05
 656 #define ADAPTER_STATE_OPERATIONAL               0x08
 657 #define ADAPTER_STATE_FAILED                    0x10
 658 #define ADAPTER_STATE_FAULTED                   0x11
 659
 660 /* I2O API function return values */
 661
 662 #define I2O_RTN_NO_ERROR                        0
 663 #define I2O_RTN_NOT_INIT                        1
 664 #define I2O_RTN_FREE_Q_EMPTY                    2
 665 #define I2O_RTN_TCB_ERROR                       3
 666 #define I2O_RTN_TRANSACTION_ERROR               4
 667 #define I2O_RTN_ADAPTER_ALREADY_INIT            5
 668 #define I2O_RTN_MALLOC_ERROR                    6
 669 #define I2O_RTN_ADPTR_NOT_REGISTERED            7
 670 #define I2O_RTN_MSG_REPLY_TIMEOUT               8
 671 #define I2O_RTN_NO_STATUS                       9
 672 #define I2O_RTN_NO_FIRM_VER                     10
 673 #define I2O_RTN_NO_LINK_SPEED                   11
 674
 675 /* Reply message status defines for all messages */
 676
 677 #define I2O_REPLY_STATUS_SUCCESS                        0x00
 678 #define I2O_REPLY_STATUS_ABORT_DIRTY                    0x01
 679 #define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER         0x02
 680 #define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER         0x03
 681 #define I2O_REPLY_STATUS_ERROR_DIRTY                    0x04
 682 #define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER         0x05
 683 #define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER         0x06
 684 #define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY            0x08
 685 #define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09
 686 #define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0A
 687 #define I2O_REPLY_STATUS_TRANSACTION_ERROR              0x0B
 688 #define I2O_REPLY_STATUS_PROGRESS_REPORT                0x80
 689
 690 /* Status codes and Error Information for Parameter functions */
 691
 692 #define I2O_PARAMS_STATUS_SUCCESS               0x00
 693 #define I2O_PARAMS_STATUS_BAD_KEY_ABORT         0x01
 694 #define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE      0x02
 695 #define I2O_PARAMS_STATUS_BUFFER_FULL           0x03
 696 #define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL      0x04
 697 #define I2O_PARAMS_STATUS_FIELD_UNREADABLE      0x05
 698 #define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE     0x06
 699 #define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS   0x07
 700 #define I2O_PARAMS_STATUS_INVALID_GROUP_ID      0x08
 701 #define I2O_PARAMS_STATUS_INVALID_OPERATION     0x09
 702 #define I2O_PARAMS_STATUS_NO_KEY_FIELD          0x0A
 703 #define I2O_PARAMS_STATUS_NO_SUCH_FIELD         0x0B
 704 #define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP     0x0C
 705 #define I2O_PARAMS_STATUS_OPERATION_ERROR       0x0D
 706 #define I2O_PARAMS_STATUS_SCALAR_ERROR          0x0E
 707 #define I2O_PARAMS_STATUS_TABLE_ERROR           0x0F
 708 #define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE      0x10
 709
 710 /* DetailedStatusCode defines for Executive, DDM, Util and Transaction error
 711  * messages: Table 3-2 Detailed Status Codes.*/
 712
 713 #define I2O_DSC_SUCCESS                        0x0000
 714 #define I2O_DSC_BAD_KEY                        0x0002
 715 #define I2O_DSC_TCL_ERROR                      0x0003
 716 #define I2O_DSC_REPLY_BUFFER_FULL              0x0004
 717 #define I2O_DSC_NO_SUCH_PAGE                   0x0005
 718 #define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT     0x0006
 719 #define I2O_DSC_INSUFFICIENT_RESOURCE_HARD     0x0007
 720 #define I2O_DSC_CHAIN_BUFFER_TOO_LARGE         0x0009
 721 #define I2O_DSC_UNSUPPORTED_FUNCTION           0x000A
 722 #define I2O_DSC_DEVICE_LOCKED                  0x000B
 723 #define I2O_DSC_DEVICE_RESET                   0x000C
 724 #define I2O_DSC_INAPPROPRIATE_FUNCTION         0x000D
 725 #define I2O_DSC_INVALID_INITIATOR_ADDRESS      0x000E
 726 #define I2O_DSC_INVALID_MESSAGE_FLAGS          0x000F
 727 #define I2O_DSC_INVALID_OFFSET                 0x0010
 728 #define I2O_DSC_INVALID_PARAMETER              0x0011
 729 #define I2O_DSC_INVALID_REQUEST                0x0012
 730 #define I2O_DSC_INVALID_TARGET_ADDRESS         0x0013
 731 #define I2O_DSC_MESSAGE_TOO_LARGE              0x0014
 732 #define I2O_DSC_MESSAGE_TOO_SMALL              0x0015
 733 #define I2O_DSC_MISSING_PARAMETER              0x0016
 734 #define I2O_DSC_TIMEOUT                        0x0017
 735 #define I2O_DSC_UNKNOWN_ERROR                  0x0018
 736 #define I2O_DSC_UNKNOWN_FUNCTION               0x0019
 737 #define I2O_DSC_UNSUPPORTED_VERSION            0x001A
 738 #define I2O_DSC_DEVICE_BUSY                    0x001B
 739 #define I2O_DSC_DEVICE_NOT_AVAILABLE           0x001C
 740
 741 /* Device Claim Types */
 742 #define I2O_CLAIM_PRIMARY                                       0x01000000
 743 #define I2O_CLAIM_MANAGEMENT                                    0x02000000
 744 #define I2O_CLAIM_AUTHORIZED                                    0x03000000
 745 #define I2O_CLAIM_SECONDARY                                     0x04000000
 746
 747 /* Message header defines for VersionOffset */
 748 #define I2OVER15        0x0001
 749 #define I2OVER20        0x0002
 750 /* Default is 1.5, FIXME: Need support for both 1.5 and 2.0 */
 751 #define I2OVERSION      I2OVER15
 752 #define SGL_OFFSET_0    I2OVERSION
 753 #define SGL_OFFSET_4    (0x0040 | I2OVERSION)
 754 #define SGL_OFFSET_5    (0x0050 | I2OVERSION)
 755 #define SGL_OFFSET_6    (0x0060 | I2OVERSION)
 756 #define SGL_OFFSET_7    (0x0070 | I2OVERSION)
 757 #define SGL_OFFSET_8    (0x0080 | I2OVERSION)
 758 #define SGL_OFFSET_9    (0x0090 | I2OVERSION)
 759 #define SGL_OFFSET_10   (0x00A0 | I2OVERSION)
 760
 761 #define TRL_OFFSET_5    (0x0050 | I2OVERSION)
 762 #define TRL_OFFSET_6    (0x0060 | I2OVERSION)
 763
 764  /* msg header defines for MsgFlags */
 765 #define MSG_STATIC      0x0100
 766 #define MSG_64BIT_CNTXT 0x0200
 767 #define MSG_MULTI_TRANS 0x1000
 768 #define MSG_FAIL        0x2000
 769 #define MSG_LAST        0x4000
 770 #define MSG_REPLY       0x8000
 771
 772  /* minimum size msg */
 773 #define THREE_WORD_MSG_SIZE     0x00030000
 774 #define FOUR_WORD_MSG_SIZE      0x00040000
 775 #define FIVE_WORD_MSG_SIZE      0x00050000
 776 #define SIX_WORD_MSG_SIZE       0x00060000
 777 #define SEVEN_WORD_MSG_SIZE     0x00070000
 778 #define EIGHT_WORD_MSG_SIZE     0x00080000
 779 #define NINE_WORD_MSG_SIZE      0x00090000
 780 #define TEN_WORD_MSG_SIZE       0x000A0000
 781 #define I2O_MESSAGE_SIZE(x)     ((x)<<16)
 782
 783
 784 /* Special TID Assignments */
 785
 786 #define ADAPTER_TID             0
 787 #define HOST_TID                1
 788
 789 #define MSG_FRAME_SIZE          128
 790 #define NMBR_MSG_FRAMES         128
 791
 792 #define MSG_POOL_SIZE           16384
 793
 794 #define I2O_POST_WAIT_OK        0
 795 #define I2O_POST_WAIT_TIMEOUT   -ETIMEDOUT
 796
 797 #endif /* __KERNEL__ */
 798
 799 #endif /* _I2O_H */