drivers/usb/uhci.h

   1 #ifndef __LINUX_UHCI_H
   2 #define __LINUX_UHCI_H
   3
   4 #include <linux/list.h>
   5
   6 #include "usb.h"
   7
   8 /*
   9  * Universal Host Controller Interface data structures and defines
  10  */
  11
  12 /* Command register */
  13 #define USBCMD          0
  14 #define   USBCMD_RS             0x0001  /* Run/Stop */
  15 #define   USBCMD_HCRESET        0x0002  /* Host reset */
  16 #define   USBCMD_GRESET         0x0004  /* Global reset */
  17 #define   USBCMD_EGSM           0x0008  /* Global Suspend Mode */
  18 #define   USBCMD_FGR            0x0010  /* Force Global Resume */
  19 #define   USBCMD_SWDBG          0x0020  /* SW Debug mode */
  20 #define   USBCMD_CF             0x0040  /* Config Flag (sw only) */
  21 #define   USBCMD_MAXP           0x0080  /* Max Packet (0 = 32, 1 = 64) */
  22
  23 /* Status register */
  24 #define USBSTS          2
  25 #define   USBSTS_USBINT         0x0001  /* Interrupt due to IOC */
  26 #define   USBSTS_ERROR          0x0002  /* Interrupt due to error */
  27 #define   USBSTS_RD             0x0004  /* Resume Detect */
  28 #define   USBSTS_HSE            0x0008  /* Host System Error - basically PCI problems */
  29 #define   USBSTS_HCPE           0x0010  /* Host Controller Process Error - the scripts were buggy */
  30 #define   USBSTS_HCH            0x0020  /* HC Halted */
  31
  32 /* Interrupt enable register */
  33 #define USBINTR         4
  34 #define   USBINTR_TIMEOUT       0x0001  /* Timeout/CRC error enable */
  35 #define   USBINTR_RESUME        0x0002  /* Resume interrupt enable */
  36 #define   USBINTR_IOC           0x0004  /* Interrupt On Complete enable */
  37 #define   USBINTR_SP            0x0008  /* Short packet interrupt enable */
  38
  39 #define USBFRNUM        6
  40 #define USBFLBASEADD    8
  41 #define USBSOF          12
  42
  43 /* USB port status and control registers */
  44 #define USBPORTSC1      16
  45 #define USBPORTSC2      18
  46 #define   USBPORTSC_CCS         0x0001  /* Current Connect Status ("device present") */
  47 #define   USBPORTSC_CSC         0x0002  /* Connect Status Change */
  48 #define   USBPORTSC_PE          0x0004  /* Port Enable */
  49 #define   USBPORTSC_PEC         0x0008  /* Port Enable Change */
  50 #define   USBPORTSC_LS          0x0030  /* Line Status */
  51 #define   USBPORTSC_RD          0x0040  /* Resume Detect */
  52 #define   USBPORTSC_LSDA        0x0100  /* Low Speed Device Attached */
  53 #define   USBPORTSC_PR          0x0200  /* Port Reset */
  54 #define   USBPORTSC_SUSP        0x1000  /* Suspend */
  55
  56 /* Legacy support register */
  57 #define USBLEGSUP 0xc0
  58 #define USBLEGSUP_DEFAULT 0x2000 /* only PIRQ enable set */
  59
  60 #define UHCI_NULL_DATA_SIZE     0x7ff   /* for UHCI controller TD */
  61
  62 #define UHCI_PTR_BITS           0x000F
  63 #define UHCI_PTR_TERM           0x0001
  64 #define UHCI_PTR_QH             0x0002
  65 #define UHCI_PTR_DEPTH          0x0004
  66
  67 #define UHCI_NUMFRAMES          1024    /* in the frame list [array] */
  68 #define UHCI_MAX_SOF_NUMBER     2047    /* in an SOF packet */
  69 #define CAN_SCHEDULE_FRAMES     1000    /* how far future frames can be scheduled */
  70
  71 struct uhci_td;
  72
  73 struct uhci_qh {
  74         /* Hardware fields */
  75         __u32 link;                             /* Next queue */
  76         __u32 element;                          /* Queue element pointer */
  77
  78         /* Software fields */
  79         atomic_t refcnt;                        /* Reference counting */
  80         struct uhci_device *dev;                /* The owning device */
  81         struct uhci_qh *skel;                   /* Skeleton head */
  82
  83         struct uhci_td *first;                  /* First TD in the chain */
  84
  85         wait_queue_head_t wakeup;
  86 } __attribute__((aligned(16)));
  87
  88 struct uhci_framelist {
  89         __u32 frame[UHCI_NUMFRAMES];
  90 } __attribute__((aligned(4096)));
  91
  92 /*
  93  * for TD <status>:
  94  */
  95 #define TD_CTRL_SPD             (1 << 29)       /* Short Packet Detect */
  96 #define TD_CTRL_C_ERR_MASK      (3 << 27)       /* Error Counter bits */
  97 #define TD_CTRL_LS              (1 << 26)       /* Low Speed Device */
  98 #define TD_CTRL_IOS             (1 << 25)       /* Isochronous Select */
  99 #define TD_CTRL_IOC             (1 << 24)       /* Interrupt on Complete */
 100 #define TD_CTRL_ACTIVE          (1 << 23)       /* TD Active */
 101 #define TD_CTRL_STALLED         (1 << 22)       /* TD Stalled */
 102 #define TD_CTRL_DBUFERR         (1 << 21)       /* Data Buffer Error */
 103 #define TD_CTRL_BABBLE          (1 << 20)       /* Babble Detected */
 104 #define TD_CTRL_NAK             (1 << 19)       /* NAK Received */
 105 #define TD_CTRL_CRCTIMEO        (1 << 18)       /* CRC/Time Out Error */
 106 #define TD_CTRL_BITSTUFF        (1 << 17)       /* Bit Stuff Error */
 107 #define TD_CTRL_ACTLEN_MASK     0x7ff           /* actual length, encoded as n - 1 */
 108
 109 #define TD_CTRL_ANY_ERROR       (TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
 110                                  TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF)
 111
 112 #define uhci_status_bits(ctrl_sts)      (ctrl_sts & 0xFE0000)
 113 #define uhci_actual_length(ctrl_sts)    ((ctrl_sts + 1) & TD_CTRL_ACTLEN_MASK) /* 1-based */
 114
 115 #define uhci_ptr_to_virt(x)     bus_to_virt(x & ~UHCI_PTR_BITS)
 116
 117 /*
 118  * for TD <flags>:
 119  */
 120 #define UHCI_TD_REMOVE          0x0001          /* Remove when done */
 121
 122 /*
 123  * for TD <info>: (a.k.a. Token)
 124  */
 125 #define TD_TOKEN_TOGGLE         19
 126
 127 #define uhci_maxlen(token)      ((token) >> 21)
 128 #define uhci_expected_length(info) (((info >> 21) + 1) & TD_CTRL_ACTLEN_MASK) /* 1-based */
 129 #define uhci_toggle(token)      (((token) >> TD_TOKEN_TOGGLE) & 1)
 130 #define uhci_endpoint(token)    (((token) >> 15) & 0xf)
 131 #define uhci_devaddr(token)     (((token) >> 8) & 0x7f)
 132 #define uhci_devep(token)       (((token) >> 8) & 0x7ff)
 133 #define uhci_packetid(token)    ((token) & 0xff)
 134 #define uhci_packetout(token)   (uhci_packetid(token) != USB_PID_IN)
 135 #define uhci_packetin(token)    (uhci_packetid(token) == USB_PID_IN)
 136
 137
 138 /*
 139  * The documentation says "4 words for hardware, 4 words for software".
 140  *
 141  * That's silly, the hardware doesn't care. The hardware only cares that
 142  * the hardware words are 16-byte aligned, and we can have any amount of
 143  * sw space after the TD entry as far as I can tell.
 144  *
 145  * But let's just go with the documentation, at least for 32-bit machines.
 146  * On 64-bit machines we probably want to take advantage of the fact that
 147  * hw doesn't really care about the size of the sw-only area.
 148  *
 149  * Alas, not anymore, we have more than 4 words for software, woops
 150  */
 151 struct uhci_td {
 152         /* Hardware fields */
 153         __u32 link;
 154         __u32 status;
 155         __u32 info;
 156         __u32 buffer;
 157
 158         /* Software fields */
 159         unsigned int *backptr;          /* Where to remove this from.. */
 160         struct list_head irq_list;      /* Active interrupt list.. */
 161
 162         usb_device_irq completed;       /* Completion handler routine */
 163         void *dev_id;
 164
 165         atomic_t refcnt;                /* Reference counting */
 166         struct uhci_device *dev;        /* The owning device */
 167         struct uhci_qh *qh;             /* QH this TD is a part of (ignored for Isochronous) */
 168         int flags;                      /* Remove, etc */
 169         int isoc_td_number;             /* 0-relative number within a usb_isoc_desc. */
 170         int pipetype;                   /* Control, Bulk, Interrupt, or Isoc */
 171         int bandwidth_alloc;            /* in microsecs; used only for Interrupt
 172                                          * transfers, to return its bandwidth */
 173 } __attribute__((aligned(16)));
 174
 175
 176 /*
 177  * Note the alignment requirements of the entries
 178  *
 179  * Each UHCI device has pre-allocated QH and TD entries.
 180  * You can use more than the pre-allocated ones, but I
 181  * don't see you usually needing to.
 182  */
 183 struct uhci;
 184
 185 /* The usb device part must be first! Not anymore -jerdfelt */
 186 struct uhci_device {
 187         struct usb_device       *usb;
 188
 189         atomic_t                refcnt;
 190
 191         struct uhci             *uhci;
 192
 193         unsigned long           data[16];
 194 };
 195
 196 #define uhci_to_usb(uhci)       ((uhci)->usb)
 197 #define usb_to_uhci(usb)        ((struct uhci_device *)(usb)->hcpriv)
 198
 199 /*
 200  * There are various standard queues. We set up several different
 201  * queues for each of the three basic queue types: interrupt,
 202  * control, and bulk.
 203  *
 204  *  - There are various different interrupt latencies: ranging from
 205  *    every other USB frame (2 ms apart) to every 256 USB frames (ie
 206  *    256 ms apart). Make your choice according to how obnoxious you
 207  *    want to be on the wire, vs how critical latency is for you.
 208  *  - The control list is done every frame.
 209  *  - There are 4 bulk lists, so that up to four devices can have a
 210  *    bulk list of their own and when run concurrently all four lists
 211  *    will be be serviced.
 212  *
 213  * This is a bit misleading, there are various interrupt latencies, but they
 214  * vary a bit, interrupt2 isn't exactly 2ms, it can vary up to 4ms since the
 215  * other queues can "override" it. interrupt4 can vary up to 8ms, etc. Minor
 216  * problem
 217  *
 218  * In the case of the root hub, these QH's are just head's of qh's. Don't
 219  * be scared, it kinda makes sense. Look at this wonderful picture care of
 220  * Linus:
 221  *
 222  *  generic-  ->  dev1-  ->  generic-  ->  dev1-  ->  control-  ->  bulk- -> ...
 223  *   iso-QH      iso-QH       irq-QH      irq-QH        QH           QH
 224  *      |           |            |           |           |            |
 225  *     End     dev1-iso-TD1     End     dev1-irq-TD1    ...          ...
 226  *                  |
 227  *             dev1-iso-TD2
 228  *                  |
 229  *                ....
 230  *
 231  * This may vary a bit (the UHCI docs don't explicitly say you can put iso
 232  * transfers in QH's and all of their pictures don't have that either) but
 233  * other than that, that is what we're doing now
 234  *
 235  * And now we don't put Iso transfers in QH's, so we don't waste one on it
 236  *
 237  * To keep with Linus' nomenclature, this is called the QH skeleton. These
 238  * labels (below) are only signficant to the root hub's QH's
 239  */
 240 #define UHCI_NUM_SKELQH         11
 241
 242 #define skel_int1_qh            skelqh[0]
 243 #define skel_int2_qh            skelqh[1]
 244 #define skel_int4_qh            skelqh[2]
 245 #define skel_int8_qh            skelqh[3]
 246 #define skel_int16_qh           skelqh[4]
 247 #define skel_int32_qh           skelqh[5]
 248 #define skel_int64_qh           skelqh[6]
 249 #define skel_int128_qh          skelqh[7]
 250 #define skel_int256_qh          skelqh[8]
 251
 252 #define skel_control_qh         skelqh[9]
 253
 254 #define skel_bulk_qh            skelqh[10]
 255
 256 /*
 257  * Search tree for determining where <interval> fits in the
 258  * skelqh[] skeleton.
 259  *
 260  * An interrupt request should be placed into the slowest skelqh[]
 261  * which meets the interval/period/frequency requirement.
 262  * An interrupt request is allowed to be faster than <interval> but not slower.
 263  *
 264  * For a given <interval>, this function returns the appropriate/matching
 265  * skelqh[] index value.
 266  *
 267  * NOTE: For UHCI, we don't really need int256_qh since the maximum interval
 268  * is 255 ms.  However, we do need an int1_qh since 1 is a valid interval
 269  * and we should meet that frequency when requested to do so.
 270  * This will require some change(s) to the UHCI skeleton.
 271  */
 272 static inline int __interval_to_skel(int interval)
 273 {
 274         if (interval < 16) {
 275                 if (interval < 4) {
 276                         if (interval < 2) {
 277                                 return 0;       /* int1 for 0-1 ms */
 278                         }
 279                         return 1;               /* int2 for 2-3 ms */
 280                 }
 281                 if (interval < 8) {
 282                         return 2;               /* int4 for 4-7 ms */
 283                 }
 284                 return 3;                       /* int 8 for 8-15 ms */
 285         }
 286         if (interval < 64) {
 287                 if (interval < 32) {
 288                         return 4;               /* int16 for 16-31 ms */
 289                 }
 290                 return 5;                       /* int32 for 32-63 ms */
 291         }
 292         if (interval < 128)
 293                 return 6;                       /* int64 for 64-127 ms */
 294         return 7;                               /* int128 for 128-255 ms (Max.) */
 295 }
 296
 297 /*
 298  * This describes the full uhci information.
 299  *
 300  * Note how the "proper" USB information is just
 301  * a subset of what the full implementation needs.
 302  */
 303 struct uhci {
 304         int irq;
 305         unsigned int io_addr;
 306         unsigned int io_size;
 307
 308         int control_pid;
 309         int control_running;
 310         int control_continue;
 311
 312         struct list_head uhci_list;
 313
 314         struct usb_bus *bus;
 315
 316         struct uhci_qh skelqh[UHCI_NUM_SKELQH]; /* Skeleton QH's */
 317
 318         struct uhci_framelist *fl;              /* Frame list */
 319         struct list_head interrupt_list;        /* List of interrupt-active TD's for this uhci */
 320
 321         struct uhci_td *ticktd;
 322 };
 323
 324 /* needed for the debugging code */
 325 struct uhci_td *uhci_link_to_td(unsigned int element);
 326
 327 /* Debugging code */
 328 void uhci_show_td(struct uhci_td *td);
 329 void uhci_show_status(struct uhci *uhci);
 330 void uhci_show_queue(struct uhci_qh *qh);
 331 void uhci_show_queues(struct uhci *uhci);
 332
 333 #endif
 334