drivers/block/icside.c

   1 /*
   2  * linux/drivers/block/icside.c
   3  *
   4  * Copyright (c) 1996,1997 Russell King.
   5  *
   6  * Changelog:
   7  *  08-Jun-1996 RMK     Created
   8  *  12-Sep-1997 RMK     Added interrupt enable/disable
   9  *  17-Apr-1999 RMK     Added support for V6 EASI
  10  *  22-May-1999 RMK     Added support for V6 DMA
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/string.h>
  15 #include <linux/module.h>
  16 #include <linux/ioport.h>
  17 #include <linux/malloc.h>
  18 #include <linux/blkdev.h>
  19 #include <linux/errno.h>
  20 #include <linux/hdreg.h>
  21 #include <linux/ide.h>
  22
  23 #include <asm/dma.h>
  24 #include <asm/ecard.h>
  25 #include <asm/io.h>
  26
  27 /*
  28  * Maximum number of interfaces per card
  29  */
  30 #define MAX_IFS 2
  31
  32 #define ICS_IDENT_OFFSET                0x8a0
  33
  34 #define ICS_ARCIN_V5_INTRSTAT           0x000
  35 #define ICS_ARCIN_V5_INTROFFSET         0x001
  36 #define ICS_ARCIN_V5_IDEOFFSET          0xa00
  37 #define ICS_ARCIN_V5_IDEALTOFFSET       0xae0
  38 #define ICS_ARCIN_V5_IDESTEPPING        4
  39
  40 #define ICS_ARCIN_V6_IDEOFFSET_1        0x800
  41 #define ICS_ARCIN_V6_INTROFFSET_1       0x880
  42 #define ICS_ARCIN_V6_INTRSTAT_1         0x8a4
  43 #define ICS_ARCIN_V6_IDEALTOFFSET_1     0x8e0
  44 #define ICS_ARCIN_V6_IDEOFFSET_2        0xc00
  45 #define ICS_ARCIN_V6_INTROFFSET_2       0xc80
  46 #define ICS_ARCIN_V6_INTRSTAT_2         0xca4
  47 #define ICS_ARCIN_V6_IDEALTOFFSET_2     0xce0
  48 #define ICS_ARCIN_V6_IDESTEPPING        4
  49
  50 struct cardinfo {
  51         unsigned int dataoffset;
  52         unsigned int ctrloffset;
  53         unsigned int stepping;
  54 };
  55
  56 static struct cardinfo icside_cardinfo_v5 = {
  57         ICS_ARCIN_V5_IDEOFFSET,
  58         ICS_ARCIN_V5_IDEALTOFFSET,
  59         ICS_ARCIN_V5_IDESTEPPING
  60 };
  61
  62 static struct cardinfo icside_cardinfo_v6_1 = {
  63         ICS_ARCIN_V6_IDEOFFSET_1,
  64         ICS_ARCIN_V6_IDEALTOFFSET_1,
  65         ICS_ARCIN_V6_IDESTEPPING
  66 };
  67
  68 static struct cardinfo icside_cardinfo_v6_2 = {
  69         ICS_ARCIN_V6_IDEOFFSET_2,
  70         ICS_ARCIN_V6_IDEALTOFFSET_2,
  71         ICS_ARCIN_V6_IDESTEPPING
  72 };
  73
  74 static const card_ids icside_cids[] = {
  75         { MANU_ICS,  PROD_ICS_IDE  },
  76         { MANU_ICS2, PROD_ICS2_IDE },
  77         { 0xffff, 0xffff }
  78 };
  79
  80 typedef enum {
  81         ics_if_unknown,
  82         ics_if_arcin_v5,
  83         ics_if_arcin_v6
  84 } iftype_t;
  85
  86 /* ---------------- Version 5 PCB Support Functions --------------------- */
  87 /* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
  88  * Purpose  : enable interrupts from card
  89  */
  90 static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
  91 {
  92         unsigned int memc_port = (unsigned int)ec->irq_data;
  93         outb (0, memc_port + ICS_ARCIN_V5_INTROFFSET);
  94 }
  95
  96 /* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
  97  * Purpose  : disable interrupts from card
  98  */
  99 static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
 100 {
 101         unsigned int memc_port = (unsigned int)ec->irq_data;
 102         inb (memc_port + ICS_ARCIN_V5_INTROFFSET);
 103 }
 104
 105 static const expansioncard_ops_t icside_ops_arcin_v5 = {
 106         icside_irqenable_arcin_v5,
 107         icside_irqdisable_arcin_v5,
 108         NULL,
 109         NULL,
 110         NULL,
 111         NULL
 112 };
 113
 114
 115 /* ---------------- Version 6 PCB Support Functions --------------------- */
 116 /* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
 117  * Purpose  : enable interrupts from card
 118  */
 119 static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
 120 {
 121         unsigned int ide_base_port = (unsigned int)ec->irq_data;
 122
 123         outb (0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_1);
 124         outb (0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_2);
 125 }
 126
 127 /* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
 128  * Purpose  : disable interrupts from card
 129  */
 130 static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
 131 {
 132         unsigned int ide_base_port = (unsigned int)ec->irq_data;
 133
 134         inb (ide_base_port + ICS_ARCIN_V6_INTROFFSET_1);
 135         inb (ide_base_port + ICS_ARCIN_V6_INTROFFSET_2);
 136 }
 137
 138 /* Prototype: icside_irqprobe(struct expansion_card *ec)
 139  * Purpose  : detect an active interrupt from card
 140  */
 141 static int icside_irqpending_arcin_v6(struct expansion_card *ec)
 142 {
 143         unsigned int ide_base_port = (unsigned int)ec->irq_data;
 144
 145         return inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
 146                inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
 147 }
 148
 149 static const expansioncard_ops_t icside_ops_arcin_v6 = {
 150         icside_irqenable_arcin_v6,
 151         icside_irqdisable_arcin_v6,
 152         icside_irqpending_arcin_v6,
 153         NULL,
 154         NULL,
 155         NULL
 156 };
 157
 158 /* Prototype: icside_identifyif (struct expansion_card *ec)
 159  * Purpose  : identify IDE interface type
 160  * Notes    : checks the description string
 161  */
 162 static iftype_t icside_identifyif (struct expansion_card *ec)
 163 {
 164         unsigned int addr;
 165         iftype_t iftype;
 166         int id = 0;
 167
 168         iftype = ics_if_unknown;
 169
 170         addr = ecard_address (ec, ECARD_IOC, ECARD_FAST) + ICS_IDENT_OFFSET;
 171
 172         id = inb (addr) & 1;
 173         id |= (inb (addr + 1) & 1) << 1;
 174         id |= (inb (addr + 2) & 1) << 2;
 175         id |= (inb (addr + 3) & 1) << 3;
 176
 177         switch (id) {
 178         case 0: /* A3IN */
 179                 printk("icside: A3IN unsupported\n");
 180                 break;
 181
 182         case 1: /* A3USER */
 183                 printk("icside: A3USER unsupported\n");
 184                 break;
 185
 186         case 3: /* ARCIN V6 */
 187                 printk(KERN_DEBUG "icside: detected ARCIN V6 in slot %d\n", ec->slot_no);
 188                 iftype = ics_if_arcin_v6;
 189                 break;
 190
 191         case 15:/* ARCIN V5 (no id) */
 192                 printk(KERN_DEBUG "icside: detected ARCIN V5 in slot %d\n", ec->slot_no);
 193                 iftype = ics_if_arcin_v5;
 194                 break;
 195
 196         default:/* we don't know - complain very loudly */
 197                 printk("icside: ***********************************\n");
 198                 printk("icside: *** UNKNOWN ICS INTERFACE id=%d ***\n", id);
 199                 printk("icside: ***********************************\n");
 200                 printk("icside: please report this to linux@arm.linux.org.uk\n");
 201                 printk("icside: defaulting to ARCIN V5\n");
 202                 iftype = ics_if_arcin_v5;
 203                 break;
 204         }
 205
 206         return iftype;
 207 }
 208
 209 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
 210 /*
 211  * SG-DMA support.
 212  *
 213  * Similar to the BM-DMA, but we use the RiscPCs IOMD
 214  * DMA controllers.  There is only one DMA controller
 215  * per card, which means that only one drive can be
 216  * accessed at one time.  NOTE! We do not inforce that
 217  * here, but we rely on the main IDE driver spotting
 218  * that both interfaces use the same IRQ, which should
 219  * guarantee this.
 220  *
 221  * We are limited by the drives IOR/IOW pulse time.
 222  * The closest that we can get to the requirements is
 223  * a type C cycle for both mode 1 and mode 2.  However,
 224  * this does give a burst of 8MB/s.
 225  *
 226  * This has been tested with a couple of Conner
 227  * Peripherals 1080MB CFS1081A drives, one on each
 228  * interface, which deliver about 2MB/s each.  I
 229  * believe that this is limited by the lack of
 230  * on-board drive cache.
 231  */
 232 #define TABLE_SIZE 2048
 233
 234 static int
 235 icside_build_dmatable(ide_drive_t *drive, int reading)
 236 {
 237         struct request *rq = HWGROUP(drive)->rq;
 238         struct buffer_head *bh = rq->bh;
 239         unsigned long addr, size;
 240         unsigned char *virt_addr;
 241         unsigned int count = 0;
 242         dmasg_t *sg = (dmasg_t *)HWIF(drive)->dmatable;
 243
 244         do {
 245                 if (bh == NULL) {
 246                         /* paging requests have (rq->bh == NULL) */
 247                         virt_addr = rq->buffer;
 248                         addr = virt_to_bus (virt_addr);
 249                         size = rq->nr_sectors << 9;
 250                 } else {
 251                         /* group sequential buffers into one large buffer */
 252                         virt_addr = bh->b_data;
 253                         addr = virt_to_bus (virt_addr);
 254                         size = bh->b_size;
 255                         while ((bh = bh->b_reqnext) != NULL) {
 256                                 if ((addr + size) != virt_to_bus (bh->b_data))
 257                                         break;
 258                                 size += bh->b_size;
 259                         }
 260                 }
 261
 262                 if (addr & 3) {
 263                         printk("%s: misaligned DMA buffer\n", drive->name);
 264                         return 0;
 265                 }
 266
 267                 if (size) {
 268                         if (reading)
 269                                 dma_cache_inv((unsigned int)virt_addr, size);
 270                         else
 271                                 dma_cache_wback((unsigned int)virt_addr, size);
 272                 }
 273
 274                 sg[count].address = addr;
 275                 sg[count].length = size;
 276                 if (++count >= (TABLE_SIZE / sizeof(dmasg_t))) {
 277                         printk("%s: DMA table too small\n", drive->name);
 278                         return 0;
 279                 }
 280         } while (bh != NULL);
 281
 282         if (!count)
 283                 printk("%s: empty DMA table?\n", drive->name);
 284
 285         return count;
 286 }
 287
 288 static int
 289 icside_config_drive(ide_drive_t *drive, int mode)
 290 {
 291         int speed, err;
 292
 293         if (mode == 2) {
 294                 speed = XFER_MW_DMA_2;
 295                 drive->drive_data = 250;
 296         } else {
 297                 speed = XFER_MW_DMA_1;
 298                 drive->drive_data = 250;
 299         }
 300
 301         err = ide_config_drive_speed(drive, (byte) speed);
 302
 303         if (err == 0) {
 304                 drive->id->dma_mword &= 0x00ff;
 305                 drive->id->dma_mword |= 256 << mode;
 306         } else
 307                 drive->drive_data = 0;
 308
 309         return err;
 310 }
 311
 312 static int
 313 icside_dma_check(ide_drive_t *drive)
 314 {
 315         struct hd_driveid *id = drive->id;
 316         ide_hwif_t *hwif = HWIF(drive);
 317         int autodma = hwif->autodma;
 318
 319         if (id && (id->capability & 1) && autodma) {
 320                 int dma_mode = 0;
 321
 322                 /* Consult the list of known "bad" drives */
 323                 if (ide_dmaproc(ide_dma_bad_drive, drive))
 324                         return hwif->dmaproc(ide_dma_off, drive);
 325
 326                 /* Enable DMA on any drive that has
 327                  * UltraDMA (mode 0/1/2) enabled
 328                  */
 329                 if (id->field_valid & 4 && id->dma_ultra & 7)
 330                         dma_mode = 2;
 331
 332                 /* Enable DMA on any drive that has mode1
 333                  * or mode2 multiword DMA enabled
 334                  */
 335                 if (id->field_valid & 2 && id->dma_mword & 6)
 336                         dma_mode = id->dma_mword & 4 ? 2 : 1;
 337
 338                 /* Consult the list of known "good" drives */
 339                 if (ide_dmaproc(ide_dma_good_drive, drive))
 340                         dma_mode = 1;
 341
 342                 if (dma_mode && icside_config_drive(drive, dma_mode) == 0)
 343                         return hwif->dmaproc(ide_dma_on, drive);
 344         }
 345         return hwif->dmaproc(ide_dma_off_quietly, drive);
 346 }
 347
 348 static int
 349 icside_dmaproc(ide_dma_action_t func, ide_drive_t *drive)
 350 {
 351         ide_hwif_t *hwif = HWIF(drive);
 352         int count, reading = 0;
 353
 354         switch (func) {
 355         case ide_dma_check:
 356                 return icside_dma_check(drive);
 357
 358         case ide_dma_read:
 359                 reading = 1;
 360         case ide_dma_write:
 361                 count = icside_build_dmatable(drive, reading);
 362                 if (!count)
 363                         return 1;
 364                 disable_dma(hwif->hw.dma);
 365
 366                 /* Route the DMA signals to
 367                  * to the correct interface.
 368                  */
 369                 outb(hwif->select_data, hwif->config_data);
 370
 371                 /* Select the correct timing
 372                  * for this drive
 373                  */
 374                 set_dma_speed(hwif->hw.dma, drive->drive_data);
 375
 376                 set_dma_sg(hwif->hw.dma, (dmasg_t *)hwif->dmatable, count);
 377                 set_dma_mode(hwif->hw.dma, reading ? DMA_MODE_READ
 378                              : DMA_MODE_WRITE);
 379
 380                 drive->waiting_for_dma = 1;
 381                 if (drive->media != ide_disk)
 382                         return 0;
 383
 384                 drive->timeout = WAIT_CMD;
 385                 ide_set_handler(drive, &ide_dma_intr);
 386                 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA,
 387                          IDE_COMMAND_REG);
 388
 389         case ide_dma_begin:
 390                 enable_dma(hwif->hw.dma);
 391                 return 0;
 392
 393         case ide_dma_end:
 394                 drive->waiting_for_dma = 0;
 395                 disable_dma(hwif->hw.dma);
 396                 return get_dma_residue(hwif->hw.dma) != 0;
 397
 398         case ide_dma_test_irq:
 399                 return inb((unsigned long)hwif->hw.priv) & 1;
 400
 401         default:
 402                 return ide_dmaproc(func, drive);
 403         }
 404 }
 405
 406 static unsigned long
 407 icside_alloc_dmatable(void)
 408 {
 409         static unsigned long dmatable;
 410         static unsigned int leftover;
 411         unsigned long table;
 412
 413         if (leftover < TABLE_SIZE) {
 414 #if PAGE_SIZE == TABLE_SIZE * 2
 415                 dmatable = __get_free_pages(GFP_KERNEL, 1);
 416                 leftover = PAGE_SIZE;
 417 #else
 418                 dmatable = kmalloc(TABLE_SIZE, GFP_KERNEL);
 419                 leftover = TABLE_SIZE;
 420 #endif
 421         }
 422
 423         table = dmatable;
 424         if (table) {
 425                 dmatable += TABLE_SIZE;
 426                 leftover -= TABLE_SIZE;
 427         }
 428
 429         return table;
 430 }
 431
 432 static int
 433 icside_setup_dma(ide_hwif_t *hwif, int autodma)
 434 {
 435         unsigned long table = icside_alloc_dmatable();
 436
 437         printk("    %s: SG-DMA", hwif->name);
 438
 439         if (!table)
 440                 printk(" -- ERROR, unable to allocate DMA table\n");
 441         else {
 442                 hwif->dmatable = (void *)table;
 443                 hwif->dmaproc = icside_dmaproc;
 444                 hwif->autodma = autodma;
 445
 446                 printk(" capable%s\n", autodma ?
 447                         ", auto-enable" : "");
 448         }
 449
 450         return hwif->dmatable != NULL;
 451 }
 452 #endif
 453
 454 static ide_hwif_t *
 455 icside_find_hwif(unsigned long dataport)
 456 {
 457         ide_hwif_t *hwif;
 458         int index;
 459
 460         for (index = 0; index < MAX_HWIFS; ++index) {
 461                 hwif = &ide_hwifs[index];
 462                 if (hwif->hw.io_ports[IDE_DATA_OFFSET] == (ide_ioreg_t)dataport)
 463                         goto found;
 464         }
 465
 466         for (index = 0; index < MAX_HWIFS; ++index) {
 467                 hwif = &ide_hwifs[index];
 468                 if (!hwif->hw.io_ports[IDE_DATA_OFFSET])
 469                         goto found;
 470         }
 471
 472         return NULL;
 473 found:
 474         return hwif;
 475 }
 476
 477 static ide_hwif_t *
 478 icside_setup(unsigned long base, struct cardinfo *info, int irq)
 479 {
 480         unsigned long port = base + info->dataoffset;
 481         ide_hwif_t *hwif;
 482
 483         hwif = icside_find_hwif(base);
 484         if (hwif) {
 485                 int i;
 486
 487                 memset(&hwif->hw, 0, sizeof(hw_regs_t));
 488
 489                 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
 490                         hwif->hw.io_ports[i] = (ide_ioreg_t)port;
 491                         port += 1 << info->stepping;
 492                 }
 493                 hwif->hw.io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset;
 494                 hwif->hw.irq  = irq;
 495                 hwif->hw.dma  = NO_DMA;
 496                 hwif->noprobe = 0;
 497                 hwif->chipset = ide_acorn;
 498         }
 499
 500         return hwif;
 501 }
 502
 503 static int icside_register_v5(struct expansion_card *ec, int autodma)
 504 {
 505         unsigned long slot_port;
 506         ide_hwif_t *hwif;
 507
 508         slot_port = ecard_address(ec, ECARD_MEMC, 0);
 509
 510         ec->irqaddr  = (unsigned char *)ioaddr(slot_port + ICS_ARCIN_V5_INTRSTAT);
 511         ec->irqmask  = 1;
 512         ec->irq_data = (void *)slot_port;
 513         ec->ops      = (expansioncard_ops_t *)&icside_ops_arcin_v5;
 514
 515         /*
 516          * Be on the safe side - disable interrupts
 517          */
 518         inb(slot_port + ICS_ARCIN_V5_INTROFFSET);
 519
 520         hwif = icside_setup(slot_port, &icside_cardinfo_v5, ec->irq);
 521
 522         return hwif ? 0 : -1;
 523 }
 524
 525 static int icside_register_v6(struct expansion_card *ec, int autodma)
 526 {
 527         unsigned long slot_port, port;
 528         ide_hwif_t *hwif, *mate;
 529         int sel = 0;
 530
 531         slot_port = ecard_address(ec, ECARD_IOC, ECARD_FAST);
 532         port      = ecard_address(ec, ECARD_EASI, ECARD_FAST);
 533
 534         if (port == 0)
 535                 port = slot_port;
 536         else
 537                 sel = 1 << 5;
 538
 539         outb(sel, slot_port);
 540
 541         ec->irq_data = (void *)port;
 542         ec->ops      = (expansioncard_ops_t *)&icside_ops_arcin_v6;
 543
 544         /*
 545          * Be on the safe side - disable interrupts
 546          */
 547         inb(port + ICS_ARCIN_V6_INTROFFSET_1);
 548         inb(port + ICS_ARCIN_V6_INTROFFSET_2);
 549
 550         hwif = icside_setup(port, &icside_cardinfo_v6_1, ec->irq);
 551         mate = icside_setup(port, &icside_cardinfo_v6_2, ec->irq);
 552
 553 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
 554         if (ec->dma != NO_DMA) {
 555                 if (request_dma(ec->dma, hwif->name))
 556                         goto no_dma;
 557
 558                 if (hwif) {
 559                         hwif->config_data = slot_port;
 560                         hwif->select_data = sel;
 561                         hwif->hw.dma  = ec->dma;
 562                         hwif->hw.priv = (void *)
 563                                         (port + ICS_ARCIN_V6_INTRSTAT_1);
 564                         hwif->channel = 0;
 565                         icside_setup_dma(hwif, autodma);
 566                 }
 567                 if (mate) {
 568                         mate->config_data = slot_port;
 569                         mate->select_data = sel | 1;
 570                         mate->hw.dma  = ec->dma;
 571                         mate->hw.priv = (void *)
 572                                         (port + ICS_ARCIN_V6_INTRSTAT_2);
 573                         mate->channel = 1;
 574                         icside_setup_dma(mate, autodma);
 575                 }
 576         }
 577 #endif
 578
 579 no_dma:
 580         return hwif || mate ? 0 : -1;
 581 }
 582
 583 int icside_init(void)
 584 {
 585         int autodma = 0;
 586
 587 #ifdef CONFIG_IDEDMA_ICS_AUTO
 588         autodma = 1;
 589 #endif
 590
 591         ecard_startfind ();
 592
 593         do {
 594                 struct expansion_card *ec;
 595                 int result;
 596
 597                 ec = ecard_find(0, icside_cids);
 598                 if (ec == NULL)
 599                         break;
 600
 601                 ecard_claim(ec);
 602
 603                 switch (icside_identifyif(ec)) {
 604                 case ics_if_arcin_v5:
 605                         result = icside_register_v5(ec, autodma);
 606                         break;
 607
 608                 case ics_if_arcin_v6:
 609                         result = icside_register_v6(ec, autodma);
 610                         break;
 611
 612                 default:
 613                         result = -1;
 614                         break;
 615                 }
 616
 617                 if (result)
 618                         ecard_release(ec);
 619         } while (1);
 620
 621         return 0;
 622 }