arch/arm/mm/mm-footbridge.c

   1 /*
   2  * arch/arm/mm/mm-footbridge.c
   3  *
   4  * Extra MM routines for the EBSA285 architecture
   5  *
   6  * Copyright (C) 1998-1999 Russell King, Dave Gilbert.
   7  */
   8 #include <linux/config.h>
   9 #include <linux/sched.h>
  10 #include <linux/mm.h>
  11 #include <linux/init.h>
  12
  13 #include <asm/pgtable.h>
  14 #include <asm/page.h>
  15 #include <asm/io.h>
  16 #include <asm/dec21285.h>
  17
  18 #include "map.h"
  19
  20 /*
  21  * The first entry allows us to fiddle with the EEPROM from user-space.
  22  *  This entry will go away in time, once the fmu32 can mmap() the
  23  *  flash.  It can't at the moment.
  24  *
  25  * If you want to fiddle with PCI VGA cards from user space, then
  26  * change the '0, 1 }' for the PCI MEM and PCI IO to '1, 1 }'
  27  * You can then access the PCI bus at 0xe0000000 and 0xffe00000.
  28  */
  29
  30 #ifdef CONFIG_HOST_FOOTBRIDGE
  31
  32 /*
  33  * The mapping when the footbridge is in host mode.
  34  */
  35 #define MAPPING \
  36  { FLASH_BASE,   DC21285_FLASH,                 FLASH_SIZE,     DOMAIN_IO, 0, 1, 0, 0 }, \
  37  { PCIMEM_BASE,  DC21285_PCI_MEM,               PCIMEM_SIZE,    DOMAIN_IO, 0, 1, 0, 0 }, \
  38  { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG,     PCICFG0_SIZE,   DOMAIN_IO, 0, 1, 0, 0 }, \
  39  { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG,     PCICFG1_SIZE,   DOMAIN_IO, 0, 1, 0, 0 }, \
  40  { PCIIACK_BASE, DC21285_PCI_IACK,              PCIIACK_SIZE,   DOMAIN_IO, 0, 1, 0, 0 }, \
  41  { WFLUSH_BASE,  DC21285_OUTBOUND_WRITE_FLUSH,  WFLUSH_SIZE,    DOMAIN_IO, 0, 1, 0, 0 }, \
  42  { ARMCSR_BASE,  DC21285_ARMCSR_BASE,           ARMCSR_SIZE,    DOMAIN_IO, 0, 1, 0, 0 }, \
  43  { PCIO_BASE,    DC21285_PCI_IO,                PCIO_SIZE,      DOMAIN_IO, 0, 1, 0, 0 }, \
  44  { XBUS_BASE,    0x40000000,                    XBUS_SIZE,      DOMAIN_IO, 0, 1, 0, 0 }
  45
  46 #else
  47
  48 /*
  49  * These two functions convert virtual addresses to PCI addresses
  50  * and PCI addresses to virtual addresses.  Note that it is only
  51  * legal to use these on memory obtained via get_free_page or
  52  * kmalloc.
  53  */
  54 unsigned long __virt_to_bus(unsigned long res)
  55 {
  56 #ifdef CONFIG_DEBUG_ERRORS
  57         if (res < PAGE_OFFSET || res >= (unsigned long)high_memory) {
  58                 printk("__virt_to_phys: invalid virtual address 0x%08lx\n", res);
  59                 __backtrace();
  60         }
  61 #endif
  62         return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
  63 }
  64
  65 unsigned long __bus_to_virt(unsigned long res)
  66 {
  67         res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
  68         res += PAGE_OFFSET;
  69
  70 #ifdef CONFIG_DEBUG_ERRORS
  71         if (res < PAGE_OFFSET || res >= (unsigned long)high_memory) {
  72                 printk("__phys_to_virt: invalid virtual address 0x%08lx\n", res);
  73                 __backtrace();
  74         }
  75 #endif
  76         return res;
  77 }
  78
  79 /*
  80  * The mapping when the footbridge is in add-in mode.
  81  */
  82 #define MAPPING \
  83  { PCIO_BASE,    DC21285_PCI_IO,                PCIO_SIZE,      DOMAIN_IO, 0, 1, 0, 0 }, \
  84  { XBUS_BASE,    0x40000000,                    XBUS_SIZE,      DOMAIN_IO, 0, 1, 0, 0 }, \
  85  { ARMCSR_BASE,  DC21285_ARMCSR_BASE,           ARMCSR_SIZE,    DOMAIN_IO, 0, 1, 0, 0 }, \
  86  { WFLUSH_BASE,  DC21285_OUTBOUND_WRITE_FLUSH,  WFLUSH_SIZE,    DOMAIN_IO, 0, 1, 0, 0 }, \
  87  { FLASH_BASE,   DC21285_FLASH,                 FLASH_SIZE,     DOMAIN_IO, 0, 1, 0, 0 }, \
  88  { PCIMEM_BASE,  DC21285_PCI_MEM,               PCIMEM_SIZE,    DOMAIN_IO, 0, 1, 0, 0 }
  89
  90 #endif
  91
  92 struct map_desc io_desc[] __initdata = {
  93         MAPPING
  94 };
  95
  96 #define SIZE(x) (sizeof(x) / sizeof(x[0]))
  97
  98 unsigned int __initdata io_desc_size = SIZE(io_desc);
  99