2 * include/asm-i386/bugs.h
4 * Copyright (C) 1994 Linus Torvalds
6 * Cyrix stuff, June 1998 by:
7 * - Rafael R. Reilova (moved everything from head.S),
8 * <rreilova@ececs.uc.edu>
9 * - Channing Corn (tests & fixes),
10 * - Andrew D. Balsa (code cleanup).
12 * Pentium III FXSR, SSE support
13 * Gareth Hughes <gareth@valinux.com>, May 2000
17 * This is included by init/main.c to check for architecture-dependent bugs.
20 * void check_bugs(void);
23 #include <linux/config.h>
24 #include <asm/processor.h>
28 static int __init
no_halt(char *s
)
30 boot_cpu_data
.hlt_works_ok
= 0;
34 __setup("no-hlt", no_halt
);
36 static int __init
mca_pentium(char *s
)
42 __setup("mca-pentium", mca_pentium
);
44 static int __init
no_387(char *s
)
46 boot_cpu_data
.hard_math
= 0;
47 write_cr0(0xE | read_cr0());
51 __setup("no387", no_387
);
53 static double __initdata x
= 4195835.0;
54 static double __initdata y
= 3145727.0;
57 * This used to check for exceptions..
58 * However, it turns out that to support that,
59 * the XMM trap handlers basically had to
60 * be buggy. So let's have a correct XMM trap
61 * handler, and forget about printing out
62 * some status at boot.
64 * We should really only care about bugs here
65 * anyway. Not features.
67 static void __init
check_fpu(void)
69 if (!boot_cpu_data
.hard_math
) {
70 #ifndef CONFIG_MATH_EMULATION
71 printk(KERN_EMERG
"No coprocessor found and no math emulation present.\n");
72 printk(KERN_EMERG
"Giving up.\n");
78 /* Enable FXSR and company _before_ testing for FP problems. */
79 #if defined(CONFIG_X86_FXSR) || defined(CONFIG_X86_RUNTIME_FXSR)
81 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
83 if (offsetof(struct task_struct
, thread
.i387
.fxsave
) & 15)
84 panic("Kernel compiled for PII/PIII+ with FXSR, data not 16-byte aligned!");
87 printk(KERN_INFO
"Enabling fast FPU save and restore... ");
88 set_in_cr4(X86_CR4_OSFXSR
);
94 printk(KERN_INFO
"Enabling unmasked SIMD FPU exception support... ");
95 set_in_cr4(X86_CR4_OSXMMEXCPT
);
100 /* Test for the divl bug.. */
106 "fsubp %%st,%%st(1)\n\t"
110 : "=m" (*&boot_cpu_data
.fdiv_bug
)
111 : "m" (*&x
), "m" (*&y
));
112 if (boot_cpu_data
.fdiv_bug
)
113 printk("Hmm, FPU with FDIV bug.\n");
116 static void __init
check_hlt(void)
118 printk(KERN_INFO
"Checking 'hlt' instruction... ");
119 if (!boot_cpu_data
.hlt_works_ok
) {
120 printk("disabled\n");
123 __asm__
__volatile__("hlt ; hlt ; hlt ; hlt");
128 * Most 386 processors have a bug where a POPAD can lock the
129 * machine even from user space.
132 static void __init
check_popad(void)
134 #ifndef CONFIG_X86_POPAD_OK
135 int res
, inp
= (int) &res
;
137 printk(KERN_INFO
"Checking for popad bug... ");
138 __asm__
__volatile__(
139 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
143 /* If this fails, it means that any user program may lock the CPU hard. Too bad. */
144 if (res
!= 12345678) printk( "Buggy.\n" );
145 else printk( "OK.\n" );
150 * Check whether we are able to run this kernel safely on SMP.
152 * - In order to run on a i386, we need to be compiled for i386
153 * (for due to lack of "invlpg" and working WP on a i386)
154 * - In order to run on anything without a TSC, we need to be
155 * compiled for a i486.
156 * - In order to support the local APIC on a buggy Pentium machine,
157 * we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
158 * which happens implicitly if compiled for a Pentium or lower
159 * (unless an advanced selection of CPU features is used) as an
160 * otherwise config implies a properly working local APIC without
161 * the need to do extra reads from the APIC.
164 static void __init
check_config(void)
167 * We'd better not be a i386 if we're configured to use some
168 * i486+ only features! (WP works in supervisor mode and the
169 * new "invlpg" and "bswap" instructions)
171 #if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
172 if (boot_cpu_data
.x86
== 3)
173 panic("Kernel requires i486+ for 'invlpg' and other features");
177 * If we configured ourselves for a TSC, we'd better have one!
179 #ifdef CONFIG_X86_TSC
181 panic("Kernel compiled for Pentium+, requires TSC feature!");
185 * If we configured ourselves for PGE, we'd better have it.
187 #ifdef CONFIG_X86_PGE
189 panic("Kernel compiled for PPro+, requires PGE feature!");
193 * If we were told we had a good local APIC, check for buggy Pentia,
194 * i.e. all B steppings and the C2 stepping of P54C when using their
195 * integrated APIC (see 11AP erratum in "Pentium Processor
196 * Specification Update").
198 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
199 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
200 && test_bit(X86_FEATURE_APIC
, &boot_cpu_data
.x86_capability
)
201 && boot_cpu_data
.x86
== 5
202 && boot_cpu_data
.x86_model
== 2
203 && (boot_cpu_data
.x86_mask
< 6 || boot_cpu_data
.x86_mask
== 11))
204 panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
208 * If we configured ourselves for FXSR, we'd better have it.
210 #ifdef CONFIG_X86_FXSR
212 panic("Kernel compiled for PII/PIII+, requires FXSR feature!");
216 static void __init
check_bugs(void)
218 identify_cpu(&boot_cpu_data
);
221 print_cpu_info(&boot_cpu_data
);
227 system_utsname
.machine
[1] = '0' + (boot_cpu_data
.x86
> 6 ? 6 : boot_cpu_data
.x86
);