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Import 2.3.15pre2
[davej-history.git] / drivers / video / atyfb.c
blob68dab49ff42a85d1ee8977a34b45b1fcf349aff0
1 /* $Id: atyfb.c,v 1.109 1999/08/08 01:38:05 davem Exp $
2 * linux/drivers/video/atyfb.c -- Frame buffer device for ATI Mach64
3 *
4 * Copyright (C) 1997-1998 Geert Uytterhoeven
5 * Copyright (C) 1998 Bernd Harries
6 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 *
8 * This driver is partly based on the PowerMac console driver:
9 *
10 * Copyright (C) 1996 Paul Mackerras
11 *
12 * and on the PowerMac ATI/mach64 display driver:
13 *
14 * Copyright (C) 1997 Michael AK Tesch
15 *
16 * with work by Jon Howell
17 * Harry AC Eaton
18 * Anthony Tong <atong@uiuc.edu>
19 *
20 * This file is subject to the terms and conditions of the GNU General Public
21 * License. See the file COPYING in the main directory of this archive for
22 * more details.
23 */
24
25 /******************************************************************************
26
27 TODO:
28
29 - cursor support on all cards and all ramdacs.
30 - cursor parameters controlable via ioctl()s.
31 - guess PLL and MCLK based on the original PLL register values initialized
32 by the BIOS or Open Firmware (if they are initialized).
33
34 (Anyone to help with this?)
35
36 ******************************************************************************/
37
38
39 #include <linux/config.h>
40 #include <linux/module.h>
41 #include <linux/kernel.h>
42 #include <linux/errno.h>
43 #include <linux/string.h>
44 #include <linux/mm.h>
45 #include <linux/tty.h>
46 #include <linux/malloc.h>
47 #include <linux/vmalloc.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
50 #include <linux/fb.h>
51 #include <linux/selection.h>
52 #include <linux/console.h>
53 #include <linux/init.h>
54 #include <linux/pci.h>
55 #include <linux/nvram.h>
56 #include <linux/kd.h>
57 #include <linux/vt_kern.h>
58
59 #ifdef CONFIG_FB_COMPAT_XPMAC
60 #include <asm/vc_ioctl.h>
61 #endif
62
63 #include <asm/io.h>
64
65 #if defined(CONFIG_PPC)
66 #include <asm/prom.h>
67 #include <asm/pci-bridge.h>
68 #include <video/macmodes.h>
69 #include <asm/adb.h>
70 #include <asm/pmu.h>
71 #endif
72 #ifdef __sparc__
73 #include <asm/pbm.h>
74 #include <asm/fbio.h>
75 #endif
76 #include <asm/uaccess.h>
77
78 #include <video/fbcon.h>
79 #include <video/fbcon-cfb8.h>
80 #include <video/fbcon-cfb16.h>
81 #include <video/fbcon-cfb24.h>
82 #include <video/fbcon-cfb32.h>
83
84 #include "aty.h"
85
86
87 /*
88 * Debug flags.
89 */
90 #undef DEBUG
91
92
93 #define GUI_RESERVE 0x00001000
94
95
96 #ifndef __powerpc__
97 #define eieio() /* Enforce In-order Execution of I/O */
98 #endif
99
100 /* FIXME: remove the FAIL definition */
101 #define FAIL(x) do { printk(x "\n"); return -EINVAL; } while (0)
102
103
104 /*
105 * Elements of the Hardware specific atyfb_par structure
106 */
107
108 struct crtc {
109 u32 vxres;
110 u32 vyres;
111 u32 xoffset;
112 u32 yoffset;
113 u32 bpp;
114 u32 h_tot_disp;
115 u32 h_sync_strt_wid;
116 u32 v_tot_disp;
117 u32 v_sync_strt_wid;
118 u32 off_pitch;
119 u32 gen_cntl;
120 u32 dp_pix_width; /* acceleration */
121 u32 dp_chain_mask; /* acceleration */
122 };
123
124 struct pll_gx {
125 u8 m;
126 u8 n;
127 };
128
129 struct pll_ct {
130 u8 pll_ref_div;
131 u8 pll_gen_cntl;
132 u8 mclk_fb_div;
133 u8 pll_vclk_cntl;
134 u8 vclk_post_div;
135 u8 vclk_fb_div;
136 u8 pll_ext_cntl;
137 u32 dsp_config; /* Mach64 GTB DSP */
138 u32 dsp_on_off; /* Mach64 GTB DSP */
139 u8 mclk_post_div_real;
140 u8 vclk_post_div_real;
141 };
142
143
144 /*
145 * The Hardware parameters for each card
146 */
147
148 struct atyfb_par {
149 struct crtc crtc;
150 union {
151 struct pll_gx gx;
152 struct pll_ct ct;
153 } pll;
154 u32 accel_flags;
155 };
156
157 struct aty_cmap_regs {
158 u8 windex;
159 u8 lut;
160 u8 mask;
161 u8 rindex;
162 u8 cntl;
163 };
164
165 struct pci_mmap_map {
166 unsigned long voff;
167 unsigned long poff;
168 unsigned long size;
169 unsigned long prot_flag;
170 unsigned long prot_mask;
171 };
172
173 #define DEFAULT_CURSOR_BLINK_RATE (20)
174 #define CURSOR_DRAW_DELAY (2)
175
176 struct aty_cursor {
177 int enable;
178 int on;
179 int vbl_cnt;
180 int blink_rate;
181 u32 offset;
182 struct {
183 u16 x, y;
184 } pos, hot, size;
185 u32 color[2];
186 u8 bits[8][64];
187 u8 mask[8][64];
188 u8 *ram;
189 struct timer_list *timer;
190 };
191
192 struct fb_info_aty {
193 struct fb_info fb_info;
194 struct fb_info_aty *next;
195 unsigned long ati_regbase_phys;
196 unsigned long ati_regbase;
197 unsigned long frame_buffer_phys;
198 unsigned long frame_buffer;
199 struct pci_mmap_map *mmap_map;
200 struct aty_cursor *cursor;
201 struct aty_cmap_regs *aty_cmap_regs;
202 struct { u8 red, green, blue, pad; } palette[256];
203 struct atyfb_par default_par;
204 struct atyfb_par current_par;
205 u32 total_vram;
206 u32 ref_clk_per;
207 u32 pll_per;
208 u32 mclk_per;
209 u16 chip_type;
210 #define Gx info->chip_type
211 u8 chip_rev;
212 #define Rev info->chip_rev
213 u8 bus_type;
214 u8 ram_type;
215 u8 dac_type;
216 u8 clk_type;
217 u8 mem_refresh_rate;
218 struct display disp;
219 struct display_switch dispsw;
220 union {
221 #ifdef FBCON_HAS_CFB16
222 u16 cfb16[16];
223 #endif
224 #ifdef FBCON_HAS_CFB24
225 u32 cfb24[16];
226 #endif
227 #ifdef FBCON_HAS_CFB32
228 u32 cfb32[16];
229 #endif
230 } fbcon_cmap;
231 u8 blitter_may_be_busy;
232 #ifdef __sparc__
233 u8 open;
234 u8 mmaped;
235 int vtconsole;
236 int consolecnt;
237 #endif
238 };
239
240
241 /*
242 * Frame buffer device API
243 */
244
245 static int atyfb_open(struct fb_info *info, int user);
246 static int atyfb_release(struct fb_info *info, int user);
247 static int atyfb_get_fix(struct fb_fix_screeninfo *fix, int con,
248 struct fb_info *fb);
249 static int atyfb_get_var(struct fb_var_screeninfo *var, int con,
250 struct fb_info *fb);
251 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
252 struct fb_info *fb);
253 static int atyfb_pan_display(struct fb_var_screeninfo *var, int con,
254 struct fb_info *fb);
255 static int atyfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
256 struct fb_info *info);
257 static int atyfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
258 struct fb_info *info);
259 static int atyfb_ioctl(struct inode *inode, struct file *file, u_int cmd,
260 u_long arg, int con, struct fb_info *info);
261 #ifdef __sparc__
262 static int atyfb_mmap(struct fb_info *info, struct file *file,
263 struct vm_area_struct *vma);
264 #endif
265
266
267 /*
268 * Interface to the low level console driver
269 */
270
271 static int atyfbcon_switch(int con, struct fb_info *fb);
272 static int atyfbcon_updatevar(int con, struct fb_info *fb);
273 static void atyfbcon_blank(int blank, struct fb_info *fb);
274
275
276 /*
277 * Text console acceleration
278 */
279
280 static void fbcon_aty_bmove(struct display *p, int sy, int sx, int dy, int dx,
281 int height, int width);
282 static void fbcon_aty_clear(struct vc_data *conp, struct display *p, int sy,
283 int sx, int height, int width);
284 #ifdef FBCON_HAS_CFB8
285 static struct display_switch fbcon_aty8;
286 static void fbcon_aty8_putc(struct vc_data *conp, struct display *p, int c,
287 int yy, int xx);
288 static void fbcon_aty8_putcs(struct vc_data *conp, struct display *p,
289 const unsigned short *s, int count, int yy,
290 int xx);
291 #endif
292 #ifdef FBCON_HAS_CFB16
293 static struct display_switch fbcon_aty16;
294 static void fbcon_aty16_putc(struct vc_data *conp, struct display *p, int c,
295 int yy, int xx);
296 static void fbcon_aty16_putcs(struct vc_data *conp, struct display *p,
297 const unsigned short *s, int count, int yy,
298 int xx);
299 #endif
300 #ifdef FBCON_HAS_CFB24
301 static struct display_switch fbcon_aty24;
302 static void fbcon_aty24_putc(struct vc_data *conp, struct display *p, int c,
303 int yy, int xx);
304 static void fbcon_aty24_putcs(struct vc_data *conp, struct display *p,
305 const unsigned short *s, int count, int yy,
306 int xx);
307 #endif
308 #ifdef FBCON_HAS_CFB32
309 static struct display_switch fbcon_aty32;
310 static void fbcon_aty32_putc(struct vc_data *conp, struct display *p, int c,
311 int yy, int xx);
312 static void fbcon_aty32_putcs(struct vc_data *conp, struct display *p,
313 const unsigned short *s, int count, int yy,
314 int xx);
315 #endif
316
317
318 /*
319 * Internal routines
320 */
321
322 static int aty_init(struct fb_info_aty *info, const char *name);
323 static struct aty_cursor *aty_init_cursor(struct fb_info_aty *fb);
324 #ifdef CONFIG_ATARI
325 static int store_video_par(char *videopar, unsigned char m64_num);
326 static char *strtoke(char *s, const char *ct);
327 #endif
328
329 static void reset_engine(const struct fb_info_aty *info);
330 static void init_engine(const struct atyfb_par *par, struct fb_info_aty *info);
331 static void aty_st_514(int offset, u8 val, const struct fb_info_aty *info);
332 static void aty_st_pll(int offset, u8 val, const struct fb_info_aty *info);
333 static u8 aty_ld_pll(int offset, const struct fb_info_aty *info);
334 static void aty_set_crtc(const struct fb_info_aty *info,
335 const struct crtc *crtc);
336 static int aty_var_to_crtc(const struct fb_info_aty *info,
337 const struct fb_var_screeninfo *var,
338 struct crtc *crtc);
339 static void aty_set_dac_514(const struct fb_info_aty *info, u32 bpp);
340 static int aty_crtc_to_var(const struct crtc *crtc,
341 struct fb_var_screeninfo *var);
342 static void aty_set_pll_gx(const struct fb_info_aty *info,
343 const struct pll_gx *pll);
344 static int aty_var_to_pll_18818(u32 vclk_per, struct pll_gx *pll);
345 static int aty_var_to_pll_514(u32 vclk_per, struct pll_gx *pll);
346 static u32 aty_pll_gx_to_var(const struct pll_gx *pll,
347 const struct fb_info_aty *info);
348 static void aty_set_pll_ct(const struct fb_info_aty *info,
349 const struct pll_ct *pll);
350 static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
351 struct pll_ct *pll);
352 static int aty_dsp_gt(const struct fb_info_aty *info, u8 bpp,
353 struct pll_ct *pll);
354 static void aty_calc_pll_ct(const struct fb_info_aty *info,
355 struct pll_ct *pll);
356 static int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
357 u8 bpp, struct pll_ct *pll);
358 static u32 aty_pll_ct_to_var(const struct pll_ct *pll,
359 const struct fb_info_aty *info);
360 static void atyfb_set_par(const struct atyfb_par *par,
361 struct fb_info_aty *info);
362 static int atyfb_decode_var(const struct fb_var_screeninfo *var,
363 struct atyfb_par *par,
364 const struct fb_info_aty *info);
365 static int atyfb_encode_var(struct fb_var_screeninfo *var,
366 const struct atyfb_par *par,
367 const struct fb_info_aty *info);
368 static void set_off_pitch(struct atyfb_par *par,
369 const struct fb_info_aty *info);
370 static int encode_fix(struct fb_fix_screeninfo *fix,
371 const struct atyfb_par *par,
372 const struct fb_info_aty *info);
373 static void atyfb_set_disp(struct display *disp, struct fb_info_aty *info,
374 int bpp, int accel);
375 static int atyfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
376 u_int *transp, struct fb_info *fb);
377 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
378 u_int transp, struct fb_info *fb);
379 static void do_install_cmap(int con, struct fb_info *info);
380 #if defined(CONFIG_PPC)
381 static int read_aty_sense(const struct fb_info_aty *info);
382 #endif
383
384
385 /*
386 * Interface used by the world
387 */
388
389 int atyfb_init(void);
390 #ifdef CONFIG_FB_OF
391 void atyfb_of_init(struct device_node *dp);
392 #endif
393 int atyfb_setup(char*);
394
395 static int currcon = 0;
396
397 static struct fb_ops atyfb_ops = {
398 atyfb_open, atyfb_release, atyfb_get_fix, atyfb_get_var, atyfb_set_var,
399 atyfb_get_cmap, atyfb_set_cmap, atyfb_pan_display, atyfb_ioctl,
400 #ifdef __sparc__
401 atyfb_mmap
402 #else
403 NULL
404 #endif
405 };
406
407 static char atyfb_name[16] = "ATY Mach64";
408 static char fontname[40] __initdata = { 0 };
409 static char curblink __initdata = 1;
410 static char noaccel __initdata = 0;
411 static u32 default_vram __initdata = 0;
412 static int default_pll __initdata = 0;
413 static int default_mclk __initdata = 0;
414 static const char *mode_option __initdata = NULL;
415
416 #if defined(CONFIG_PPC)
417 static int default_vmode __initdata = VMODE_NVRAM;
418 static int default_cmode __initdata = CMODE_NVRAM;
419 #endif
420
421 #ifdef CONFIG_ATARI
422 static unsigned int mach64_count __initdata = 0;
423 static unsigned long phys_vmembase[FB_MAX] __initdata = { 0, };
424 static unsigned long phys_size[FB_MAX] __initdata = { 0, };
425 static unsigned long phys_guiregbase[FB_MAX] __initdata = { 0, };
426 #endif
427
428
429 static struct aty_features {
430 u16 pci_id;
431 u16 chip_type;
432 const char *name;
433 } aty_features[] __initdata = {
434 /* mach64GX family */
435 { 0x4758, 0x00d7, "mach64GX (ATI888GX00)" },
436 { 0x4358, 0x0057, "mach64CX (ATI888CX00)" },
437
438 /* mach64CT family */
439 { 0x4354, 0x4354, "mach64CT (ATI264CT)" },
440 { 0x4554, 0x4554, "mach64ET (ATI264ET)" },
441
442 /* mach64CT family / mach64VT class */
443 { 0x5654, 0x5654, "mach64VT (ATI264VT)" },
444 { 0x5655, 0x5655, "mach64VTB (ATI264VTB)" },
445 { 0x5656, 0x5656, "mach64VT4 (ATI264VT4)" },
446
447 /* mach64CT family / mach64GT (3D RAGE) class */
448 { 0x4c42, 0x4c42, "3D RAGE LT PRO (AGP)" },
449 { 0x4c44, 0x4c44, "3D RAGE LT PRO" },
450 { 0x4c47, 0x4c47, "3D RAGE LT PRO" },
451 { 0x4c49, 0x4c49, "3D RAGE LT PRO" },
452 { 0x4c50, 0x4c50, "3D RAGE LT PRO" },
453 { 0x4c54, 0x4c54, "3D RAGE LT" },
454 { 0x4754, 0x4754, "3D RAGE (GT)" },
455 { 0x4755, 0x4755, "3D RAGE II+ (GTB)" },
456 { 0x4756, 0x4756, "3D RAGE IIC (PCI)" },
457 { 0x4757, 0x4757, "3D RAGE IIC (AGP)" },
458 { 0x475a, 0x475a, "3D RAGE IIC (AGP)" },
459 { 0x4742, 0x4742, "3D RAGE PRO (BGA, AGP)" },
460 { 0x4744, 0x4744, "3D RAGE PRO (BGA, AGP, 1x only)" },
461 { 0x4749, 0x4749, "3D RAGE PRO (BGA, PCI)" },
462 { 0x4750, 0x4750, "3D RAGE PRO (PQFP, PCI)" },
463 { 0x4751, 0x4751, "3D RAGE PRO (PQFP, PCI, limited 3D)" },
464 };
465
466 static const char *aty_gx_ram[8] __initdata = {
467 "DRAM", "VRAM", "VRAM", "DRAM", "DRAM", "VRAM", "VRAM", "RESV"
468 };
469
470 static const char *aty_ct_ram[8] __initdata = {
471 "OFF", "DRAM", "EDO", "EDO", "SDRAM", "SGRAM", "WRAM", "RESV"
472 };
473
474
475 static inline u32 aty_ld_le32(unsigned int regindex,
476 const struct fb_info_aty *info)
477 {
478 unsigned long temp;
479 u32 val;
480
481 #if defined(__powerpc__)
482 temp = info->ati_regbase;
483 asm volatile("lwbrx %0,%1,%2" : "=r"(val) : "b" (regindex), "r" (temp));
484 #elif defined(__sparc_v9__)
485 temp = info->ati_regbase + regindex;
486 asm volatile("lduwa [%1] %2, %0" : "=r" (val) : "r" (temp), "i" (ASI_PL));
487 #else
488 temp = info->ati_regbase+regindex;
489 val = le32_to_cpu(*((volatile u32 *)(temp)));
490 #endif
491 return val;
492 }
493
494 static inline void aty_st_le32(unsigned int regindex, u32 val,
495 const struct fb_info_aty *info)
496 {
497 unsigned long temp;
498
499 #if defined(__powerpc__)
500 temp = info->ati_regbase;
501 asm volatile("stwbrx %0,%1,%2" : : "r" (val), "b" (regindex), "r" (temp) :
502 "memory");
503 #elif defined(__sparc_v9__)
504 temp = info->ati_regbase + regindex;
505 asm volatile("stwa %0, [%1] %2" : : "r" (val), "r" (temp), "i" (ASI_PL) : "memory");
506 #else
507 temp = info->ati_regbase+regindex;
508 *((volatile u32 *)(temp)) = cpu_to_le32(val);
509 #endif
510 }
511
512 static inline u8 aty_ld_8(unsigned int regindex,
513 const struct fb_info_aty *info)
514 {
515 return *(volatile u8 *)(info->ati_regbase+regindex);
516 }
517
518 static inline void aty_st_8(unsigned int regindex, u8 val,
519 const struct fb_info_aty *info)
520 {
521 *(volatile u8 *)(info->ati_regbase+regindex) = val;
522 }
523
524
525 /*
526 * Generic Mach64 routines
527 */
528
529 /*
530 * All writes to draw engine registers are automatically routed through a
531 * 32-bit-wide, 16-entry-deep command FIFO ...
532 * Register writes to registers with DWORD offsets less than 40h are not
533 * FIFOed.
534 * (from Chapter 5 of the Mach64 Programmer's Guide)
535 */
536
537 static inline void wait_for_fifo(u16 entries, const struct fb_info_aty *info)
538 {
539 while ((aty_ld_le32(FIFO_STAT, info) & 0xffff) >
540 ((u32)(0x8000 >> entries)));
541 }
542
543 static inline void wait_for_idle(struct fb_info_aty *info)
544 {
545 wait_for_fifo(16, info);
546 while ((aty_ld_le32(GUI_STAT, info) & 1)!= 0);
547 info->blitter_may_be_busy = 0;
548 }
549
550 static void reset_engine(const struct fb_info_aty *info)
551 {
552 /* reset engine */
553 aty_st_le32(GEN_TEST_CNTL,
554 aty_ld_le32(GEN_TEST_CNTL, info) & ~GUI_ENGINE_ENABLE, info);
555 /* enable engine */
556 aty_st_le32(GEN_TEST_CNTL,
557 aty_ld_le32(GEN_TEST_CNTL, info) | GUI_ENGINE_ENABLE, info);
558 /* ensure engine is not locked up by clearing any FIFO or */
559 /* HOST errors */
560 aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL, info) | BUS_HOST_ERR_ACK |
561 BUS_FIFO_ERR_ACK, info);
562 }
563
564 static void init_engine(const struct atyfb_par *par, struct fb_info_aty *info)
565 {
566 u32 pitch_value;
567
568 /* determine modal information from global mode structure */
569 pitch_value = par->crtc.vxres;
570
571 if (par->crtc.bpp == 24) {
572 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
573 /* horizontal coordinates and widths must be adjusted */
574 pitch_value = pitch_value * 3;
575 }
576
577 /* Reset engine, enable, and clear any engine errors */
578 reset_engine(info);
579 /* Ensure that vga page pointers are set to zero - the upper */
580 /* page pointers are set to 1 to handle overflows in the */
581 /* lower page */
582 aty_st_le32(MEM_VGA_WP_SEL, 0x00010000, info);
583 aty_st_le32(MEM_VGA_RP_SEL, 0x00010000, info);
584
585 /* ---- Setup standard engine context ---- */
586
587 /* All GUI registers here are FIFOed - therefore, wait for */
588 /* the appropriate number of empty FIFO entries */
589 wait_for_fifo(14, info);
590
591 /* enable all registers to be loaded for context loads */
592 aty_st_le32(CONTEXT_MASK, 0xFFFFFFFF, info);
593
594 /* set destination pitch to modal pitch, set offset to zero */
595 aty_st_le32(DST_OFF_PITCH, (pitch_value / 8) << 22, info);
596
597 /* zero these registers (set them to a known state) */
598 aty_st_le32(DST_Y_X, 0, info);
599 aty_st_le32(DST_HEIGHT, 0, info);
600 aty_st_le32(DST_BRES_ERR, 0, info);
601 aty_st_le32(DST_BRES_INC, 0, info);
602 aty_st_le32(DST_BRES_DEC, 0, info);
603
604 /* set destination drawing attributes */
605 aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
606 DST_X_LEFT_TO_RIGHT, info);
607
608 /* set source pitch to modal pitch, set offset to zero */
609 aty_st_le32(SRC_OFF_PITCH, (pitch_value / 8) << 22, info);
610
611 /* set these registers to a known state */
612 aty_st_le32(SRC_Y_X, 0, info);
613 aty_st_le32(SRC_HEIGHT1_WIDTH1, 1, info);
614 aty_st_le32(SRC_Y_X_START, 0, info);
615 aty_st_le32(SRC_HEIGHT2_WIDTH2, 1, info);
616
617 /* set source pixel retrieving attributes */
618 aty_st_le32(SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT, info);
619
620 /* set host attributes */
621 wait_for_fifo(13, info);
622 aty_st_le32(HOST_CNTL, 0, info);
623
624 /* set pattern attributes */
625 aty_st_le32(PAT_REG0, 0, info);
626 aty_st_le32(PAT_REG1, 0, info);
627 aty_st_le32(PAT_CNTL, 0, info);
628
629 /* set scissors to modal size */
630 aty_st_le32(SC_LEFT, 0, info);
631 aty_st_le32(SC_TOP, 0, info);
632 aty_st_le32(SC_BOTTOM, par->crtc.vyres-1, info);
633 aty_st_le32(SC_RIGHT, pitch_value-1, info);
634
635 /* set background color to minimum value (usually BLACK) */
636 aty_st_le32(DP_BKGD_CLR, 0, info);
637
638 /* set foreground color to maximum value (usually WHITE) */
639 aty_st_le32(DP_FRGD_CLR, 0xFFFFFFFF, info);
640
641 /* set write mask to effect all pixel bits */
642 aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, info);
643
644 /* set foreground mix to overpaint and background mix to */
645 /* no-effect */
646 aty_st_le32(DP_MIX, FRGD_MIX_S | BKGD_MIX_D, info);
647
648 /* set primary source pixel channel to foreground color */
649 /* register */
650 aty_st_le32(DP_SRC, FRGD_SRC_FRGD_CLR, info);
651
652 /* set compare functionality to false (no-effect on */
653 /* destination) */
654 wait_for_fifo(3, info);
655 aty_st_le32(CLR_CMP_CLR, 0, info);
656 aty_st_le32(CLR_CMP_MASK, 0xFFFFFFFF, info);
657 aty_st_le32(CLR_CMP_CNTL, 0, info);
658
659 /* set pixel depth */
660 wait_for_fifo(2, info);
661 aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, info);
662 aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, info);
663
664 wait_for_fifo(5, info);
665 aty_st_le32(SCALE_3D_CNTL, 0, info);
666 aty_st_le32(Z_CNTL, 0, info);
667 aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, info) & ~0x20, info);
668 aty_st_le32(GUI_TRAJ_CNTL, 0x100023, info);
669
670 /* insure engine is idle before leaving */
671 wait_for_idle(info);
672 }
673
674 static void aty_st_514(int offset, u8 val, const struct fb_info_aty *info)
675 {
676 aty_st_8(DAC_CNTL, 1, info);
677 /* right addr byte */
678 aty_st_8(DAC_W_INDEX, offset & 0xff, info);
679 /* left addr byte */
680 aty_st_8(DAC_DATA, (offset >> 8) & 0xff, info);
681 eieio();
682 aty_st_8(DAC_MASK, val, info);
683 eieio();
684 aty_st_8(DAC_CNTL, 0, info);
685 }
686
687 static void aty_st_pll(int offset, u8 val, const struct fb_info_aty *info)
688 {
689 /* write addr byte */
690 aty_st_8(CLOCK_CNTL + 1, (offset << 2) | PLL_WR_EN, info);
691 eieio();
692 /* write the register value */
693 aty_st_8(CLOCK_CNTL + 2, val, info);
694 eieio();
695 aty_st_8(CLOCK_CNTL + 1, (offset << 2) & ~PLL_WR_EN, info);
696 }
697
698 static u8 aty_ld_pll(int offset, const struct fb_info_aty *info)
699 {
700 u8 res;
701
702 /* write addr byte */
703 aty_st_8(CLOCK_CNTL + 1, (offset << 2), info);
704 eieio();
705 /* read the register value */
706 res = aty_ld_8(CLOCK_CNTL + 2, info);
707 eieio();
708 return res;
709 }
710
711 #if defined(CONFIG_PPC)
712
713 /*
714 * Apple monitor sense
715 */
716
717 static int read_aty_sense(const struct fb_info_aty *info)
718 {
719 int sense, i;
720
721 aty_st_le32(GP_IO, 0x31003100, info); /* drive outputs high */
722 __delay(200);
723 aty_st_le32(GP_IO, 0, info); /* turn off outputs */
724 __delay(2000);
725 i = aty_ld_le32(GP_IO, info); /* get primary sense value */
726 sense = ((i & 0x3000) >> 3) | (i & 0x100);
727
728 /* drive each sense line low in turn and collect the other 2 */
729 aty_st_le32(GP_IO, 0x20000000, info); /* drive A low */
730 __delay(2000);
731 i = aty_ld_le32(GP_IO, info);
732 sense |= ((i & 0x1000) >> 7) | ((i & 0x100) >> 4);
733 aty_st_le32(GP_IO, 0x20002000, info); /* drive A high again */
734 __delay(200);
735
736 aty_st_le32(GP_IO, 0x10000000, info); /* drive B low */
737 __delay(2000);
738 i = aty_ld_le32(GP_IO, info);
739 sense |= ((i & 0x2000) >> 10) | ((i & 0x100) >> 6);
740 aty_st_le32(GP_IO, 0x10001000, info); /* drive B high again */
741 __delay(200);
742
743 aty_st_le32(GP_IO, 0x01000000, info); /* drive C low */
744 __delay(2000);
745 sense |= (aty_ld_le32(GP_IO, info) & 0x3000) >> 12;
746 aty_st_le32(GP_IO, 0, info); /* turn off outputs */
747
748 return sense;
749 }
750
751 #endif /* defined(CONFIG_PPC) */
752
753 /* ------------------------------------------------------------------------- */
754
755 /*
756 * Hardware Cursor support.
757 */
758
759 static u8 cursor_pixel_map[2] = { 0, 15 };
760 static u8 cursor_color_map[2] = { 0, 0xff };
761
762 static u8 cursor_bits_lookup[16] =
763 {
764 0x00, 0x40, 0x10, 0x50, 0x04, 0x44, 0x14, 0x54,
765 0x01, 0x41, 0x11, 0x51, 0x05, 0x45, 0x15, 0x55
766 };
767
768 static u8 cursor_mask_lookup[16] =
769 {
770 0xaa, 0x2a, 0x8a, 0x0a, 0xa2, 0x22, 0x82, 0x02,
771 0xa8, 0x28, 0x88, 0x08, 0xa0, 0x20, 0x80, 0x00
772 };
773
774 static void
775 aty_set_cursor_color(struct fb_info_aty *fb, u8 *pixel,
776 u8 *red, u8 *green, u8 *blue)
777 {
778 struct aty_cursor *c = fb->cursor;
779 int i;
780
781 if (!c)
782 return;
783
784 #ifdef __sparc__
785 if (fb->mmaped && (!fb->fb_info.display_fg
786 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
787 return;
788 #endif
789
790 for (i = 0; i < 2; i++) {
791 c->color[i] = (u32)red[i] << 24;
792 c->color[i] |= (u32)green[i] << 16;
793 c->color[i] |= (u32)blue[i] << 8;
794 c->color[i] |= (u32)pixel[i];
795 }
796
797 wait_for_fifo(2, fb);
798 aty_st_le32(CUR_CLR0, c->color[0], fb);
799 aty_st_le32(CUR_CLR1, c->color[1], fb);
800 }
801
802 static void
803 aty_set_cursor_shape(struct fb_info_aty *fb)
804 {
805 struct aty_cursor *c = fb->cursor;
806 u8 *ram, m, b;
807 int x, y;
808
809 if (!c)
810 return;
811
812 #ifdef __sparc__
813 if (fb->mmaped && (!fb->fb_info.display_fg
814 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
815 return;
816 #endif
817
818 ram = c->ram;
819 for (y = 0; y < c->size.y; y++) {
820 for (x = 0; x < c->size.x >> 2; x++) {
821 m = c->mask[x][y];
822 b = c->bits[x][y];
823 *ram++ = cursor_mask_lookup[m >> 4] |
824 cursor_bits_lookup[(b & m) >> 4];
825 *ram++ = cursor_mask_lookup[m & 0x0f] |
826 cursor_bits_lookup[(b & m) & 0x0f];
827 }
828 for ( ; x < 8; x++) {
829 *ram++ = 0xaa;
830 *ram++ = 0xaa;
831 }
832 }
833 memset(ram, 0xaa, (64 - c->size.y) * 16);
834 }
835
836 static void
837 aty_set_cursor(struct fb_info_aty *fb, int on)
838 {
839 struct atyfb_par *par = &fb->current_par;
840 struct aty_cursor *c = fb->cursor;
841 u16 xoff, yoff;
842 int x, y;
843
844 if (!c)
845 return;
846
847 #ifdef __sparc__
848 if (fb->mmaped && (!fb->fb_info.display_fg
849 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
850 return;
851 #endif
852
853 if (on) {
854 x = c->pos.x - c->hot.x - par->crtc.xoffset;
855 if (x < 0) {
856 xoff = -x;
857 x = 0;
858 } else {
859 xoff = 0;
860 }
861
862 y = c->pos.y - c->hot.y - par->crtc.yoffset;
863 if (y < 0) {
864 yoff = -y;
865 y = 0;
866 } else {
867 yoff = 0;
868 }
869
870 wait_for_fifo(4, fb);
871 aty_st_le32(CUR_OFFSET, (c->offset >> 3) + (yoff << 1), fb);
872 aty_st_le32(CUR_HORZ_VERT_OFF,
873 ((u32)(64 - c->size.y + yoff) << 16) | xoff, fb);
874 aty_st_le32(CUR_HORZ_VERT_POSN, ((u32)y << 16) | x, fb);
875 aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, fb)
876 | HWCURSOR_ENABLE, fb);
877 } else {
878 wait_for_fifo(1, fb);
879 aty_st_le32(GEN_TEST_CNTL,
880 aty_ld_le32(GEN_TEST_CNTL, fb) & ~HWCURSOR_ENABLE,
881 fb);
882 }
883 if (fb->blitter_may_be_busy)
884 wait_for_idle(fb);
885 }
886
887 static void
888 aty_cursor_timer_handler(unsigned long dev_addr)
889 {
890 struct fb_info_aty *fb = (struct fb_info_aty *)dev_addr;
891
892 if (!fb->cursor)
893 return;
894
895 if (!fb->cursor->enable)
896 goto out;
897
898 if (fb->cursor->vbl_cnt && --fb->cursor->vbl_cnt == 0) {
899 fb->cursor->on ^= 1;
900 aty_set_cursor(fb, fb->cursor->on);
901 fb->cursor->vbl_cnt = fb->cursor->blink_rate;
902 }
903
904 out:
905 fb->cursor->timer->expires = jiffies + (HZ / 50);
906 add_timer(fb->cursor->timer);
907 }
908
909 static void
910 atyfb_cursor(struct display *p, int mode, int x, int y)
911 {
912 struct fb_info_aty *fb = (struct fb_info_aty *)p->fb_info;
913 struct aty_cursor *c = fb->cursor;
914
915 if (!c)
916 return;
917
918 #ifdef __sparc__
919 if (fb->mmaped && (!fb->fb_info.display_fg
920 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
921 return;
922 #endif
923
924 x *= fontwidth(p);
925 y *= fontheight(p);
926 if (c->pos.x == x && c->pos.y == y && (mode == CM_ERASE) == !c->enable)
927 return;
928
929 c->enable = 0;
930 if (c->on)
931 aty_set_cursor(fb, 0);
932 c->pos.x = x;
933 c->pos.y = y;
934
935 switch (mode) {
936 case CM_ERASE:
937 c->on = 0;
938 break;
939
940 case CM_DRAW:
941 case CM_MOVE:
942 if (c->on)
943 aty_set_cursor(fb, 1);
944 else
945 c->vbl_cnt = CURSOR_DRAW_DELAY;
946 c->enable = 1;
947 break;
948 }
949 }
950
951 static struct fb_info_aty *fb_list = NULL;
952
953 static struct aty_cursor * __init
954 aty_init_cursor(struct fb_info_aty *fb)
955 {
956 struct aty_cursor *cursor;
957 unsigned long addr;
958
959 cursor = kmalloc(sizeof(struct aty_cursor), GFP_ATOMIC);
960 if (!cursor)
961 return 0;
962 memset(cursor, 0, sizeof(*cursor));
963
964 cursor->timer = kmalloc(sizeof(*cursor->timer), GFP_KERNEL);
965 if (!cursor->timer) {
966 kfree(cursor);
967 return 0;
968 }
969 memset(cursor->timer, 0, sizeof(*cursor->timer));
970
971 cursor->blink_rate = DEFAULT_CURSOR_BLINK_RATE;
972 fb->total_vram -= PAGE_SIZE;
973 cursor->offset = fb->total_vram;
974
975 #ifdef __sparc__
976 addr = fb->frame_buffer - 0x800000 + cursor->offset;
977 cursor->ram = (u8 *)addr;
978 #else
979 #ifdef __BIG_ENDIAN
980 addr = fb->frame_buffer_phys - 0x800000 + cursor->offset;
981 cursor->ram = (u8 *)ioremap(addr, 1024);
982 #else
983 addr = fb->frame_buffer + cursor->offset;
984 cursor->ram = (u8 *)addr;
985 #endif
986 #endif
987
988 if (! cursor->ram) {
989 kfree(cursor);
990 return NULL;
991 }
992
993 if (curblink) {
994 init_timer(cursor->timer);
995 cursor->timer->expires = jiffies + (HZ / 50);
996 cursor->timer->data = (unsigned long)fb;
997 cursor->timer->function = aty_cursor_timer_handler;
998 add_timer(cursor->timer);
999 }
1000
1001 return cursor;
1002 }
1003
1004 static int
1005 atyfb_set_font(struct display *d, int width, int height)
1006 {
1007 struct fb_info_aty *fb = (struct fb_info_aty *)d->fb_info;
1008 struct aty_cursor *c = fb->cursor;
1009 int i, j;
1010
1011 if (c) {
1012 if (!width || !height) {
1013 width = 8;
1014 height = 16;
1015 }
1016
1017 c->hot.x = 0;
1018 c->hot.y = 0;
1019 c->size.x = width;
1020 c->size.y = height;
1021
1022 memset(c->bits, 0xff, sizeof(c->bits));
1023 memset(c->mask, 0, sizeof(c->mask));
1024
1025 for (i = 0, j = width; j >= 0; j -= 8, i++) {
1026 c->mask[i][height-2] = (j >= 8) ? 0xff : (0xff << (8 - j));
1027 c->mask[i][height-1] = (j >= 8) ? 0xff : (0xff << (8 - j));
1028 }
1029
1030 aty_set_cursor_color(fb, cursor_pixel_map, cursor_color_map,
1031 cursor_color_map, cursor_color_map);
1032 aty_set_cursor_shape(fb);
1033 }
1034 return 1;
1035 }
1036
1037
1038
1039
1040 /* ------------------------------------------------------------------------- */
1041
1042 /*
1043 * CRTC programming
1044 */
1045
1046 static void aty_set_crtc(const struct fb_info_aty *info,
1047 const struct crtc *crtc)
1048 {
1049 aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, info);
1050 aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, info);
1051 aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, info);
1052 aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, info);
1053 aty_st_le32(CRTC_VLINE_CRNT_VLINE, 0, info);
1054 aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, info);
1055 aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, info);
1056 }
1057
1058 static int aty_var_to_crtc(const struct fb_info_aty *info,
1059 const struct fb_var_screeninfo *var,
1060 struct crtc *crtc)
1061 {
1062 u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
1063 u32 left, right, upper, lower, hslen, vslen, sync, vmode;
1064 u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
1065 u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
1066 u32 pix_width, dp_pix_width, dp_chain_mask;
1067
1068 /* input */
1069 xres = var->xres;
1070 yres = var->yres;
1071 vxres = var->xres_virtual;
1072 vyres = var->yres_virtual;
1073 xoffset = var->xoffset;
1074 yoffset = var->yoffset;
1075 bpp = var->bits_per_pixel;
1076 left = var->left_margin;
1077 right = var->right_margin;
1078 upper = var->upper_margin;
1079 lower = var->lower_margin;
1080 hslen = var->hsync_len;
1081 vslen = var->vsync_len;
1082 sync = var->sync;
1083 vmode = var->vmode;
1084
1085 /* convert (and round up) and validate */
1086 xres = (xres+7) & ~7;
1087 xoffset = (xoffset+7) & ~7;
1088 vxres = (vxres+7) & ~7;
1089 if (vxres < xres+xoffset)
1090 vxres = xres+xoffset;
1091 h_disp = xres/8-1;
1092 if (h_disp > 0xff)
1093 FAIL("h_disp too large");
1094 h_sync_strt = h_disp+(right/8);
1095 if (h_sync_strt > 0x1ff)
1096 FAIL("h_sync_start too large");
1097 h_sync_dly = right & 7;
1098 h_sync_wid = (hslen+7)/8;
1099 if (h_sync_wid > 0x1f)
1100 FAIL("h_sync_wid too large");
1101 h_total = h_sync_strt+h_sync_wid+(h_sync_dly+left+7)/8;
1102 if (h_total > 0x1ff)
1103 FAIL("h_total too large");
1104 h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
1105
1106 if (vyres < yres+yoffset)
1107 vyres = yres+yoffset;
1108 v_disp = yres-1;
1109 if (v_disp > 0x7ff)
1110 FAIL("v_disp too large");
1111 v_sync_strt = v_disp+lower;
1112 if (v_sync_strt > 0x7ff)
1113 FAIL("v_sync_strt too large");
1114 v_sync_wid = vslen;
1115 if (v_sync_wid > 0x1f)
1116 FAIL("v_sync_wid too large");
1117 v_total = v_sync_strt+v_sync_wid+upper;
1118 if (v_total > 0x7ff)
1119 FAIL("v_total too large");
1120 v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
1121
1122 c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0;
1123
1124 if (bpp <= 8) {
1125 bpp = 8;
1126 pix_width = CRTC_PIX_WIDTH_8BPP;
1127 dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
1128 dp_chain_mask = 0x8080;
1129 } else if (bpp <= 16) {
1130 bpp = 16;
1131 pix_width = CRTC_PIX_WIDTH_15BPP;
1132 dp_pix_width = HOST_15BPP | SRC_15BPP | DST_15BPP |
1133 BYTE_ORDER_LSB_TO_MSB;
1134 dp_chain_mask = 0x4210;
1135 } else if ((bpp <= 24) && (Gx != GX_CHIP_ID) && (Gx != CX_CHIP_ID)) {
1136 bpp = 24;
1137 pix_width = CRTC_PIX_WIDTH_24BPP;
1138 dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
1139 dp_chain_mask = 0x8080;
1140 } else if (bpp <= 32) {
1141 bpp = 32;
1142 pix_width = CRTC_PIX_WIDTH_32BPP;
1143 dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
1144 BYTE_ORDER_LSB_TO_MSB;
1145 dp_chain_mask = 0x8080;
1146 } else
1147 FAIL("invalid bpp");
1148
1149 if (vxres*vyres*bpp/8 > info->total_vram)
1150 FAIL("not enough video RAM");
1151
1152 if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
1153 FAIL("invalid vmode");
1154
1155 /* output */
1156 crtc->vxres = vxres;
1157 crtc->vyres = vyres;
1158 crtc->xoffset = xoffset;
1159 crtc->yoffset = yoffset;
1160 crtc->bpp = bpp;
1161 crtc->h_tot_disp = h_total | (h_disp<<16);
1162 crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly<<8) |
1163 ((h_sync_strt & 0x100)<<4) | (h_sync_wid<<16) |
1164 (h_sync_pol<<21);
1165 crtc->v_tot_disp = v_total | (v_disp<<16);
1166 crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid<<16) | (v_sync_pol<<21);
1167 crtc->off_pitch = ((yoffset*vxres+xoffset)*bpp/64) | (vxres<<19);
1168 crtc->gen_cntl = pix_width | c_sync | CRTC_EXT_DISP_EN | CRTC_ENABLE;
1169 if ((Gx == CT_CHIP_ID) || (Gx == ET_CHIP_ID) ||
1170 ((Gx == VT_CHIP_ID || Gx == GT_CHIP_ID) && !(Rev & 0x07))) {
1171 /* Not VTB/GTB */
1172 /* FIXME: magic FIFO values */
1173 crtc->gen_cntl |= aty_ld_le32(CRTC_GEN_CNTL, info) & 0x000e0000;
1174 }
1175 crtc->dp_pix_width = dp_pix_width;
1176 crtc->dp_chain_mask = dp_chain_mask;
1177
1178 return 0;
1179 }
1180
1181 static void aty_set_dac_514(const struct fb_info_aty *info, u32 bpp)
1182 {
1183 static struct {
1184 u8 pixel_dly;
1185 u8 misc2_cntl;
1186 u8 pixel_rep;
1187 u8 pixel_cntl_index;
1188 u8 pixel_cntl_v1;
1189 } tab[3] = {
1190 { 0, 0x41, 0x03, 0x71, 0x45 }, /* 8 bpp */
1191 { 0, 0x45, 0x04, 0x0c, 0x01 }, /* 555 */
1192 { 0, 0x45, 0x06, 0x0e, 0x00 }, /* XRGB */
1193 };
1194 int i;
1195
1196 switch (bpp) {
1197 case 8:
1198 default:
1199 i = 0;
1200 break;
1201 case 16:
1202 i = 1;
1203 break;
1204 case 32:
1205 i = 2;
1206 break;
1207 }
1208 aty_st_514(0x90, 0x00, info); /* VRAM Mask Low */
1209 aty_st_514(0x04, tab[i].pixel_dly, info); /* Horizontal Sync Control */
1210 aty_st_514(0x05, 0x00, info); /* Power Management */
1211 aty_st_514(0x02, 0x01, info); /* Misc Clock Control */
1212 aty_st_514(0x71, tab[i].misc2_cntl, info); /* Misc Control 2 */
1213 aty_st_514(0x0a, tab[i].pixel_rep, info); /* Pixel Format */
1214 aty_st_514(tab[i].pixel_cntl_index, tab[i].pixel_cntl_v1, info);
1215 /* Misc Control 2 / 16 BPP Control / 32 BPP Control */
1216 }
1217
1218 static int aty_crtc_to_var(const struct crtc *crtc,
1219 struct fb_var_screeninfo *var)
1220 {
1221 u32 xres, yres, bpp, left, right, upper, lower, hslen, vslen, sync;
1222 u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
1223 u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
1224 u32 pix_width;
1225
1226 /* input */
1227 h_total = crtc->h_tot_disp & 0x1ff;
1228 h_disp = (crtc->h_tot_disp>>16) & 0xff;
1229 h_sync_strt = (crtc->h_sync_strt_wid & 0xff) |
1230 ((crtc->h_sync_strt_wid>>4) & 0x100);
1231 h_sync_dly = (crtc->h_sync_strt_wid>>8) & 0x7;
1232 h_sync_wid = (crtc->h_sync_strt_wid>>16) & 0x1f;
1233 h_sync_pol = (crtc->h_sync_strt_wid>>21) & 0x1;
1234 v_total = crtc->v_tot_disp & 0x7ff;
1235 v_disp = (crtc->v_tot_disp>>16) & 0x7ff;
1236 v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
1237 v_sync_wid = (crtc->v_sync_strt_wid>>16) & 0x1f;
1238 v_sync_pol = (crtc->v_sync_strt_wid>>21) & 0x1;
1239 c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
1240 pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
1241
1242 /* convert */
1243 xres = (h_disp+1)*8;
1244 yres = v_disp+1;
1245 left = (h_total-h_sync_strt-h_sync_wid)*8-h_sync_dly;
1246 right = (h_sync_strt-h_disp)*8+h_sync_dly;
1247 hslen = h_sync_wid*8;
1248 upper = v_total-v_sync_strt-v_sync_wid;
1249 lower = v_sync_strt-v_disp;
1250 vslen = v_sync_wid;
1251 sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
1252 (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
1253 (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0);
1254
1255 switch (pix_width) {
1256 #if 0
1257 case CRTC_PIX_WIDTH_4BPP:
1258 bpp = 4;
1259 var->red.offset = 0;
1260 var->red.length = 8;
1261 var->green.offset = 0;
1262 var->green.length = 8;
1263 var->blue.offset = 0;
1264 var->blue.length = 8;
1265 var->transp.offset = 0;
1266 var->transp.length = 0;
1267 break;
1268 #endif
1269 case CRTC_PIX_WIDTH_8BPP:
1270 bpp = 8;
1271 var->red.offset = 0;
1272 var->red.length = 8;
1273 var->green.offset = 0;
1274 var->green.length = 8;
1275 var->blue.offset = 0;
1276 var->blue.length = 8;
1277 var->transp.offset = 0;
1278 var->transp.length = 0;
1279 break;
1280 case CRTC_PIX_WIDTH_15BPP: /* RGB 555 */
1281 bpp = 16;
1282 var->red.offset = 10;
1283 var->red.length = 5;
1284 var->green.offset = 5;
1285 var->green.length = 5;
1286 var->blue.offset = 0;
1287 var->blue.length = 5;
1288 var->transp.offset = 0;
1289 var->transp.length = 0;
1290 break;
1291 #if 0
1292 case CRTC_PIX_WIDTH_16BPP: /* RGB 565 */
1293 bpp = 16;
1294 var->red.offset = 11;
1295 var->red.length = 5;
1296 var->green.offset = 5;
1297 var->green.length = 6;
1298 var->blue.offset = 0;
1299 var->blue.length = 5;
1300 var->transp.offset = 0;
1301 var->transp.length = 0;
1302 break;
1303 #endif
1304 case CRTC_PIX_WIDTH_24BPP: /* RGB 888 */
1305 bpp = 24;
1306 var->red.offset = 16;
1307 var->red.length = 8;
1308 var->green.offset = 8;
1309 var->green.length = 8;
1310 var->blue.offset = 0;
1311 var->blue.length = 8;
1312 var->transp.offset = 0;
1313 var->transp.length = 0;
1314 break;
1315 case CRTC_PIX_WIDTH_32BPP: /* ARGB 8888 */
1316 bpp = 32;
1317 var->red.offset = 16;
1318 var->red.length = 8;
1319 var->green.offset = 8;
1320 var->green.length = 8;
1321 var->blue.offset = 0;
1322 var->blue.length = 8;
1323 var->transp.offset = 24;
1324 var->transp.length = 8;
1325 break;
1326 default:
1327 FAIL("Invalid pixel width");
1328 }
1329
1330 /* output */
1331 var->xres = xres;
1332 var->yres = yres;
1333 var->xres_virtual = crtc->vxres;
1334 var->yres_virtual = crtc->vyres;
1335 var->bits_per_pixel = bpp;
1336 var->xoffset = crtc->xoffset;
1337 var->yoffset = crtc->yoffset;
1338 var->left_margin = left;
1339 var->right_margin = right;
1340 var->upper_margin = upper;
1341 var->lower_margin = lower;
1342 var->hsync_len = hslen;
1343 var->vsync_len = vslen;
1344 var->sync = sync;
1345 var->vmode = FB_VMODE_NONINTERLACED;
1346
1347 return 0;
1348 }
1349
1350 /* ------------------------------------------------------------------------- */
1351
1352 /*
1353 * PLL programming (Mach64 GX family)
1354 *
1355 * FIXME: use function pointer tables instead of switch statements
1356 */
1357
1358 static void aty_set_pll_gx(const struct fb_info_aty *info,
1359 const struct pll_gx *pll)
1360 {
1361 switch (info->clk_type) {
1362 case CLK_ATI18818_1:
1363 aty_st_8(CLOCK_CNTL, pll->m, info);
1364 break;
1365 case CLK_IBMRGB514:
1366 aty_st_514(0x06, 0x02, info); /* DAC Operation */
1367 aty_st_514(0x10, 0x01, info); /* PLL Control 1 */
1368 aty_st_514(0x70, 0x01, info); /* Misc Control 1 */
1369 aty_st_514(0x8f, 0x1f, info); /* PLL Ref. Divider Input */
1370 aty_st_514(0x03, 0x00, info); /* Sync Control */
1371 aty_st_514(0x05, 0x00, info); /* Power Management */
1372 aty_st_514(0x20, pll->m, info); /* F0 / M0 */
1373 aty_st_514(0x21, pll->n, info); /* F1 / N0 */
1374 break;
1375 }
1376 }
1377
1378 static int aty_var_to_pll_18818(u32 vclk_per, struct pll_gx *pll)
1379 {
1380 /*
1381 * FIXME: use real calculations instead of using fixed values from the old
1382 * driver
1383 */
1384 static struct {
1385 u32 ps_lim; /* pixclock period rounding limit (arbitrary) */
1386 u8 mode; /* (prescsaler << 4) | Select */
1387 u8 prog; /* ref_div_count */
1388 } ATI18818_clocks[] = {
1389 { 7500, 0x0B, 1 }, /* 7407.4 ps = 135.00 MHz */
1390 { 9000, 0x0A, 1 }, /* 7936.5 ps = 126.00 MHz */
1391 { 11000, 0x09, 1 }, /* 10000.0 ps = 100.00 MHz */
1392 { 12800, 0x0D, 1 }, /* 12500.0 ps = 80.00 MHz */
1393 { 13500, 0x0E, 1 }, /* 13333.3 ps = 75.00 MHz */
1394 /* { 14000, 0x03, 2 },*/ /* 13888.8 ps = 72.00 MHz */
1395 { 15000, 0x1B, 1 }, /* 14814.8 ps = 67.50 MHz */
1396 { 15500, 0x0F, 1 }, /* 15384.6 ps = 65.00 MHz */
1397 { 16000, 0x1A, 1 }, /* 15873.0 ps = 63.00 MHz */
1398 /* { 16000, 0x02, 2 },*/ /* 15873.0 ps = 63.00 MHz */
1399 /* { 18000, 0x01, 2 },*/ /* 17655.4 ps = 56.64 MHz */
1400 /* { 19900, 0x00, 2 },*/ /* 19860.9 ps = 50.35 MHz */
1401 { 20000, 0x07, 1 }, /* 20000.0 ps = 50.00 MHz */
1402 { 20300, 0x06, 1 }, /* 20202.0 ps = 49.50 MHz */
1403 { 22500, 0x05, 1 }, /* 22271.2 ps = 44.90 MHz */
1404 { 25000, 0x04, 1 }, /* 25000.0 ps = 40.00 MHz */
1405 /* { 28000, 0x03, 1 },*/ /* 27777.8 ps = 36.00 MHz */
1406 { 30000, 0x2B, 1 }, /* 29629,6 ps = 33.75 MHz */
1407 { 31000, 0x1F, 1 }, /* 30769.2 ps = 32.50 MHz */
1408 { 32000, 0x2A, 1 }, /* 31746.0 ps = 31.50 MHz */
1409 /* { 32000, 0x02, 1 },*/ /* 31746.0 ps = 31.50 MHz */
1410 /* { 36000, 0x01, 1 },*/ /* 35310.7 ps = 28.32 MHz */
1411 /* { 39900, 0x00, 1 },*/ /* 39714.1 ps = 25.18 MHz */
1412 { 40000, 0x17, 1 }, /* 40000.0 ps = 25.00 MHz */
1413 { 40600, 0x16, 1 }, /* 40404.0 ps = 24.75 MHz */
1414 { 45000, 0x15, 1 }, /* 44543.4 ps = 22.45 MHz */
1415 { 50000, 0x14, 1 }, /* 50000.0 ps = 20.00 MHz */
1416 /* { 56000, 0x13, 1 },*/ /* 55555.5 ps = 18.00 MHz */
1417 { 62000, 0x2F, 1 }, /* 61538.8 ps = 16.25 MHz */
1418 /* { 64000, 0x12, 1 },*/ /* 63492.0 ps = 15.75 MHz */
1419 };
1420 int set;
1421
1422 for (set = 0; set < sizeof(ATI18818_clocks)/sizeof(*ATI18818_clocks);
1423 set++)
1424 if (vclk_per <= ATI18818_clocks[set].ps_lim) {
1425 pll->m = ATI18818_clocks[set].mode;
1426 pll->n = ATI18818_clocks[set].prog;
1427 return 0;
1428 }
1429 return -EINVAL;
1430 }
1431
1432 static int aty_var_to_pll_514(u32 vclk_per, struct pll_gx *pll)
1433 {
1434 /*
1435 * FIXME: use real calculations instead of using fixed values from the old
1436 * driver
1437 */
1438 static struct {
1439 u32 limit; /* pixlock rounding limit (arbitrary) */
1440 u8 m; /* (df<<6) | vco_div_count */
1441 u8 n; /* ref_div_count */
1442 } RGB514_clocks[7] = {
1443 { 8000, (3<<6) | 20, 9 }, /* 7395 ps / 135.2273 MHz */
1444 { 10000, (1<<6) | 19, 3 }, /* 9977 ps / 100.2273 MHz */
1445 { 13000, (1<<6) | 2, 3 }, /* 12509 ps / 79.9432 MHz */
1446 { 14000, (2<<6) | 8, 7 }, /* 13394 ps / 74.6591 MHz */
1447 { 16000, (1<<6) | 44, 6 }, /* 15378 ps / 65.0284 MHz */
1448 { 25000, (1<<6) | 15, 5 }, /* 17460 ps / 57.2727 MHz */
1449 { 50000, (0<<6) | 53, 7 }, /* 33145 ps / 30.1705 MHz */
1450 };
1451 int i;
1452
1453 for (i = 0; i < sizeof(RGB514_clocks)/sizeof(*RGB514_clocks); i++)
1454 if (vclk_per <= RGB514_clocks[i].limit) {
1455 pll->m = RGB514_clocks[i].m;
1456 pll->n = RGB514_clocks[i].n;
1457 return 0;
1458 }
1459 return -EINVAL;
1460 }
1461
1462 /* FIXME: ATI18818?? */
1463
1464 static u32 aty_pll_gx_to_var(const struct pll_gx *pll,
1465 const struct fb_info_aty *info)
1466 {
1467 u8 df, vco_div_count, ref_div_count;
1468
1469 df = pll->m >> 6;
1470 vco_div_count = pll->m & 0x3f;
1471 ref_div_count = pll->n;
1472
1473 return ((info->ref_clk_per*ref_div_count)<<(3-df))/(vco_div_count+65);
1474 }
1475
1476
1477 /*
1478 * PLL programming (Mach64 CT family)
1479 */
1480
1481 static void aty_set_pll_ct(const struct fb_info_aty *info,
1482 const struct pll_ct *pll)
1483 {
1484 aty_st_pll(PLL_REF_DIV, pll->pll_ref_div, info);
1485 aty_st_pll(PLL_GEN_CNTL, pll->pll_gen_cntl, info);
1486 aty_st_pll(MCLK_FB_DIV, pll->mclk_fb_div, info);
1487 aty_st_pll(PLL_VCLK_CNTL, pll->pll_vclk_cntl, info);
1488 aty_st_pll(VCLK_POST_DIV, pll->vclk_post_div, info);
1489 aty_st_pll(VCLK0_FB_DIV, pll->vclk_fb_div, info);
1490 aty_st_pll(PLL_EXT_CNTL, pll->pll_ext_cntl, info);
1491
1492 if (!(Gx == GX_CHIP_ID || Gx == CX_CHIP_ID || Gx == CT_CHIP_ID ||
1493 Gx == ET_CHIP_ID ||
1494 ((Gx == VT_CHIP_ID || Gx == GT_CHIP_ID) && !(Rev & 0x07)))) {
1495 if (info->ram_type >= SDRAM)
1496 aty_st_pll(DLL_CNTL, 0xa6, info);
1497 else
1498 aty_st_pll(DLL_CNTL, 0xa0, info);
1499 aty_st_pll(VFC_CNTL, 0x1b, info);
1500 aty_st_le32(DSP_CONFIG, pll->dsp_config, info);
1501 aty_st_le32(DSP_ON_OFF, pll->dsp_on_off, info);
1502 }
1503 }
1504
1505 static int aty_dsp_gt(const struct fb_info_aty *info, u8 bpp,
1506 struct pll_ct *pll)
1507 {
1508 u32 dsp_xclks_per_row, dsp_loop_latency, dsp_precision, dsp_off, dsp_on;
1509 u32 xclks_per_row, fifo_off, fifo_on, y, fifo_size, page_size;
1510
1511 /* xclocks_per_row<<11 */
1512 xclks_per_row = (pll->mclk_fb_div*pll->vclk_post_div_real*64<<11)/
1513 (pll->vclk_fb_div*pll->mclk_post_div_real*bpp);
1514 if (xclks_per_row < (1<<11))
1515 FAIL("Dotclock to high");
1516 if (Gx == GT_CHIP_ID || Gx == GU_CHIP_ID || Gx == VT_CHIP_ID ||
1517 Gx == VU_CHIP_ID || Gx == GV_CHIP_ID || Gx == GW_CHIP_ID ||
1518 Gx == GZ_CHIP_ID) {
1519 fifo_size = 24;
1520 dsp_loop_latency = 0;
1521 } else {
1522 fifo_size = 32;
1523 dsp_loop_latency = 2;
1524 }
1525 dsp_precision = 0;
1526 y = (xclks_per_row*fifo_size)>>11;
1527 while (y) {
1528 y >>= 1;
1529 dsp_precision++;
1530 }
1531 dsp_precision -= 5;
1532 /* fifo_off<<6 */
1533 fifo_off = ((xclks_per_row*(fifo_size-1))>>5)+(1<<6);
1534
1535 if (info->total_vram > 1*1024*1024) {
1536 if (info->ram_type >= SDRAM) {
1537 /* >1 MB SDRAM */
1538 dsp_loop_latency += 8;
1539 page_size = 8;
1540 } else {
1541 /* >1 MB DRAM */
1542 dsp_loop_latency += 6;
1543 page_size = 9;
1544 }
1545 } else {
1546 if (info->ram_type >= SDRAM) {
1547 /* <2 MB SDRAM */
1548 dsp_loop_latency += 9;
1549 page_size = 10;
1550 } else {
1551 /* <2 MB DRAM */
1552 dsp_loop_latency += 8;
1553 page_size = 10;
1554 }
1555 }
1556 /* fifo_on<<6 */
1557 if (xclks_per_row >= (page_size<<11))
1558 fifo_on = ((2*page_size+1)<<6)+(xclks_per_row>>5);
1559 else
1560 fifo_on = (3*page_size)<<6;
1561
1562 dsp_xclks_per_row = xclks_per_row>>dsp_precision;
1563 dsp_on = fifo_on>>dsp_precision;
1564 dsp_off = fifo_off>>dsp_precision;
1565
1566 pll->dsp_config = (dsp_xclks_per_row & 0x3fff) |
1567 ((dsp_loop_latency & 0xf)<<16) |
1568 ((dsp_precision & 7)<<20);
1569 pll->dsp_on_off = (dsp_on & 0x7ff) | ((dsp_off & 0x7ff)<<16);
1570 return 0;
1571 }
1572
1573 static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
1574 struct pll_ct *pll)
1575 {
1576 u32 q, x; /* x is a workaround for sparc64-linux-gcc */
1577 x = x; /* x is a workaround for sparc64-linux-gcc */
1578
1579 pll->pll_ref_div = info->pll_per*2*255/info->ref_clk_per;
1580
1581 /* FIXME: use the VTB/GTB /3 post divider if it's better suited */
1582 q = info->ref_clk_per*pll->pll_ref_div*4/info->mclk_per; /* actually 8*q */
1583 if (q < 16*8 || q > 255*8)
1584 FAIL("mclk out of range");
1585 else if (q < 32*8)
1586 pll->mclk_post_div_real = 8;
1587 else if (q < 64*8)
1588 pll->mclk_post_div_real = 4;
1589 else if (q < 128*8)
1590 pll->mclk_post_div_real = 2;
1591 else
1592 pll->mclk_post_div_real = 1;
1593 pll->mclk_fb_div = q*pll->mclk_post_div_real/8;
1594
1595 /* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
1596 q = info->ref_clk_per*pll->pll_ref_div*4/vclk_per; /* actually 8*q */
1597 if (q < 16*8 || q > 255*8)
1598 FAIL("vclk out of range");
1599 else if (q < 32*8)
1600 pll->vclk_post_div_real = 8;
1601 else if (q < 64*8)
1602 pll->vclk_post_div_real = 4;
1603 else if (q < 128*8)
1604 pll->vclk_post_div_real = 2;
1605 else
1606 pll->vclk_post_div_real = 1;
1607 pll->vclk_fb_div = q*pll->vclk_post_div_real/8;
1608 return 0;
1609 }
1610
1611 static void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
1612 {
1613 u8 mpostdiv = 0;
1614 u8 vpostdiv = 0;
1615
1616 if ((((Gx == GT_CHIP_ID) && (Rev & 0x03)) || (Gx == GU_CHIP_ID) ||
1617 (Gx == GV_CHIP_ID) || (Gx == GW_CHIP_ID) || (Gx == GZ_CHIP_ID) ||
1618 (Gx == LG_CHIP_ID) || (Gx == GB_CHIP_ID) || (Gx == GD_CHIP_ID) ||
1619 (Gx == GI_CHIP_ID) || (Gx == GP_CHIP_ID) || (Gx == GQ_CHIP_ID) ||
1620 (Gx == VU_CHIP_ID)) && (info->ram_type >= SDRAM))
1621 pll->pll_gen_cntl = 0x04;
1622 else
1623 pll->pll_gen_cntl = 0x84;
1624
1625 switch (pll->mclk_post_div_real) {
1626 case 1:
1627 mpostdiv = 0;
1628 break;
1629 case 2:
1630 mpostdiv = 1;
1631 break;
1632 case 3:
1633 mpostdiv = 4;
1634 break;
1635 case 4:
1636 mpostdiv = 2;
1637 break;
1638 case 8:
1639 mpostdiv = 3;
1640 break;
1641 }
1642 pll->pll_gen_cntl |= mpostdiv<<4; /* mclk */
1643
1644 if (Gx == VT_CHIP_ID && (Rev == 0x40 || Rev == 0x48))
1645 pll->pll_ext_cntl = 0;
1646 else
1647 pll->pll_ext_cntl = mpostdiv; /* xclk == mclk */
1648
1649 switch (pll->vclk_post_div_real) {
1650 case 2:
1651 vpostdiv = 1;
1652 break;
1653 case 3:
1654 pll->pll_ext_cntl |= 0x10;
1655 case 1:
1656 vpostdiv = 0;
1657 break;
1658 case 6:
1659 pll->pll_ext_cntl |= 0x10;
1660 case 4:
1661 vpostdiv = 2;
1662 break;
1663 case 12:
1664 pll->pll_ext_cntl |= 0x10;
1665 case 8:
1666 vpostdiv = 3;
1667 break;
1668 }
1669
1670 pll->pll_vclk_cntl = 0x03; /* VCLK = PLL_VCLK/VCLKx_POST */
1671 pll->vclk_post_div = vpostdiv;
1672 }
1673
1674 static int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
1675 u8 bpp, struct pll_ct *pll)
1676 {
1677 int err;
1678
1679 if ((err = aty_valid_pll_ct(info, vclk_per, pll)))
1680 return err;
1681 if (!(Gx == GX_CHIP_ID || Gx == CX_CHIP_ID || Gx == CT_CHIP_ID ||
1682 Gx == ET_CHIP_ID ||
1683 ((Gx == VT_CHIP_ID || Gx == GT_CHIP_ID) && !(Rev & 0x07)))) {
1684 if ((err = aty_dsp_gt(info, bpp, pll)))
1685 return err;
1686 }
1687 aty_calc_pll_ct(info, pll);
1688 return 0;
1689 }
1690
1691 static u32 aty_pll_ct_to_var(const struct pll_ct *pll,
1692 const struct fb_info_aty *info)
1693 {
1694 u32 ref_clk_per = info->ref_clk_per;
1695 u8 pll_ref_div = pll->pll_ref_div;
1696 u8 vclk_fb_div = pll->vclk_fb_div;
1697 u8 vclk_post_div = pll->vclk_post_div_real;
1698
1699 return ref_clk_per*pll_ref_div*vclk_post_div/vclk_fb_div/2;
1700 }
1701
1702 /* ------------------------------------------------------------------------- */
1703
1704 static void atyfb_set_par(const struct atyfb_par *par,
1705 struct fb_info_aty *info)
1706 {
1707 u32 i;
1708
1709 info->current_par = *par;
1710
1711 if (info->blitter_may_be_busy)
1712 wait_for_idle(info);
1713 aty_set_crtc(info, &par->crtc);
1714 aty_st_8(CLOCK_CNTL, 0, info);
1715 aty_st_8(CLOCK_CNTL, CLOCK_STROBE, info);
1716
1717 if ((Gx == GX_CHIP_ID) || (Gx == CX_CHIP_ID)) {
1718 switch (info->dac_type) {
1719 case DAC_IBMRGB514:
1720 aty_set_dac_514(info, par->crtc.bpp);
1721 break;
1722 case DAC_ATI68860_B:
1723 /* FIXME */
1724 break;
1725 }
1726 aty_set_pll_gx(info, &par->pll.gx);
1727 aty_st_le32(BUS_CNTL, 0x590e10ff, info);
1728 aty_st_le32(DAC_CNTL, 0x47012100, info);
1729
1730 /* Don't forget MEM_CNTL */
1731 i = aty_ld_le32(MEM_CNTL, info) & 0xf0ffffff;
1732 switch (par->crtc.bpp) {
1733 case 8:
1734 i |= 0x02000000;
1735 break;
1736 case 16:
1737 i |= 0x03000000;
1738 break;
1739 case 32:
1740 i |= 0x06000000;
1741 break;
1742 }
1743 aty_st_le32(MEM_CNTL, i, info);
1744
1745 } else {
1746 aty_set_pll_ct(info, &par->pll.ct);
1747 i = aty_ld_le32(MEM_CNTL, info) & 0xf00fffff;
1748 if (!(Gx == VT_CHIP_ID && (Rev == 0x40 || Rev == 0x48)))
1749 i |= info->mem_refresh_rate << 20;
1750 switch (par->crtc.bpp) {
1751 case 8:
1752 case 24:
1753 i |= 0x00000000;
1754 break;
1755 case 16:
1756 i |= 0x04000000;
1757 break;
1758 case 32:
1759 i |= 0x08000000;
1760 break;
1761 }
1762 if ((Gx == CT_CHIP_ID) || (Gx == ET_CHIP_ID)) {
1763 aty_st_le32(DAC_CNTL, 0x87010184, info);
1764 aty_st_le32(BUS_CNTL, 0x680000f9, info);
1765 } else if ((Gx == VT_CHIP_ID) || (Gx == VU_CHIP_ID)) {
1766 aty_st_le32(DAC_CNTL, 0x87010184, info);
1767 aty_st_le32(BUS_CNTL, 0x680000f9, info);
1768 } else {
1769 /* GT */
1770 aty_st_le32(DAC_CNTL, 0x86010102, info);
1771 aty_st_le32(BUS_CNTL, 0x7b23a040, info);
1772 aty_st_le32(EXT_MEM_CNTL,
1773 aty_ld_le32(EXT_MEM_CNTL, info) | 0x5000001, info);
1774 }
1775 aty_st_le32(MEM_CNTL, i, info);
1776 }
1777 aty_st_8(DAC_MASK, 0xff, info);
1778
1779 /* Initialize the graphics engine */
1780 if (par->accel_flags & FB_ACCELF_TEXT)
1781 init_engine(par, info);
1782
1783 #ifdef CONFIG_FB_COMPAT_XPMAC
1784 if (console_fb_info == &info->fb_info) {
1785 struct fb_var_screeninfo var;
1786 int vmode, cmode;
1787 display_info.height = ((par->crtc.v_tot_disp>>16) & 0x7ff)+1;
1788 display_info.width = (((par->crtc.h_tot_disp>>16) & 0xff)+1)*8;
1789 display_info.depth = par->crtc.bpp;
1790 display_info.pitch = par->crtc.vxres*par->crtc.bpp/8;
1791 atyfb_encode_var(&var, par, info);
1792 if (mac_var_to_vmode(&var, &vmode, &cmode))
1793 display_info.mode = 0;
1794 else
1795 display_info.mode = vmode;
1796 strcpy(display_info.name, atyfb_name);
1797 display_info.fb_address = info->frame_buffer_phys;
1798 display_info.cmap_adr_address = info->ati_regbase_phys+0xc0;
1799 display_info.cmap_data_address = info->ati_regbase_phys+0xc1;
1800 display_info.disp_reg_address = info->ati_regbase_phys;
1801 }
1802 #endif /* CONFIG_FB_COMPAT_XPMAC */
1803 }
1804
1805 static int atyfb_decode_var(const struct fb_var_screeninfo *var,
1806 struct atyfb_par *par,
1807 const struct fb_info_aty *info)
1808 {
1809 int err;
1810
1811 if ((err = aty_var_to_crtc(info, var, &par->crtc)))
1812 return err;
1813 if ((Gx == GX_CHIP_ID) || (Gx == CX_CHIP_ID))
1814 switch (info->clk_type) {
1815 case CLK_ATI18818_1:
1816 err = aty_var_to_pll_18818(var->pixclock, &par->pll.gx);
1817 break;
1818 case CLK_IBMRGB514:
1819 err = aty_var_to_pll_514(var->pixclock, &par->pll.gx);
1820 break;
1821 }
1822 else
1823 err = aty_var_to_pll_ct(info, var->pixclock, par->crtc.bpp,
1824 &par->pll.ct);
1825 if (err)
1826 return err;
1827
1828 if (var->accel_flags & FB_ACCELF_TEXT)
1829 par->accel_flags = FB_ACCELF_TEXT;
1830 else
1831 par->accel_flags = 0;
1832
1833 #if 0
1834 if (!fbmon_valid_timings(var->pixclock, htotal, vtotal, info))
1835 return -EINVAL;
1836 #endif
1837
1838 return 0;
1839 }
1840
1841 static int atyfb_encode_var(struct fb_var_screeninfo *var,
1842 const struct atyfb_par *par,
1843 const struct fb_info_aty *info)
1844 {
1845 int err;
1846
1847 memset(var, 0, sizeof(struct fb_var_screeninfo));
1848
1849 if ((err = aty_crtc_to_var(&par->crtc, var)))
1850 return err;
1851 if ((Gx == GX_CHIP_ID) || (Gx == CX_CHIP_ID))
1852 var->pixclock = aty_pll_gx_to_var(&par->pll.gx, info);
1853 else
1854 var->pixclock = aty_pll_ct_to_var(&par->pll.ct, info);
1855
1856 var->height = -1;
1857 var->width = -1;
1858 var->accel_flags = par->accel_flags;
1859
1860 return 0;
1861 }
1862
1863
1864
1865 static void set_off_pitch(struct atyfb_par *par,
1866 const struct fb_info_aty *info)
1867 {
1868 u32 xoffset = par->crtc.xoffset;
1869 u32 yoffset = par->crtc.yoffset;
1870 u32 vxres = par->crtc.vxres;
1871 u32 bpp = par->crtc.bpp;
1872
1873 par->crtc.off_pitch = ((yoffset*vxres+xoffset)*bpp/64) | (vxres<<19);
1874 aty_st_le32(CRTC_OFF_PITCH, par->crtc.off_pitch, info);
1875 }
1876
1877
1878 /*
1879 * Open/Release the frame buffer device
1880 */
1881
1882 static int atyfb_open(struct fb_info *info, int user)
1883
1884 {
1885 #ifdef __sparc__
1886 struct fb_info_aty *fb = (struct fb_info_aty *)info;
1887
1888 if (user) {
1889 if (fb->open)
1890 return -EBUSY;
1891 fb->mmaped = 0;
1892 fb->open = 1;
1893 fb->vtconsole = -1;
1894 } else {
1895 fb->consolecnt++;
1896 }
1897 #endif
1898 MOD_INC_USE_COUNT;
1899 return(0);
1900 }
1901
1902 static int atyfb_release(struct fb_info *info, int user)
1903 {
1904 #ifdef __sparc__
1905 struct fb_info_aty *fb = (struct fb_info_aty *)info;
1906
1907 if (user) {
1908 if (fb->vtconsole != -1)
1909 vt_cons[fb->vtconsole]->vc_mode = KD_TEXT;
1910 fb->open = 0;
1911 fb->mmaped = 0;
1912 fb->vtconsole = -1;
1913 } else {
1914 fb->consolecnt--;
1915 }
1916 #endif
1917 MOD_DEC_USE_COUNT;
1918 return(0);
1919 }
1920
1921
1922 static int encode_fix(struct fb_fix_screeninfo *fix,
1923 const struct atyfb_par *par,
1924 const struct fb_info_aty *info)
1925 {
1926 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1927
1928 strcpy(fix->id, atyfb_name);
1929 fix->smem_start = info->frame_buffer_phys;
1930 fix->smem_len = (u32)info->total_vram;
1931
1932 #ifdef __LITTLE_ENDIAN
1933 /*
1934 * Last page of 8 MB little-endian aperture is MMIO
1935 * FIXME: we should use the auxiliary aperture instead so we can acces the
1936 * full 8 MB of video RAM on 8 MB boards
1937 */
1938 if (fix->smem_len > 0x800000-GUI_RESERVE)
1939 fix->smem_len = 0x800000-GUI_RESERVE;
1940 #endif
1941 /*
1942 * Reg Block 0 (CT-compatible block) is at ati_regbase_phys
1943 * Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
1944 */
1945 if (Gx == GX_CHIP_ID || Gx == CX_CHIP_ID) {
1946 fix->mmio_start = info->ati_regbase_phys;
1947 fix->mmio_len = 0x400;
1948 fix->accel = FB_ACCEL_ATI_MACH64GX;
1949 } else if (Gx == CT_CHIP_ID || Gx == ET_CHIP_ID) {
1950 fix->mmio_start = info->ati_regbase_phys;
1951 fix->mmio_len = 0x400;
1952 fix->accel = FB_ACCEL_ATI_MACH64CT;
1953 } else if (Gx == VT_CHIP_ID || Gx == VU_CHIP_ID || Gx == VV_CHIP_ID) {
1954 fix->mmio_start = info->ati_regbase_phys-0x400;
1955 fix->mmio_len = 0x800;
1956 fix->accel = FB_ACCEL_ATI_MACH64VT;
1957 } else {
1958 fix->mmio_start = info->ati_regbase_phys-0x400;
1959 fix->mmio_len = 0x800;
1960 fix->accel = FB_ACCEL_ATI_MACH64GT;
1961 }
1962 fix->type = FB_TYPE_PACKED_PIXELS;
1963 fix->type_aux = 0;
1964 fix->line_length = par->crtc.vxres*par->crtc.bpp/8;
1965 fix->visual = par->crtc.bpp <= 8 ? FB_VISUAL_PSEUDOCOLOR
1966 : FB_VISUAL_DIRECTCOLOR;
1967 fix->ywrapstep = 0;
1968 fix->xpanstep = 8;
1969 fix->ypanstep = 1;
1970
1971 return 0;
1972 }
1973
1974
1975 struct fb_var_screeninfo default_var = {
1976 /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
1977 640, 480, 640, 480, 0, 0, 8, 0,
1978 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
1979 0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
1980 0, FB_VMODE_NONINTERLACED
1981 };
1982
1983
1984 /*
1985 * Get the Fixed Part of the Display
1986 */
1987
1988 static int atyfb_get_fix(struct fb_fix_screeninfo *fix, int con,
1989 struct fb_info *fb)
1990 {
1991 const struct fb_info_aty *info = (struct fb_info_aty *)fb;
1992 struct atyfb_par par;
1993
1994 if (con == -1)
1995 par = info->default_par;
1996 else
1997 atyfb_decode_var(&fb_display[con].var, &par, info);
1998 encode_fix(fix, &par, info);
1999 return 0;
2000 }
2001
2002
2003 /*
2004 * Get the User Defined Part of the Display
2005 */
2006
2007 static int atyfb_get_var(struct fb_var_screeninfo *var, int con,
2008 struct fb_info *fb)
2009 {
2010 const struct fb_info_aty *info = (struct fb_info_aty *)fb;
2011
2012 if (con == -1)
2013 atyfb_encode_var(var, &info->default_par, info);
2014 else
2015 *var = fb_display[con].var;
2016 return 0;
2017 }
2018
2019
2020 static void atyfb_set_disp(struct display *disp, struct fb_info_aty *info,
2021 int bpp, int accel)
2022 {
2023 switch (bpp) {
2024 #ifdef FBCON_HAS_CFB8
2025 case 8:
2026 info->dispsw = accel ? fbcon_aty8 : fbcon_cfb8;
2027 disp->dispsw = &info->dispsw;
2028 break;
2029 #endif
2030 #ifdef FBCON_HAS_CFB16
2031 case 16:
2032 info->dispsw = accel ? fbcon_aty16 : fbcon_cfb16;
2033 disp->dispsw = &info->dispsw;
2034 disp->dispsw_data = info->fbcon_cmap.cfb16;
2035 break;
2036 #endif
2037 #ifdef FBCON_HAS_CFB24
2038 case 24:
2039 info->dispsw = accel ? fbcon_aty24 : fbcon_cfb24;
2040 disp->dispsw = &info->dispsw;
2041 disp->dispsw_data = info->fbcon_cmap.cfb24;
2042 break;
2043 #endif
2044 #ifdef FBCON_HAS_CFB32
2045 case 32:
2046 info->dispsw = accel ? fbcon_aty32 : fbcon_cfb32;
2047 disp->dispsw = &info->dispsw;
2048 disp->dispsw_data = info->fbcon_cmap.cfb32;
2049 break;
2050 #endif
2051 default:
2052 disp->dispsw = &fbcon_dummy;
2053 }
2054 if (info->cursor) {
2055 info->dispsw.cursor = atyfb_cursor;
2056 info->dispsw.set_font = atyfb_set_font;
2057 }
2058 }
2059
2060
2061 /*
2062 * Set the User Defined Part of the Display
2063 */
2064
2065 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
2066 struct fb_info *fb)
2067 {
2068 struct fb_info_aty *info = (struct fb_info_aty *)fb;
2069 struct atyfb_par par;
2070 struct display *display;
2071 int oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel, accel, err;
2072 int activate = var->activate;
2073
2074 if (con >= 0)
2075 display = &fb_display[con];
2076 else
2077 display = fb->disp; /* used during initialization */
2078
2079 if ((err = atyfb_decode_var(var, &par, info)))
2080 return err;
2081
2082 atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
2083
2084 if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
2085 oldxres = display->var.xres;
2086 oldyres = display->var.yres;
2087 oldvxres = display->var.xres_virtual;
2088 oldvyres = display->var.yres_virtual;
2089 oldbpp = display->var.bits_per_pixel;
2090 oldaccel = display->var.accel_flags;
2091 display->var = *var;
2092 if (oldxres != var->xres || oldyres != var->yres ||
2093 oldvxres != var->xres_virtual || oldvyres != var->yres_virtual ||
2094 oldbpp != var->bits_per_pixel || oldaccel != var->accel_flags) {
2095 struct fb_fix_screeninfo fix;
2096
2097 encode_fix(&fix, &par, info);
2098 display->screen_base = (char *)info->frame_buffer;
2099 display->visual = fix.visual;
2100 display->type = fix.type;
2101 display->type_aux = fix.type_aux;
2102 display->ypanstep = fix.ypanstep;
2103 display->ywrapstep = fix.ywrapstep;
2104 display->line_length = fix.line_length;
2105 display->can_soft_blank = 1;
2106 display->inverse = 0;
2107 accel = var->accel_flags & FB_ACCELF_TEXT;
2108 atyfb_set_disp(display, info, par.crtc.bpp, accel);
2109 if (accel)
2110 display->scrollmode = (info->bus_type == PCI) ? SCROLL_YNOMOVE : 0;
2111 else
2112 display->scrollmode = SCROLL_YREDRAW;
2113 if (info->fb_info.changevar)
2114 (*info->fb_info.changevar)(con);
2115 }
2116 if (!info->fb_info.display_fg ||
2117 info->fb_info.display_fg->vc_num == con)
2118 atyfb_set_par(&par, info);
2119 if (oldbpp != var->bits_per_pixel) {
2120 if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
2121 return err;
2122 do_install_cmap(con, &info->fb_info);
2123 }
2124 }
2125
2126 return 0;
2127 }
2128
2129
2130 /*
2131 * Pan or Wrap the Display
2132 *
2133 * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
2134 */
2135
2136 static int atyfb_pan_display(struct fb_var_screeninfo *var, int con,
2137 struct fb_info *fb)
2138 {
2139 struct fb_info_aty *info = (struct fb_info_aty *)fb;
2140 u32 xres, yres, xoffset, yoffset;
2141 struct atyfb_par *par = &info->current_par;
2142
2143 xres = (((par->crtc.h_tot_disp>>16) & 0xff)+1)*8;
2144 yres = ((par->crtc.v_tot_disp>>16) & 0x7ff)+1;
2145 xoffset = (var->xoffset+7) & ~7;
2146 yoffset = var->yoffset;
2147 if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres)
2148 return -EINVAL;
2149 par->crtc.xoffset = xoffset;
2150 par->crtc.yoffset = yoffset;
2151 set_off_pitch(par, info);
2152 return 0;
2153 }
2154
2155 /*
2156 * Get the Colormap
2157 */
2158
2159 static int atyfb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
2160 struct fb_info *info)
2161 {
2162 if (!info->display_fg || con == info->display_fg->vc_num) /* current console? */
2163 return fb_get_cmap(cmap, kspc, atyfb_getcolreg, info);
2164 else if (fb_display[con].cmap.len) /* non default colormap? */
2165 fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
2166 else {
2167 int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
2168 fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
2169 }
2170 return 0;
2171 }
2172
2173 /*
2174 * Set the Colormap
2175 */
2176
2177 static int atyfb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
2178 struct fb_info *info)
2179 {
2180 int err;
2181 struct display *disp;
2182
2183 if (con >= 0)
2184 disp = &fb_display[con];
2185 else
2186 disp = info->disp;
2187 if (!disp->cmap.len) { /* no colormap allocated? */
2188 int size = disp->var.bits_per_pixel == 16 ? 32 : 256;
2189 if ((err = fb_alloc_cmap(&disp->cmap, size, 0)))
2190 return err;
2191 }
2192 if (!info->display_fg || con == info->display_fg->vc_num) /* current console? */
2193 return fb_set_cmap(cmap, kspc, atyfb_setcolreg, info);
2194 else
2195 fb_copy_cmap(cmap, &disp->cmap, kspc ? 0 : 1);
2196 return 0;
2197 }
2198
2199
2200 #ifdef DEBUG
2201 #define ATYIO_CLKR 0x41545900 /* ATY\00 */
2202 #define ATYIO_CLKW 0x41545901 /* ATY\01 */
2203
2204 struct atyclk {
2205 u32 ref_clk_per;
2206 u8 pll_ref_div;
2207 u8 mclk_fb_div;
2208 u8 mclk_post_div; /* 1,2,3,4,8 */
2209 u8 vclk_fb_div;
2210 u8 vclk_post_div; /* 1,2,3,4,6,8,12 */
2211 u32 dsp_xclks_per_row; /* 0-16383 */
2212 u32 dsp_loop_latency; /* 0-15 */
2213 u32 dsp_precision; /* 0-7 */
2214 u32 dsp_on; /* 0-2047 */
2215 u32 dsp_off; /* 0-2047 */
2216 };
2217 #endif
2218
2219 static int atyfb_ioctl(struct inode *inode, struct file *file, u_int cmd,
2220 u_long arg, int con, struct fb_info *info2)
2221 {
2222 #ifdef __sparc__
2223 struct fbtype fbtyp;
2224 struct display *disp;
2225
2226 if (con >= 0)
2227 disp = &fb_display[con];
2228 else
2229 disp = info2->disp;
2230 #endif
2231
2232 switch (cmd) {
2233 #ifdef __sparc__
2234 case FBIOGTYPE:
2235 fbtyp.fb_type = FBTYPE_PCI_GENERIC;
2236 fbtyp.fb_width = info->current_par.crtc.vxres;
2237 fbtyp.fb_height = info->current_par.crtc.vyres;
2238 fbtyp.fb_depth = info->current_par.crtc.bpp;
2239 fbtyp.fb_cmsize = disp->cmap.len;
2240 fbtyp.fb_size = info->total_vram;
2241 copy_to_user_ret((struct fbtype *)arg, &fbtyp, sizeof(fbtyp), -EFAULT);
2242 break;
2243 #endif /* __sparc__ */
2244 #ifdef DEBUG
2245 case ATYIO_CLKR:
2246 if ((Gx != GX_CHIP_ID) && (Gx != CX_CHIP_ID)) {
2247 struct atyclk clk;
2248 struct pll_ct *pll = &info->current_par.pll.ct;
2249 u32 dsp_config = pll->dsp_config;
2250 u32 dsp_on_off = pll->dsp_on_off;
2251 clk.ref_clk_per = info->ref_clk_per;
2252 clk.pll_ref_div = pll->pll_ref_div;
2253 clk.mclk_fb_div = pll->mclk_fb_div;
2254 clk.mclk_post_div = pll->mclk_post_div_real;
2255 clk.vclk_fb_div = pll->vclk_fb_div;
2256 clk.vclk_post_div = pll->vclk_post_div_real;
2257 clk.dsp_xclks_per_row = dsp_config & 0x3fff;
2258 clk.dsp_loop_latency = (dsp_config>>16) & 0xf;
2259 clk.dsp_precision = (dsp_config>>20) & 7;
2260 clk.dsp_on = dsp_on_off & 0x7ff;
2261 clk.dsp_off = (dsp_on_off>>16) & 0x7ff;
2262 copy_to_user_ret((struct atyclk *)arg, &clk, sizeof(clk),
2263 -EFAULT);
2264 } else
2265 return -EINVAL;
2266 break;
2267 case ATYIO_CLKW:
2268 if ((Gx != GX_CHIP_ID) && (Gx != CX_CHIP_ID)) {
2269 struct atyclk clk;
2270 struct pll_ct *pll = &info->current_par.pll.ct;
2271 copy_from_user_ret(&clk, (struct atyclk *)arg, sizeof(clk),
2272 -EFAULT);
2273 info->ref_clk_per = clk.ref_clk_per;
2274 pll->pll_ref_div = clk.pll_ref_div;
2275 pll->mclk_fb_div = clk.mclk_fb_div;
2276 pll->mclk_post_div_real = clk.mclk_post_div;
2277 pll->vclk_fb_div = clk.vclk_fb_div;
2278 pll->vclk_post_div_real = clk.vclk_post_div;
2279 pll->dsp_config = (clk.dsp_xclks_per_row & 0x3fff) |
2280 ((clk.dsp_loop_latency & 0xf)<<16) |
2281 ((clk.dsp_precision & 7)<<20);
2282 pll->dsp_on_off = (clk.dsp_on & 0x7ff) |
2283 ((clk.dsp_off & 0x7ff)<<16);
2284 aty_calc_pll_ct(info, pll);
2285 aty_set_pll_ct(info, pll);
2286 } else
2287 return -EINVAL;
2288 break;
2289 #endif /* DEBUG */
2290 default:
2291 return -EINVAL;
2292 }
2293 return 0;
2294 }
2295
2296 #ifdef __sparc__
2297 static int atyfb_mmap(struct fb_info *info, struct file *file,
2298 struct vm_area_struct *vma)
2299 {
2300 struct fb_info_aty *fb = (struct fb_info_aty *)info;
2301 unsigned int size, page, map_size = 0;
2302 unsigned long map_offset = 0;
2303 int i;
2304
2305 if (!fb->mmap_map)
2306 return -ENXIO;
2307
2308 size = vma->vm_end - vma->vm_start;
2309 if (vma->vm_offset & ~PAGE_MASK)
2310 return -ENXIO;
2311
2312 /* To stop the swapper from even considering these pages. */
2313 vma->vm_flags |= (VM_SHM | VM_LOCKED);
2314
2315 if (((vma->vm_offset == 0) && (size == fb->total_vram)) ||
2316 ((vma->vm_offset == fb->total_vram) && (size == PAGE_SIZE)))
2317 vma->vm_offset += 0x8000000000000000UL;
2318
2319 #ifdef __sparc_v9__
2320 /* Align it as much as desirable */
2321 {
2322 unsigned long j, align;
2323 int max = -1;
2324
2325 map_offset = vma->vm_offset+size;
2326 for (i = 0; fb->mmap_map[i].size; i++) {
2327 if (fb->mmap_map[i].voff < vma->vm_offset)
2328 continue;
2329 if (fb->mmap_map[i].voff >= map_offset)
2330 break;
2331 if (max < 0 ||
2332 fb->mmap_map[i].size > fb->mmap_map[max].size)
2333 max = i;
2334 }
2335 if (max >= 0) {
2336 j = fb->mmap_map[max].size;
2337 if (fb->mmap_map[max].voff + j > map_offset)
2338 j = map_offset - fb->mmap_map[max].voff;
2339 for (align = 0x400000; align > PAGE_SIZE; align >>= 3)
2340 if (j >= align &&
2341 !(fb->mmap_map[max].poff & (align - 1)))
2342 break;
2343 if (align > PAGE_SIZE) {
2344 j = align;
2345 align = j - ((vma->vm_start
2346 + fb->mmap_map[max].voff
2347 - vma->vm_offset) & (j - 1));
2348 if (align != j) {
2349 struct vm_area_struct *vmm;
2350
2351 vmm = find_vma(current->mm,
2352 vma->vm_start);
2353 if (!vmm || vmm->vm_start
2354 >= vma->vm_end + align) {
2355 vma->vm_start += align;
2356 vma->vm_end += align;
2357 }
2358 }
2359 }
2360 }
2361 }
2362 #endif
2363
2364 /* Each page, see which map applies */
2365 for (page = 0; page < size; ) {
2366 map_size = 0;
2367 for (i = 0; fb->mmap_map[i].size; i++) {
2368 unsigned long start = fb->mmap_map[i].voff;
2369 unsigned long end = start + fb->mmap_map[i].size;
2370 unsigned long offset = vma->vm_offset + page;
2371
2372 if (start > offset)
2373 continue;
2374 if (offset >= end)
2375 continue;
2376
2377 map_size = fb->mmap_map[i].size - (offset - start);
2378 map_offset = fb->mmap_map[i].poff + (offset - start);
2379 break;
2380 }
2381 if (!map_size) {
2382 page += PAGE_SIZE;
2383 continue;
2384 }
2385 if (page + map_size > size)
2386 map_size = size - page;
2387
2388 pgprot_val(vma->vm_page_prot) &= ~(fb->mmap_map[i].prot_mask);
2389 pgprot_val(vma->vm_page_prot) |= fb->mmap_map[i].prot_flag;
2390
2391 if (remap_page_range(vma->vm_start + page, map_offset,
2392 map_size, vma->vm_page_prot))
2393 return -EAGAIN;
2394
2395 page += map_size;
2396 }
2397
2398 if (!map_size)
2399 return -EINVAL;
2400
2401 vma->vm_flags |= VM_IO;
2402
2403 if (!fb->mmaped) {
2404 int lastconsole = 0;
2405
2406 if (info->display_fg)
2407 lastconsole = info->display_fg->vc_num;
2408 fb->mmaped = 1;
2409 if (fb->consolecnt && fb_display[lastconsole].fb_info == info) {
2410 fb->vtconsole = lastconsole;
2411 vt_cons[lastconsole]->vc_mode = KD_GRAPHICS;
2412 }
2413 }
2414 return 0;
2415 }
2416
2417 static struct {
2418 u32 yoffset;
2419 u8 r[2][256];
2420 u8 g[2][256];
2421 u8 b[2][256];
2422 } atyfb_save;
2423
2424 static void atyfb_save_palette(struct fb_info *fb, int enter)
2425 {
2426 struct fb_info_aty *info = (struct fb_info_aty *)fb;
2427 int i, tmp, scale;
2428
2429 for (i = 0; i < 256; i++) {
2430 tmp = aty_ld_8(DAC_CNTL, info) & 0xfc;
2431 if (Gx == GT_CHIP_ID || Gx == GU_CHIP_ID || Gx == GV_CHIP_ID ||
2432 Gx == GW_CHIP_ID || Gx == GZ_CHIP_ID || Gx == LG_CHIP_ID ||
2433 Gx == GB_CHIP_ID || Gx == GD_CHIP_ID || Gx == GI_CHIP_ID ||
2434 Gx == GP_CHIP_ID || Gx == GQ_CHIP_ID)
2435 tmp |= 0x2;
2436 aty_st_8(DAC_CNTL, tmp, info);
2437 aty_st_8(DAC_MASK, 0xff, info);
2438 eieio();
2439 scale = ((Gx != GX_CHIP_ID) && (Gx != CX_CHIP_ID) &&
2440 (info->current_par.crtc.bpp == 16)) ? 3 : 0;
2441 info->aty_cmap_regs->rindex = i << scale;
2442 eieio();
2443 atyfb_save.r[enter][i] = info->aty_cmap_regs->lut;
2444 eieio();
2445 atyfb_save.g[enter][i] = info->aty_cmap_regs->lut;
2446 eieio();
2447 atyfb_save.b[enter][i] = info->aty_cmap_regs->lut;
2448 eieio();
2449 info->aty_cmap_regs->windex = i << scale;
2450 eieio();
2451 info->aty_cmap_regs->lut = atyfb_save.r[1-enter][i];
2452 eieio();
2453 info->aty_cmap_regs->lut = atyfb_save.g[1-enter][i];
2454 eieio();
2455 info->aty_cmap_regs->lut = atyfb_save.b[1-enter][i];
2456 eieio();
2457 }
2458 }
2459
2460 static void atyfb_palette(int enter)
2461 {
2462 struct fb_info_aty *info;
2463 struct atyfb_par *par;
2464 struct display *d;
2465 int i;
2466
2467 for (i = 0; i < MAX_NR_CONSOLES; i++) {
2468 d = &fb_display[i];
2469 if (d->fb_info &&
2470 d->fb_info->fbops == &atyfb_ops &&
2471 d->fb_info->display_fg &&
2472 d->fb_info->display_fg->vc_num == i) {
2473 atyfb_save_palette(d->fb_info, enter);
2474 info = (struct fb_info_aty *)d->fb_info;
2475 par = &info->current_par;
2476 if (enter) {
2477 atyfb_save.yoffset = par->crtc.yoffset;
2478 par->crtc.yoffset = 0;
2479 set_off_pitch(par, info);
2480 } else {
2481 par->crtc.yoffset = atyfb_save.yoffset;
2482 set_off_pitch(par, info);
2483 }
2484 break;
2485 }
2486 }
2487 }
2488 #endif /* __sparc__ */
2489
2490 /*
2491 * Initialisation
2492 */
2493
2494 static int __init aty_init(struct fb_info_aty *info, const char *name)
2495 {
2496 u32 chip_id;
2497 u32 i;
2498 int j, k;
2499 struct fb_var_screeninfo var;
2500 struct display *disp;
2501 const char *chipname = NULL, *ramname = NULL, *xtal;
2502 int pll, mclk, gtb_memsize;
2503 #if defined(CONFIG_PPC)
2504 int sense;
2505 #endif
2506 u8 pll_ref_div;
2507
2508 info->aty_cmap_regs = (struct aty_cmap_regs *)(info->ati_regbase+0xc0);
2509 chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
2510 Gx = chip_id & CFG_CHIP_TYPE;
2511 Rev = (chip_id & CFG_CHIP_REV)>>24;
2512 for (j = 0; j < (sizeof(aty_features)/sizeof(*aty_features)); j++)
2513 if (aty_features[j].chip_type == Gx) {
2514 chipname = aty_features[j].name;
2515 break;
2516 }
2517 if (!chipname) {
2518 printk("atyfb: Unknown mach64 0x%04x\n", Gx);
2519 return 0;
2520 } else
2521 printk("atyfb: %s [0x%04x rev 0x%02x] ", chipname, Gx, Rev);
2522 if ((Gx == GX_CHIP_ID) || (Gx == CX_CHIP_ID)) {
2523 info->bus_type = (aty_ld_le32(CONFIG_STAT0, info) >> 0) & 0x07;
2524 info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) >> 3) & 0x07;
2525 ramname = aty_gx_ram[info->ram_type];
2526 /* FIXME: clockchip/RAMDAC probing? */
2527 #ifdef CONFIG_ATARI
2528 info->dac_type = DAC_ATI68860_B;
2529 info->clk_type = CLK_ATI18818_1;
2530 #else
2531 info->dac_type = DAC_IBMRGB514;
2532 info->clk_type = CLK_IBMRGB514;
2533 #endif
2534 /* FIXME */
2535 pll = 135;
2536 mclk = 50;
2537 } else {
2538 info->bus_type = PCI;
2539 info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);
2540 ramname = aty_ct_ram[info->ram_type];
2541 info->dac_type = DAC_INTERNAL;
2542 info->clk_type = CLK_INTERNAL;
2543 if ((Gx == CT_CHIP_ID) || (Gx == ET_CHIP_ID)) {
2544 pll = 135;
2545 mclk = 60;
2546 } else {
2547 mclk = info->ram_type >= SDRAM ? 67 : 63;
2548 if ((Gx == VT_CHIP_ID) && (Rev == 0x08)) {
2549 /* VTA3 */
2550 pll = 170;
2551 } else if (((Gx == VT_CHIP_ID) && ((Rev == 0x40) ||
2552 (Rev == 0x48))) ||
2553 ((Gx == VT_CHIP_ID) && ((Rev == 0x01) ||
2554 (Rev == 0x9a))) ||
2555 Gx == VU_CHIP_ID) {
2556 /* VTA4 or VTB */
2557 pll = 200;
2558 } else if (Gx == VV_CHIP_ID) {
2559 /* VT4 */
2560 pll = 230;
2561 mclk = 83;
2562 } else if (Gx == VT_CHIP_ID) {
2563 /* other VT */
2564 pll = 135;
2565 mclk = 63;
2566 } else if ((Gx == GT_CHIP_ID) && (Rev & 0x01)) {
2567 /* RAGE II */
2568 pll = 170;
2569 } else if (((Gx == GT_CHIP_ID) && (Rev & 0x02)) ||
2570 (Gx == GU_CHIP_ID)) {
2571 /* RAGE II+ */
2572 pll = 200;
2573 } else if (Gx == GV_CHIP_ID || Gx == GW_CHIP_ID ||
2574 Gx == GZ_CHIP_ID) {
2575 /* RAGE IIC */
2576 pll = 230;
2577 mclk = 83;
2578 } else if (Gx == GB_CHIP_ID || Gx == GD_CHIP_ID ||
2579 Gx == GI_CHIP_ID || Gx == GP_CHIP_ID ||
2580 Gx == GQ_CHIP_ID || Gx == LB_CHIP_ID ||
2581 Gx == LD_CHIP_ID || Gx == LG_CHIP_ID ||
2582 Gx == LI_CHIP_ID || Gx == LP_CHIP_ID) {
2583 /* RAGE PRO or LT PRO */
2584 pll = 230;
2585 mclk = 100;
2586 } else {
2587 /* other RAGE */
2588 pll = 135;
2589 mclk = 63;
2590 }
2591 }
2592 }
2593
2594 info->ref_clk_per = 1000000000000ULL/14318180;
2595 xtal = "14.31818";
2596 if (!(Gx == GX_CHIP_ID || Gx == CX_CHIP_ID || Gx == CT_CHIP_ID ||
2597 Gx == ET_CHIP_ID ||
2598 ((Gx == VT_CHIP_ID || Gx == GT_CHIP_ID) && !(Rev & 0x07))) &&
2599 (pll_ref_div = aty_ld_pll(PLL_REF_DIV, info))) {
2600 int diff1, diff2;
2601 diff1 = 510*14/pll_ref_div-pll;
2602 diff2 = 510*29/pll_ref_div-pll;
2603 if (diff1 < 0)
2604 diff1 = -diff1;
2605 if (diff2 < 0)
2606 diff2 = -diff2;
2607 if (diff2 < diff1) {
2608 info->ref_clk_per = 1000000000000ULL/29498928;
2609 xtal = "29.498928";
2610 }
2611 }
2612
2613 i = aty_ld_le32(MEM_CNTL, info);
2614 gtb_memsize = !(Gx == GX_CHIP_ID || Gx == CX_CHIP_ID || Gx == CT_CHIP_ID ||
2615 Gx == ET_CHIP_ID ||
2616 ((Gx == VT_CHIP_ID || Gx == GT_CHIP_ID) && !(Rev & 0x07)));
2617 if (gtb_memsize)
2618 switch (i & 0xF) { /* 0xF used instead of MEM_SIZE_ALIAS */
2619 case MEM_SIZE_512K:
2620 info->total_vram = 0x80000;
2621 break;
2622 case MEM_SIZE_1M:
2623 info->total_vram = 0x100000;
2624 break;
2625 case MEM_SIZE_2M_GTB:
2626 info->total_vram = 0x200000;
2627 break;
2628 case MEM_SIZE_4M_GTB:
2629 info->total_vram = 0x400000;
2630 break;
2631 case MEM_SIZE_6M_GTB:
2632 info->total_vram = 0x600000;
2633 break;
2634 case MEM_SIZE_8M_GTB:
2635 info->total_vram = 0x800000;
2636 break;
2637 default:
2638 info->total_vram = 0x80000;
2639 }
2640 else
2641 switch (i & MEM_SIZE_ALIAS) {
2642 case MEM_SIZE_512K:
2643 info->total_vram = 0x80000;
2644 break;
2645 case MEM_SIZE_1M:
2646 info->total_vram = 0x100000;
2647 break;
2648 case MEM_SIZE_2M:
2649 info->total_vram = 0x200000;
2650 break;
2651 case MEM_SIZE_4M:
2652 info->total_vram = 0x400000;
2653 break;
2654 case MEM_SIZE_6M:
2655 info->total_vram = 0x600000;
2656 break;
2657 case MEM_SIZE_8M:
2658 info->total_vram = 0x800000;
2659 break;
2660 default:
2661 info->total_vram = 0x80000;
2662 }
2663
2664 if (Gx == GI_CHIP_ID) {
2665 if (aty_ld_le32(CONFIG_STAT1, info) & 0x40000000)
2666 info->total_vram += 0x400000;
2667 }
2668
2669 if (default_vram) {
2670 info->total_vram = default_vram*1024;
2671 i = i & ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS);
2672 if (info->total_vram <= 0x80000)
2673 i |= MEM_SIZE_512K;
2674 else if (info->total_vram <= 0x100000)
2675 i |= MEM_SIZE_1M;
2676 else if (info->total_vram <= 0x200000)
2677 i |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M;
2678 else if (info->total_vram <= 0x400000)
2679 i |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M;
2680 else if (info->total_vram <= 0x600000)
2681 i |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M;
2682 else
2683 i |= gtb_memsize ? MEM_SIZE_8M_GTB : MEM_SIZE_8M;
2684 aty_st_le32(MEM_CNTL, i, info);
2685 }
2686 if (default_pll)
2687 pll = default_pll;
2688 if (default_mclk)
2689 mclk = default_mclk;
2690
2691 printk("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK\n",
2692 info->total_vram == 0x80000 ? 512 : (info->total_vram >> 20),
2693 info->total_vram == 0x80000 ? 'K' : 'M', ramname, xtal, pll, mclk);
2694
2695 if (mclk < 44)
2696 info->mem_refresh_rate = 0; /* 000 = 10 Mhz - 43 Mhz */
2697 else if (mclk < 50)
2698 info->mem_refresh_rate = 1; /* 001 = 44 Mhz - 49 Mhz */
2699 else if (mclk < 55)
2700 info->mem_refresh_rate = 2; /* 010 = 50 Mhz - 54 Mhz */
2701 else if (mclk < 66)
2702 info->mem_refresh_rate = 3; /* 011 = 55 Mhz - 65 Mhz */
2703 else if (mclk < 75)
2704 info->mem_refresh_rate = 4; /* 100 = 66 Mhz - 74 Mhz */
2705 else if (mclk < 80)
2706 info->mem_refresh_rate = 5; /* 101 = 75 Mhz - 79 Mhz */
2707 else if (mclk < 100)
2708 info->mem_refresh_rate = 6; /* 110 = 80 Mhz - 100 Mhz */
2709 else
2710 info->mem_refresh_rate = 7; /* 111 = 100 Mhz and above */
2711 info->pll_per = 1000000/pll;
2712 info->mclk_per = 1000000/mclk;
2713
2714 #ifdef DEBUG
2715 if ((Gx != GX_CHIP_ID) && (Gx != CX_CHIP_ID)) {
2716 int i;
2717 printk("BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL "
2718 "DSP_CONFIG DSP_ON_OFF\n"
2719 "%08x %08x %08x %08x %08x %08x %08x\n"
2720 "PLL",
2721 aty_ld_le32(BUS_CNTL, info), aty_ld_le32(DAC_CNTL, info),
2722 aty_ld_le32(MEM_CNTL, info), aty_ld_le32(EXT_MEM_CNTL, info),
2723 aty_ld_le32(CRTC_GEN_CNTL, info), aty_ld_le32(DSP_CONFIG, info),
2724 aty_ld_le32(DSP_ON_OFF, info));
2725 for (i = 0; i < 16; i++)
2726 printk(" %02x", aty_ld_pll(i, info));
2727 printk("\n");
2728 }
2729 #endif
2730
2731 if (info->bus_type == ISA)
2732 if ((info->total_vram == 0x400000) || (info->total_vram == 0x800000)) {
2733 /* protect GUI-regs if complete Aperture is VRAM */
2734 info->total_vram -= GUI_RESERVE;
2735 }
2736
2737 disp = &info->disp;
2738
2739 strcpy(info->fb_info.modename, atyfb_name);
2740 info->fb_info.node = -1;
2741 info->fb_info.fbops = &atyfb_ops;
2742 info->fb_info.disp = disp;
2743 strcpy(info->fb_info.fontname, fontname);
2744 info->fb_info.changevar = NULL;
2745 info->fb_info.switch_con = &atyfbcon_switch;
2746 info->fb_info.updatevar = &atyfbcon_updatevar;
2747 info->fb_info.blank = &atyfbcon_blank;
2748 info->fb_info.flags = FBINFO_FLAG_DEFAULT;
2749
2750 #ifdef MODULE
2751 var = default_var;
2752 #else /* !MODULE */
2753 #if defined(CONFIG_PPC)
2754 if (mode_option) {
2755 if (!mac_find_mode(&var, &info->fb_info, mode_option, 8))
2756 var = default_var;
2757 } else {
2758 if (default_vmode == VMODE_NVRAM) {
2759 default_vmode = nvram_read_byte(NV_VMODE);
2760 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
2761 default_vmode = VMODE_CHOOSE;
2762 }
2763 if (default_vmode == VMODE_CHOOSE) {
2764 if (Gx == LG_CHIP_ID)
2765 /* G3 PowerBook with 1024x768 LCD */
2766 default_vmode = VMODE_1024_768_60;
2767 else {
2768 sense = read_aty_sense(info);
2769 default_vmode = mac_map_monitor_sense(sense);
2770 }
2771 }
2772 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
2773 default_vmode = VMODE_640_480_60;
2774 if (default_cmode == CMODE_NVRAM)
2775 default_cmode = nvram_read_byte(NV_CMODE);
2776 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
2777 default_cmode = CMODE_8;
2778 if (mac_vmode_to_var(default_vmode, default_cmode, &var))
2779 var = default_var;
2780 }
2781 #else /* !CONFIG_PPC */
2782 if (!fb_find_mode(&var, &info->fb_info, mode_option, NULL, 0, NULL, 8))
2783 var = default_var;
2784 #endif /* !CONFIG_PPC */
2785 #endif /* !MODULE */
2786 if (noaccel)
2787 var.accel_flags &= ~FB_ACCELF_TEXT;
2788 else
2789 var.accel_flags |= FB_ACCELF_TEXT;
2790
2791 if (var.yres == var.yres_virtual) {
2792 u32 vram = (info->total_vram - (PAGE_SIZE << 2));
2793 var.yres_virtual = ((vram * 8) / var.bits_per_pixel) / var.xres_virtual;
2794 if (var.yres_virtual < var.yres)
2795 var.yres_virtual = var.yres;
2796 }
2797
2798 if (atyfb_decode_var(&var, &info->default_par, info)) {
2799 printk("atyfb: can't set default video mode\n");
2800 return 0;
2801 }
2802
2803 #ifdef __sparc__
2804 atyfb_save_palette(&info->fb_info, 0);
2805 #endif
2806 for (j = 0; j < 16; j++) {
2807 k = color_table[j];
2808 info->palette[j].red = default_red[k];
2809 info->palette[j].green = default_grn[k];
2810 info->palette[j].blue = default_blu[k];
2811 }
2812
2813 if (Gx != GX_CHIP_ID && Gx != CX_CHIP_ID) {
2814 info->cursor = aty_init_cursor(info);
2815 if (info->cursor) {
2816 info->dispsw.cursor = atyfb_cursor;
2817 info->dispsw.set_font = atyfb_set_font;
2818 }
2819 }
2820
2821 atyfb_set_var(&var, -1, &info->fb_info);
2822
2823 if (register_framebuffer(&info->fb_info) < 0)
2824 return 0;
2825
2826 info->next = fb_list;
2827 fb_list = info;
2828
2829 printk("fb%d: %s frame buffer device on %s\n",
2830 GET_FB_IDX(info->fb_info.node), atyfb_name, name);
2831 return 1;
2832 }
2833
2834 int __init atyfb_init(void)
2835 {
2836 #if defined(CONFIG_FB_OF)
2837 /* We don't want to be called like this. */
2838 /* We rely on Open Firmware (offb) instead. */
2839 #elif defined(CONFIG_PCI)
2840 struct pci_dev *pdev;
2841 struct fb_info_aty *info;
2842 unsigned long addr;
2843 #ifdef __sparc__
2844 extern void (*prom_palette) (int);
2845 extern int con_is_present(void);
2846 struct pcidev_cookie *pcp;
2847 char prop[128];
2848 int node, len;
2849 u32 mem, chip_id;
2850 int i, j;
2851
2852 /* Do not attach when we have a serial console. */
2853 if (!con_is_present())
2854 return -ENXIO;
2855 #else
2856 u16 tmp;
2857 #endif
2858
2859 for (pdev = pci_devices; pdev; pdev = pdev->next) {
2860 if (((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
2861 (pdev->vendor == PCI_VENDOR_ID_ATI)) {
2862 struct resource *rp;
2863
2864 info = kmalloc(sizeof(struct fb_info_aty), GFP_ATOMIC);
2865 if (!info) {
2866 printk("atyfb_init: can't alloc fb_info_aty\n");
2867 return -ENXIO;
2868 }
2869 memset(info, 0, sizeof(struct fb_info_aty));
2870
2871 rp = &pdev->resource[0];
2872 if (rp->flags & IORESOURCE_IOPORT)
2873 rp = &pdev->resource[1];
2874 addr = rp->start;
2875 if (!addr)
2876 continue;
2877
2878 #ifdef __sparc__
2879 /*
2880 * Map memory-mapped registers.
2881 */
2882 info->ati_regbase = addr + 0x7ffc00;
2883 info->ati_regbase_phys = __pa(addr + 0x7ffc00);
2884
2885 /*
2886 * Map in big-endian aperture.
2887 */
2888 info->frame_buffer = (unsigned long)(addr + 0x800000);
2889 info->frame_buffer_phys = __pa(addr + 0x800000);
2890
2891 /*
2892 * Figure mmap addresses from PCI config space.
2893 * Split Framebuffer in big- and little-endian halfs.
2894 */
2895 for (i = 0; i < 6 && pdev->resource[i].start; i++)
2896 /* nothing */;
2897 j = i + 4;
2898
2899 info->mmap_map = kmalloc(j * sizeof(*info->mmap_map), GFP_ATOMIC);
2900 if (!info->mmap_map) {
2901 printk("atyfb_init: can't alloc mmap_map\n");
2902 kfree(info);
2903 return -ENXIO;
2904 }
2905 memset(info->mmap_map, 0, j * sizeof(*info->mmap_map));
2906
2907 for (i = 0, j = 2; i < 6 && pdev->resource[i].start; i++) {
2908 struct resource *rp = &pdev->resource[i];
2909 int io, breg = PCI_BASE_ADDRESS_0 + (i << 2);
2910 unsigned long base;
2911 u32 size, pbase;
2912
2913 base = rp->start;
2914
2915 io = (rp->flags & IORESOURCE_IOPORT);
2916
2917 size = rp->end - base + 1;
2918
2919 pci_read_config_dword(pdev, breg, &pbase);
2920
2921 if (io)
2922 size &= ~1;
2923
2924 /*
2925 * Map the framebuffer a second time, this time without
2926 * the braindead _PAGE_IE setting. This is used by the
2927 * fixed Xserver, but we need to maintain the old mapping
2928 * to stay compatible with older ones...
2929 */
2930 if (base == addr) {
2931 info->mmap_map[j].voff = (pbase + 0x10000000) & PAGE_MASK;
2932 info->mmap_map[j].poff = __pa(base & PAGE_MASK);
2933 info->mmap_map[j].size = (size + ~PAGE_MASK) & PAGE_MASK;
2934 info->mmap_map[j].prot_mask = _PAGE_CACHE;
2935 info->mmap_map[j].prot_flag = _PAGE_E;
2936 j++;
2937 }
2938
2939 /*
2940 * Here comes the old framebuffer mapping with _PAGE_IE
2941 * set for the big endian half of the framebuffer...
2942 */
2943 if (base == addr) {
2944 info->mmap_map[j].voff = (pbase + 0x800000) & PAGE_MASK;
2945 info->mmap_map[j].poff = __pa((base+0x800000) & PAGE_MASK);
2946 info->mmap_map[j].size = 0x800000;
2947 info->mmap_map[j].prot_mask = _PAGE_CACHE;
2948 info->mmap_map[j].prot_flag = _PAGE_E|_PAGE_IE;
2949 size -= 0x800000;
2950 j++;
2951 }
2952
2953 info->mmap_map[j].voff = pbase & PAGE_MASK;
2954 info->mmap_map[j].poff = __pa(base & PAGE_MASK);
2955 info->mmap_map[j].size = (size + ~PAGE_MASK) & PAGE_MASK;
2956 info->mmap_map[j].prot_mask = _PAGE_CACHE;
2957 info->mmap_map[j].prot_flag = _PAGE_E;
2958 j++;
2959 }
2960
2961 /*
2962 * Fix PROMs idea of MEM_CNTL settings...
2963 */
2964 mem = aty_ld_le32(MEM_CNTL, info);
2965 chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
2966 if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) &&
2967 !((chip_id >> 24) & 1)) {
2968 switch (mem & 0x0f) {
2969 case 3:
2970 mem = (mem & ~(0x0f)) | 2;
2971 break;
2972 case 7:
2973 mem = (mem & ~(0x0f)) | 3;
2974 break;
2975 case 9:
2976 mem = (mem & ~(0x0f)) | 4;
2977 break;
2978 case 11:
2979 mem = (mem & ~(0x0f)) | 5;
2980 break;
2981 default:
2982 break;
2983 }
2984 if ((aty_ld_le32(CONFIG_STAT0, info) & 7) >= SDRAM)
2985 mem &= ~(0x00700000);
2986 }
2987 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */
2988 aty_st_le32(MEM_CNTL, mem, info);
2989
2990 /*
2991 * If this is the console device, we will set default video
2992 * settings to what the PROM left us with.
2993 */
2994 node = prom_getchild(prom_root_node);
2995 node = prom_searchsiblings(node, "aliases");
2996 if (node) {
2997 len = prom_getproperty(node, "screen", prop, sizeof(prop));
2998 if (len > 0) {
2999 prop[len] = '\0';
3000 node = prom_finddevice(prop);
3001 } else {
3002 node = 0;
3003 }
3004 }
3005
3006 pcp = pdev->sysdata;
3007 if (node == pcp->prom_node) {
3008
3009 struct fb_var_screeninfo *var = &default_var;
3010 unsigned int N, P, Q, M, T;
3011 u32 v_total, h_total;
3012 struct crtc crtc;
3013 u8 pll_regs[16];
3014 u8 clock_cntl;
3015
3016 crtc.vxres = prom_getintdefault(node, "width", 1024);
3017 crtc.vyres = prom_getintdefault(node, "height", 768);
3018 crtc.bpp = prom_getintdefault(node, "depth", 8);
3019 crtc.xoffset = crtc.yoffset = 0;
3020 crtc.h_tot_disp = aty_ld_le32(CRTC_H_TOTAL_DISP, info);
3021 crtc.h_sync_strt_wid = aty_ld_le32(CRTC_H_SYNC_STRT_WID, info);
3022 crtc.v_tot_disp = aty_ld_le32(CRTC_V_TOTAL_DISP, info);
3023 crtc.v_sync_strt_wid = aty_ld_le32(CRTC_V_SYNC_STRT_WID, info);
3024 crtc.gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, info);
3025 aty_crtc_to_var(&crtc, var);
3026
3027 h_total = var->xres + var->right_margin +
3028 var->hsync_len + var->left_margin;
3029 v_total = var->yres + var->lower_margin +
3030 var->vsync_len + var->upper_margin;
3031
3032 /*
3033 * Read the PLL to figure actual Refresh Rate.
3034 */
3035 clock_cntl = aty_ld_8(CLOCK_CNTL, info);
3036 /* printk("atyfb: CLOCK_CNTL: %02x\n", clock_cntl); */
3037 for (i = 0; i < 16; i++)
3038 pll_regs[i] = aty_ld_pll(i, info);
3039
3040 /*
3041 * PLL Reference Devider M:
3042 */
3043 M = pll_regs[2];
3044
3045 /*
3046 * PLL Feedback Devider N (Dependant on CLOCK_CNTL):
3047 */
3048 N = pll_regs[7 + (clock_cntl & 3)];
3049
3050 /*
3051 * PLL Post Devider P (Dependant on CLOCK_CNTL):
3052 */
3053 P = 1 << (pll_regs[6] >> ((clock_cntl & 3) << 1));
3054
3055 /*
3056 * PLL Devider Q:
3057 */
3058 Q = N / P;
3059
3060 /*
3061 * Target Frequency:
3062 *
3063 * T * M
3064 * Q = -------
3065 * 2 * R
3066 *
3067 * where R is XTALIN (= 14318 kHz).
3068 */
3069 T = 2 * Q * 14318 / M;
3070
3071 default_var.pixclock = 1000000000 / T;
3072 }
3073
3074 #else /* __sparc__ */
3075
3076 info->ati_regbase_phys = 0x7ff000 + addr;
3077 info->ati_regbase = (unsigned long)
3078 ioremap(info->ati_regbase_phys, 0x1000);
3079
3080 if(!info->ati_regbase) {
3081 kfree(info);
3082 return -ENOMEM;
3083 }
3084
3085 info->ati_regbase_phys += 0xc00;
3086 info->ati_regbase += 0xc00;
3087
3088 /*
3089 * Enable memory-space accesses using config-space
3090 * command register.
3091 */
3092 pci_read_config_word(pdev, PCI_COMMAND, &tmp);
3093 if (!(tmp & PCI_COMMAND_MEMORY)) {
3094 tmp |= PCI_COMMAND_MEMORY;
3095 pci_write_config_word(pdev, PCI_COMMAND, tmp);
3096 }
3097
3098 #ifdef __BIG_ENDIAN
3099 /* Use the big-endian aperture */
3100 addr += 0x800000;
3101 #endif
3102
3103 /* Map in frame buffer */
3104 info->frame_buffer_phys = addr;
3105 info->frame_buffer = (unsigned long)ioremap(addr, 0x800000);
3106
3107 if(!info->frame_buffer) {
3108 kfree(info);
3109 return -ENXIO;
3110 }
3111
3112 #endif /* __sparc__ */
3113
3114 if (!aty_init(info, "PCI")) {
3115 if (info->mmap_map)
3116 kfree(info->mmap_map);
3117 kfree(info);
3118 return -ENXIO;
3119 }
3120
3121 #ifdef __sparc__
3122 if (!prom_palette)
3123 prom_palette = atyfb_palette;
3124
3125 /*
3126 * Add /dev/fb mmap values.
3127 */
3128 info->mmap_map[0].voff = 0x8000000000000000UL;
3129 info->mmap_map[0].poff = __pa(info->frame_buffer & PAGE_MASK);
3130 info->mmap_map[0].size = info->total_vram;
3131 info->mmap_map[0].prot_mask = _PAGE_CACHE;
3132 info->mmap_map[0].prot_flag = _PAGE_E;
3133 info->mmap_map[1].voff = info->mmap_map[0].voff + info->total_vram;
3134 info->mmap_map[1].poff = __pa(info->ati_regbase & PAGE_MASK);
3135 info->mmap_map[1].size = PAGE_SIZE;
3136 info->mmap_map[1].prot_mask = _PAGE_CACHE;
3137 info->mmap_map[1].prot_flag = _PAGE_E;
3138 #endif /* __sparc__ */
3139 }
3140 }
3141 #elif defined(CONFIG_ATARI)
3142 int m64_num;
3143 struct fb_info_aty *info;
3144
3145 for (m64_num = 0; m64_num < mach64_count; m64_num++) {
3146 if (!phys_vmembase[m64_num] || !phys_size[m64_num] ||
3147 !phys_guiregbase[m64_num]) {
3148 printk(" phys_*[%d] parameters not set => returning early. \n",
3149 m64_num);
3150 continue;
3151 }
3152
3153 info = kmalloc(sizeof(struct fb_info_aty), GFP_ATOMIC);
3154 if (!info) {
3155 printk("atyfb_init: can't alloc fb_info_aty\n");
3156 return -ENOMEM;
3157 }
3158 memset(info, 0, sizeof(struct fb_info_aty));
3159
3160 /*
3161 * Map the video memory (physical address given) to somewhere in the
3162 * kernel address space.
3163 */
3164 info->frame_buffer = ioremap(phys_vmembase[m64_num], phys_size[m64_num]);
3165 info->frame_buffer_phys = info->frame_buffer;
3166 info->ati_regbase = ioremap(phys_guiregbase[m64_num], 0x10000)+0xFC00ul;
3167 info->ati_regbase_phys = info->ati_regbase;
3168
3169 if (!aty_init(info, "ISA bus")) {
3170 kfree(info);
3171 /* This is insufficient! kernel_map has added two large chunks!! */
3172 return -ENXIO;
3173 }
3174 }
3175 #endif
3176 return 0;
3177 }
3178
3179 #ifdef CONFIG_FB_OF
3180 void __init atyfb_of_init(struct device_node *dp)
3181 {
3182 unsigned long addr;
3183 u8 bus, devfn;
3184 u16 cmd;
3185 struct fb_info_aty *info;
3186 int i;
3187
3188 switch (dp->n_addrs) {
3189 case 1:
3190 case 2:
3191 case 3:
3192 addr = dp->addrs[0].address;
3193 break;
3194 case 4:
3195 addr = dp->addrs[1].address;
3196 break;
3197 default:
3198 printk("Warning: got %d adresses for ATY:\n", dp->n_addrs);
3199 for (i = 0; i < dp->n_addrs; i++)
3200 printk(" %08x-%08x", dp->addrs[i].address,
3201 dp->addrs[i].address+dp->addrs[i].size-1);
3202 if (dp->n_addrs)
3203 printk("\n");
3204 return;
3205 }
3206
3207 info = kmalloc(sizeof(struct fb_info_aty), GFP_ATOMIC);
3208 if (!info) {
3209 printk("atyfb_of_init: can't alloc fb_info_aty\n");
3210 return;
3211 }
3212 memset(info, 0, sizeof(struct fb_info_aty));
3213
3214 info->ati_regbase_phys = 0x7ff000+addr;
3215 info->ati_regbase = (unsigned long)ioremap(info->ati_regbase_phys,
3216 0x1000);
3217
3218 if(! info->ati_regbase) {
3219 printk("atyfb_of_init: ioremap() returned NULL\n");
3220 kfree(info);
3221 return;
3222 }
3223
3224 info->ati_regbase_phys += 0xc00;
3225 info->ati_regbase += 0xc00;
3226
3227 /* enable memory-space accesses using config-space command register */
3228 if (pci_device_loc(dp, &bus, &devfn) == 0) {
3229 pcibios_read_config_word(bus, devfn, PCI_COMMAND, &cmd);
3230 if (cmd != 0xffff) {
3231 cmd |= PCI_COMMAND_MEMORY;
3232 pcibios_write_config_word(bus, devfn, PCI_COMMAND, cmd);
3233 }
3234 }
3235
3236 #ifdef __BIG_ENDIAN
3237 /* Use the big-endian aperture */
3238 addr += 0x800000;
3239 #endif
3240
3241 /* Map in frame buffer */
3242 info->frame_buffer_phys = addr;
3243 info->frame_buffer = (unsigned long)ioremap(addr, 0x800000);
3244
3245 if(! info->frame_buffer) {
3246 printk("atyfb_of_init: ioremap() returned NULL\n");
3247 kfree(info);
3248 return;
3249 }
3250
3251 if (!aty_init(info, dp->full_name)) {
3252 kfree(info);
3253 return;
3254 }
3255
3256 #ifdef CONFIG_FB_COMPAT_XPMAC
3257 if (!console_fb_info)
3258 console_fb_info = &info->fb_info;
3259 #endif /* CONFIG_FB_COMPAT_XPMAC */
3260 }
3261 #endif /* CONFIG_FB_OF */
3262
3263
3264 int __init atyfb_setup(char *options)
3265 {
3266 char *this_opt;
3267
3268 if (!options || !*options)
3269 return 0;
3270
3271 for (this_opt = strtok(options, ","); this_opt;
3272 this_opt = strtok(NULL, ",")) {
3273 if (!strncmp(this_opt, "font:", 5)) {
3274 char *p;
3275 int i;
3276
3277 p = this_opt + 5;
3278 for (i = 0; i < sizeof(fontname) - 1; i++)
3279 if (!*p || *p == ' ' || *p == ',')
3280 break;
3281 memcpy(fontname, this_opt + 5, i);
3282 fontname[i] = 0;
3283 } else if (!strncmp(this_opt, "noblink", 7)) {
3284 curblink = 0;
3285 } else if (!strncmp(this_opt, "noaccel", 7)) {
3286 noaccel = 1;
3287 } else if (!strncmp(this_opt, "vram:", 5))
3288 default_vram = simple_strtoul(this_opt+5, NULL, 0);
3289 else if (!strncmp(this_opt, "pll:", 4))
3290 default_pll = simple_strtoul(this_opt+4, NULL, 0);
3291 else if (!strncmp(this_opt, "mclk:", 5))
3292 default_mclk = simple_strtoul(this_opt+5, NULL, 0);
3293 #if defined(CONFIG_PPC)
3294 else if (!strncmp(this_opt, "vmode:", 6)) {
3295 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
3296 if (vmode > 0 && vmode <= VMODE_MAX)
3297 default_vmode = vmode;
3298 } else if (!strncmp(this_opt, "cmode:", 6)) {
3299 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
3300 switch (cmode) {
3301 case 0:
3302 case 8:
3303 default_cmode = CMODE_8;
3304 break;
3305 case 15:
3306 case 16:
3307 default_cmode = CMODE_16;
3308 break;
3309 case 24:
3310 case 32:
3311 default_cmode = CMODE_32;
3312 break;
3313 }
3314 }
3315 #endif
3316 #ifdef CONFIG_ATARI
3317 /*
3318 * Why do we need this silly Mach64 argument?
3319 * We are already here because of mach64= so its redundant.
3320 */
3321 else if (MACH_IS_ATARI && (!strncmp(this_opt, "Mach64:", 7))) {
3322 static unsigned char m64_num;
3323 static char mach64_str[80];
3324 strncpy(mach64_str, this_opt+7, 80);
3325 if (!store_video_par(mach64_str, m64_num)) {
3326 m64_num++;
3327 mach64_count = m64_num;
3328 }
3329 }
3330 #endif
3331 }
3332 return 0;
3333 }
3334
3335 #ifdef CONFIG_ATARI
3336 static int __init store_video_par(char *video_str, unsigned char m64_num)
3337 {
3338 char *p;
3339 unsigned long vmembase, size, guiregbase;
3340
3341 printk("store_video_par() '%s' \n", video_str);
3342
3343 if (!(p = strtoke(video_str, ";")) || !*p)
3344 goto mach64_invalid;
3345 vmembase = simple_strtoul(p, NULL, 0);
3346 if (!(p = strtoke(NULL, ";")) || !*p)
3347 goto mach64_invalid;
3348 size = simple_strtoul(p, NULL, 0);
3349 if (!(p = strtoke(NULL, ";")) || !*p)
3350 goto mach64_invalid;
3351 guiregbase = simple_strtoul(p, NULL, 0);
3352
3353 phys_vmembase[m64_num] = vmembase;
3354 phys_size[m64_num] = size;
3355 phys_guiregbase[m64_num] = guiregbase;
3356 printk(" stored them all: $%08lX $%08lX $%08lX \n", vmembase, size,
3357 guiregbase);
3358 return 0;
3359
3360 mach64_invalid:
3361 phys_vmembase[m64_num] = 0;
3362 return -1;
3363 }
3364
3365 static char __init *strtoke(char *s, const char *ct)
3366 {
3367 static char *ssave = NULL;
3368 char *sbegin, *send;
3369
3370 sbegin = s ? s : ssave;
3371 if (!sbegin)
3372 return NULL;
3373 if (*sbegin == '\0') {
3374 ssave = NULL;
3375 return NULL;
3376 }
3377 send = strpbrk(sbegin, ct);
3378 if (send && *send != '\0')
3379 *send++ = '\0';
3380 ssave = send;
3381 return sbegin;
3382 }
3383 #endif /* CONFIG_ATARI */
3384
3385 static int atyfbcon_switch(int con, struct fb_info *fb)
3386 {
3387 struct fb_info_aty *info = (struct fb_info_aty *)fb;
3388 struct atyfb_par par;
3389
3390 /* Do we have to save the colormap? */
3391 if (fb_display[currcon].cmap.len)
3392 fb_get_cmap(&fb_display[currcon].cmap, 1, atyfb_getcolreg, fb);
3393
3394 /* Erase HW Cursor */
3395 if (info->cursor)
3396 atyfb_cursor(&fb_display[currcon], CM_ERASE,
3397 info->cursor->pos.x, info->cursor->pos.y);
3398
3399 currcon = con;
3400
3401 atyfb_decode_var(&fb_display[con].var, &par, info);
3402 atyfb_set_par(&par, info);
3403 atyfb_set_disp(&fb_display[con], info, par.crtc.bpp,
3404 par.accel_flags & FB_ACCELF_TEXT);
3405
3406 /* Install new colormap */
3407 do_install_cmap(con, fb);
3408
3409 /* Install hw cursor */
3410 if (info->cursor) {
3411 aty_set_cursor_color(info, cursor_pixel_map, cursor_color_map,
3412 cursor_color_map, cursor_color_map);
3413 aty_set_cursor_shape(info);
3414 }
3415 return 1;
3416 }
3417
3418 /*
3419 * Blank the display.
3420 */
3421
3422 static void atyfbcon_blank(int blank, struct fb_info *fb)
3423 {
3424 struct fb_info_aty *info = (struct fb_info_aty *)fb;
3425 u8 gen_cntl;
3426
3427 #if defined(CONFIG_PPC)
3428 if ((_machine == _MACH_Pmac) && blank)
3429 pmu_enable_backlight(0);
3430 #endif
3431
3432 gen_cntl = aty_ld_8(CRTC_GEN_CNTL, info);
3433 if (blank > 0)
3434 switch (blank-1) {
3435 case VESA_NO_BLANKING:
3436 gen_cntl |= 0x40;
3437 break;
3438 case VESA_VSYNC_SUSPEND:
3439 gen_cntl |= 0x8;
3440 break;
3441 case VESA_HSYNC_SUSPEND:
3442 gen_cntl |= 0x4;
3443 break;
3444 case VESA_POWERDOWN:
3445 gen_cntl |= 0x4c;
3446 break;
3447 }
3448 else
3449 gen_cntl &= ~(0x4c);
3450 aty_st_8(CRTC_GEN_CNTL, gen_cntl, info);
3451
3452 #if defined(CONFIG_PPC)
3453 if ((_machine == _MACH_Pmac) && !blank)
3454 pmu_enable_backlight(1);
3455 #endif
3456 }
3457
3458
3459 /*
3460 * Read a single color register and split it into
3461 * colors/transparent. Return != 0 for invalid regno.
3462 */
3463
3464 static int atyfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
3465 u_int *transp, struct fb_info *fb)
3466 {
3467 struct fb_info_aty *info = (struct fb_info_aty *)fb;
3468
3469 if (regno > 255)
3470 return 1;
3471 *red = (info->palette[regno].red<<8) | info->palette[regno].red;
3472 *green = (info->palette[regno].green<<8) | info->palette[regno].green;
3473 *blue = (info->palette[regno].blue<<8) | info->palette[regno].blue;
3474 *transp = 0;
3475 return 0;
3476 }
3477
3478
3479 /*
3480 * Set a single color register. The values supplied are already
3481 * rounded down to the hardware's capabilities (according to the
3482 * entries in the var structure). Return != 0 for invalid regno.
3483 */
3484
3485 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
3486 u_int transp, struct fb_info *fb)
3487 {
3488 struct fb_info_aty *info = (struct fb_info_aty *)fb;
3489 int i, scale;
3490
3491 if (regno > 255)
3492 return 1;
3493 red >>= 8;
3494 green >>= 8;
3495 blue >>= 8;
3496 info->palette[regno].red = red;
3497 info->palette[regno].green = green;
3498 info->palette[regno].blue = blue;
3499 i = aty_ld_8(DAC_CNTL, info) & 0xfc;
3500 if (Gx == GT_CHIP_ID || Gx == GU_CHIP_ID || Gx == GV_CHIP_ID ||
3501 Gx == GW_CHIP_ID || Gx == GZ_CHIP_ID || Gx == LG_CHIP_ID ||
3502 Gx == GB_CHIP_ID || Gx == GD_CHIP_ID || Gx == GI_CHIP_ID ||
3503 Gx == GP_CHIP_ID || Gx == GQ_CHIP_ID)
3504 i |= 0x2; /*DAC_CNTL|0x2 turns off the extra brightness for gt*/
3505 aty_st_8(DAC_CNTL, i, info);
3506 aty_st_8(DAC_MASK, 0xff, info);
3507 eieio();
3508 scale = ((Gx != GX_CHIP_ID) && (Gx != CX_CHIP_ID) &&
3509 (info->current_par.crtc.bpp == 16)) ? 3 : 0;
3510 info->aty_cmap_regs->windex = regno << scale;
3511 eieio();
3512 info->aty_cmap_regs->lut = red;
3513 eieio();
3514 info->aty_cmap_regs->lut = green;
3515 eieio();
3516 info->aty_cmap_regs->lut = blue;
3517 eieio();
3518 if (regno < 16)
3519 switch (info->current_par.crtc.bpp) {
3520 #ifdef FBCON_HAS_CFB16
3521 case 16:
3522 info->fbcon_cmap.cfb16[regno] = (regno << 10) | (regno << 5) |
3523 regno;
3524 break;
3525 #endif
3526 #ifdef FBCON_HAS_CFB24
3527 case 24:
3528 info->fbcon_cmap.cfb24[regno] = (regno << 16) | (regno << 8) |
3529 regno;
3530 break;
3531 #endif
3532 #ifdef FBCON_HAS_CFB32
3533 case 32:
3534 i = (regno << 8) | regno;
3535 info->fbcon_cmap.cfb32[regno] = (i << 16) | i;
3536 break;
3537 #endif
3538 }
3539 return 0;
3540 }
3541
3542
3543 static void do_install_cmap(int con, struct fb_info *info)
3544 {
3545 if (con != currcon)
3546 return;
3547 if (fb_display[con].cmap.len)
3548 fb_set_cmap(&fb_display[con].cmap, 1, atyfb_setcolreg, info);
3549 else {
3550 int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
3551 fb_set_cmap(fb_default_cmap(size), 1, atyfb_setcolreg, info);
3552 }
3553 }
3554
3555
3556 /*
3557 * Accelerated functions
3558 */
3559
3560 static inline void draw_rect(s16 x, s16 y, u16 width, u16 height,
3561 struct fb_info_aty *info)
3562 {
3563 /* perform rectangle fill */
3564 wait_for_fifo(2, info);
3565 aty_st_le32(DST_Y_X, (x << 16) | y, info);
3566 aty_st_le32(DST_HEIGHT_WIDTH, (width << 16) | height, info);
3567 info->blitter_may_be_busy = 1;
3568 }
3569
3570 static inline void aty_rectcopy(int srcx, int srcy, int dstx, int dsty,
3571 u_int width, u_int height,
3572 struct fb_info_aty *info)
3573 {
3574 u32 direction = DST_LAST_PEL;
3575 u32 pitch_value;
3576
3577 if (!width || !height)
3578 return;
3579
3580 pitch_value = info->current_par.crtc.vxres;
3581 if (info->current_par.crtc.bpp == 24) {
3582 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
3583 /* horizontal coordinates and widths must be adjusted */
3584 pitch_value *= 3;
3585 srcx *= 3;
3586 dstx *= 3;
3587 width *= 3;
3588 }
3589
3590 if (srcy < dsty) {
3591 dsty += height - 1;
3592 srcy += height - 1;
3593 } else
3594 direction |= DST_Y_TOP_TO_BOTTOM;
3595
3596 if (srcx < dstx) {
3597 dstx += width - 1;
3598 srcx += width - 1;
3599 } else
3600 direction |= DST_X_LEFT_TO_RIGHT;
3601
3602 wait_for_fifo(4, info);
3603 aty_st_le32(DP_SRC, FRGD_SRC_BLIT, info);
3604 aty_st_le32(SRC_Y_X, (srcx << 16) | srcy, info);
3605 aty_st_le32(SRC_HEIGHT1_WIDTH1, (width << 16) | height, info);
3606 aty_st_le32(DST_CNTL, direction, info);
3607 draw_rect(dstx, dsty, width, height, info);
3608 }
3609
3610 static inline void aty_rectfill(int dstx, int dsty, u_int width, u_int height,
3611 u_int color, struct fb_info_aty *info)
3612 {
3613 if (!width || !height)
3614 return;
3615
3616 if (info->current_par.crtc.bpp == 24) {
3617 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
3618 /* horizontal coordinates and widths must be adjusted */
3619 dstx *= 3;
3620 width *= 3;
3621 }
3622
3623 wait_for_fifo(3, info);
3624 aty_st_le32(DP_FRGD_CLR, color, info);
3625 aty_st_le32(DP_SRC, BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR | MONO_SRC_ONE,
3626 info);
3627 aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
3628 DST_X_LEFT_TO_RIGHT, info);
3629 draw_rect(dstx, dsty, width, height, info);
3630 }
3631
3632 /*
3633 * Update the `var' structure (called by fbcon.c)
3634 */
3635
3636 static int atyfbcon_updatevar(int con, struct fb_info *fb)
3637 {
3638 struct fb_info_aty *info = (struct fb_info_aty *)fb;
3639 struct atyfb_par *par = &info->current_par;
3640 struct display *p = &fb_display[con];
3641 struct vc_data *conp = p->conp;
3642 u32 yres, yoffset, sy, height;
3643
3644 yres = ((par->crtc.v_tot_disp >> 16) & 0x7ff) + 1;
3645 yoffset = fb_display[con].var.yoffset;
3646
3647 sy = (conp->vc_rows + p->yscroll) * fontheight(p);
3648 height = yres - conp->vc_rows * fontheight(p);
3649
3650 if (height && (yoffset + yres > sy)) {
3651 u32 xres, xoffset;
3652 u32 bgx;
3653
3654 xres = (((par->crtc.h_tot_disp >> 16) & 0xff) + 1) * 8;
3655 xoffset = fb_display[con].var.xoffset;
3656
3657
3658 bgx = attr_bgcol_ec(p, conp);
3659 bgx |= (bgx << 8);
3660 bgx |= (bgx << 16);
3661
3662 if (sy + height > par->crtc.vyres) {
3663 wait_for_fifo(1, info);
3664 aty_st_le32(SC_BOTTOM, sy + height - 1, info);
3665 }
3666 aty_rectfill(xoffset, sy, xres, height, bgx, info);
3667 }
3668
3669 if (info->cursor && (yoffset + yres <= sy))
3670 atyfb_cursor(p, CM_ERASE, info->cursor->pos.x, info->cursor->pos.y);
3671
3672 info->current_par.crtc.yoffset = yoffset;
3673 set_off_pitch(&info->current_par, info);
3674 return 0;
3675 }
3676
3677 /*
3678 * Text console acceleration
3679 */
3680
3681 static void fbcon_aty_bmove(struct display *p, int sy, int sx, int dy, int dx,
3682 int height, int width)
3683 {
3684 #ifdef __sparc__
3685 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3686
3687 if (fb->mmaped && (!fb->fb_info.display_fg
3688 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3689 return;
3690 #endif
3691
3692 sx *= fontwidth(p);
3693 sy *= fontheight(p);
3694 dx *= fontwidth(p);
3695 dy *= fontheight(p);
3696 width *= fontwidth(p);
3697 height *= fontheight(p);
3698
3699 aty_rectcopy(sx, sy, dx, dy, width, height,
3700 (struct fb_info_aty *)p->fb_info);
3701 }
3702
3703 static void fbcon_aty_clear(struct vc_data *conp, struct display *p, int sy,
3704 int sx, int height, int width)
3705 {
3706 u32 bgx;
3707 #ifdef __sparc__
3708 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3709
3710 if (fb->mmaped && (!fb->fb_info.display_fg
3711 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3712 return;
3713 #endif
3714
3715 bgx = attr_bgcol_ec(p, conp);
3716 bgx |= (bgx << 8);
3717 bgx |= (bgx << 16);
3718
3719 sx *= fontwidth(p);
3720 sy *= fontheight(p);
3721 width *= fontwidth(p);
3722 height *= fontheight(p);
3723
3724 aty_rectfill(sx, sy, width, height, bgx,
3725 (struct fb_info_aty *)p->fb_info);
3726 }
3727
3728 #ifdef FBCON_HAS_CFB8
3729 static void fbcon_aty8_putc(struct vc_data *conp, struct display *p, int c,
3730 int yy, int xx)
3731 {
3732 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3733
3734 #ifdef __sparc__
3735 if (fb->mmaped && (!fb->fb_info.display_fg
3736 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3737 return;
3738 #endif
3739
3740 if (fb->blitter_may_be_busy)
3741 wait_for_idle((struct fb_info_aty *)p->fb_info);
3742 fbcon_cfb8_putc(conp, p, c, yy, xx);
3743 }
3744
3745 static void fbcon_aty8_putcs(struct vc_data *conp, struct display *p,
3746 const unsigned short *s, int count, int yy,
3747 int xx)
3748 {
3749 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3750
3751 #ifdef __sparc__
3752 if (fb->mmaped && (!fb->fb_info.display_fg
3753 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3754 return;
3755 #endif
3756
3757 if (fb->blitter_may_be_busy)
3758 wait_for_idle((struct fb_info_aty *)p->fb_info);
3759 fbcon_cfb8_putcs(conp, p, s, count, yy, xx);
3760 }
3761
3762 static void fbcon_aty8_clear_margins(struct vc_data *conp, struct display *p,
3763 int bottom_only)
3764 {
3765 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3766
3767 #ifdef __sparc__
3768 if (fb->mmaped && (!fb->fb_info.display_fg
3769 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3770 return;
3771 #endif
3772
3773 if (fb->blitter_may_be_busy)
3774 wait_for_idle((struct fb_info_aty *)p->fb_info);
3775 fbcon_cfb8_clear_margins(conp, p, bottom_only);
3776 }
3777
3778 static struct display_switch fbcon_aty8 = {
3779 fbcon_cfb8_setup, fbcon_aty_bmove, fbcon_aty_clear, fbcon_aty8_putc,
3780 fbcon_aty8_putcs, fbcon_cfb8_revc, NULL, NULL, fbcon_aty8_clear_margins,
3781 FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
3782 };
3783 #endif
3784
3785 #ifdef FBCON_HAS_CFB16
3786 static void fbcon_aty16_putc(struct vc_data *conp, struct display *p, int c,
3787 int yy, int xx)
3788 {
3789 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3790
3791 #ifdef __sparc__
3792 if (fb->mmaped && (!fb->fb_info.display_fg
3793 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3794 return;
3795 #endif
3796
3797 if (fb->blitter_may_be_busy)
3798 wait_for_idle((struct fb_info_aty *)p->fb_info);
3799 fbcon_cfb16_putc(conp, p, c, yy, xx);
3800 }
3801
3802 static void fbcon_aty16_putcs(struct vc_data *conp, struct display *p,
3803 const unsigned short *s, int count, int yy,
3804 int xx)
3805 {
3806 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3807
3808 #ifdef __sparc__
3809 if (fb->mmaped && (!fb->fb_info.display_fg
3810 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3811 return;
3812 #endif
3813
3814 if (fb->blitter_may_be_busy)
3815 wait_for_idle((struct fb_info_aty *)p->fb_info);
3816 fbcon_cfb16_putcs(conp, p, s, count, yy, xx);
3817 }
3818
3819 static void fbcon_aty16_clear_margins(struct vc_data *conp, struct display *p,
3820 int bottom_only)
3821 {
3822 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3823
3824 #ifdef __sparc__
3825 if (fb->mmaped && (!fb->fb_info.display_fg
3826 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3827 return;
3828 #endif
3829
3830 if (fb->blitter_may_be_busy)
3831 wait_for_idle((struct fb_info_aty *)p->fb_info);
3832 fbcon_cfb16_clear_margins(conp, p, bottom_only);
3833 }
3834
3835 static struct display_switch fbcon_aty16 = {
3836 fbcon_cfb16_setup, fbcon_aty_bmove, fbcon_aty_clear, fbcon_aty16_putc,
3837 fbcon_aty16_putcs, fbcon_cfb16_revc, NULL, NULL, fbcon_aty16_clear_margins,
3838 FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
3839 };
3840 #endif
3841
3842 #ifdef FBCON_HAS_CFB24
3843 static void fbcon_aty24_putc(struct vc_data *conp, struct display *p, int c,
3844 int yy, int xx)
3845 {
3846 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3847
3848 #ifdef __sparc__
3849 if (fb->mmaped && (!fb->fb_info.display_fg
3850 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3851 return;
3852 #endif
3853
3854 if (fb->blitter_may_be_busy)
3855 wait_for_idle((struct fb_info_aty *)p->fb_info);
3856 fbcon_cfb24_putc(conp, p, c, yy, xx);
3857 }
3858
3859 static void fbcon_aty24_putcs(struct vc_data *conp, struct display *p,
3860 const unsigned short *s, int count, int yy,
3861 int xx)
3862 {
3863 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3864
3865 #ifdef __sparc__
3866 if (fb->mmaped && (!fb->fb_info.display_fg
3867 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3868 return;
3869 #endif
3870
3871 if (fb->blitter_may_be_busy)
3872 wait_for_idle((struct fb_info_aty *)p->fb_info);
3873 fbcon_cfb24_putcs(conp, p, s, count, yy, xx);
3874 }
3875
3876 static void fbcon_aty24_clear_margins(struct vc_data *conp, struct display *p,
3877 int bottom_only)
3878 {
3879 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3880
3881 #ifdef __sparc__
3882 if (fb->mmaped && (!fb->fb_info.display_fg
3883 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3884 return;
3885 #endif
3886
3887 if (fb->blitter_may_be_busy)
3888 wait_for_idle((struct fb_info_aty *)p->fb_info);
3889 fbcon_cfb24_clear_margins(conp, p, bottom_only);
3890 }
3891
3892 static struct display_switch fbcon_aty24 = {
3893 fbcon_cfb24_setup, fbcon_aty_bmove, fbcon_aty_clear, fbcon_aty24_putc,
3894 fbcon_aty24_putcs, fbcon_cfb24_revc, NULL, NULL, fbcon_aty24_clear_margins,
3895 FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
3896 };
3897 #endif
3898
3899 #ifdef FBCON_HAS_CFB32
3900 static void fbcon_aty32_putc(struct vc_data *conp, struct display *p, int c,
3901 int yy, int xx)
3902 {
3903 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3904
3905 #ifdef __sparc__
3906 if (fb->mmaped && (!fb->fb_info.display_fg
3907 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3908 return;
3909 #endif
3910
3911 if (fb->blitter_may_be_busy)
3912 wait_for_idle((struct fb_info_aty *)p->fb_info);
3913 fbcon_cfb32_putc(conp, p, c, yy, xx);
3914 }
3915
3916 static void fbcon_aty32_putcs(struct vc_data *conp, struct display *p,
3917 const unsigned short *s, int count, int yy,
3918 int xx)
3919 {
3920 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3921
3922 #ifdef __sparc__
3923 if (fb->mmaped && (!fb->fb_info.display_fg
3924 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3925 return;
3926 #endif
3927
3928 if (fb->blitter_may_be_busy)
3929 wait_for_idle((struct fb_info_aty *)p->fb_info);
3930 fbcon_cfb32_putcs(conp, p, s, count, yy, xx);
3931 }
3932
3933 static void fbcon_aty32_clear_margins(struct vc_data *conp, struct display *p,
3934 int bottom_only)
3935 {
3936 struct fb_info_aty *fb = (struct fb_info_aty *)(p->fb_info);
3937
3938 #ifdef __sparc__
3939 if (fb->mmaped && (!fb->fb_info.display_fg
3940 || fb->fb_info.display_fg->vc_num == fb->vtconsole))
3941 return;
3942 #endif
3943
3944 if (fb->blitter_may_be_busy)
3945 wait_for_idle((struct fb_info_aty *)p->fb_info);
3946 fbcon_cfb32_clear_margins(conp, p, bottom_only);
3947 }
3948
3949 static struct display_switch fbcon_aty32 = {
3950 fbcon_cfb32_setup, fbcon_aty_bmove, fbcon_aty_clear, fbcon_aty32_putc,
3951 fbcon_aty32_putcs, fbcon_cfb32_revc, NULL, NULL, fbcon_aty32_clear_margins,
3952 FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
3953 };
3954 #endif
3955
3956 #ifdef MODULE
3957 int __init init_module(void)
3958 {
3959 atyfb_init();
3960 return fb_list ? 0 : -ENXIO;
3961 }
3962
3963 void cleanup_module(void)
3964 {
3965 while (fb_list) {
3966 struct fb_info_aty *info = fb_list;
3967 fb_list = info->next;
3968
3969 unregister_framebuffer(&info->fb_info);
3970
3971 #ifndef __sparc__
3972 if (info->ati_regbase)
3973 iounmap((void *)info->ati_regbase);
3974 if (info->frame_buffer)
3975 iounmap((void *)info->frame_buffer);
3976 #ifdef __BIG_ENDIAN
3977 if (info->cursor && info->cursor->ram)
3978 iounmap(info->cursor->ram);
3979 #endif
3980 #endif
3981
3982 if (info->cursor) {
3983 if (info->cursor->timer)
3984 kfree(info->cursor->timer);
3985 kfree(info->cursor);
3986 }
3987 #ifdef __sparc__
3988 if (info->mmap_map)
3989 kfree(info->mmap_map);
3990 #endif
3991 kfree(info);
3992 }
3993 }
3994
3995 #endif
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