| blob | 0caf06a3b4151ee1f9581607d3ada8c791970ddd |
1 /*
2 * This file contains miscellaneous low-level functions.
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
6 * and Paul Mackerras.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 *
13 */
15 #include <linux/config.h>
16 #include <linux/sys.h>
17 #include <asm/unistd.h>
18 #include <asm/errno.h>
19 #include <asm/processor.h>
20 #include "ppc_asm.tmpl"
21 #include "ppc_defs.h"
23 #ifndef CONFIG_8xx
24 /* This instruction is not implemented on the PPC 601 or 603 */
25 #define tlbia \
26 li r4,128; \
27 mtspr CTR,r4; \
28 li r4,0; \
29 0: tlbie r4; \
30 addi r4,r4,0x1000; \
31 bdnz 0b
32 #endif
33 .text
35 /*
36 * Returns (address we're running at) - (address we were linked at)
37 * for use before the text and data are mapped to KERNELBASE.
38 */
40 _GLOBAL(reloc_offset)
41 mflr r0
42 bl 1f
43 1: mflr r3
44 lis r4,1b@ha
45 addi r4,r4,1b@l
46 subf r3,r4,r3
47 mtlr r0
48 blr
50 /*
51 * Disable interrupts
52 * rc = _disable_interrupts()
53 */
54 _GLOBAL(_disable_interrupts)
55 _GLOBAL(__cli)
56 _GLOBAL(_hard_cli)
57 mfmsr r0 /* Get current interrupt state */
58 rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */
59 li r4,0 /* Need [unsigned] value of MSR_EE */
60 ori r4,r4,MSR_EE /* Set to turn off bit */
61 andc r0,r0,r4 /* Clears bit in (r4) */
62 sync /* Some chip revs have problems here... */
63 mtmsr r0 /* Update machine state */
64 blr /* Done */
66 /*
67 * Enable interrupts
68 * _enable_interrupts(int state)
69 * turns on interrupts if state = 1.
70 */
71 _GLOBAL(_enable_interrupts)
72 cmpi 0,r3,0 /* turning them on? */
73 beqlr /* nothing to do if state == 0 */
74 _GLOBAL(__sti)
75 _GLOBAL(_hard_sti)
76 lis r4,ppc_n_lost_interrupts@ha
77 lwz r4,ppc_n_lost_interrupts@l(r4)
78 mfmsr r3 /* Get current state */
79 ori r3,r3,MSR_EE /* Turn on 'EE' bit */
80 cmpi 0,r4,0 /* lost interrupts to process first? */
81 bne- do_lost_interrupts
82 sync /* Some chip revs have problems here... */
83 mtmsr r3 /* Update machine state */
84 blr
86 /*
87 * We were about to enable interrupts but we have to simulate
88 * some interrupts that were lost by enable_irq first.
89 */
90 .globl do_lost_interrupts
91 do_lost_interrupts:
92 stwu r1,-16(r1)
93 mflr r0
94 stw r0,20(r1)
95 stw r3,8(r1)
96 1: bl fake_interrupt
97 lis r4,ppc_n_lost_interrupts@ha
98 lwz r4,ppc_n_lost_interrupts@l(r4)
99 cmpi 0,r4,0
100 bne- 1b
101 lwz r3,8(r1)
102 sync
103 mtmsr r3
104 lwz r0,20(r1)
105 mtlr r0
106 addi r1,r1,16
107 blr
110 /*
111 * complement mask on the msr then "or" some values on.
112 * _nmask_and_or_msr(nmask, value_to_or)
113 */
114 _GLOBAL(_nmask_and_or_msr)
115 mfmsr r0 /* Get current msr */
116 andc r0,r0,r3 /* And off the bits set in r3 (first parm) */
117 or r0,r0,r4 /* Or on the bits in r4 (second parm) */
118 sync /* Some chip revs have problems here... */
119 mtmsr r0 /* Update machine state */
120 blr /* Done */
123 /*
124 * Flush MMU TLB
125 */
126 _GLOBAL(_tlbia)
127 sync
128 tlbia
129 sync
130 #ifdef __SMP__
131 tlbsync
132 sync
133 #endif
134 blr
136 /*
137 * Flush MMU TLB for a particular address
138 */
139 _GLOBAL(_tlbie)
140 tlbie r3
141 sync
142 #ifdef __SMP__
143 tlbsync
144 sync
145 #endif
146 blr
148 /*
149 * Atomic [test&set] exchange
150 *
151 * unsigned long xchg_u32(void *ptr, unsigned long val)
152 * Changes the memory location '*ptr' to be val and returns
153 * the previous value stored there.
154 */
155 _GLOBAL(xchg_u32)
156 mr r5,r3 /* Save pointer */
157 10: lwarx r3,0,r5 /* Fetch old value & reserve */
158 stwcx. r4,0,r5 /* Update with new value */
159 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
160 blr
162 /*
163 * Try to acquire a spinlock.
164 * Only does the stwcx. if the load returned 0 - the Programming
165 * Environments Manual suggests not doing unnecessary stcwx.'s
166 * since they may inhibit forward progress by other CPUs in getting
167 * a lock.
168 */
169 _GLOBAL(__spin_trylock)
170 mr r4,r3
171 eieio /* prevent reordering of stores */
172 li r5,-1
173 lwarx r3,0,r4 /* fetch old value, establish reservation */
174 cmpwi 0,r3,0 /* is it 0? */
175 bnelr- /* return failure if not */
176 stwcx. r5,0,r4 /* try to update with new value */
177 bne- 1f /* if we failed */
178 eieio /* prevent reordering of stores */
179 blr
180 1: li r3,1 /* return non-zero for failure */
181 blr
183 /*
184 * Atomic add/sub/inc/dec operations
185 *
186 * void atomic_add(int c, int *v)
187 * void atomic_sub(int c, int *v)
188 * void atomic_inc(int *v)
189 * void atomic_dec(int *v)
190 * int atomic_dec_and_test(int *v)
191 * int atomic_inc_return(int *v)
192 * int atomic_dec_return(int *v)
193 * void atomic_clear_mask(atomic_t mask, atomic_t *addr)
194 * void atomic_set_mask(atomic_t mask, atomic_t *addr);
195 */
196 _GLOBAL(atomic_add)
197 10: lwarx r5,0,r4 /* Fetch old value & reserve */
198 add r5,r5,r3 /* Perform 'add' operation */
199 stwcx. r5,0,r4 /* Update with new value */
200 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
201 blr
202 _GLOBAL(atomic_add_return)
203 10: lwarx r5,0,r4 /* Fetch old value & reserve */
204 add r5,r5,r3 /* Perform 'add' operation */
205 stwcx. r5,0,r4 /* Update with new value */
206 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
207 mr r3,r5
208 blr
209 _GLOBAL(atomic_sub)
210 10: lwarx r5,0,r4 /* Fetch old value & reserve */
211 sub r5,r5,r3 /* Perform 'add' operation */
212 stwcx. r5,0,r4 /* Update with new value */
213 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
214 blr
215 _GLOBAL(atomic_inc)
216 10: lwarx r5,0,r3 /* Fetch old value & reserve */
217 addi r5,r5,1 /* Perform 'add' operation */
218 stwcx. r5,0,r3 /* Update with new value */
219 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
220 blr
221 _GLOBAL(atomic_inc_return)
222 10: lwarx r5,0,r3 /* Fetch old value & reserve */
223 addi r5,r5,1 /* Perform 'add' operation */
224 stwcx. r5,0,r3 /* Update with new value */
225 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
226 mr r3,r5 /* Return new value */
227 blr
228 _GLOBAL(atomic_dec)
229 10: lwarx r5,0,r3 /* Fetch old value & reserve */
230 subi r5,r5,1 /* Perform 'add' operation */
231 stwcx. r5,0,r3 /* Update with new value */
232 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
233 blr
234 _GLOBAL(atomic_dec_return)
235 10: lwarx r5,0,r3 /* Fetch old value & reserve */
236 subi r5,r5,1 /* Perform 'add' operation */
237 stwcx. r5,0,r3 /* Update with new value */
238 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
239 mr r3,r5 /* Return new value */
240 blr
241 _GLOBAL(atomic_dec_and_test)
242 10: lwarx r5,0,r3 /* Fetch old value & reserve */
243 subi r5,r5,1 /* Perform 'add' operation */
244 stwcx. r5,0,r3 /* Update with new value */
245 bne- 10b /* Retry if "reservation" (i.e. lock) lost */
246 cmpi 0,r5,0 /* Return 'true' IFF 0 */
247 li r3,1
248 beqlr
249 li r3,0
250 blr
251 _GLOBAL(atomic_clear_mask)
252 10: lwarx r5,0,r4
253 andc r5,r5,r3
254 stwcx. r5,0,r4
255 bne- 10b
256 blr
257 _GLOBAL(atomic_set_mask)
258 10: lwarx r5,0,r4
259 or r5,r5,r3
260 stwcx. r5,0,r4
261 bne- 10b
262 blr
264 /*
265 * I/O string operations
266 *
267 * insb(port, buf, len)
268 * outsb(port, buf, len)
269 * insw(port, buf, len)
270 * outsw(port, buf, len)
271 * insl(port, buf, len)
272 * outsl(port, buf, len)
273 * insw_ns(port, buf, len)
274 * outsw_ns(port, buf, len)
275 * insl_ns(port, buf, len)
276 * outsl_ns(port, buf, len)
277 *
278 * The *_ns versions don't do byte-swapping.
279 */
280 _GLOBAL(_insb)
281 mtctr r5
282 subi r4,r4,1
283 00: lbz r5,0(r3)
284 eieio
285 stbu r5,1(r4)
286 bdnz 00b
287 blr
289 _GLOBAL(_outsb)
290 mtctr r5
291 subi r4,r4,1
292 00: lbzu r5,1(r4)
293 stb r5,0(r3)
294 eieio
295 bdnz 00b
296 blr
298 _GLOBAL(_insw)
299 mtctr r5
300 subi r4,r4,2
301 00: lhbrx r5,0,r3
302 eieio
303 sthu r5,2(r4)
304 bdnz 00b
305 blr
307 _GLOBAL(_outsw)
308 mtctr r5
309 subi r4,r4,2
310 00: lhzu r5,2(r4)
311 eieio
312 sthbrx r5,0,r3
313 bdnz 00b
314 blr
316 _GLOBAL(_insl)
317 mtctr r5
318 subi r4,r4,4
319 00: lwbrx r5,0,r3
320 eieio
321 stwu r5,4(r4)
322 bdnz 00b
323 blr
325 _GLOBAL(_outsl)
326 mtctr r5
327 subi r4,r4,4
328 00: lwzu r5,4(r4)
329 stwbrx r5,0,r3
330 eieio
331 bdnz 00b
332 blr
334 _GLOBAL(ide_insw)
335 _GLOBAL(_insw_ns)
336 mtctr r5
337 subi r4,r4,2
338 00: lhz r5,0(r3)
339 eieio
340 sthu r5,2(r4)
341 bdnz 00b
342 blr
344 _GLOBAL(ide_outsw)
345 _GLOBAL(_outsw_ns)
346 mtctr r5
347 subi r4,r4,2
348 00: lhzu r5,2(r4)
349 sth r5,0(r3)
350 eieio
351 bdnz 00b
352 blr
354 _GLOBAL(_insl_ns)
355 mtctr r5
356 subi r4,r4,4
357 00: lwz r5,0(r3)
358 eieio
359 stwu r5,4(r4)
360 bdnz 00b
361 blr
363 _GLOBAL(_outsl_ns)
364 mtctr r5
365 subi r4,r4,4
366 00: lwzu r5,4(r4)
367 stw r5,0(r3)
368 eieio
369 bdnz 00b
370 blr
372 /*
373 * Extended precision shifts
374 *
375 * R3/R4 has 64 bit value
376 * R5 has shift count
377 * result in R3/R4
378 *
379 * ashrdi3: XXXYYY/ZZZAAA -> SSSXXX/YYYZZZ
380 * ashldi3: XXXYYY/ZZZAAA -> YYYZZZ/AAA000
381 */
382 _GLOBAL(__ashrdi3)
383 li r6,32
384 sub r6,r6,r5
385 slw r7,r3,r6 /* isolate YYY */
386 srw r4,r4,r5 /* isolate ZZZ */
387 or r4,r4,r7 /* YYYZZZ */
388 sraw r3,r3,r5 /* SSSXXX */
389 blr
391 _GLOBAL(__ashldi3)
392 li r6,32
393 sub r6,r6,r5
394 srw r7,r4,r6 /* isolate ZZZ */
395 slw r4,r4,r5 /* AAA000 */
396 slw r3,r3,r5 /* YYY--- */
397 or r3,r3,r7 /* YYYZZZ */
398 blr
400 _GLOBAL(abs)
401 cmpi 0,r3,0
402 bge 10f
403 neg r3,r3
404 10: blr
406 _GLOBAL(_get_SP)
407 mr r3,r1 /* Close enough */
408 blr
410 _GLOBAL(_get_THRM1)
411 mfspr r3,THRM1
412 blr
414 _GLOBAL(_get_THRM2)
415 mfspr r3,THRM2
416 blr
418 _GLOBAL(_get_THRM3)
419 mfspr r3,THRM3
420 blr
422 _GLOBAL(_set_THRM1)
423 mtspr THRM1,r3
424 blr
426 _GLOBAL(_set_THRM2)
427 mtspr THRM2,r3
428 blr
430 _GLOBAL(_set_THRM3)
431 mtspr THRM3,r3
432 blr
434 _GLOBAL(_get_PVR)
435 mfspr r3,PVR
436 blr
437 /*
438 L2CR functions
439 Copyright © 1997-1998 by PowerLogix R & D, Inc.
441 This program is free software; you can redistribute it and/or modify
442 it under the terms of the GNU General Public License as published by
443 the Free Software Foundation; either version 2 of the License, or
444 (at your option) any later version.
446 This program is distributed in the hope that it will be useful,
447 but WITHOUT ANY WARRANTY; without even the implied warranty of
448 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
449 GNU General Public License for more details.
451 You should have received a copy of the GNU General Public License
452 along with this program; if not, write to the Free Software
453 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
454 */
455 /*
456 Thur, Dec. 12, 1998.
457 - First public release, contributed by PowerLogix.
459 Author: Terry Greeniaus (tgree@phys.ualberta.ca)
460 Please e-mail updates to this file to me, thanks!
461 */
463 _GLOBAL(_set_L2CR)
464 /* Usage:
466 When setting the L2CR register, you must do a few special things. If you are enabling the
467 cache, you must perform a global invalidate. If you are disabling the cache, you must
468 flush the cache contents first. This routine takes care of doing these things. When first
469 enabling the cache, make sure you pass in the L2CR you want, as well as passing in the
470 global invalidate bit set. A global invalidate will only be performed if the L2I bit is set
471 in applyThis. When enabling the cache, you should also set the L2E bit in applyThis. If you
472 want to modify the L2CR contents after the cache has been enabled, the recommended
473 procedure is to first call __setL2CR(0) to disable the cache and then call it again with
474 the new values for L2CR. Examples:
476 _setL2CR(0) - disables the cache
477 _setL2CR(0xB3A04000) - enables my G3 upgrade card:
478 - L2E set to turn on the cache
479 - L2SIZ set to 1MB
480 - L2CLK set to 1:1
481 - L2RAM set to pipelined syncronous late-write
482 - L2I set to perform a global invalidation
483 - L2OH set to 0.5 nS
484 - L2DF set because this upgrade card requires it
486 A similar call should work for your card. You need to know the correct setting for your
487 card and then place them in the fields I have outlined above. Other fields support optional
488 features, such as L2DO which caches only data, or L2TS which causes cache pushes from
489 the L1 cache to go to the L2 cache instead of to main memory.
490 */
492 /* Make sure this is a 750 chip */
493 mfspr r4,PVR
494 rlwinm r4,r4,16,16,31
495 cmplwi r4,0x0008
496 beq thisIs750
497 li r3,-1
498 blr
500 thisIs750:
501 /* Get the current enable bit of the L2CR into r4 */
502 mfspr r4,L2CR
503 rlwinm r4,r4,0,0,0
505 /* See if we want to perform a global inval this time. */
506 rlwinm r6,r3,0,10,10 /* r6 contains the new invalidate bit */
507 rlwinm. r5,r3,0,0,0 /* r5 contains the new enable bit */
508 rlwinm r3,r3,0,11,9 /* Turn off the invalidate bit */
509 rlwinm r3,r3,0,1,31 /* Turn off the enable bit */
510 or r3,r3,r4 /* Keep the enable bit the same as it was for now. */
511 bne dontDisableCache /* Only disable the cache if L2CRApply has the enable bit off */
513 disableCache:
514 /* Disable the cache. First, we turn off data relocation. */
515 mfmsr r7
516 rlwinm r4,r7,0,28,26 /* Turn off DR bit */
517 rlwinm r4,r4,0,17,15 /* Turn off EE bit - an external exception while we are flushing
518 the cache is fatal (comment this line and see!) */
519 sync
520 mtmsr r4
521 sync
523 /*
524 Now, read the first 2MB of memory to put new data in the cache.
525 (Actually we only need the size of the L2 cache plus
526 the size of the L1 cache, but 2MB will cover everything just to be safe).
527 */
528 lis r4,0x0001
529 mtctr r4
530 li r4,0
531 loadLoop:
532 lwzx r0,r0,r4
533 addi r4,r4,0x0020 /* Go to start of next cache line */
534 bdnz loadLoop
536 /* Now, flush the first 2MB of memory */
537 lis r4,0x0001
538 mtctr r4
539 li r4,0
540 sync
541 flushLoop:
542 dcbf r0,r4
543 addi r4,r4,0x0020 /* Go to start of next cache line */
544 bdnz flushLoop
546 /* Turn off the L2CR enable bit. */
547 rlwinm r3,r3,0,1,31
549 /* Reenable data relocation. */
550 sync
551 mtmsr r7
552 sync
554 dontDisableCache:
555 /* Set up the L2CR configuration bits */
556 sync
557 mtspr L2CR,r3
558 sync
559 cmplwi r6,0
560 beq noInval
562 /* Perform a global invalidation */
563 oris r3,r3,0x0020
564 sync
565 mtspr 1017,r3
566 sync
567 invalCompleteLoop: /* Wait for the invalidation to complete */
568 mfspr r3,1017
569 rlwinm. r4,r3,0,31,31
570 bne invalCompleteLoop
572 rlwinm r3,r3,0,11,9; /* Turn off the L2I bit */
573 sync
574 mtspr L2CR,r3
575 sync
577 noInval:
578 /* See if we need to enable the cache */
579 cmplwi r5,0
580 beqlr
582 enableCache:
583 /* Enable the cache */
584 oris r3,r3,0x8000
585 mtspr L2CR,r3
586 sync
587 blr
589 _GLOBAL(_get_L2CR)
590 /* Make sure this is a 750 chip */
591 mfspr r3,PVR
592 rlwinm r3,r3,16,16,31
593 cmplwi r3,0x0008
594 li r3,0
595 bnelr
597 /* Return the L2CR contents */
598 mfspr r3,L2CR
599 blr
601 /* --- End of PowerLogix code ---
602 */
604 /*
605 _GLOBAL(_get_L2CR)
606 mfspr r3,L2CR
607 blr
609 _GLOBAL(_set_L2CR)
610 mtspr L2CR,r3
611 blr
613 */
615 /*
616 * These are used in the alignment trap handler when emulating
617 * single-precision loads and stores.
618 * We restore and save the fpscr so the task gets the same result
619 * and exceptions as if the cpu had performed the load or store.
620 */
621 _GLOBAL(cvt_fd)
622 cvt_fd:
623 lfd 0,-4(r5) /* load up fpscr value */
624 mtfsf 0xff,0
625 lfs 0,0(r3)
626 stfd 0,0(r4)
627 mffs 0 /* save new fpscr value */
628 stfd 0,-4(r5)
629 blr
631 _GLOBAL(cvt_df)
632 cvt_df:
633 lfd 0,-4(r5) /* load up fpscr value */
634 mtfsf 0xff,0
635 lfd 0,0(r3)
636 stfs 0,0(r4)
637 mffs 0 /* save new fpscr value */
638 stfd 0,-4(r5)
639 blr
641 .globl __clear_msr_me
642 __clear_msr_me:
643 mfmsr r0 /* Get current interrupt state */
644 lis r3,0
645 ori r3,r3,MSR_ME
646 andc r0,r0,r3 /* Clears bit in (r4) */
647 sync /* Some chip revs have problems here */
648 mtmsr r0 /* Update machine state */
649 blr
651 /*
652 * Create a kernel thread
653 * kernel_thread(fn, arg, flags)
654 */
655 _GLOBAL(kernel_thread)
656 mr r6,r3 /* function */
657 ori r3,r5,CLONE_VM /* flags */
658 li r0,__NR_clone
659 sc
660 cmpi 0,r3,0 /* parent or child? */
661 bnelr /* return if parent */
662 li r0,0 /* clear out p->tss.regs */
663 stw r0,TSS+PT_REGS(r2) /* since we don't have user ctx */
664 mtlr r6 /* fn addr in lr */
665 mr r3,r4 /* load arg and call fn */
666 blrl
667 li r0,__NR_exit /* exit after child exits */
668 li r3,0
669 sc
671 #define SYSCALL(name) \
672 _GLOBAL(name) \
673 li r0,__NR_##name; \
674 sc; \
675 bnslr; \
676 lis r4,errno@ha; \
677 stw r3,errno@l(r4); \
678 li r3,-1; \
679 blr
681 #define __NR__exit __NR_exit
683 SYSCALL(idle)
684 SYSCALL(sync)
685 SYSCALL(setsid)
686 SYSCALL(write)
687 SYSCALL(dup)
688 SYSCALL(execve)
689 SYSCALL(open)
690 SYSCALL(close)
691 SYSCALL(waitpid)
692 SYSCALL(fork)
693 SYSCALL(delete_module)
694 SYSCALL(_exit)
695 SYSCALL(lseek)
696 SYSCALL(read)
698 /* Why isn't this a) automatic, b) written in 'C'? */
699 .data
700 .align 4
701 .globl sys_call_table
702 sys_call_table:
703 .long sys_ni_syscall /* 0 - old "setup()" system call */
704 .long sys_exit
705 .long sys_fork
706 .long sys_read
707 .long sys_write
708 .long sys_open /* 5 */
709 .long sys_close
710 .long sys_waitpid
711 .long sys_creat
712 .long sys_link
713 .long sys_unlink /* 10 */
714 .long sys_execve
715 .long sys_chdir
716 .long sys_time
717 .long sys_mknod
718 .long sys_chmod /* 15 */
719 .long sys_lchown
720 .long sys_ni_syscall /* old break syscall holder */
721 .long sys_stat
722 .long sys_lseek
723 .long sys_getpid /* 20 */
724 .long sys_mount
725 .long sys_oldumount
726 .long sys_setuid
727 .long sys_getuid
728 .long sys_stime /* 25 */
729 .long sys_ptrace
730 .long sys_alarm
731 .long sys_fstat
732 .long sys_pause
733 .long sys_utime /* 30 */
734 .long sys_ni_syscall /* old stty syscall holder */
735 .long sys_ni_syscall /* old gtty syscall holder */
736 .long sys_access
737 .long sys_nice
738 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
739 .long sys_sync
740 .long sys_kill
741 .long sys_rename
742 .long sys_mkdir
743 .long sys_rmdir /* 40 */
744 .long sys_dup
745 .long sys_pipe
746 .long sys_times
747 .long sys_ni_syscall /* old prof syscall holder */
748 .long sys_brk /* 45 */
749 .long sys_setgid
750 .long sys_getgid
751 .long sys_signal
752 .long sys_geteuid
753 .long sys_getegid /* 50 */
754 .long sys_acct
755 .long sys_umount /* recycled never used phys() */
756 .long sys_ni_syscall /* old lock syscall holder */
757 .long sys_ioctl
758 .long sys_fcntl /* 55 */
759 .long sys_ni_syscall /* old mpx syscall holder */
760 .long sys_setpgid
761 .long sys_ni_syscall /* old ulimit syscall holder */
762 .long sys_olduname
763 .long sys_umask /* 60 */
764 .long sys_chroot
765 .long sys_ustat
766 .long sys_dup2
767 .long sys_getppid
768 .long sys_getpgrp /* 65 */
769 .long sys_setsid
770 .long sys_sigaction
771 .long sys_sgetmask
772 .long sys_ssetmask
773 .long sys_setreuid /* 70 */
774 .long sys_setregid
775 .long sys_sigsuspend
776 .long sys_sigpending
777 .long sys_sethostname
778 .long sys_setrlimit /* 75 */
779 .long sys_getrlimit
780 .long sys_getrusage
781 .long sys_gettimeofday
782 .long sys_settimeofday
783 .long sys_getgroups /* 80 */
784 .long sys_setgroups
785 .long ppc_select
786 .long sys_symlink
787 .long sys_lstat
788 .long sys_readlink /* 85 */
789 .long sys_uselib
790 .long sys_swapon
791 .long sys_reboot
792 .long old_readdir
793 .long sys_mmap /* 90 */
794 .long sys_munmap
795 .long sys_truncate
796 .long sys_ftruncate
797 .long sys_fchmod
798 .long sys_fchown /* 95 */
799 .long sys_getpriority
800 .long sys_setpriority
801 .long sys_ni_syscall /* old profil syscall holder */
802 .long sys_statfs
803 .long sys_fstatfs /* 100 */
804 .long sys_ioperm
805 .long sys_socketcall
806 .long sys_syslog
807 .long sys_setitimer
808 .long sys_getitimer /* 105 */
809 .long sys_newstat
810 .long sys_newlstat
811 .long sys_newfstat
812 .long sys_uname
813 .long sys_iopl /* 110 */
814 .long sys_vhangup
815 .long sys_idle
816 .long sys_vm86
817 .long sys_wait4
818 .long sys_swapoff /* 115 */
819 .long sys_sysinfo
820 .long sys_ipc
821 .long sys_fsync
822 .long sys_sigreturn
823 .long sys_clone /* 120 */
824 .long sys_setdomainname
825 .long sys_newuname
826 .long sys_modify_ldt
827 .long sys_adjtimex
828 .long sys_mprotect /* 125 */
829 .long sys_sigprocmask
830 .long sys_create_module
831 .long sys_init_module
832 .long sys_delete_module
833 .long sys_get_kernel_syms /* 130 */
834 .long sys_quotactl
835 .long sys_getpgid
836 .long sys_fchdir
837 .long sys_bdflush
838 .long sys_sysfs /* 135 */
839 .long sys_personality
840 .long sys_ni_syscall /* for afs_syscall */
841 .long sys_setfsuid
842 .long sys_setfsgid
843 .long sys_llseek /* 140 */
844 .long sys_getdents
845 .long ppc_select
846 .long sys_flock
847 .long sys_msync
848 .long sys_readv /* 145 */
849 .long sys_writev
850 .long sys_getsid
851 .long sys_fdatasync
852 .long sys_sysctl
853 .long sys_mlock /* 150 */
854 .long sys_munlock
855 .long sys_mlockall
856 .long sys_munlockall
857 .long sys_sched_setparam
858 .long sys_sched_getparam /* 155 */
859 .long sys_sched_setscheduler
860 .long sys_sched_getscheduler
861 .long sys_sched_yield
862 .long sys_sched_get_priority_max
863 .long sys_sched_get_priority_min /* 160 */
864 .long sys_sched_rr_get_interval
865 .long sys_nanosleep
866 .long sys_mremap
867 .long sys_setresuid
868 .long sys_getresuid /* 165 */
869 .long sys_query_module
870 .long sys_poll
871 #ifdef CONFIG_NFSD
872 .long sys_nfsservctl
873 #else
874 .long sys_ni_syscall
875 #endif
876 .long sys_setresgid
877 .long sys_getresgid /* 170 */
878 .long sys_prctl
879 .long sys_rt_sigreturn
880 .long sys_rt_sigaction
881 .long sys_rt_sigprocmask
882 .long sys_rt_sigpending /* 175 */
883 .long sys_rt_sigtimedwait
884 .long sys_rt_sigqueueinfo
885 .long sys_rt_sigsuspend
886 .long sys_pread
887 .long sys_pwrite /* 180 */
888 .long sys_chown
889 .long sys_getcwd
890 .long sys_capget
891 .long sys_capset
892 .long sys_sigaltstack /* 185 */
893 .long sys_sendfile
894 .long sys_ni_syscall /* streams1 */
895 .long sys_ni_syscall /* streams2 */
896 .long sys_vfork
897 .space (NR_syscalls-183)*4