drivers/misc/parport_ax.c

   1 /* $Id: parport_ax.c,v 1.17 1999/01/20 06:18:54 davem Exp $
   2  * Parallel-port routines for Sun Ultra/AX architecture
   3  *
   4  * Author: Eddie C. Dost <ecd@skynet.be>
   5  *
   6  * based on work by:
   7  *          Phil Blundell <Philip.Blundell@pobox.com>
   8  *          Tim Waugh <tim@cyberelk.demon.co.uk>
   9  *          Jose Renau <renau@acm.org>
  10  *          David Campbell <campbell@tirian.che.curtin.edu.au>
  11  *          Grant Guenther <grant@torque.net>
  12  */
  13
  14 #include <linux/string.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17 #include <linux/errno.h>
  18 #include <linux/ioport.h>
  19 #include <linux/kernel.h>
  20 #include <linux/malloc.h>
  21 #include <linux/init.h>
  22
  23 #include <linux/parport.h>
  24
  25 #include <asm/ptrace.h>
  26 #include <linux/interrupt.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/ebus.h>
  30 #include <asm/ns87303.h>
  31 #include <asm/irq.h>
  32
  33
  34 /*
  35  * Define this if you have Devices which don't support short
  36  * host read/write cycles.
  37  */
  38 #undef HAVE_SLOW_DEVICES
  39
  40
  41 #define DATA            0x00
  42 #define STATUS          0x01
  43 #define CONTROL         0x02
  44 #define EPPADDR         0x03
  45 #define EPPDATA         0x04
  46
  47 #define CFIFO           0x400
  48 #define DFIFO           0x400
  49 #define TFIFO           0x400
  50 #define CONFIGA         0x400
  51 #define CONFIGB         0x401
  52 #define ECONTROL        0x402
  53
  54 static void parport_ax_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  55 {
  56         parport_generic_irq(irq, (struct parport *) dev_id, regs);
  57 }
  58
  59 void
  60 parport_ax_write_epp(struct parport *p, unsigned char d)
  61 {
  62         outb(d, p->base + EPPDATA);
  63 }
  64
  65 unsigned char
  66 parport_ax_read_epp(struct parport *p)
  67 {
  68         return inb(p->base + EPPDATA);
  69 }
  70
  71 void
  72 parport_ax_write_epp_addr(struct parport *p, unsigned char d)
  73 {
  74         outb(d, p->base + EPPADDR);
  75 }
  76
  77 unsigned char
  78 parport_ax_read_epp_addr(struct parport *p)
  79 {
  80         return inb(p->base + EPPADDR);
  81 }
  82
  83 int parport_ax_epp_clear_timeout(struct parport *pb);
  84
  85 int
  86 parport_ax_check_epp_timeout(struct parport *p)
  87 {
  88         if (!(inb(p->base+STATUS) & 1))
  89                 return 0;
  90         parport_ax_epp_clear_timeout(p);
  91         return 1;
  92 }
  93
  94 unsigned char
  95 parport_ax_read_configb(struct parport *p)
  96 {
  97         return inb(p->base + CONFIGB);
  98 }
  99
 100 void
 101 parport_ax_write_data(struct parport *p, unsigned char d)
 102 {
 103         outb(d, p->base + DATA);
 104 }
 105
 106 unsigned char
 107 parport_ax_read_data(struct parport *p)
 108 {
 109         return inb(p->base + DATA);
 110 }
 111
 112 void
 113 parport_ax_write_control(struct parport *p, unsigned char d)
 114 {
 115         outb(d, p->base + CONTROL);
 116 }
 117
 118 unsigned char
 119 parport_ax_read_control(struct parport *p)
 120 {
 121         return inb(p->base + CONTROL);
 122 }
 123
 124 unsigned char
 125 parport_ax_frob_control(struct parport *p, unsigned char mask,  unsigned char val)
 126 {
 127         unsigned char old = inb(p->base + CONTROL);
 128         outb(((old & ~mask) ^ val), p->base + CONTROL);
 129         return old;
 130 }
 131
 132 void
 133 parport_ax_write_status(struct parport *p, unsigned char d)
 134 {
 135         outb(d, p->base + STATUS);
 136 }
 137
 138 unsigned char
 139 parport_ax_read_status(struct parport *p)
 140 {
 141         return inb(p->base + STATUS);
 142 }
 143
 144 void
 145 parport_ax_write_econtrol(struct parport *p, unsigned char d)
 146 {
 147         outb(d, p->base + ECONTROL);
 148 }
 149
 150 unsigned char
 151 parport_ax_read_econtrol(struct parport *p)
 152 {
 153         return inb(p->base + ECONTROL);
 154 }
 155
 156 unsigned char
 157 parport_ax_frob_econtrol(struct parport *p, unsigned char mask, unsigned char val)
 158 {
 159         unsigned char old = inb(p->base + ECONTROL);
 160         outb(((old & ~mask) ^ val), p->base + ECONTROL);
 161         return old;
 162 }
 163
 164 void
 165 parport_ax_change_mode(struct parport *p, int m)
 166 {
 167         parport_ax_frob_econtrol(p, 0xe0, m << 5);
 168 }
 169
 170 void
 171 parport_ax_write_fifo(struct parport *p, unsigned char v)
 172 {
 173         outb(v, p->base + DFIFO);
 174 }
 175
 176 unsigned char
 177 parport_ax_read_fifo(struct parport *p)
 178 {
 179         return inb(p->base + DFIFO);
 180 }
 181
 182 void
 183 parport_ax_disable_irq(struct parport *p)
 184 {
 185         struct linux_ebus_dma *dma = p->private_data;
 186         unsigned int dcsr;
 187
 188         dcsr = readl((unsigned long)&dma->dcsr);
 189         dcsr &= ~(EBUS_DCSR_INT_EN);
 190         writel(dcsr, (unsigned long)&dma->dcsr);
 191 }
 192
 193 void
 194 parport_ax_enable_irq(struct parport *p)
 195 {
 196         struct linux_ebus_dma *dma = p->private_data;
 197         unsigned int dcsr;
 198
 199         dcsr = readl((unsigned long)&dma->dcsr);
 200         dcsr |= EBUS_DCSR_INT_EN;
 201         writel(dcsr, (unsigned long)&dma->dcsr);
 202 }
 203
 204 void
 205 parport_ax_release_resources(struct parport *p)
 206 {
 207         if (p->irq != PARPORT_IRQ_NONE) {
 208                 parport_ax_disable_irq(p);
 209                 free_irq(p->irq, p);
 210         }
 211         release_region(p->base, p->size);
 212         if (p->modes & PARPORT_MODE_PCECR)
 213                 release_region(p->base+0x400, 3);
 214         release_region((unsigned long)p->private_data,
 215                        sizeof(struct linux_ebus_dma));
 216 }
 217
 218 int
 219 parport_ax_claim_resources(struct parport *p)
 220 {
 221         /* FIXME check that resources are free */
 222         int err;
 223
 224         if (p->irq != PARPORT_IRQ_NONE) {
 225                 if ((err = request_irq(p->irq, parport_ax_interrupt,
 226                                        0, p->name, p)) != 0)
 227                         return err;
 228                 else
 229                         parport_ax_enable_irq(p);
 230         }
 231         request_region(p->base, p->size, p->name);
 232         if (p->modes & PARPORT_MODE_PCECR)
 233                 request_region(p->base+0x400, 3, p->name);
 234         request_region((unsigned long)p->private_data,
 235                        sizeof(struct linux_ebus_dma), p->name);
 236         return 0;
 237 }
 238
 239 void
 240 parport_ax_init_state(struct parport_state *s)
 241 {
 242         s->u.pc.ctr = 0xc;
 243         s->u.pc.ecr = 0x0;
 244 }
 245
 246 void
 247 parport_ax_save_state(struct parport *p, struct parport_state *s)
 248 {
 249         s->u.pc.ctr = parport_ax_read_control(p);
 250         s->u.pc.ecr = parport_ax_read_econtrol(p);
 251 }
 252
 253 void
 254 parport_ax_restore_state(struct parport *p, struct parport_state *s)
 255 {
 256         parport_ax_write_control(p, s->u.pc.ctr);
 257         parport_ax_write_econtrol(p, s->u.pc.ecr);
 258 }
 259
 260 size_t
 261 parport_ax_epp_read_block(struct parport *p, void *buf, size_t length)
 262 {
 263         return 0; /* FIXME */
 264 }
 265
 266 size_t
 267 parport_ax_epp_write_block(struct parport *p, void *buf, size_t length)
 268 {
 269         return 0; /* FIXME */
 270 }
 271
 272 int
 273 parport_ax_ecp_read_block(struct parport *p, void *buf, size_t length,
 274                           void (*fn)(struct parport *, void *, size_t),
 275                           void *handle)
 276 {
 277         return 0; /* FIXME */
 278 }
 279
 280 int
 281 parport_ax_ecp_write_block(struct parport *p, void *buf, size_t length,
 282                            void (*fn)(struct parport *, void *, size_t),
 283                            void *handle)
 284 {
 285         return 0; /* FIXME */
 286 }
 287
 288 void
 289 parport_ax_inc_use_count(void)
 290 {
 291 #ifdef MODULE
 292         MOD_INC_USE_COUNT;
 293 #endif
 294 }
 295
 296 void
 297 parport_ax_dec_use_count(void)
 298 {
 299 #ifdef MODULE
 300         MOD_DEC_USE_COUNT;
 301 #endif
 302 }
 303
 304 static void parport_ax_fill_inode(struct inode *inode, int fill)
 305 {
 306 #ifdef MODULE
 307         if (fill)
 308                 MOD_INC_USE_COUNT;
 309         else
 310                 MOD_DEC_USE_COUNT;
 311 #endif
 312 }
 313
 314 static struct parport_operations parport_ax_ops =
 315 {
 316         parport_ax_write_data,
 317         parport_ax_read_data,
 318
 319         parport_ax_write_control,
 320         parport_ax_read_control,
 321         parport_ax_frob_control,
 322
 323         parport_ax_write_econtrol,
 324         parport_ax_read_econtrol,
 325         parport_ax_frob_econtrol,
 326
 327         parport_ax_write_status,
 328         parport_ax_read_status,
 329
 330         parport_ax_write_fifo,
 331         parport_ax_read_fifo,
 332
 333         parport_ax_change_mode,
 334
 335         parport_ax_release_resources,
 336         parport_ax_claim_resources,
 337
 338         parport_ax_write_epp,
 339         parport_ax_read_epp,
 340         parport_ax_write_epp_addr,
 341         parport_ax_read_epp_addr,
 342         parport_ax_check_epp_timeout,
 343
 344         parport_ax_epp_write_block,
 345         parport_ax_epp_read_block,
 346
 347         parport_ax_ecp_write_block,
 348         parport_ax_ecp_read_block,
 349
 350         parport_ax_init_state,
 351         parport_ax_save_state,
 352         parport_ax_restore_state,
 353
 354         parport_ax_enable_irq,
 355         parport_ax_disable_irq,
 356         parport_ax_interrupt,
 357
 358         parport_ax_inc_use_count,
 359         parport_ax_dec_use_count,
 360         parport_ax_fill_inode
 361 };
 362
 363
 364 /******************************************************
 365  *  MODE detection section:
 366  */
 367
 368 /*
 369  * Clear TIMEOUT BIT in EPP MODE
 370  */
 371 int parport_ax_epp_clear_timeout(struct parport *pb)
 372 {
 373         unsigned char r;
 374
 375         if (!(parport_ax_read_status(pb) & 0x01))
 376                 return 1;
 377
 378         /* To clear timeout some chips require double read */
 379         parport_ax_read_status(pb);
 380         r = parport_ax_read_status(pb);
 381         parport_ax_write_status(pb, r | 0x01); /* Some reset by writing 1 */
 382         parport_ax_write_status(pb, r & 0xfe); /* Others by writing 0 */
 383         r = parport_ax_read_status(pb);
 384
 385         return !(r & 0x01);
 386 }
 387
 388 /* Check for ECP
 389  *
 390  * Old style XT ports alias io ports every 0x400, hence accessing ECONTROL
 391  * on these cards actually accesses the CTR.
 392  *
 393  * Modern cards don't do this but reading from ECONTROL will return 0xff
 394  * regardless of what is written here if the card does NOT support
 395  * ECP.
 396  *
 397  * We will write 0x2c to ECONTROL and 0xcc to CTR since both of these
 398  * values are "safe" on the CTR since bits 6-7 of CTR are unused.
 399  */
 400 static int parport_ECR_present(struct parport *pb)
 401 {
 402         unsigned int r;
 403         unsigned char octr = pb->ops->read_control(pb),
 404           oecr = pb->ops->read_econtrol(pb);
 405
 406         r = pb->ops->read_control(pb);
 407         if ((pb->ops->read_econtrol(pb) & 0x3) == (r & 0x3)) {
 408                 pb->ops->write_control(pb, r ^ 0x2 ); /* Toggle bit 1 */
 409
 410                 r = pb->ops->read_control(pb);
 411                 if ((pb->ops->read_econtrol(pb) & 0x2) == (r & 0x2)) {
 412                         pb->ops->write_control(pb, octr);
 413                         return 0; /* Sure that no ECONTROL register exists */
 414                 }
 415         }
 416
 417         if ((pb->ops->read_econtrol(pb) & 0x3 ) != 0x1)
 418                 return 0;
 419
 420         pb->ops->write_econtrol(pb, 0x34);
 421         if (pb->ops->read_econtrol(pb) != 0x35)
 422                 return 0;
 423
 424         pb->ops->write_econtrol(pb, oecr);
 425         pb->ops->write_control(pb, octr);
 426
 427         return PARPORT_MODE_PCECR;
 428 }
 429
 430 static int parport_ECP_supported(struct parport *pb)
 431 {
 432         int i;
 433         unsigned char oecr = pb->ops->read_econtrol(pb);
 434
 435         /* If there is no ECONTROL, we have no hope of supporting ECP. */
 436         if (!(pb->modes & PARPORT_MODE_PCECR))
 437                 return 0;
 438
 439         /*
 440          * Using LGS chipset it uses ECONTROL register, but
 441          * it doesn't support ECP or FIFO MODE
 442          */
 443
 444         pb->ops->write_econtrol(pb, 0xc0); /* TEST FIFO */
 445         for (i=0; i < 1024 && (pb->ops->read_econtrol(pb) & 0x01); i++)
 446                 pb->ops->write_fifo(pb, 0xaa);
 447
 448         pb->ops->write_econtrol(pb, oecr);
 449         return (i == 1024) ? 0 : PARPORT_MODE_PCECP;
 450 }
 451
 452 /* Detect PS/2 support.
 453  *
 454  * Bit 5 (0x20) sets the PS/2 data direction; setting this high
 455  * allows us to read data from the data lines.  In theory we would get back
 456  * 0xff but any peripheral attached to the port may drag some or all of the
 457  * lines down to zero.  So if we get back anything that isn't the contents
 458  * of the data register we deem PS/2 support to be present.
 459  *
 460  * Some SPP ports have "half PS/2" ability - you can't turn off the line
 461  * drivers, but an external peripheral with sufficiently beefy drivers of
 462  * its own can overpower them and assert its own levels onto the bus, from
 463  * where they can then be read back as normal.  Ports with this property
 464  * and the right type of device attached are likely to fail the SPP test,
 465  * (as they will appear to have stuck bits) and so the fact that they might
 466  * be misdetected here is rather academic.
 467  */
 468
 469 static int parport_PS2_supported(struct parport *pb)
 470 {
 471         int ok = 0;
 472         unsigned char octr = pb->ops->read_control(pb);
 473
 474         pb->ops->write_control(pb, octr | 0x20);  /* try to tri-state buffer */
 475
 476         pb->ops->write_data(pb, 0x55);
 477         if (pb->ops->read_data(pb) != 0x55) ok++;
 478
 479         pb->ops->write_data(pb, 0xaa);
 480         if (pb->ops->read_data(pb) != 0xaa) ok++;
 481
 482         pb->ops->write_control(pb, octr);          /* cancel input mode */
 483
 484         return ok ? PARPORT_MODE_PCPS2 : 0;
 485 }
 486
 487 static int parport_ECPPS2_supported(struct parport *pb)
 488 {
 489         int mode;
 490         unsigned char oecr = pb->ops->read_econtrol(pb);
 491
 492         if (!(pb->modes & PARPORT_MODE_PCECR))
 493                 return 0;
 494
 495         pb->ops->write_econtrol(pb, 0x20);
 496
 497         mode = parport_PS2_supported(pb);
 498
 499         pb->ops->write_econtrol(pb, oecr);
 500         return mode ? PARPORT_MODE_PCECPPS2 : 0;
 501 }
 502
 503 #define printmode(x)                                    \
 504 {                                                       \
 505         if (p->modes & PARPORT_MODE_PC##x) {            \
 506                 printk("%s%s", f ? "," : "", #x);       \
 507                 f++;                                    \
 508         }                                               \
 509 }
 510
 511 int
 512 init_one_port(struct linux_ebus_device *dev)
 513 {
 514         struct parport tmpport, *p;
 515         unsigned long base;
 516         unsigned long config;
 517         unsigned char tmp;
 518         int irq, dma;
 519
 520         /* Pointer to NS87303 Configuration Registers */
 521         config = dev->base_address[1];
 522
 523         /* Setup temporary access to Device operations */
 524         tmpport.base = dev->base_address[0];
 525         tmpport.ops = &parport_ax_ops;
 526
 527         /* Enable ECP mode, set bit 2 of the CTR first */
 528         tmpport.ops->write_control(&tmpport, 0x04);
 529         tmp = ns87303_readb(config, PCR);
 530         tmp |= (PCR_EPP_IEEE | PCR_ECP_ENABLE | PCR_ECP_CLK_ENA);
 531         ns87303_writeb(config, PCR, tmp);
 532
 533         /* LPT CTR bit 5 controls direction of parallel port */
 534         tmp = ns87303_readb(config, PTR);
 535         tmp |= PTR_LPT_REG_DIR;
 536         ns87303_writeb(config, PTR, tmp);
 537
 538         /* Configure IRQ to Push Pull, Level Low */
 539         tmp = ns87303_readb(config, PCR);
 540         tmp &= ~(PCR_IRQ_ODRAIN);
 541         tmp |= PCR_IRQ_POLAR;
 542         ns87303_writeb(config, PCR, tmp);
 543
 544 #ifndef HAVE_SLOW_DEVICES
 545         /* Enable Zero Wait State for ECP */
 546         tmp = ns87303_readb(config, FCR);
 547         tmp |= FCR_ZWS_ENA;
 548         ns87303_writeb(config, FCR, tmp);
 549 #endif
 550
 551         /*
 552          * Now continue initializing the port
 553          */
 554         base = dev->base_address[0];
 555         irq = dev->irqs[0];
 556         dma = PARPORT_DMA_AUTO;
 557
 558         if (!(p = parport_register_port(base, irq, dma, &parport_ax_ops)))
 559                 return 0;
 560
 561         /* Save away pointer to our EBus DMA */
 562         p->private_data = (void *)dev->base_address[2];
 563
 564         p->modes = PARPORT_MODE_PCSPP | parport_PS2_supported(p);
 565         if (!check_region(p->base + 0x400, 3)) {
 566                 p->modes |= parport_ECR_present(p);
 567                 p->modes |= parport_ECP_supported(p);
 568                 p->modes |= parport_ECPPS2_supported(p);
 569         }
 570         p->size = 3;
 571
 572         if (p->dma == PARPORT_DMA_AUTO)
 573                 p->dma = (p->modes & PARPORT_MODE_PCECP) ? 0 : PARPORT_DMA_NONE;
 574
 575         printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
 576         if (p->irq != PARPORT_IRQ_NONE)
 577                 printk(", irq %s", __irq_itoa(p->irq));
 578         if (p->dma != PARPORT_DMA_NONE)
 579                 printk(", dma %d", p->dma);
 580         printk(" [");
 581         {
 582                 int f = 0;
 583                 printmode(SPP);
 584                 printmode(PS2);
 585                 printmode(ECP);
 586                 printmode(ECPPS2);
 587         }
 588         printk("]\n");
 589         parport_proc_register(p);
 590         p->flags |= PARPORT_FLAG_COMA;
 591
 592         p->ops->write_control(p, 0x0c);
 593         p->ops->write_data(p, 0);
 594
 595         if (parport_probe_hook)
 596                 (*parport_probe_hook)(p);
 597
 598         return 1;
 599 }
 600
 601 EXPORT_NO_SYMBOLS;
 602
 603 #ifdef MODULE
 604 int init_module(void)
 605 #else
 606 __initfunc(int parport_ax_init(void))
 607 #endif
 608 {
 609         struct linux_ebus *ebus;
 610         struct linux_ebus_device *edev;
 611         int count = 0;
 612
 613         for_each_ebus(ebus) {
 614                 for_each_ebusdev(edev, ebus) {
 615                         if (!strcmp(edev->prom_name, "ecpp"))
 616                                 count += init_one_port(edev);
 617                 }
 618         }
 619         return count ? 0 : -ENODEV;
 620 }
 621
 622 #ifdef MODULE
 623 void
 624 cleanup_module(void)
 625 {
 626         struct parport *p = parport_enumerate(), *tmp;
 627         while (p) {
 628                 tmp = p->next;
 629                 if (p->modes & PARPORT_MODE_PCSPP) {
 630                         if (!(p->flags & PARPORT_FLAG_COMA))
 631                                 parport_quiesce(p);
 632                         parport_proc_unregister(p);
 633                         parport_unregister_port(p);
 634                 }
 635                 p = tmp;
 636         }
 637 }
 638 #endif