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Import 2.1.118
[davej-history.git] / drivers / sound / es1370.c
blob90d12d84b3baa8cceff12b44b48f6652622781da
1 /*****************************************************************************/
2
3 /*
4 * es1370.c -- Ensoniq ES1370/Ashai Kasei AK4531 audio driver.
5 *
6 * Copyright (C) 1998 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to David C. Niemi
23 *
24 *
25 * Module command line parameters:
26 * joystick if 1 enables the joystick interface on the card; but it still
27 * needs a separate joystick driver (presumably PC standard, although
28 * the chip doc doesn't say anything and it looks slightly fishy from
29 * the PCI standpoint...)
30 * lineout if 1 the LINE jack is used as an output instead of an input.
31 * LINE then contains the unmixed dsp output. This can be used
32 * to make the card a four channel one: use dsp to output two
33 * channels to LINE and dac to output the other two channels to
34 * SPKR. Set the mixer to only output synth to SPKR.
35 * micz it looks like this changes the MIC input impedance. I don't know
36 * any detail though.
37 *
38 * Note: sync mode is not yet supported (i.e. running dsp and dac from the same
39 * clock source)
40 *
41 * Supported devices:
42 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
43 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
44 * /dev/dsp1 additional DAC, like /dev/dsp, but output only,
45 * only 5512, 11025, 22050 and 44100 samples/s,
46 * outputs to mixer "SYNTH" setting
47 * /dev/midi simple MIDI UART interface, no ioctl
48 *
49 * NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
50 * to be done in software. That is what /dev/dac is for. By now (Q2 1998)
51 * there are several MIDI to PCM (WAV) packages, one of them is timidity.
52 *
53 * Revision history
54 * 26.03.98 0.1 Initial release
55 * 31.03.98 0.2 Fix bug in GETOSPACE
56 * 04.04.98 0.3 Make it work (again) under 2.0.33
57 * Fix mixer write operation not returning the actual
58 * settings
59 * 05.04.98 0.4 First attempt at using the new PCI stuff
60 * 29.04.98 0.5 Fix hang when ^C is pressed on amp
61 * 07.05.98 0.6 Don't double lock around stop_*() in *_release()
62 * 10.05.98 0.7 First stab at a simple midi interface (no bells&whistles)
63 * 14.05.98 0.8 Don't allow excessive interrupt rates
64 * 08.06.98 0.9 First release using Alan Cox' soundcore instead of
65 * miscdevice
66 * 05.07.98 0.10 Fixed the driver to correctly maintin OSS style volume
67 * settings (not sure if this should be standard)
68 * Fixed many references: f_flags should be f_mode
69 * -- Gerald Britton <gbritton@mit.edu>
70 * 03.08.98 0.11 Now mixer behaviour can basically be selected between
71 * "OSS documented" and "OSS actual" behaviour
72 * Fixed mixer table thanks to Hakan.Lennestal@lu.erisoft.se
73 * On module startup, set DAC2 to 11kSPS instead of 5.5kSPS,
74 * as it produces an annoying ssssh in the lower sampling rate
75 * Do not include modversions.h
76 *
77 * some important things missing in Ensoniq documentation:
78 *
79 * Experimental PCLKDIV results: play the same waveforms on both DAC1 and DAC2
80 * and vary PCLKDIV to obtain zero beat.
81 * 5512sps: 254
82 * 44100sps: 30
83 * seems to be fs = 1411200/(PCLKDIV+2)
84 *
85 * should find out when curr_sample_ct is cleared and
86 * where exactly the CCB fetches data
87 *
88 * The card uses a 22.5792 MHz crystal.
89 * The LINEIN jack may be converted to an AOUT jack by
90 * setting pin 47 (XCTL0) of the ES1370 to high.
91 * Pin 48 (XCTL1) of the ES1370 presumably changes the input impedance of the
92 * MIC jack.
93 *
94 */
95
96 /*****************************************************************************/
97
98 #include <linux/version.h>
99 #include <linux/module.h>
100 #include <linux/string.h>
101 #include <linux/ioport.h>
102 #include <linux/sched.h>
103 #include <linux/delay.h>
104 #include <linux/sound.h>
105 #include <linux/malloc.h>
106 #include <linux/soundcard.h>
107 #include <linux/pci.h>
108 #include <asm/io.h>
109 #include <asm/dma.h>
110 #include <linux/init.h>
111 #include <linux/poll.h>
112 #include <asm/spinlock.h>
113 #include <asm/uaccess.h>
114 #include <asm/hardirq.h>
115
116 /* --------------------------------------------------------------------- */
117
118 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
119
120 /* --------------------------------------------------------------------- */
121
122 #ifndef PCI_VENDOR_ID_ENSONIQ
123 #define PCI_VENDOR_ID_ENSONIQ 0x1274
124 #endif
125 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1370
126 #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
127 #endif
128
129 #define ES1370_MAGIC ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1370)
130
131 #define ES1370_EXTENT 0x40
132 #define JOY_EXTENT 8
133
134 #define ES1370_REG_CONTROL 0x00
135 #define ES1370_REG_STATUS 0x04
136 #define ES1370_REG_UART_DATA 0x08
137 #define ES1370_REG_UART_STATUS 0x09
138 #define ES1370_REG_UART_CONTROL 0x09
139 #define ES1370_REG_UART_TEST 0x0a
140 #define ES1370_REG_MEMPAGE 0x0c
141 #define ES1370_REG_CODEC 0x10
142 #define ES1370_REG_SERIAL_CONTROL 0x20
143 #define ES1370_REG_DAC1_SCOUNT 0x24
144 #define ES1370_REG_DAC2_SCOUNT 0x28
145 #define ES1370_REG_ADC_SCOUNT 0x2c
146
147 #define ES1370_REG_DAC1_FRAMEADR 0xc30
148 #define ES1370_REG_DAC1_FRAMECNT 0xc34
149 #define ES1370_REG_DAC2_FRAMEADR 0xc38
150 #define ES1370_REG_DAC2_FRAMECNT 0xc3c
151 #define ES1370_REG_ADC_FRAMEADR 0xd30
152 #define ES1370_REG_ADC_FRAMECNT 0xd34
153
154 #define ES1370_FMT_U8_MONO 0
155 #define ES1370_FMT_U8_STEREO 1
156 #define ES1370_FMT_S16_MONO 2
157 #define ES1370_FMT_S16_STEREO 3
158 #define ES1370_FMT_STEREO 1
159 #define ES1370_FMT_S16 2
160 #define ES1370_FMT_MASK 3
161
162 static const unsigned sample_size[] = { 1, 2, 2, 4 };
163 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
164
165 static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 };
166
167 #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2)
168 #define DAC2_DIVTOSR(x) (1411200/((x)+2))
169
170 #define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */
171 #define CTRL_XCTL1 0x40000000 /* ? mic impedance */
172 #define CTRL_OPEN 0x20000000 /* no function, can be read and written */
173 #define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */
174 #define CTRL_SH_PCLKDIV 16
175 #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
176 #define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */
177 #define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */
178 #define CTRL_SH_WTSRSEL 12
179 #define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */
180 #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
181 #define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */
182 #define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */
183 #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
184 #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
185 #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
186 #define CTRL_ADC_EN 0x00000010 /* enable ADC */
187 #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
188 #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */
189 #define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */
190 #define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */
191
192 #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
193 #define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */
194 #define STAT_CBUSY 0x00000200 /* 1 = codec busy */
195 #define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */
196 #define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
197 #define STAT_SH_VC 5
198 #define STAT_MCCB 0x00000010 /* CCB int pending */
199 #define STAT_UART 0x00000008 /* UART int pending */
200 #define STAT_DAC1 0x00000004 /* DAC1 int pending */
201 #define STAT_DAC2 0x00000002 /* DAC2 int pending */
202 #define STAT_ADC 0x00000001 /* ADC int pending */
203
204 #define USTAT_RXINT 0x80 /* UART rx int pending */
205 #define USTAT_TXINT 0x04 /* UART tx int pending */
206 #define USTAT_TXRDY 0x02 /* UART tx ready */
207 #define USTAT_RXRDY 0x01 /* UART rx ready */
208
209 #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
210 #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
211 #define UCTRL_ENA_TXINT 0x20 /* enable TX int */
212 #define UCTRL_CNTRL 0x03 /* control field */
213 #define UCTRL_CNTRL_SWR 0x03 /* software reset command */
214
215 #define SCTRL_P2ENDINC 0x00380000 /* */
216 #define SCTRL_SH_P2ENDINC 19
217 #define SCTRL_P2STINC 0x00070000 /* */
218 #define SCTRL_SH_P2STINC 16
219 #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
220 #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
221 #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
222 #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
223 #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
224 #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
225 #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
226 #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
227 #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
228 #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
229 #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
230 #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
231 #define SCTRL_R1FMT 0x00000030 /* format mask */
232 #define SCTRL_SH_R1FMT 4
233 #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
234 #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
235 #define SCTRL_P2FMT 0x0000000c /* format mask */
236 #define SCTRL_SH_P2FMT 2
237 #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
238 #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
239 #define SCTRL_P1FMT 0x00000003 /* format mask */
240 #define SCTRL_SH_P1FMT 0
241
242 /* misc stuff */
243
244 #define FMODE_DAC 4 /* slight misuse of mode_t */
245
246 /* MIDI buffer sizes */
247
248 #define MIDIINBUF 256
249 #define MIDIOUTBUF 256
250
251 #define FMODE_MIDI_SHIFT 3
252 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
253 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
254
255 #define SND_DEV_DSP16 5
256
257 /* --------------------------------------------------------------------- */
258
259 struct es1370_state {
260 /* magic */
261 unsigned int magic;
262
263 /* we keep sb cards in a linked list */
264 struct es1370_state *next;
265
266 /* soundcore stuff */
267 int dev_audio;
268 int dev_mixer;
269 int dev_dac;
270 int dev_midi;
271
272 /* hardware resources */
273 unsigned int io, irq;
274
275 /* mixer registers; there is no HW readback */
276 struct {
277 unsigned short vol[10];
278 unsigned int recsrc;
279 unsigned int modcnt;
280 unsigned short micpreamp;
281 } mix;
282
283 /* wave stuff */
284 unsigned ctrl;
285 unsigned sctrl;
286
287 spinlock_t lock;
288 struct semaphore open_sem;
289 mode_t open_mode;
290 struct wait_queue *open_wait;
291
292 struct dmabuf {
293 void *rawbuf;
294 unsigned buforder;
295 unsigned numfrag;
296 unsigned fragshift;
297 unsigned hwptr, swptr;
298 unsigned total_bytes;
299 int count;
300 unsigned error; /* over/underrun */
301 struct wait_queue *wait;
302 /* redundant, but makes calculations easier */
303 unsigned fragsize;
304 unsigned dmasize;
305 unsigned fragsamples;
306 /* OSS stuff */
307 unsigned mapped:1;
308 unsigned ready:1;
309 unsigned endcleared:1;
310 unsigned ossfragshift;
311 int ossmaxfrags;
312 unsigned subdivision;
313 } dma_dac1, dma_dac2, dma_adc;
314
315 /* midi stuff */
316 struct {
317 unsigned ird, iwr, icnt;
318 unsigned ord, owr, ocnt;
319 struct wait_queue *iwait;
320 struct wait_queue *owait;
321 unsigned char ibuf[MIDIINBUF];
322 unsigned char obuf[MIDIOUTBUF];
323 } midi;
324 };
325
326 /* --------------------------------------------------------------------- */
327
328 static struct es1370_state *devs = NULL;
329
330 /* --------------------------------------------------------------------- */
331
332 extern inline unsigned ld2(unsigned int x)
333 {
334 unsigned r = 0;
335
336 if (x >= 0x10000) {
337 x >>= 16;
338 r += 16;
339 }
340 if (x >= 0x100) {
341 x >>= 8;
342 r += 8;
343 }
344 if (x >= 0x10) {
345 x >>= 4;
346 r += 4;
347 }
348 if (x >= 4) {
349 x >>= 2;
350 r += 2;
351 }
352 if (x >= 2)
353 r++;
354 return r;
355 }
356
357 /* --------------------------------------------------------------------- */
358
359 static void wrcodec(struct es1370_state *s, unsigned char idx, unsigned char data)
360 {
361 unsigned long tmo = jiffies + HZ/10;
362
363 do {
364 if (!(inl(s->io+ES1370_REG_STATUS) & STAT_CSTAT)) {
365 outw((((unsigned short)idx)<<8)|data, s->io+ES1370_REG_CODEC);
366 return;
367 }
368 schedule();
369 } while ((signed)(tmo-jiffies) > 0);
370 printk(KERN_ERR "es1370: write to codec register timeout\n");
371 }
372
373 /* --------------------------------------------------------------------- */
374
375 extern inline void stop_adc(struct es1370_state *s)
376 {
377 unsigned long flags;
378
379 spin_lock_irqsave(&s->lock, flags);
380 s->ctrl &= ~CTRL_ADC_EN;
381 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
382 spin_unlock_irqrestore(&s->lock, flags);
383 }
384
385 extern inline void stop_dac1(struct es1370_state *s)
386 {
387 unsigned long flags;
388
389 spin_lock_irqsave(&s->lock, flags);
390 s->ctrl &= ~CTRL_DAC1_EN;
391 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
392 spin_unlock_irqrestore(&s->lock, flags);
393 }
394
395 extern inline void stop_dac2(struct es1370_state *s)
396 {
397 unsigned long flags;
398
399 spin_lock_irqsave(&s->lock, flags);
400 s->ctrl &= ~CTRL_DAC2_EN;
401 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
402 spin_unlock_irqrestore(&s->lock, flags);
403 }
404
405 static void start_dac1(struct es1370_state *s)
406 {
407 unsigned long flags;
408 unsigned fragremain, fshift;
409
410 spin_lock_irqsave(&s->lock, flags);
411 if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
412 && s->dma_dac1.ready) {
413 s->ctrl |= CTRL_DAC1_EN;
414 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
415 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
416 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
417 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
418 if (fragremain < 2*fshift)
419 fragremain = s->dma_dac1.fragsize;
420 outl((fragremain >> fshift) - 1, s->io+ES1370_REG_DAC1_SCOUNT);
421 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
422 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1370_REG_DAC1_SCOUNT);
423 }
424 spin_unlock_irqrestore(&s->lock, flags);
425 }
426
427 static void start_dac2(struct es1370_state *s)
428 {
429 unsigned long flags;
430 unsigned fragremain, fshift;
431
432 spin_lock_irqsave(&s->lock, flags);
433 if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
434 && s->dma_dac2.ready) {
435 s->ctrl |= CTRL_DAC2_EN;
436 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
437 SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
438 (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
439 (0 << SCTRL_SH_P2STINC);
440 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
441 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
442 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
443 if (fragremain < 2*fshift)
444 fragremain = s->dma_dac2.fragsize;
445 outl((fragremain >> fshift) - 1, s->io+ES1370_REG_DAC2_SCOUNT);
446 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
447 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1370_REG_DAC2_SCOUNT);
448 }
449 spin_unlock_irqrestore(&s->lock, flags);
450 }
451
452 static void start_adc(struct es1370_state *s)
453 {
454 unsigned long flags;
455 unsigned fragremain, fshift;
456
457 spin_lock_irqsave(&s->lock, flags);
458 if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < s->dma_adc.dmasize - 2*s->dma_adc.fragsize)
459 && s->dma_adc.ready) {
460 s->ctrl |= CTRL_ADC_EN;
461 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
462 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
463 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
464 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
465 if (fragremain < 2*fshift)
466 fragremain = s->dma_adc.fragsize;
467 outl((fragremain >> fshift) - 1, s->io+ES1370_REG_ADC_SCOUNT);
468 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
469 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1370_REG_ADC_SCOUNT);
470 }
471 spin_unlock_irqrestore(&s->lock, flags);
472 }
473
474 /* --------------------------------------------------------------------- */
475
476 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
477 #define DMABUF_MINORDER 1
478
479 extern inline void dealloc_dmabuf(struct dmabuf *db)
480 {
481 unsigned long map, mapend;
482
483 if (db->rawbuf) {
484 /* undo marking the pages as reserved */
485 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
486 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
487 clear_bit(PG_reserved, &mem_map[map].flags);
488 free_pages((unsigned long)db->rawbuf, db->buforder);
489 printk(KERN_DEBUG "es: freeing dmabuf %8.8lx order %d\n", (unsigned long)db->rawbuf, db->buforder);
490 }
491 db->rawbuf = NULL;
492 db->mapped = db->ready = 0;
493 }
494
495 static int prog_dmabuf(struct es1370_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
496 {
497 int order;
498 unsigned bytepersec;
499 unsigned bufs;
500 unsigned long map, mapend;
501
502 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
503 if (!db->rawbuf) {
504 db->ready = db->mapped = 0;
505 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER && !db->rawbuf; order--)
506 db->rawbuf = (void *)__get_free_pages(GFP_KERNEL, order);
507 if (!db->rawbuf)
508 return -ENOMEM;
509 db->buforder = order;
510 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
511 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
512 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
513 set_bit(PG_reserved, &mem_map[map].flags);
514 printk(KERN_DEBUG "es: allocating dmabuf %8.8lx order %d\n", (unsigned long)db->rawbuf, db->buforder);
515 }
516 fmt &= ES1370_FMT_MASK;
517 bytepersec = rate << sample_shift[fmt];
518 bufs = PAGE_SIZE << db->buforder;
519 if (db->ossfragshift) {
520 if ((1000 << db->ossfragshift) < bytepersec)
521 db->fragshift = ld2(bytepersec/1000);
522 else
523 db->fragshift = db->ossfragshift;
524 } else {
525 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
526 if (db->fragshift < 3)
527 db->fragshift = 3;
528 }
529 db->numfrag = bufs >> db->fragshift;
530 while (db->numfrag < 4 && db->fragshift > 3) {
531 db->fragshift--;
532 db->numfrag = bufs >> db->fragshift;
533 }
534 db->fragsize = 1 << db->fragshift;
535 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
536 db->numfrag = db->ossmaxfrags;
537 db->fragsamples = db->fragsize >> sample_shift[fmt];
538 db->dmasize = db->numfrag << db->fragshift;
539 memset(db->rawbuf, (fmt & ES1370_FMT_S16) ? 0 : 0x80, db->dmasize);
540 outl((reg >> 8) & 15, s->io+ES1370_REG_MEMPAGE);
541 outl(virt_to_bus(db->rawbuf), s->io+(reg & 0xff));
542 outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
543 db->ready = 1;
544 return 0;
545 }
546
547 extern inline int prog_dmabuf_adc(struct es1370_state *s)
548 {
549 stop_adc(s);
550 return prog_dmabuf(s, &s->dma_adc, DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
551 (s->sctrl >> SCTRL_SH_R1FMT) & ES1370_FMT_MASK, ES1370_REG_ADC_FRAMEADR);
552 }
553
554 extern inline int prog_dmabuf_dac2(struct es1370_state *s)
555 {
556 stop_dac2(s);
557 return prog_dmabuf(s, &s->dma_dac2, DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
558 (s->sctrl >> SCTRL_SH_P2FMT) & ES1370_FMT_MASK, ES1370_REG_DAC2_FRAMEADR);
559 }
560
561 extern inline int prog_dmabuf_dac1(struct es1370_state *s)
562 {
563 stop_dac1(s);
564 return prog_dmabuf(s, &s->dma_dac1, dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
565 (s->sctrl >> SCTRL_SH_P1FMT) & ES1370_FMT_MASK, ES1370_REG_DAC1_FRAMEADR);
566 }
567
568 extern inline unsigned get_hwptr(struct es1370_state *s, struct dmabuf *db, unsigned reg)
569 {
570 unsigned hwptr, diff;
571
572 outl((reg >> 8) & 15, s->io+ES1370_REG_MEMPAGE);
573 hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
574 diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
575 db->hwptr = hwptr;
576 return diff;
577 }
578
579 extern inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
580 {
581 if (bptr + len > bsize) {
582 unsigned x = bsize - bptr;
583 memset(((char *)buf) + bptr, c, x);
584 bptr = 0;
585 len -= x;
586 }
587 memset(((char *)buf) + bptr, c, len);
588 }
589
590 /* call with spinlock held! */
591 static void es1370_update_ptr(struct es1370_state *s)
592 {
593 int diff;
594
595 /* update ADC pointer */
596 if (s->ctrl & CTRL_ADC_EN) {
597 diff = get_hwptr(s, &s->dma_adc, ES1370_REG_ADC_FRAMECNT);
598 s->dma_adc.total_bytes += diff;
599 s->dma_adc.count += diff;
600 if (s->dma_adc.mapped) {
601 if (s->dma_adc.count >= s->dma_adc.fragsize)
602 wake_up(&s->dma_adc.wait);
603 } else {
604 if (s->dma_adc.count > s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1)) {
605 s->ctrl &= ~CTRL_ADC_EN;
606 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
607 s->dma_adc.error++;
608 }
609 if (s->dma_adc.count > 0)
610 wake_up(&s->dma_adc.wait);
611 }
612 }
613 /* update DAC1 pointer */
614 if (s->ctrl & CTRL_DAC1_EN) {
615 diff = get_hwptr(s, &s->dma_dac1, ES1370_REG_DAC1_FRAMECNT);
616 s->dma_dac1.total_bytes += diff;
617 if (s->dma_dac1.mapped) {
618 s->dma_dac1.count += diff;
619 if (s->dma_dac1.count >= s->dma_dac1.fragsize)
620 wake_up(&s->dma_dac1.wait);
621 } else {
622 s->dma_dac1.count -= diff;
623 if (s->dma_dac1.count <= 0) {
624 s->ctrl &= ~CTRL_DAC1_EN;
625 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
626 s->dma_dac1.error++;
627 } else if (s->dma_dac1.count <= s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
628 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
629 s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
630 s->dma_dac1.endcleared = 1;
631 }
632 if (s->dma_dac1.count < s->dma_dac1.dmasize)
633 wake_up(&s->dma_dac1.wait);
634 }
635 }
636 /* update DAC2 pointer */
637 if (s->ctrl & CTRL_DAC2_EN) {
638 diff = get_hwptr(s, &s->dma_dac2, ES1370_REG_DAC2_FRAMECNT);
639 s->dma_dac2.total_bytes += diff;
640 if (s->dma_dac2.mapped) {
641 s->dma_dac2.count += diff;
642 if (s->dma_dac2.count >= s->dma_dac2.fragsize)
643 wake_up(&s->dma_dac2.wait);
644 } else {
645 s->dma_dac2.count -= diff;
646 if (s->dma_dac2.count <= 0) {
647 s->ctrl &= ~CTRL_DAC2_EN;
648 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
649 s->dma_dac2.error++;
650 } else if (s->dma_dac2.count <= s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
651 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
652 s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
653 s->dma_dac2.endcleared = 1;
654 }
655 if (s->dma_dac2.count < s->dma_dac2.dmasize)
656 wake_up(&s->dma_dac2.wait);
657 }
658 }
659 }
660
661 /* hold spinlock for the following! */
662 static void es1370_handle_midi(struct es1370_state *s)
663 {
664 unsigned char ch;
665 int wake;
666
667 if (!(s->ctrl & CTRL_UART_EN))
668 return;
669 wake = 0;
670 while (inb(s->io+ES1370_REG_UART_STATUS) & USTAT_RXRDY) {
671 ch = inb(s->io+ES1370_REG_UART_DATA);
672 if (s->midi.icnt < MIDIINBUF) {
673 s->midi.ibuf[s->midi.iwr] = ch;
674 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
675 s->midi.icnt++;
676 }
677 wake = 1;
678 }
679 if (wake)
680 wake_up(&s->midi.iwait);
681 wake = 0;
682 while ((inb(s->io+ES1370_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
683 outb(s->midi.obuf[s->midi.ord], s->io+ES1370_REG_UART_DATA);
684 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
685 s->midi.ocnt--;
686 if (s->midi.ocnt < MIDIOUTBUF-16)
687 wake = 1;
688 }
689 if (wake)
690 wake_up(&s->midi.owait);
691 outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1370_REG_UART_CONTROL);
692 }
693
694 static void es1370_interrupt(int irq, void *dev_id, struct pt_regs *regs)
695 {
696 struct es1370_state *s = (struct es1370_state *)dev_id;
697 unsigned int intsrc, sctl;
698
699 /* fastpath out, to ease interrupt sharing */
700 intsrc = inl(s->io+ES1370_REG_STATUS);
701 if (!(intsrc & 0x80000000))
702 return;
703 spin_lock(&s->lock);
704 /* clear audio interrupts first */
705 sctl = s->sctrl;
706 if (intsrc & STAT_ADC)
707 sctl &= ~SCTRL_R1INTEN;
708 if (intsrc & STAT_DAC1)
709 sctl &= ~SCTRL_P1INTEN;
710 if (intsrc & STAT_DAC2)
711 sctl &= ~SCTRL_P2INTEN;
712 outl(sctl, s->io+ES1370_REG_SERIAL_CONTROL);
713 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
714 es1370_update_ptr(s);
715 es1370_handle_midi(s);
716 spin_unlock(&s->lock);
717 }
718
719 /* --------------------------------------------------------------------- */
720
721 static const char invalid_magic[] = KERN_CRIT "es1370: invalid magic value\n";
722
723 #define VALIDATE_STATE(s) \
724 ({ \
725 if (!(s) || (s)->magic != ES1370_MAGIC) { \
726 printk(invalid_magic); \
727 return -ENXIO; \
728 } \
729 })
730
731 /* --------------------------------------------------------------------- */
732
733 static const struct {
734 unsigned volidx:4;
735 unsigned left:4;
736 unsigned right:4;
737 unsigned stereo:1;
738 unsigned recmask:13;
739 unsigned avail:1;
740 } mixtable[SOUND_MIXER_NRDEVICES] = {
741 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, /* master */
742 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, /* voice */
743 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, /* FM */
744 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, /* CD */
745 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, /* Line */
746 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, /* AUX */
747 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, /* Mono1 */
748 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, /* Mono2 */
749 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, /* Mic */
750 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } /* mono out */
751 };
752
753 static int mixer_ioctl(struct es1370_state *s, unsigned int cmd, unsigned long arg)
754 {
755 unsigned long flags;
756 int i, val, j;
757 unsigned char l, r, rl, rr;
758
759 VALIDATE_STATE(s);
760
761 if (cmd == SOUND_MIXER_PRIVATE1) {
762 /* enable/disable/query mixer preamp */
763 get_user_ret(val, (int *)arg, -EFAULT);
764 if (val != -1) {
765 s->mix.micpreamp = !!val;
766 wrcodec(s, 0x19, s->mix.micpreamp);
767 }
768 return put_user(s->mix.micpreamp, (int *)arg);
769 }
770 if (cmd == SOUND_MIXER_PRIVATE2) {
771 /* enable/disable/query use of linein as second lineout */
772 get_user_ret(val, (int *)arg, -EFAULT);
773 if (val != -1) {
774 spin_lock_irqsave(&s->lock, flags);
775 if (val)
776 s->ctrl |= CTRL_XCTL0;
777 else
778 s->ctrl &= ~CTRL_XCTL0;
779 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
780 spin_unlock_irqrestore(&s->lock, flags);
781 }
782 return put_user((s->ctrl & CTRL_XCTL0) ? 1 : 0, (int *)arg);
783 }
784 if (cmd == SOUND_MIXER_PRIVATE3) {
785 /* enable/disable/query microphone impedance setting */
786 get_user_ret(val, (int *)arg, -EFAULT);
787 if (val != -1) {
788 spin_lock_irqsave(&s->lock, flags);
789 if (val)
790 s->ctrl |= CTRL_XCTL1;
791 else
792 s->ctrl &= ~CTRL_XCTL1;
793 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
794 spin_unlock_irqrestore(&s->lock, flags);
795 }
796 return put_user((s->ctrl & CTRL_XCTL1) ? 1 : 0, (int *)arg);
797 }
798 if (cmd == SOUND_MIXER_INFO) {
799 mixer_info info;
800 strncpy(info.id, "ES1370", sizeof(info.id));
801 strncpy(info.name, "Ensoniq ES1370", sizeof(info.name));
802 info.modify_counter = s->mix.modcnt;
803 if (copy_to_user((void *)arg, &info, sizeof(info)))
804 return -EFAULT;
805 return 0;
806 }
807 if (cmd == SOUND_OLD_MIXER_INFO) {
808 _old_mixer_info info;
809 strncpy(info.id, "ES1370", sizeof(info.id));
810 strncpy(info.name, "Ensoniq ES1370", sizeof(info.name));
811 if (copy_to_user((void *)arg, &info, sizeof(info)))
812 return -EFAULT;
813 return 0;
814 }
815 if (cmd == OSS_GETVERSION)
816 return put_user(SOUND_VERSION, (int *)arg);
817 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
818 return -EINVAL;
819 if (_IOC_DIR(cmd) == _IOC_READ) {
820 switch (_IOC_NR(cmd)) {
821 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
822 return put_user(s->mix.recsrc, (int *)arg);
823
824 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
825 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
826 if (mixtable[i].avail)
827 val |= 1 << i;
828 return put_user(val, (int *)arg);
829
830 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
831 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
832 if (mixtable[i].recmask)
833 val |= 1 << i;
834 return put_user(val, (int *)arg);
835
836 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
837 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
838 if (mixtable[i].stereo)
839 val |= 1 << i;
840 return put_user(val, (int *)arg);
841
842 case SOUND_MIXER_CAPS:
843 return put_user(0, (int *)arg);
844
845 default:
846 i = _IOC_NR(cmd);
847 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail)
848 return -EINVAL;
849 return put_user(s->mix.vol[mixtable[i].volidx], (int *)arg);
850 }
851 }
852 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
853 return -EINVAL;
854 s->mix.modcnt++;
855 switch (_IOC_NR(cmd)) {
856 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
857 get_user_ret(val, (int *)arg, -EFAULT);
858 for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
859 if (!(val & (1 << i)))
860 continue;
861 if (!mixtable[i].recmask) {
862 val &= ~(1 << i);
863 continue;
864 }
865 j |= mixtable[i].recmask;
866 }
867 s->mix.recsrc = val;
868 wrcodec(s, 0x12, j & 0xd5);
869 wrcodec(s, 0x13, j & 0xaa);
870 wrcodec(s, 0x14, (j >> 8) & 0x17);
871 wrcodec(s, 0x15, (j >> 8) & 0x0f);
872 i = (j & 0x37f) | ((j << 1) & 0x3000) | 0xc30;
873 wrcodec(s, 0x10, i);
874 wrcodec(s, 0x11, i >> 8);
875 return 0;
876
877 default:
878 i = _IOC_NR(cmd);
879 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail)
880 return -EINVAL;
881 get_user_ret(val, (int *)arg, -EFAULT);
882 l = val & 0xff;
883 if (l > 100)
884 l = 100;
885 if (mixtable[i].stereo) {
886 r = (val >> 8) & 0xff;
887 if (r > 100)
888 r = 100;
889 if (l < 10) {
890 rl = 0x80;
891 l = 0;
892 } else {
893 rl = 15 - ((l - 10) / 6);
894 l = (15 - rl) * 6 + 10;
895 }
896 if (r < 10) {
897 rr = 0x80;
898 r = 0;
899 } else {
900 rr = 15 - ((r - 10) / 6);
901 r = (15 - rr) * 6 + 10;
902 }
903 wrcodec(s, mixtable[i].right, rr);
904 } else {
905 if (mixtable[i].left == 15) {
906 if (l < 2) {
907 rr = rl = 0x80;
908 r = l = 0;
909 } else {
910 rl = 7 - ((l - 2) / 14);
911 r = l = (7 - rl) * 14 + 2;
912 }
913 } else {
914 if (l < 10) {
915 rl = 0x80;
916 r = l = 0;
917 } else {
918 rl = 15 - ((l - 10) / 6);
919 r = l = (15 - rl) * 6 + 10;
920 }
921 }
922 }
923 wrcodec(s, mixtable[i].left, rl);
924 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
925 s->mix.vol[mixtable[i].volidx] = ((unsigned int)r << 8) | l;
926 #else
927 s->mix.vol[mixtable[i].volidx] = val;
928 #endif
929 return put_user(s->mix.vol[mixtable[i].volidx], (int *)arg);
930 }
931 }
932
933 /* --------------------------------------------------------------------- */
934
935 static loff_t es1370_llseek(struct file *file, loff_t offset, int origin)
936 {
937 return -ESPIPE;
938 }
939
940 /* --------------------------------------------------------------------- */
941
942 static int es1370_open_mixdev(struct inode *inode, struct file *file)
943 {
944 int minor = MINOR(inode->i_rdev);
945 struct es1370_state *s = devs;
946
947 while (s && s->dev_mixer != minor)
948 s = s->next;
949 if (!s)
950 return -ENODEV;
951 VALIDATE_STATE(s);
952 file->private_data = s;
953 MOD_INC_USE_COUNT;
954 return 0;
955 }
956
957 static int es1370_release_mixdev(struct inode *inode, struct file *file)
958 {
959 struct es1370_state *s = (struct es1370_state *)file->private_data;
960
961 VALIDATE_STATE(s);
962 MOD_DEC_USE_COUNT;
963 return 0;
964 }
965
966 static int es1370_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
967 {
968 return mixer_ioctl((struct es1370_state *)file->private_data, cmd, arg);
969 }
970
971 static /*const*/ struct file_operations es1370_mixer_fops = {
972 &es1370_llseek,
973 NULL, /* read */
974 NULL, /* write */
975 NULL, /* readdir */
976 NULL, /* poll */
977 &es1370_ioctl_mixdev,
978 NULL, /* mmap */
979 &es1370_open_mixdev,
980 NULL, /* flush */
981 &es1370_release_mixdev,
982 NULL, /* fsync */
983 NULL, /* fasync */
984 NULL, /* check_media_change */
985 #if 0
986 NULL, /* revalidate */
987 NULL, /* lock */
988 #endif
989 };
990
991 /* --------------------------------------------------------------------- */
992
993 static int drain_dac1(struct es1370_state *s, int nonblock)
994 {
995 struct wait_queue wait = { current, NULL };
996 unsigned long flags;
997 int count, tmo;
998
999 if (s->dma_dac1.mapped)
1000 return 0;
1001 current->state = TASK_INTERRUPTIBLE;
1002 add_wait_queue(&s->dma_dac1.wait, &wait);
1003 for (;;) {
1004 spin_lock_irqsave(&s->lock, flags);
1005 count = s->dma_dac1.count;
1006 spin_unlock_irqrestore(&s->lock, flags);
1007 if (count <= 0)
1008 break;
1009 if (signal_pending(current))
1010 break;
1011 if (nonblock) {
1012 remove_wait_queue(&s->dma_dac1.wait, &wait);
1013 current->state = TASK_RUNNING;
1014 return -EBUSY;
1015 }
1016 tmo = (count * HZ) / dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
1017 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1018 current->timeout = jiffies + (tmo ? tmo : 1);
1019 schedule();
1020 if (tmo && !current->timeout)
1021 printk(KERN_DEBUG "es1370: dma timed out??\n");
1022 current->timeout = 0;
1023 }
1024 remove_wait_queue(&s->dma_dac1.wait, &wait);
1025 current->state = TASK_RUNNING;
1026 if (signal_pending(current))
1027 return -ERESTARTSYS;
1028 return 0;
1029 }
1030
1031 static int drain_dac2(struct es1370_state *s, int nonblock)
1032 {
1033 struct wait_queue wait = { current, NULL };
1034 unsigned long flags;
1035 int count, tmo;
1036
1037 if (s->dma_dac2.mapped)
1038 return 0;
1039 current->state = TASK_INTERRUPTIBLE;
1040 add_wait_queue(&s->dma_dac2.wait, &wait);
1041 for (;;) {
1042 spin_lock_irqsave(&s->lock, flags);
1043 count = s->dma_dac2.count;
1044 spin_unlock_irqrestore(&s->lock, flags);
1045 if (count <= 0)
1046 break;
1047 if (signal_pending(current))
1048 break;
1049 if (nonblock) {
1050 remove_wait_queue(&s->dma_dac2.wait, &wait);
1051 current->state = TASK_RUNNING;
1052 return -EBUSY;
1053 }
1054 tmo = (count * HZ) / DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV);
1055 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1056 current->timeout = jiffies + (tmo ? tmo : 1);
1057 schedule();
1058 if (tmo && !current->timeout)
1059 printk(KERN_DEBUG "es1370: dma timed out??\n");
1060 current->timeout = 0;
1061 }
1062 remove_wait_queue(&s->dma_dac2.wait, &wait);
1063 current->state = TASK_RUNNING;
1064 if (signal_pending(current))
1065 return -ERESTARTSYS;
1066 return 0;
1067 }
1068
1069 /* --------------------------------------------------------------------- */
1070
1071 static ssize_t es1370_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1072 {
1073 struct es1370_state *s = (struct es1370_state *)file->private_data;
1074 ssize_t ret;
1075 unsigned long flags;
1076 unsigned swptr;
1077 int cnt;
1078
1079 VALIDATE_STATE(s);
1080 if (ppos != &file->f_pos)
1081 return -ESPIPE;
1082 if (s->dma_adc.mapped)
1083 return -ENXIO;
1084 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1085 return ret;
1086 if (!access_ok(VERIFY_WRITE, buffer, count))
1087 return -EFAULT;
1088 ret = 0;
1089 while (count > 0) {
1090 spin_lock_irqsave(&s->lock, flags);
1091 swptr = s->dma_adc.swptr;
1092 cnt = s->dma_adc.dmasize-swptr;
1093 if (s->dma_adc.count < cnt)
1094 cnt = s->dma_adc.count;
1095 spin_unlock_irqrestore(&s->lock, flags);
1096 if (cnt > count)
1097 cnt = count;
1098 if (cnt <= 0) {
1099 start_adc(s);
1100 if (file->f_flags & O_NONBLOCK)
1101 return ret ? ret : -EBUSY;
1102 interruptible_sleep_on(&s->dma_adc.wait);
1103 if (signal_pending(current))
1104 return ret ? ret : -ERESTARTSYS;
1105 continue;
1106 }
1107 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1108 return ret ? ret : -EFAULT;
1109 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1110 spin_lock_irqsave(&s->lock, flags);
1111 s->dma_adc.swptr = swptr;
1112 s->dma_adc.count -= cnt;
1113 spin_unlock_irqrestore(&s->lock, flags);
1114 count -= cnt;
1115 buffer += cnt;
1116 ret += cnt;
1117 start_adc(s);
1118 }
1119 return ret;
1120 }
1121
1122 static ssize_t es1370_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1123 {
1124 struct es1370_state *s = (struct es1370_state *)file->private_data;
1125 ssize_t ret;
1126 unsigned long flags;
1127 unsigned swptr;
1128 int cnt;
1129
1130 VALIDATE_STATE(s);
1131 if (ppos != &file->f_pos)
1132 return -ESPIPE;
1133 if (s->dma_dac2.mapped)
1134 return -ENXIO;
1135 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1136 return ret;
1137 if (!access_ok(VERIFY_READ, buffer, count))
1138 return -EFAULT;
1139 ret = 0;
1140 while (count > 0) {
1141 spin_lock_irqsave(&s->lock, flags);
1142 if (s->dma_dac2.count < 0) {
1143 s->dma_dac2.count = 0;
1144 s->dma_dac2.swptr = s->dma_dac2.hwptr;
1145 }
1146 swptr = s->dma_dac2.swptr;
1147 cnt = s->dma_dac2.dmasize-swptr;
1148 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1149 cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1150 spin_unlock_irqrestore(&s->lock, flags);
1151 if (cnt > count)
1152 cnt = count;
1153 if (cnt <= 0) {
1154 start_dac2(s);
1155 if (file->f_flags & O_NONBLOCK)
1156 return ret ? ret : -EBUSY;
1157 interruptible_sleep_on(&s->dma_dac2.wait);
1158 if (signal_pending(current))
1159 return ret ? ret : -ERESTARTSYS;
1160 continue;
1161 }
1162 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt))
1163 return ret ? ret : -EFAULT;
1164 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1165 spin_lock_irqsave(&s->lock, flags);
1166 s->dma_dac2.swptr = swptr;
1167 s->dma_dac2.count += cnt;
1168 s->dma_dac2.endcleared = 0;
1169 spin_unlock_irqrestore(&s->lock, flags);
1170 count -= cnt;
1171 buffer += cnt;
1172 ret += cnt;
1173 start_dac2(s);
1174 }
1175 return ret;
1176 }
1177
1178 static unsigned int es1370_poll(struct file *file, struct poll_table_struct *wait)
1179 {
1180 struct es1370_state *s = (struct es1370_state *)file->private_data;
1181 unsigned long flags;
1182 unsigned int mask = 0;
1183
1184 VALIDATE_STATE(s);
1185 if (file->f_mode & FMODE_WRITE)
1186 poll_wait(file, &s->dma_dac2.wait, wait);
1187 if (file->f_mode & FMODE_READ)
1188 poll_wait(file, &s->dma_adc.wait, wait);
1189 spin_lock_irqsave(&s->lock, flags);
1190 es1370_update_ptr(s);
1191 if (file->f_mode & FMODE_READ) {
1192 if (s->dma_adc.mapped) {
1193 if (s->dma_adc.count >= s->dma_adc.fragsize)
1194 mask |= POLLIN | POLLRDNORM;
1195 } else {
1196 if (s->dma_adc.count > 0)
1197 mask |= POLLIN | POLLRDNORM;
1198 }
1199 }
1200 if (file->f_mode & FMODE_WRITE) {
1201 if (s->dma_dac2.mapped) {
1202 if (s->dma_dac2.count >= s->dma_dac2.fragsize)
1203 mask |= POLLOUT | POLLWRNORM;
1204 } else {
1205 if (s->dma_dac2.dmasize > s->dma_dac2.count)
1206 mask |= POLLOUT | POLLWRNORM;
1207 }
1208 }
1209 spin_unlock_irqrestore(&s->lock, flags);
1210 return mask;
1211 }
1212
1213 static int es1370_mmap(struct file *file, struct vm_area_struct *vma)
1214 {
1215 struct es1370_state *s = (struct es1370_state *)file->private_data;
1216 struct dmabuf *db;
1217 int ret;
1218 unsigned long size;
1219
1220 VALIDATE_STATE(s);
1221 if (vma->vm_flags & VM_WRITE) {
1222 if ((ret = prog_dmabuf_dac2(s)) != 0)
1223 return ret;
1224 db = &s->dma_dac2;
1225 } else if (vma->vm_flags & VM_READ) {
1226 if ((ret = prog_dmabuf_adc(s)) != 0)
1227 return ret;
1228 db = &s->dma_adc;
1229 } else
1230 return -EINVAL;
1231 if (vma->vm_offset != 0)
1232 return -EINVAL;
1233 size = vma->vm_end - vma->vm_start;
1234 if (size > (PAGE_SIZE << db->buforder))
1235 return -EINVAL;
1236 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1237 return -EAGAIN;
1238 db->mapped = 1;
1239 vma->vm_file = file;
1240 file->f_count++;
1241 return 0;
1242 }
1243
1244 static int es1370_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1245 {
1246 struct es1370_state *s = (struct es1370_state *)file->private_data;
1247 unsigned long flags;
1248 audio_buf_info abinfo;
1249 count_info cinfo;
1250 int val, mapped, ret;
1251
1252 VALIDATE_STATE(s);
1253 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1254 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1255 switch (cmd) {
1256 case OSS_GETVERSION:
1257 return put_user(SOUND_VERSION, (int *)arg);
1258
1259 case SNDCTL_DSP_SYNC:
1260 if (file->f_mode & FMODE_WRITE)
1261 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1262 return 0;
1263
1264 case SNDCTL_DSP_SETDUPLEX:
1265 return 0;
1266
1267 case SNDCTL_DSP_GETCAPS:
1268 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1269
1270 case SNDCTL_DSP_RESET:
1271 if (file->f_mode & FMODE_WRITE) {
1272 stop_dac2(s);
1273 synchronize_irq();
1274 s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1275 }
1276 if (file->f_mode & FMODE_READ) {
1277 stop_adc(s);
1278 synchronize_irq();
1279 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1280 }
1281 return 0;
1282
1283 case SNDCTL_DSP_SPEED:
1284 get_user_ret(val, (int *)arg, -EFAULT);
1285 if (val >= 0) {
1286 if (s->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
1287 return -EINVAL;
1288 if (val < 4000)
1289 val = 4000;
1290 if (val > 50000)
1291 val = 50000;
1292 stop_adc(s);
1293 stop_dac2(s);
1294 s->dma_adc.ready = s->dma_dac2.ready = 0;
1295 spin_lock_irqsave(&s->lock, flags);
1296 s->ctrl = (s->ctrl & ~CTRL_PCLKDIV) | (DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV);
1297 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
1298 spin_unlock_irqrestore(&s->lock, flags);
1299 }
1300 return put_user(DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), (int *)arg);
1301
1302 case SNDCTL_DSP_STEREO:
1303 get_user_ret(val, (int *)arg, -EFAULT);
1304 if (file->f_mode & FMODE_READ) {
1305 stop_adc(s);
1306 s->dma_adc.ready = 0;
1307 spin_lock_irqsave(&s->lock, flags);
1308 if (val)
1309 s->sctrl |= SCTRL_R1SMB;
1310 else
1311 s->sctrl &= ~SCTRL_R1SMB;
1312 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1313 spin_unlock_irqrestore(&s->lock, flags);
1314 }
1315 if (file->f_mode & FMODE_WRITE) {
1316 stop_dac2(s);
1317 s->dma_dac2.ready = 0;
1318 spin_lock_irqsave(&s->lock, flags);
1319 if (val)
1320 s->sctrl |= SCTRL_P2SMB;
1321 else
1322 s->sctrl &= ~SCTRL_P2SMB;
1323 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1324 spin_unlock_irqrestore(&s->lock, flags);
1325 }
1326 return 0;
1327
1328 case SNDCTL_DSP_CHANNELS:
1329 get_user_ret(val, (int *)arg, -EFAULT);
1330 if (val != 0) {
1331 if (file->f_mode & FMODE_READ) {
1332 stop_adc(s);
1333 s->dma_adc.ready = 0;
1334 spin_lock_irqsave(&s->lock, flags);
1335 if (val >= 2)
1336 s->sctrl |= SCTRL_R1SMB;
1337 else
1338 s->sctrl &= ~SCTRL_R1SMB;
1339 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1340 spin_unlock_irqrestore(&s->lock, flags);
1341 }
1342 if (file->f_mode & FMODE_WRITE) {
1343 stop_dac2(s);
1344 s->dma_dac2.ready = 0;
1345 spin_lock_irqsave(&s->lock, flags);
1346 if (val >= 2)
1347 s->sctrl |= SCTRL_P2SMB;
1348 else
1349 s->sctrl &= ~SCTRL_P2SMB;
1350 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1351 spin_unlock_irqrestore(&s->lock, flags);
1352 }
1353 }
1354 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1355
1356 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1357 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1358
1359 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1360 get_user_ret(val, (int *)arg, -EFAULT);
1361 if (val != AFMT_QUERY) {
1362 if (file->f_mode & FMODE_READ) {
1363 stop_adc(s);
1364 s->dma_adc.ready = 0;
1365 spin_lock_irqsave(&s->lock, flags);
1366 if (val == AFMT_S16_LE)
1367 s->sctrl |= SCTRL_R1SEB;
1368 else
1369 s->sctrl &= ~SCTRL_R1SEB;
1370 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1371 spin_unlock_irqrestore(&s->lock, flags);
1372 }
1373 if (file->f_mode & FMODE_WRITE) {
1374 stop_dac2(s);
1375 s->dma_dac2.ready = 0;
1376 spin_lock_irqsave(&s->lock, flags);
1377 if (val == AFMT_S16_LE)
1378 s->sctrl |= SCTRL_P2SEB;
1379 else
1380 s->sctrl &= ~SCTRL_P2SEB;
1381 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1382 spin_unlock_irqrestore(&s->lock, flags);
1383 }
1384 }
1385 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1386 AFMT_S16_LE : AFMT_U8, (int *)arg);
1387
1388 case SNDCTL_DSP_POST:
1389 return 0;
1390
1391 case SNDCTL_DSP_GETTRIGGER:
1392 val = 0;
1393 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1394 val |= PCM_ENABLE_INPUT;
1395 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1396 val |= PCM_ENABLE_OUTPUT;
1397 return put_user(val, (int *)arg);
1398
1399 case SNDCTL_DSP_SETTRIGGER:
1400 get_user_ret(val, (int *)arg, -EFAULT);
1401 if (file->f_mode & FMODE_READ) {
1402 if (val & PCM_ENABLE_INPUT) {
1403 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1404 return ret;
1405 start_adc(s);
1406 } else
1407 stop_adc(s);
1408 }
1409 if (file->f_mode & FMODE_WRITE) {
1410 if (val & PCM_ENABLE_OUTPUT) {
1411 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1412 return ret;
1413 start_dac2(s);
1414 } else
1415 stop_dac2(s);
1416 }
1417 return 0;
1418
1419 case SNDCTL_DSP_GETOSPACE:
1420 if (!(file->f_mode & FMODE_WRITE))
1421 return -EINVAL;
1422 if (!(s->ctrl & CTRL_DAC2_EN) && (val = prog_dmabuf_dac2(s)) != 0)
1423 return val;
1424 spin_lock_irqsave(&s->lock, flags);
1425 es1370_update_ptr(s);
1426 abinfo.fragsize = s->dma_dac2.fragsize;
1427 abinfo.bytes = s->dma_dac2.dmasize - s->dma_dac2.count;
1428 abinfo.fragstotal = s->dma_dac2.numfrag;
1429 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1430 spin_unlock_irqrestore(&s->lock, flags);
1431 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1432
1433 case SNDCTL_DSP_GETISPACE:
1434 if (!(file->f_mode & FMODE_READ))
1435 return -EINVAL;
1436 if (!(s->ctrl & CTRL_ADC_EN) && (val = prog_dmabuf_adc(s)) != 0)
1437 return val;
1438 spin_lock_irqsave(&s->lock, flags);
1439 es1370_update_ptr(s);
1440 abinfo.fragsize = s->dma_adc.fragsize;
1441 abinfo.bytes = s->dma_adc.count;
1442 abinfo.fragstotal = s->dma_adc.numfrag;
1443 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1444 spin_unlock_irqrestore(&s->lock, flags);
1445 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1446
1447 case SNDCTL_DSP_NONBLOCK:
1448 file->f_flags |= O_NONBLOCK;
1449 return 0;
1450
1451 case SNDCTL_DSP_GETODELAY:
1452 if (!(file->f_mode & FMODE_WRITE))
1453 return -EINVAL;
1454 spin_lock_irqsave(&s->lock, flags);
1455 es1370_update_ptr(s);
1456 val = s->dma_dac2.count;
1457 spin_unlock_irqrestore(&s->lock, flags);
1458 return put_user(val, (int *)arg);
1459
1460 case SNDCTL_DSP_GETIPTR:
1461 if (!(file->f_mode & FMODE_READ))
1462 return -EINVAL;
1463 spin_lock_irqsave(&s->lock, flags);
1464 es1370_update_ptr(s);
1465 cinfo.bytes = s->dma_adc.total_bytes;
1466 cinfo.blocks = s->dma_adc.total_bytes >> s->dma_adc.fragshift;
1467 cinfo.ptr = s->dma_adc.hwptr;
1468 if (s->dma_adc.mapped)
1469 s->dma_adc.count &= s->dma_adc.fragsize-1;
1470 spin_unlock_irqrestore(&s->lock, flags);
1471 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1472
1473 case SNDCTL_DSP_GETOPTR:
1474 if (!(file->f_mode & FMODE_WRITE))
1475 return -EINVAL;
1476 spin_lock_irqsave(&s->lock, flags);
1477 es1370_update_ptr(s);
1478 cinfo.bytes = s->dma_dac2.total_bytes;
1479 cinfo.blocks = s->dma_dac2.total_bytes >> s->dma_dac2.fragshift;
1480 cinfo.ptr = s->dma_dac2.hwptr;
1481 if (s->dma_dac2.mapped)
1482 s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1483 spin_unlock_irqrestore(&s->lock, flags);
1484 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1485
1486 case SNDCTL_DSP_GETBLKSIZE:
1487 if (file->f_mode & FMODE_WRITE) {
1488 if ((val = prog_dmabuf_dac2(s)))
1489 return val;
1490 return put_user(s->dma_dac2.fragsize, (int *)arg);
1491 }
1492 if ((val = prog_dmabuf_adc(s)))
1493 return val;
1494 return put_user(s->dma_adc.fragsize, (int *)arg);
1495
1496 case SNDCTL_DSP_SETFRAGMENT:
1497 get_user_ret(val, (int *)arg, -EFAULT);
1498 if (file->f_mode & FMODE_READ) {
1499 s->dma_adc.ossfragshift = val & 0xffff;
1500 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1501 if (s->dma_adc.ossfragshift < 4)
1502 s->dma_adc.ossfragshift = 4;
1503 if (s->dma_adc.ossfragshift > 15)
1504 s->dma_adc.ossfragshift = 15;
1505 if (s->dma_adc.ossmaxfrags < 4)
1506 s->dma_adc.ossmaxfrags = 4;
1507 }
1508 if (file->f_mode & FMODE_WRITE) {
1509 s->dma_dac2.ossfragshift = val & 0xffff;
1510 s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1511 if (s->dma_dac2.ossfragshift < 4)
1512 s->dma_dac2.ossfragshift = 4;
1513 if (s->dma_dac2.ossfragshift > 15)
1514 s->dma_dac2.ossfragshift = 15;
1515 if (s->dma_dac2.ossmaxfrags < 4)
1516 s->dma_dac2.ossmaxfrags = 4;
1517 }
1518 return 0;
1519
1520 case SNDCTL_DSP_SUBDIVIDE:
1521 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1522 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1523 return -EINVAL;
1524 get_user_ret(val, (int *)arg, -EFAULT);
1525 if (val != 1 && val != 2 && val != 4)
1526 return -EINVAL;
1527 if (file->f_mode & FMODE_READ)
1528 s->dma_adc.subdivision = val;
1529 if (file->f_mode & FMODE_WRITE)
1530 s->dma_dac2.subdivision = val;
1531 return 0;
1532
1533 case SOUND_PCM_WRITE_FILTER:
1534 case SNDCTL_DSP_SETSYNCRO:
1535 case SOUND_PCM_READ_RATE:
1536 case SOUND_PCM_READ_CHANNELS:
1537 case SOUND_PCM_READ_BITS:
1538 case SOUND_PCM_READ_FILTER:
1539 return -EINVAL;
1540
1541 }
1542 return mixer_ioctl(s, cmd, arg);
1543 }
1544
1545 static int es1370_open(struct inode *inode, struct file *file)
1546 {
1547 int minor = MINOR(inode->i_rdev);
1548 struct es1370_state *s = devs;
1549 unsigned long flags;
1550
1551 while (s && ((s->dev_audio ^ minor) & ~0xf))
1552 s = s->next;
1553 if (!s)
1554 return -ENODEV;
1555 VALIDATE_STATE(s);
1556 file->private_data = s;
1557 /* wait for device to become free */
1558 down(&s->open_sem);
1559 while (s->open_mode & file->f_mode) {
1560 if (file->f_flags & O_NONBLOCK) {
1561 up(&s->open_sem);
1562 return -EBUSY;
1563 }
1564 up(&s->open_sem);
1565 interruptible_sleep_on(&s->open_wait);
1566 if (signal_pending(current))
1567 return -ERESTARTSYS;
1568 down(&s->open_sem);
1569 }
1570 spin_lock_irqsave(&s->lock, flags);
1571 if (!(s->open_mode & (FMODE_READ|FMODE_WRITE)))
1572 s->ctrl = (s->ctrl & ~CTRL_PCLKDIV) | (DAC2_SRTODIV(8000) << CTRL_SH_PCLKDIV);
1573 if (file->f_mode & FMODE_READ) {
1574 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1575 s->sctrl &= ~SCTRL_R1FMT;
1576 if ((minor & 0xf) == SND_DEV_DSP16)
1577 s->sctrl |= ES1370_FMT_S16_MONO << SCTRL_SH_R1FMT;
1578 else
1579 s->sctrl |= ES1370_FMT_U8_MONO << SCTRL_SH_R1FMT;
1580 }
1581 if (file->f_mode & FMODE_WRITE) {
1582 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1583 s->sctrl &= ~SCTRL_P2FMT;
1584 if ((minor & 0xf) == SND_DEV_DSP16)
1585 s->sctrl |= ES1370_FMT_S16_MONO << SCTRL_SH_P2FMT;
1586 else
1587 s->sctrl |= ES1370_FMT_U8_MONO << SCTRL_SH_P2FMT;
1588 }
1589 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1590 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
1591 spin_unlock_irqrestore(&s->lock, flags);
1592 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1593 up(&s->open_sem);
1594 MOD_INC_USE_COUNT;
1595 return 0;
1596 }
1597
1598 static int es1370_release(struct inode *inode, struct file *file)
1599 {
1600 struct es1370_state *s = (struct es1370_state *)file->private_data;
1601
1602 VALIDATE_STATE(s);
1603 if (file->f_mode & FMODE_WRITE)
1604 drain_dac2(s, file->f_flags & O_NONBLOCK);
1605 down(&s->open_sem);
1606 if (file->f_mode & FMODE_WRITE) {
1607 stop_dac2(s);
1608 dealloc_dmabuf(&s->dma_dac2);
1609 }
1610 if (file->f_mode & FMODE_READ) {
1611 stop_adc(s);
1612 dealloc_dmabuf(&s->dma_adc);
1613 }
1614 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1615 up(&s->open_sem);
1616 wake_up(&s->open_wait);
1617 MOD_DEC_USE_COUNT;
1618 return 0;
1619 }
1620
1621 static /*const*/ struct file_operations es1370_audio_fops = {
1622 &es1370_llseek,
1623 &es1370_read,
1624 &es1370_write,
1625 NULL, /* readdir */
1626 &es1370_poll,
1627 &es1370_ioctl,
1628 &es1370_mmap,
1629 &es1370_open,
1630 NULL, /* flush */
1631 &es1370_release,
1632 NULL, /* fsync */
1633 NULL, /* fasync */
1634 NULL, /* check_media_change */
1635 NULL, /* revalidate */
1636 NULL, /* lock */
1637 };
1638
1639 /* --------------------------------------------------------------------- */
1640
1641 static ssize_t es1370_write_dac(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1642 {
1643 struct es1370_state *s = (struct es1370_state *)file->private_data;
1644 ssize_t ret = 0;
1645 unsigned long flags;
1646 unsigned swptr;
1647 int cnt;
1648
1649 VALIDATE_STATE(s);
1650 if (ppos != &file->f_pos)
1651 return -ESPIPE;
1652 if (s->dma_dac1.mapped)
1653 return -ENXIO;
1654 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
1655 return ret;
1656 if (!access_ok(VERIFY_READ, buffer, count))
1657 return -EFAULT;
1658 while (count > 0) {
1659 spin_lock_irqsave(&s->lock, flags);
1660 if (s->dma_dac1.count < 0) {
1661 s->dma_dac1.count = 0;
1662 s->dma_dac1.swptr = s->dma_dac1.hwptr;
1663 }
1664 swptr = s->dma_dac1.swptr;
1665 cnt = s->dma_dac1.dmasize-swptr;
1666 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
1667 cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
1668 spin_unlock_irqrestore(&s->lock, flags);
1669 if (cnt > count)
1670 cnt = count;
1671 if (cnt <= 0) {
1672 start_dac1(s);
1673 if (file->f_flags & O_NONBLOCK)
1674 return ret ? ret : -EBUSY;
1675 interruptible_sleep_on(&s->dma_dac1.wait);
1676 if (signal_pending(current))
1677 return ret ? ret : -ERESTARTSYS;
1678 continue;
1679 }
1680 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt))
1681 return ret ? ret : -EFAULT;
1682 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
1683 spin_lock_irqsave(&s->lock, flags);
1684 s->dma_dac1.swptr = swptr;
1685 s->dma_dac1.count += cnt;
1686 s->dma_dac1.endcleared = 0;
1687 spin_unlock_irqrestore(&s->lock, flags);
1688 count -= cnt;
1689 buffer += cnt;
1690 ret += cnt;
1691 start_dac1(s);
1692 }
1693 return ret;
1694 }
1695
1696 static unsigned int es1370_poll_dac(struct file *file, struct poll_table_struct *wait)
1697 {
1698 struct es1370_state *s = (struct es1370_state *)file->private_data;
1699 unsigned long flags;
1700 unsigned int mask = 0;
1701
1702 VALIDATE_STATE(s);
1703 poll_wait(file, &s->dma_dac1.wait, wait);
1704 spin_lock_irqsave(&s->lock, flags);
1705 es1370_update_ptr(s);
1706 if (s->dma_dac1.mapped) {
1707 if (s->dma_dac1.count >= s->dma_dac1.fragsize)
1708 mask |= POLLOUT | POLLWRNORM;
1709 } else {
1710 if (s->dma_dac1.dmasize > s->dma_dac1.count)
1711 mask |= POLLOUT | POLLWRNORM;
1712 }
1713 spin_unlock_irqrestore(&s->lock, flags);
1714 return mask;
1715 }
1716
1717 static int es1370_mmap_dac(struct file *file, struct vm_area_struct *vma)
1718 {
1719 struct es1370_state *s = (struct es1370_state *)file->private_data;
1720 int ret;
1721 unsigned long size;
1722
1723 VALIDATE_STATE(s);
1724 if (!(vma->vm_flags & VM_WRITE))
1725 return -EINVAL;
1726 if ((ret = prog_dmabuf_dac1(s)) != 0)
1727 return ret;
1728 if (vma->vm_offset != 0)
1729 return -EINVAL;
1730 size = vma->vm_end - vma->vm_start;
1731 if (size > (PAGE_SIZE << s->dma_dac1.buforder))
1732 return -EINVAL;
1733 if (remap_page_range(vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
1734 return -EAGAIN;
1735 s->dma_dac1.mapped = 1;
1736 vma->vm_file = file;
1737 file->f_count++;
1738 return 0;
1739 }
1740
1741 static int es1370_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1742 {
1743 struct es1370_state *s = (struct es1370_state *)file->private_data;
1744 unsigned long flags;
1745 audio_buf_info abinfo;
1746 count_info cinfo;
1747 unsigned ctrl;
1748 int val, ret;
1749
1750 VALIDATE_STATE(s);
1751 switch (cmd) {
1752 case OSS_GETVERSION:
1753 return put_user(SOUND_VERSION, (int *)arg);
1754
1755 case SNDCTL_DSP_SYNC:
1756 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
1757
1758 case SNDCTL_DSP_SETDUPLEX:
1759 return -EINVAL;
1760
1761 case SNDCTL_DSP_GETCAPS:
1762 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1763
1764 case SNDCTL_DSP_RESET:
1765 stop_dac1(s);
1766 synchronize_irq();
1767 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
1768 return 0;
1769
1770 case SNDCTL_DSP_SPEED:
1771 get_user_ret(val, (int *)arg, -EFAULT);
1772 if (val >= 0) {
1773 stop_dac1(s);
1774 s->dma_dac1.ready = 0;
1775 for (ctrl = 0; ctrl <= 2; ctrl++)
1776 if (val < (dac1_samplerate[ctrl] + dac1_samplerate[ctrl+1]) / 2)
1777 break;
1778 spin_lock_irqsave(&s->lock, flags);
1779 s->ctrl = (s->ctrl & ~CTRL_WTSRSEL) | (ctrl << CTRL_SH_WTSRSEL);
1780 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
1781 spin_unlock_irqrestore(&s->lock, flags);
1782 }
1783 return put_user(dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], (int *)arg);
1784
1785 case SNDCTL_DSP_STEREO:
1786 get_user_ret(val, (int *)arg, -EFAULT);
1787 stop_dac1(s);
1788 s->dma_dac1.ready = 0;
1789 spin_lock_irqsave(&s->lock, flags);
1790 if (val)
1791 s->sctrl |= SCTRL_P1SMB;
1792 else
1793 s->sctrl &= ~SCTRL_P1SMB;
1794 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1795 spin_unlock_irqrestore(&s->lock, flags);
1796 return 0;
1797
1798 case SNDCTL_DSP_CHANNELS:
1799 get_user_ret(val, (int *)arg, -EFAULT);
1800 if (val != 0) {
1801 if (s->dma_dac1.mapped)
1802 return -EINVAL;
1803 stop_dac1(s);
1804 s->dma_dac1.ready = 0;
1805 spin_lock_irqsave(&s->lock, flags);
1806 if (val >= 2)
1807 s->sctrl |= SCTRL_P1SMB;
1808 else
1809 s->sctrl &= ~SCTRL_P1SMB;
1810 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1811 spin_unlock_irqrestore(&s->lock, flags);
1812 }
1813 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
1814
1815 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1816 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1817
1818 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1819 get_user_ret(val, (int *)arg, -EFAULT);
1820 if (val != AFMT_QUERY) {
1821 stop_dac1(s);
1822 s->dma_dac1.ready = 0;
1823 spin_lock_irqsave(&s->lock, flags);
1824 if (val == AFMT_S16_LE)
1825 s->sctrl |= SCTRL_P1SEB;
1826 else
1827 s->sctrl &= ~SCTRL_P1SEB;
1828 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1829 spin_unlock_irqrestore(&s->lock, flags);
1830 }
1831 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1832
1833 case SNDCTL_DSP_POST:
1834 return 0;
1835
1836 case SNDCTL_DSP_GETTRIGGER:
1837 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, (int *)arg);
1838
1839 case SNDCTL_DSP_SETTRIGGER:
1840 get_user_ret(val, (int *)arg, -EFAULT);
1841 if (val & PCM_ENABLE_OUTPUT) {
1842 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
1843 return ret;
1844 start_dac1(s);
1845 } else
1846 stop_dac1(s);
1847 return 0;
1848
1849 case SNDCTL_DSP_GETOSPACE:
1850 if (!(s->ctrl & CTRL_DAC2_EN) && (val = prog_dmabuf_dac1(s)) != 0)
1851 return val;
1852 spin_lock_irqsave(&s->lock, flags);
1853 es1370_update_ptr(s);
1854 abinfo.fragsize = s->dma_dac1.fragsize;
1855 abinfo.bytes = s->dma_dac1.dmasize - s->dma_dac1.count;
1856 abinfo.fragstotal = s->dma_dac1.numfrag;
1857 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
1858 spin_unlock_irqrestore(&s->lock, flags);
1859 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1860
1861 case SNDCTL_DSP_NONBLOCK:
1862 file->f_flags |= O_NONBLOCK;
1863 return 0;
1864
1865 case SNDCTL_DSP_GETODELAY:
1866 spin_lock_irqsave(&s->lock, flags);
1867 es1370_update_ptr(s);
1868 val = s->dma_dac1.count;
1869 spin_unlock_irqrestore(&s->lock, flags);
1870 return put_user(val, (int *)arg);
1871
1872 case SNDCTL_DSP_GETOPTR:
1873 if (!(file->f_mode & FMODE_WRITE))
1874 return -EINVAL;
1875 spin_lock_irqsave(&s->lock, flags);
1876 es1370_update_ptr(s);
1877 cinfo.bytes = s->dma_dac1.total_bytes;
1878 cinfo.blocks = s->dma_dac1.total_bytes >> s->dma_dac1.fragshift;
1879 cinfo.ptr = s->dma_dac1.hwptr;
1880 if (s->dma_dac1.mapped)
1881 s->dma_dac1.count &= s->dma_dac1.fragsize-1;
1882 spin_unlock_irqrestore(&s->lock, flags);
1883 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1884
1885 case SNDCTL_DSP_GETBLKSIZE:
1886 if ((val = prog_dmabuf_dac1(s)))
1887 return val;
1888 return put_user(s->dma_dac1.fragsize, (int *)arg);
1889
1890 case SNDCTL_DSP_SETFRAGMENT:
1891 get_user_ret(val, (int *)arg, -EFAULT);
1892 s->dma_dac1.ossfragshift = val & 0xffff;
1893 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
1894 if (s->dma_dac1.ossfragshift < 4)
1895 s->dma_dac1.ossfragshift = 4;
1896 if (s->dma_dac1.ossfragshift > 15)
1897 s->dma_dac1.ossfragshift = 15;
1898 if (s->dma_dac1.ossmaxfrags < 4)
1899 s->dma_dac1.ossmaxfrags = 4;
1900 return 0;
1901
1902 case SNDCTL_DSP_SUBDIVIDE:
1903 if (s->dma_dac1.subdivision)
1904 return -EINVAL;
1905 get_user_ret(val, (int *)arg, -EFAULT);
1906 if (val != 1 && val != 2 && val != 4)
1907 return -EINVAL;
1908 s->dma_dac1.subdivision = val;
1909 return 0;
1910
1911 case SOUND_PCM_WRITE_FILTER:
1912 case SNDCTL_DSP_SETSYNCRO:
1913 case SOUND_PCM_READ_RATE:
1914 case SOUND_PCM_READ_CHANNELS:
1915 case SOUND_PCM_READ_BITS:
1916 case SOUND_PCM_READ_FILTER:
1917 return -EINVAL;
1918
1919 }
1920 return mixer_ioctl(s, cmd, arg);
1921 }
1922
1923 static int es1370_open_dac(struct inode *inode, struct file *file)
1924 {
1925 int minor = MINOR(inode->i_rdev);
1926 struct es1370_state *s = devs;
1927 unsigned long flags;
1928
1929 while (s && ((s->dev_dac ^ minor) & ~0xf))
1930 s = s->next;
1931 if (!s)
1932 return -ENODEV;
1933 VALIDATE_STATE(s);
1934 /* we allow opening with O_RDWR, most programs do it although they will only write */
1935 #if 0
1936 if (file->f_mode & FMODE_READ)
1937 return -EPERM;
1938 #endif
1939 if (!(file->f_mode & FMODE_WRITE))
1940 return -EINVAL;
1941 file->private_data = s;
1942 /* wait for device to become free */
1943 down(&s->open_sem);
1944 while (s->open_mode & FMODE_DAC) {
1945 if (file->f_flags & O_NONBLOCK) {
1946 up(&s->open_sem);
1947 return -EBUSY;
1948 }
1949 up(&s->open_sem);
1950 interruptible_sleep_on(&s->open_wait);
1951 if (signal_pending(current))
1952 return -ERESTARTSYS;
1953 down(&s->open_sem);
1954 }
1955 s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
1956 spin_lock_irqsave(&s->lock, flags);
1957 s->ctrl = (s->ctrl & ~CTRL_WTSRSEL) | (1 << CTRL_SH_WTSRSEL);
1958 s->sctrl &= ~SCTRL_P1FMT;
1959 if ((minor & 0xf) == SND_DEV_DSP16)
1960 s->sctrl |= ES1370_FMT_S16_MONO << SCTRL_SH_P1FMT;
1961 else
1962 s->sctrl |= ES1370_FMT_U8_MONO << SCTRL_SH_P1FMT;
1963 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
1964 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
1965 spin_unlock_irqrestore(&s->lock, flags);
1966 s->open_mode |= FMODE_DAC;
1967 up(&s->open_sem);
1968 MOD_INC_USE_COUNT;
1969 return 0;
1970 }
1971
1972 static int es1370_release_dac(struct inode *inode, struct file *file)
1973 {
1974 struct es1370_state *s = (struct es1370_state *)file->private_data;
1975
1976 VALIDATE_STATE(s);
1977 drain_dac1(s, file->f_flags & O_NONBLOCK);
1978 down(&s->open_sem);
1979 stop_dac1(s);
1980 dealloc_dmabuf(&s->dma_dac1);
1981 s->open_mode &= ~FMODE_DAC;
1982 up(&s->open_sem);
1983 wake_up(&s->open_wait);
1984 MOD_DEC_USE_COUNT;
1985 return 0;
1986 }
1987
1988 static /*const*/ struct file_operations es1370_dac_fops = {
1989 &es1370_llseek,
1990 NULL, /* read */
1991 &es1370_write_dac,
1992 NULL, /* readdir */
1993 &es1370_poll_dac,
1994 &es1370_ioctl_dac,
1995 &es1370_mmap_dac,
1996 &es1370_open_dac,
1997 NULL, /* flush */
1998 &es1370_release_dac,
1999 NULL, /* fsync */
2000 NULL, /* fasync */
2001 NULL, /* check_media_change */
2002 NULL, /* revalidate */
2003 NULL, /* lock */
2004 };
2005
2006 /* --------------------------------------------------------------------- */
2007
2008 static ssize_t es1370_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2009 {
2010 struct es1370_state *s = (struct es1370_state *)file->private_data;
2011 ssize_t ret;
2012 unsigned long flags;
2013 unsigned ptr;
2014 int cnt;
2015
2016 VALIDATE_STATE(s);
2017 if (ppos != &file->f_pos)
2018 return -ESPIPE;
2019 if (!access_ok(VERIFY_WRITE, buffer, count))
2020 return -EFAULT;
2021 ret = 0;
2022 while (count > 0) {
2023 spin_lock_irqsave(&s->lock, flags);
2024 ptr = s->midi.ird;
2025 cnt = MIDIINBUF - ptr;
2026 if (s->midi.icnt < cnt)
2027 cnt = s->midi.icnt;
2028 spin_unlock_irqrestore(&s->lock, flags);
2029 if (cnt > count)
2030 cnt = count;
2031 if (cnt <= 0) {
2032 if (file->f_flags & O_NONBLOCK)
2033 return ret ? ret : -EBUSY;
2034 interruptible_sleep_on(&s->midi.iwait);
2035 if (signal_pending(current))
2036 return ret ? ret : -ERESTARTSYS;
2037 continue;
2038 }
2039 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
2040 return ret ? ret : -EFAULT;
2041 ptr = (ptr + cnt) % MIDIINBUF;
2042 spin_lock_irqsave(&s->lock, flags);
2043 s->midi.ird = ptr;
2044 s->midi.icnt -= cnt;
2045 spin_unlock_irqrestore(&s->lock, flags);
2046 count -= cnt;
2047 buffer += cnt;
2048 ret += cnt;
2049 }
2050 return ret;
2051 }
2052
2053 static ssize_t es1370_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2054 {
2055 struct es1370_state *s = (struct es1370_state *)file->private_data;
2056 ssize_t ret;
2057 unsigned long flags;
2058 unsigned ptr;
2059 int cnt;
2060
2061 VALIDATE_STATE(s);
2062 if (ppos != &file->f_pos)
2063 return -ESPIPE;
2064 if (!access_ok(VERIFY_READ, buffer, count))
2065 return -EFAULT;
2066 ret = 0;
2067 while (count > 0) {
2068 spin_lock_irqsave(&s->lock, flags);
2069 ptr = s->midi.owr;
2070 cnt = MIDIOUTBUF - ptr;
2071 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2072 cnt = MIDIOUTBUF - s->midi.ocnt;
2073 if (cnt <= 0)
2074 es1370_handle_midi(s);
2075 spin_unlock_irqrestore(&s->lock, flags);
2076 if (cnt > count)
2077 cnt = count;
2078 if (cnt <= 0) {
2079 if (file->f_flags & O_NONBLOCK)
2080 return ret ? ret : -EBUSY;
2081 interruptible_sleep_on(&s->midi.owait);
2082 if (signal_pending(current))
2083 return ret ? ret : -ERESTARTSYS;
2084 continue;
2085 }
2086 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
2087 return ret ? ret : -EFAULT;
2088 ptr = (ptr + cnt) % MIDIOUTBUF;
2089 spin_lock_irqsave(&s->lock, flags);
2090 s->midi.owr = ptr;
2091 s->midi.ocnt += cnt;
2092 spin_unlock_irqrestore(&s->lock, flags);
2093 count -= cnt;
2094 buffer += cnt;
2095 ret += cnt;
2096 spin_lock_irqsave(&s->lock, flags);
2097 es1370_handle_midi(s);
2098 spin_unlock_irqrestore(&s->lock, flags);
2099 }
2100 return ret;
2101 }
2102
2103 static unsigned int es1370_midi_poll(struct file *file, struct poll_table_struct *wait)
2104 {
2105 struct es1370_state *s = (struct es1370_state *)file->private_data;
2106 unsigned long flags;
2107 unsigned int mask = 0;
2108
2109 VALIDATE_STATE(s);
2110 if (file->f_mode & FMODE_WRITE)
2111 poll_wait(file, &s->midi.owait, wait);
2112 if (file->f_mode & FMODE_READ)
2113 poll_wait(file, &s->midi.iwait, wait);
2114 spin_lock_irqsave(&s->lock, flags);
2115 if (file->f_mode & FMODE_READ) {
2116 if (s->midi.icnt > 0)
2117 mask |= POLLIN | POLLRDNORM;
2118 }
2119 if (file->f_mode & FMODE_WRITE) {
2120 if (s->midi.ocnt < MIDIOUTBUF)
2121 mask |= POLLOUT | POLLWRNORM;
2122 }
2123 spin_unlock_irqrestore(&s->lock, flags);
2124 return mask;
2125 }
2126
2127 static int es1370_midi_open(struct inode *inode, struct file *file)
2128 {
2129 int minor = MINOR(inode->i_rdev);
2130 struct es1370_state *s = devs;
2131 unsigned long flags;
2132
2133 while (s && s->dev_midi != minor)
2134 s = s->next;
2135 if (!s)
2136 return -ENODEV;
2137 VALIDATE_STATE(s);
2138 file->private_data = s;
2139 /* wait for device to become free */
2140 down(&s->open_sem);
2141 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2142 if (file->f_flags & O_NONBLOCK) {
2143 up(&s->open_sem);
2144 return -EBUSY;
2145 }
2146 up(&s->open_sem);
2147 interruptible_sleep_on(&s->open_wait);
2148 if (signal_pending(current))
2149 return -ERESTARTSYS;
2150 down(&s->open_sem);
2151 }
2152 spin_lock_irqsave(&s->lock, flags);
2153 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2154 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2155 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2156 outb(UCTRL_CNTRL_SWR, s->io+ES1370_REG_UART_CONTROL);
2157 outb(0, s->io+ES1370_REG_UART_CONTROL);
2158 outb(0, s->io+ES1370_REG_UART_TEST);
2159 }
2160 if (file->f_mode & FMODE_READ) {
2161 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2162 }
2163 if (file->f_mode & FMODE_WRITE) {
2164 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2165 }
2166 s->ctrl |= CTRL_UART_EN;
2167 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
2168 es1370_handle_midi(s);
2169 spin_unlock_irqrestore(&s->lock, flags);
2170 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2171 up(&s->open_sem);
2172 MOD_INC_USE_COUNT;
2173 return 0;
2174 }
2175
2176 static int es1370_midi_release(struct inode *inode, struct file *file)
2177 {
2178 struct es1370_state *s = (struct es1370_state *)file->private_data;
2179 struct wait_queue wait = { current, NULL };
2180 unsigned long flags;
2181 unsigned count, tmo;
2182
2183 VALIDATE_STATE(s);
2184
2185 if (file->f_mode & FMODE_WRITE) {
2186 current->state = TASK_INTERRUPTIBLE;
2187 add_wait_queue(&s->midi.owait, &wait);
2188 for (;;) {
2189 spin_lock_irqsave(&s->lock, flags);
2190 count = s->midi.ocnt;
2191 spin_unlock_irqrestore(&s->lock, flags);
2192 if (count <= 0)
2193 break;
2194 if (signal_pending(current))
2195 break;
2196 if (file->f_flags & O_NONBLOCK) {
2197 remove_wait_queue(&s->midi.owait, &wait);
2198 current->state = TASK_RUNNING;
2199 return -EBUSY;
2200 }
2201 tmo = (count * HZ) / 3100;
2202 current->timeout = tmo ? jiffies + tmo : 0;
2203 schedule();
2204 if (tmo && !current->timeout)
2205 printk(KERN_DEBUG "es1370: midi timed out??\n");
2206 current->timeout = 0;
2207 }
2208 remove_wait_queue(&s->midi.owait, &wait);
2209 current->state = TASK_RUNNING;
2210 }
2211 down(&s->open_sem);
2212 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2213 spin_lock_irqsave(&s->lock, flags);
2214 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2215 s->ctrl &= ~CTRL_UART_EN;
2216 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
2217 }
2218 spin_unlock_irqrestore(&s->lock, flags);
2219 up(&s->open_sem);
2220 wake_up(&s->open_wait);
2221 MOD_DEC_USE_COUNT;
2222 return 0;
2223 }
2224
2225 static /*const*/ struct file_operations es1370_midi_fops = {
2226 &es1370_llseek,
2227 &es1370_midi_read,
2228 &es1370_midi_write,
2229 NULL, /* readdir */
2230 &es1370_midi_poll,
2231 NULL, /* ioctl */
2232 NULL, /* mmap */
2233 &es1370_midi_open,
2234 NULL, /* flush */
2235 &es1370_midi_release,
2236 NULL, /* fsync */
2237 NULL, /* fasync */
2238 NULL, /* check_media_change */
2239 NULL, /* revalidate */
2240 NULL, /* lock */
2241 };
2242
2243 /* --------------------------------------------------------------------- */
2244
2245 /* maximum number of devices */
2246 #define NR_DEVICE 5
2247
2248 static int joystick[NR_DEVICE] = { 0, };
2249 static int lineout[NR_DEVICE] = { 0, };
2250 static int micz[NR_DEVICE] = { 0, };
2251
2252 /* --------------------------------------------------------------------- */
2253
2254 static const struct initvol {
2255 int mixch;
2256 int vol;
2257 } initvol[] __initdata = {
2258 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2259 { SOUND_MIXER_WRITE_PCM, 0x4040 },
2260 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2261 { SOUND_MIXER_WRITE_CD, 0x4040 },
2262 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2263 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2264 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2265 { SOUND_MIXER_WRITE_LINE3, 0x4040 },
2266 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2267 { SOUND_MIXER_WRITE_OGAIN, 0x4040 }
2268 };
2269
2270 #ifdef MODULE
2271 __initfunc(int init_module(void))
2272 #else
2273 __initfunc(int init_es1370(void))
2274 #endif
2275 {
2276 struct es1370_state *s;
2277 struct pci_dev *pcidev = NULL;
2278 mm_segment_t fs;
2279 int i, val, index = 0;
2280
2281 if (!pci_present()) /* No PCI bus in this machine! */
2282 return -ENODEV;
2283 printk(KERN_INFO "es1370: version v0.10 time " __TIME__ " " __DATE__ "\n");
2284 while (index < NR_DEVICE &&
2285 (pcidev = pci_find_device(PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1370, pcidev))) {
2286 if (pcidev->base_address[0] == 0 ||
2287 (pcidev->base_address[0] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2288 continue;
2289 if (pcidev->irq == 0)
2290 continue;
2291 if (!(s = kmalloc(sizeof(struct es1370_state), GFP_KERNEL))) {
2292 printk(KERN_WARNING "es1370: out of memory\n");
2293 continue;
2294 }
2295 memset(s, 0, sizeof(struct es1370_state));
2296 init_waitqueue(&s->dma_adc.wait);
2297 init_waitqueue(&s->dma_dac1.wait);
2298 init_waitqueue(&s->dma_dac2.wait);
2299 init_waitqueue(&s->open_wait);
2300 init_waitqueue(&s->midi.iwait);
2301 init_waitqueue(&s->midi.owait);
2302 s->open_sem = MUTEX;
2303 s->magic = ES1370_MAGIC;
2304 s->io = pcidev->base_address[0] & PCI_BASE_ADDRESS_IO_MASK;
2305 s->irq = pcidev->irq;
2306 if (check_region(s->io, ES1370_EXTENT)) {
2307 printk(KERN_ERR "es1370: io ports %#x-%#x in use\n", s->io, s->io+ES1370_EXTENT-1);
2308 goto err_region;
2309 }
2310 request_region(s->io, ES1370_EXTENT, "es1370");
2311 if (request_irq(s->irq, es1370_interrupt, SA_INTERRUPT|SA_SHIRQ, "es1370", s)) {
2312 printk(KERN_ERR "es1370: irq %u in use\n", s->irq);
2313 goto err_irq;
2314 }
2315 /* initialize codec registers */
2316 s->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | (DAC2_SRTODIV(8000) << CTRL_SH_PCLKDIV) | (1 << CTRL_SH_WTSRSEL);
2317 if (joystick[index]) {
2318 if (check_region(0x200, JOY_EXTENT))
2319 printk(KERN_ERR "es1370: io port 0x200 in use\n");
2320 else
2321 s->ctrl |= CTRL_JYSTK_EN;
2322 }
2323 if (lineout[index])
2324 s->ctrl |= CTRL_XCTL0;
2325 if (micz[index])
2326 s->ctrl |= CTRL_XCTL1;
2327 s->sctrl = 0;
2328 printk(KERN_INFO "es1370: found adapter at io %#06x irq %u\n"
2329 KERN_INFO "es1370: features: joystick %s, line %s, mic impedance %s\n",
2330 s->io, s->irq, (s->ctrl & CTRL_JYSTK_EN) ? "on" : "off",
2331 (s->ctrl & CTRL_XCTL0) ? "out" : "in",
2332 (s->ctrl & CTRL_XCTL1) ? "1" : "0");
2333 /* register devices */
2334 if ((s->dev_audio = register_sound_dsp(&es1370_audio_fops)) < 0)
2335 goto err_dev1;
2336 if ((s->dev_mixer = register_sound_mixer(&es1370_mixer_fops)) < 0)
2337 goto err_dev2;
2338 if ((s->dev_dac = register_sound_dsp(&es1370_dac_fops)) < 0)
2339 goto err_dev3;
2340 if ((s->dev_midi = register_sound_midi(&es1370_midi_fops)) < 0)
2341 goto err_dev4;
2342 if (s->ctrl & CTRL_JYSTK_EN)
2343 request_region(0x200, JOY_EXTENT, "es1370");
2344 /* initialize the chips */
2345 outl(s->ctrl, s->io+ES1370_REG_CONTROL);
2346 outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
2347 wrcodec(s, 0x16, 3); /* no RST, PD */
2348 wrcodec(s, 0x17, 0); /* CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL; program DAC_SYNC=0!! */
2349 wrcodec(s, 0x18, 0); /* recording source is mixer */
2350 wrcodec(s, 0x19, s->mix.micpreamp = 1); /* turn on MIC preamp */
2351 fs = get_fs();
2352 set_fs(KERNEL_DS);
2353 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH|SOUND_MASK_CD;
2354 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2355 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2356 val = initvol[i].vol;
2357 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2358 }
2359 set_fs(fs);
2360 /* queue it for later freeing */
2361 s->next = devs;
2362 devs = s;
2363 index++;
2364 continue;
2365
2366 err_dev4:
2367 unregister_sound_dsp(s->dev_dac);
2368 err_dev3:
2369 unregister_sound_mixer(s->dev_mixer);
2370 err_dev2:
2371 unregister_sound_dsp(s->dev_audio);
2372 err_dev1:
2373 printk(KERN_ERR "es1370: cannot register misc device\n");
2374 free_irq(s->irq, s);
2375 err_irq:
2376 release_region(s->io, ES1370_EXTENT);
2377 err_region:
2378 kfree_s(s, sizeof(struct es1370_state));
2379 }
2380 if (!devs)
2381 return -ENODEV;
2382 return 0;
2383 }
2384
2385 /* --------------------------------------------------------------------- */
2386
2387 #ifdef MODULE
2388
2389 MODULE_PARM(joystick, "1-" __MODULE_STRING(NR_DEVICE) "i");
2390 MODULE_PARM_DESC(joystick, "if 1 enables joystick interface (still need separate driver)");
2391 MODULE_PARM(lineout, "1-" __MODULE_STRING(NR_DEVICE) "i");
2392 MODULE_PARM_DESC(lineout, "if 1 the LINE input is converted to LINE out");
2393 MODULE_PARM(micz, "1-" __MODULE_STRING(NR_DEVICE) "i");
2394 MODULE_PARM_DESC(micz, "changes (??) the microphone impedance");
2395
2396 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2397 MODULE_DESCRIPTION("ES1370 AudioPCI Driver");
2398
2399 void cleanup_module(void)
2400 {
2401 struct es1370_state *s;
2402
2403 while ((s = devs)) {
2404 devs = devs->next;
2405 outl(CTRL_SERR_DIS | (1 << CTRL_SH_WTSRSEL), s->io+ES1370_REG_CONTROL); /* switch everything off */
2406 outl(0, s->io+ES1370_REG_SERIAL_CONTROL); /* clear serial interrupts */
2407 synchronize_irq();
2408 free_irq(s->irq, s);
2409 release_region(s->io, ES1370_EXTENT);
2410 if (s->ctrl & CTRL_JYSTK_EN)
2411 release_region(0x200, JOY_EXTENT);
2412 unregister_sound_dsp(s->dev_audio);
2413 unregister_sound_mixer(s->dev_mixer);
2414 unregister_sound_dsp(s->dev_dac);
2415 unregister_sound_midi(s->dev_midi);
2416 kfree_s(s, sizeof(struct es1370_state));
2417 }
2418 printk(KERN_INFO "es1370: unloading\n");
2419 }
2420
2421 #endif /* MODULE */
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