include/asm-mips/asmmacro.h

   1 /*
   2  * asmmacro.h: Assembler macros to make things easier to read.
   3  *
   4  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
   5  * Copyright (C) 1998 Ralf Baechle
   6  *
   7  * $Id: asmmacro.h,v 1.2 1998/05/01 01:35:44 ralf Exp $
   8  */
   9 #ifndef __MIPS_ASMMACRO_H
  10 #define __MIPS_ASMMACRO_H
  11
  12 #include <asm/offset.h>
  13
  14 #define FPU_SAVE_16EVEN(thread, tmp) \
  15         cfc1    tmp,  fcr31;                    \
  16         sdc1    $f2,  (THREAD_FPU + 0x010)(thread); \
  17         sdc1    $f4,  (THREAD_FPU + 0x020)(thread); \
  18         sdc1    $f6,  (THREAD_FPU + 0x030)(thread); \
  19         sdc1    $f8,  (THREAD_FPU + 0x040)(thread); \
  20         sdc1    $f10, (THREAD_FPU + 0x050)(thread); \
  21         sdc1    $f12, (THREAD_FPU + 0x060)(thread); \
  22         sdc1    $f14, (THREAD_FPU + 0x070)(thread); \
  23         sdc1    $f16, (THREAD_FPU + 0x080)(thread); \
  24         sdc1    $f18, (THREAD_FPU + 0x090)(thread); \
  25         sdc1    $f20, (THREAD_FPU + 0x0a0)(thread); \
  26         sdc1    $f22, (THREAD_FPU + 0x0b0)(thread); \
  27         sdc1    $f24, (THREAD_FPU + 0x0c0)(thread); \
  28         sdc1    $f26, (THREAD_FPU + 0x0d0)(thread); \
  29         sdc1    $f28, (THREAD_FPU + 0x0e0)(thread); \
  30         sdc1    $f30, (THREAD_FPU + 0x0f0)(thread); \
  31         sw      tmp,  (THREAD_FPU + 0x100)(thread)
  32
  33 #define FPU_SAVE_16ODD(thread) \
  34         sdc1    $f1,  (THREAD_FPU + 0x08)(thread); \
  35         sdc1    $f3,  (THREAD_FPU + 0x18)(thread); \
  36         sdc1    $f5,  (THREAD_FPU + 0x28)(thread); \
  37         sdc1    $f7,  (THREAD_FPU + 0x38)(thread); \
  38         sdc1    $f9,  (THREAD_FPU + 0x48)(thread); \
  39         sdc1    $f11, (THREAD_FPU + 0x58)(thread); \
  40         sdc1    $f13, (THREAD_FPU + 0x68)(thread); \
  41         sdc1    $f15, (THREAD_FPU + 0x78)(thread); \
  42         sdc1    $f17, (THREAD_FPU + 0x88)(thread); \
  43         sdc1    $f19, (THREAD_FPU + 0x98)(thread); \
  44         sdc1    $f21, (THREAD_FPU + 0xa8)(thread); \
  45         sdc1    $f23, (THREAD_FPU + 0xb8)(thread); \
  46         sdc1    $f25, (THREAD_FPU + 0xc8)(thread); \
  47         sdc1    $f27, (THREAD_FPU + 0xd8)(thread); \
  48         sdc1    $f29, (THREAD_FPU + 0xe8)(thread); \
  49         sdc1    $f31, (THREAD_FPU + 0xf8)(thread)
  50
  51 #define FPU_SAVE(thread,tmp)                        \
  52         cfc1    tmp,  fcr31;                        \
  53         swc1    $f0,  (THREAD_FPU + 0x000)(thread); \
  54         swc1    $f1,  (THREAD_FPU + 0x008)(thread); \
  55         swc1    $f2,  (THREAD_FPU + 0x010)(thread); \
  56         swc1    $f3,  (THREAD_FPU + 0x018)(thread); \
  57         swc1    $f4,  (THREAD_FPU + 0x020)(thread); \
  58         swc1    $f5,  (THREAD_FPU + 0x028)(thread); \
  59         swc1    $f6,  (THREAD_FPU + 0x030)(thread); \
  60         swc1    $f7,  (THREAD_FPU + 0x038)(thread); \
  61         swc1    $f8,  (THREAD_FPU + 0x040)(thread); \
  62         swc1    $f9,  (THREAD_FPU + 0x048)(thread); \
  63         swc1    $f10, (THREAD_FPU + 0x050)(thread); \
  64         swc1    $f11, (THREAD_FPU + 0x058)(thread); \
  65         swc1    $f12, (THREAD_FPU + 0x060)(thread); \
  66         swc1    $f13, (THREAD_FPU + 0x068)(thread); \
  67         swc1    $f14, (THREAD_FPU + 0x070)(thread); \
  68         swc1    $f15, (THREAD_FPU + 0x078)(thread); \
  69         swc1    $f16, (THREAD_FPU + 0x080)(thread); \
  70         swc1    $f17, (THREAD_FPU + 0x088)(thread); \
  71         swc1    $f18, (THREAD_FPU + 0x090)(thread); \
  72         swc1    $f19, (THREAD_FPU + 0x098)(thread); \
  73         swc1    $f20, (THREAD_FPU + 0x0a0)(thread); \
  74         swc1    $f21, (THREAD_FPU + 0x0a8)(thread); \
  75         swc1    $f22, (THREAD_FPU + 0x0b0)(thread); \
  76         swc1    $f23, (THREAD_FPU + 0x0b8)(thread); \
  77         swc1    $f24, (THREAD_FPU + 0x0c0)(thread); \
  78         swc1    $f25, (THREAD_FPU + 0x0c8)(thread); \
  79         swc1    $f26, (THREAD_FPU + 0x0d0)(thread); \
  80         swc1    $f27, (THREAD_FPU + 0x0d8)(thread); \
  81         swc1    $f28, (THREAD_FPU + 0x0e0)(thread); \
  82         swc1    $f29, (THREAD_FPU + 0x0e8)(thread); \
  83         swc1    $f30, (THREAD_FPU + 0x0f0)(thread); \
  84         swc1    $f31, (THREAD_FPU + 0x0f8)(thread); \
  85         sw      tmp,  (THREAD_FPU + 0x100)(thread)
  86
  87 #define FPU_RESTORE_16EVEN(thread, tmp) \
  88         lw      tmp,  (THREAD_FPU + 0x100)(thread); \
  89         ldc1    $f2,  (THREAD_FPU + 0x010)(thread); \
  90         ldc1    $f4,  (THREAD_FPU + 0x020)(thread); \
  91         ldc1    $f6,  (THREAD_FPU + 0x030)(thread); \
  92         ldc1    $f8,  (THREAD_FPU + 0x040)(thread); \
  93         ldc1    $f10, (THREAD_FPU + 0x050)(thread); \
  94         ldc1    $f12, (THREAD_FPU + 0x060)(thread); \
  95         ldc1    $f14, (THREAD_FPU + 0x070)(thread); \
  96         ldc1    $f16, (THREAD_FPU + 0x080)(thread); \
  97         ldc1    $f18, (THREAD_FPU + 0x090)(thread); \
  98         ldc1    $f20, (THREAD_FPU + 0x0a0)(thread); \
  99         ldc1    $f22, (THREAD_FPU + 0x0b0)(thread); \
 100         ldc1    $f24, (THREAD_FPU + 0x0c0)(thread); \
 101         ldc1    $f26, (THREAD_FPU + 0x0d0)(thread); \
 102         ldc1    $f28, (THREAD_FPU + 0x0e0)(thread); \
 103         ldc1    $f30, (THREAD_FPU + 0x0f0)(thread); \
 104         ctc1    tmp,  fcr31
 105
 106 #define FPU_RESTORE_16ODD(thread)  \
 107         ldc1    $f1,  (THREAD_FPU + 0x08)(thread); \
 108         ldc1    $f3,  (THREAD_FPU + 0x18)(thread); \
 109         ldc1    $f5,  (THREAD_FPU + 0x28)(thread); \
 110         ldc1    $f7,  (THREAD_FPU + 0x38)(thread); \
 111         ldc1    $f9,  (THREAD_FPU + 0x48)(thread); \
 112         ldc1    $f11, (THREAD_FPU + 0x58)(thread); \
 113         ldc1    $f13, (THREAD_FPU + 0x68)(thread); \
 114         ldc1    $f15, (THREAD_FPU + 0x78)(thread); \
 115         ldc1    $f17, (THREAD_FPU + 0x88)(thread); \
 116         ldc1    $f19, (THREAD_FPU + 0x98)(thread); \
 117         ldc1    $f21, (THREAD_FPU + 0xa8)(thread); \
 118         ldc1    $f23, (THREAD_FPU + 0xb8)(thread); \
 119         ldc1    $f25, (THREAD_FPU + 0xc8)(thread); \
 120         ldc1    $f27, (THREAD_FPU + 0xd8)(thread); \
 121         ldc1    $f29, (THREAD_FPU + 0xe8)(thread); \
 122         ldc1    $f31, (THREAD_FPU + 0xf8)(thread)
 123
 124 #define FPU_RESTORE(thread,tmp)                     \
 125         lw      tmp,  (THREAD_FPU + 0x100)(thread); \
 126         lwc1    $f0,  (THREAD_FPU + 0x000)(thread); \
 127         lwc1    $f1,  (THREAD_FPU + 0x008)(thread); \
 128         lwc1    $f2,  (THREAD_FPU + 0x010)(thread); \
 129         lwc1    $f3,  (THREAD_FPU + 0x018)(thread); \
 130         lwc1    $f4,  (THREAD_FPU + 0x020)(thread); \
 131         lwc1    $f5,  (THREAD_FPU + 0x028)(thread); \
 132         lwc1    $f6,  (THREAD_FPU + 0x030)(thread); \
 133         lwc1    $f7,  (THREAD_FPU + 0x038)(thread); \
 134         lwc1    $f8,  (THREAD_FPU + 0x040)(thread); \
 135         lwc1    $f9,  (THREAD_FPU + 0x048)(thread); \
 136         lwc1    $f10, (THREAD_FPU + 0x050)(thread); \
 137         lwc1    $f11, (THREAD_FPU + 0x058)(thread); \
 138         lwc1    $f12, (THREAD_FPU + 0x060)(thread); \
 139         lwc1    $f13, (THREAD_FPU + 0x068)(thread); \
 140         lwc1    $f14, (THREAD_FPU + 0x070)(thread); \
 141         lwc1    $f15, (THREAD_FPU + 0x078)(thread); \
 142         lwc1    $f16, (THREAD_FPU + 0x080)(thread); \
 143         lwc1    $f17, (THREAD_FPU + 0x088)(thread); \
 144         lwc1    $f18, (THREAD_FPU + 0x090)(thread); \
 145         lwc1    $f19, (THREAD_FPU + 0x098)(thread); \
 146         lwc1    $f20, (THREAD_FPU + 0x0a0)(thread); \
 147         lwc1    $f21, (THREAD_FPU + 0x0a8)(thread); \
 148         lwc1    $f22, (THREAD_FPU + 0x0b0)(thread); \
 149         lwc1    $f23, (THREAD_FPU + 0x0b8)(thread); \
 150         lwc1    $f24, (THREAD_FPU + 0x0c0)(thread); \
 151         lwc1    $f25, (THREAD_FPU + 0x0c8)(thread); \
 152         lwc1    $f26, (THREAD_FPU + 0x0d0)(thread); \
 153         lwc1    $f27, (THREAD_FPU + 0x0d8)(thread); \
 154         lwc1    $f28, (THREAD_FPU + 0x0e0)(thread); \
 155         lwc1    $f29, (THREAD_FPU + 0x0e8)(thread); \
 156         lwc1    $f30, (THREAD_FPU + 0x0f0)(thread); \
 157         lwc1    $f31, (THREAD_FPU + 0x0f8)(thread); \
 158         ctc1    tmp,  fcr31
 159
 160 #define CPU_SAVE_NONSCRATCH(thread) \
 161         sw      s0, THREAD_REG16(thread); \
 162         sw      s1, THREAD_REG17(thread); \
 163         sw      s2, THREAD_REG18(thread); \
 164         sw      s3, THREAD_REG19(thread); \
 165         sw      s4, THREAD_REG20(thread); \
 166         sw      s5, THREAD_REG21(thread); \
 167         sw      s6, THREAD_REG22(thread); \
 168         sw      s7, THREAD_REG23(thread); \
 169         sw      sp, THREAD_REG29(thread); \
 170         sw      fp, THREAD_REG30(thread)
 171
 172 #define CPU_RESTORE_NONSCRATCH(thread) \
 173         lw      s0, THREAD_REG16(thread); \
 174         lw      s1, THREAD_REG17(thread); \
 175         lw      s2, THREAD_REG18(thread); \
 176         lw      s3, THREAD_REG19(thread); \
 177         lw      s4, THREAD_REG20(thread); \
 178         lw      s5, THREAD_REG21(thread); \
 179         lw      s6, THREAD_REG22(thread); \
 180         lw      s7, THREAD_REG23(thread); \
 181         lw      sp, THREAD_REG29(thread); \
 182         lw      fp, THREAD_REG30(thread); \
 183         lw      ra, THREAD_REG31(thread)
 184
 185 #endif /* !(__MIPS_ASMMACRO_H) */