arch/i386/math-emu/fpu_arith.c

   1 /*---------------------------------------------------------------------------+
   2  |  fpu_arith.c                                                              |
   3  |                                                                           |
   4  | Code to implement the FPU register/register arithmetic instructions       |
   5  |                                                                           |
   6  | Copyright (C) 1992,1993,1997                                              |
   7  |                  W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
   8  |                  E-mail   billm@suburbia.net                              |
   9  |                                                                           |
  10  |                                                                           |
  11  +---------------------------------------------------------------------------*/
  12
  13 #include "fpu_system.h"
  14 #include "fpu_emu.h"
  15 #include "control_w.h"
  16 #include "status_w.h"
  17
  18
  19 void fadd__()
  20 {
  21   /* fadd st,st(i) */
  22   int i = FPU_rm;
  23   clear_C1();
  24   FPU_add(&st(i), FPU_gettagi(i), 0, control_word);
  25 }
  26
  27
  28 void fmul__()
  29 {
  30   /* fmul st,st(i) */
  31   int i = FPU_rm;
  32   clear_C1();
  33   FPU_mul(&st(i), FPU_gettagi(i), 0, control_word);
  34 }
  35
  36
  37
  38 void fsub__()
  39 {
  40   /* fsub st,st(i) */
  41   clear_C1();
  42   FPU_sub(0, FPU_rm, control_word);
  43 }
  44
  45
  46 void fsubr_()
  47 {
  48   /* fsubr st,st(i) */
  49   clear_C1();
  50   FPU_sub(REV, FPU_rm, control_word);
  51 }
  52
  53
  54 void fdiv__()
  55 {
  56   /* fdiv st,st(i) */
  57   clear_C1();
  58   FPU_div(0, FPU_rm, control_word);
  59 }
  60
  61
  62 void fdivr_()
  63 {
  64   /* fdivr st,st(i) */
  65   clear_C1();
  66   FPU_div(REV, FPU_rm, control_word);
  67 }
  68
  69
  70
  71 void fadd_i()
  72 {
  73   /* fadd st(i),st */
  74   int i = FPU_rm;
  75   clear_C1();
  76   FPU_add(&st(i), FPU_gettagi(i), i, control_word);
  77 }
  78
  79
  80 void fmul_i()
  81 {
  82   /* fmul st(i),st */
  83   clear_C1();
  84   FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word);
  85 }
  86
  87
  88 void fsubri()
  89 {
  90   /* fsubr st(i),st */
  91   clear_C1();
  92   FPU_sub(DEST_RM, FPU_rm, control_word);
  93 }
  94
  95
  96 void fsub_i()
  97 {
  98   /* fsub st(i),st */
  99   clear_C1();
 100   FPU_sub(REV|DEST_RM, FPU_rm, control_word);
 101 }
 102
 103
 104 void fdivri()
 105 {
 106   /* fdivr st(i),st */
 107   clear_C1();
 108   FPU_div(DEST_RM, FPU_rm, control_word);
 109 }
 110
 111
 112 void fdiv_i()
 113 {
 114   /* fdiv st(i),st */
 115   clear_C1();
 116   FPU_div(REV|DEST_RM, FPU_rm, control_word);
 117 }
 118
 119
 120
 121 void faddp_()
 122 {
 123   /* faddp st(i),st */
 124   int i = FPU_rm;
 125   clear_C1();
 126   if ( FPU_add(&st(i), FPU_gettagi(i), i, control_word) >= 0 )
 127     FPU_pop();
 128 }
 129
 130
 131 void fmulp_()
 132 {
 133   /* fmulp st(i),st */
 134   clear_C1();
 135   if ( FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word) >= 0 )
 136     FPU_pop();
 137 }
 138
 139
 140
 141 void fsubrp()
 142 {
 143   /* fsubrp st(i),st */
 144   clear_C1();
 145   if ( FPU_sub(DEST_RM, FPU_rm, control_word) >= 0 )
 146     FPU_pop();
 147 }
 148
 149
 150 void fsubp_()
 151 {
 152   /* fsubp st(i),st */
 153   clear_C1();
 154   if ( FPU_sub(REV|DEST_RM, FPU_rm, control_word) >= 0 )
 155     FPU_pop();
 156 }
 157
 158
 159 void fdivrp()
 160 {
 161   /* fdivrp st(i),st */
 162   clear_C1();
 163   if ( FPU_div(DEST_RM, FPU_rm, control_word) >= 0 )
 164     FPU_pop();
 165 }
 166
 167
 168 void fdivp_()
 169 {
 170   /* fdivp st(i),st */
 171   clear_C1();
 172   if ( FPU_div(REV|DEST_RM, FPU_rm, control_word) >= 0 )
 173     FPU_pop();
 174 }