2 * arch/alpha/kernel/traps.c
4 * (C) Copyright 1994 Linus Torvalds
8 * This file initializes the trap entry points
11 #include <linux/config.h>
13 #include <linux/sched.h>
14 #include <linux/tty.h>
15 #include <linux/delay.h>
16 #include <linux/smp_lock.h>
18 #include <asm/gentrap.h>
19 #include <asm/uaccess.h>
20 #include <asm/unaligned.h>
21 #include <asm/sysinfo.h>
26 dik_show_regs(struct pt_regs
*regs
, unsigned long *r9_15
)
28 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
29 regs
->pc
, regs
->r26
, regs
->ps
);
30 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
31 regs
->r0
, regs
->r1
, regs
->r2
);
32 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
33 regs
->r3
, regs
->r4
, regs
->r5
);
34 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
35 regs
->r6
, regs
->r7
, regs
->r8
);
38 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
39 r9_15
[9], r9_15
[10], r9_15
[11]);
40 printk("r12= %016lx r13= %016lx r14= %016lx\n",
41 r9_15
[12], r9_15
[13], r9_15
[14]);
42 printk("r15= %016lx\n", r9_15
[15]);
45 printk("r16= %016lx r17= %016lx r18= %016lx\n",
46 regs
->r16
, regs
->r17
, regs
->r18
);
47 printk("r19= %016lx r20= %016lx r21= %016lx\n",
48 regs
->r19
, regs
->r20
, regs
->r21
);
49 printk("r22= %016lx r23= %016lx r24= %016lx\n",
50 regs
->r22
, regs
->r23
, regs
->r24
);
51 printk("r25= %016lx r27= %016lx r28= %016lx\n",
52 regs
->r25
, regs
->r27
, regs
->r28
);
53 printk("gp = %016lx sp = %p\n", regs
->gp
, regs
+1);
57 dik_show_code(unsigned int *pc
)
62 for (i
= -3; i
< 6; i
++) {
64 if (__get_user(insn
, pc
+i
))
66 printk("%c%08x%c",i
?' ':'<',insn
,i
?' ':'>');
72 dik_show_trace(unsigned long *sp
)
76 while (0x1ff8 & (unsigned long) sp
) {
77 extern unsigned long _stext
, _etext
;
78 unsigned long tmp
= *sp
;
80 if (tmp
< (unsigned long) &_stext
)
82 if (tmp
>= (unsigned long) &_etext
)
84 printk(" [<%lx>]", tmp
);
94 die_if_kernel(char * str
, struct pt_regs
*regs
, long err
, unsigned long *r9_15
)
99 printk("CPU %d ", hard_smp_processor_id());
101 printk("%s(%d): %s %ld\n", current
->comm
, current
->pid
, str
, err
);
102 dik_show_regs(regs
, r9_15
);
103 dik_show_code((unsigned int *)regs
->pc
);
104 dik_show_trace((unsigned long *)(regs
+1));
106 if (current
->thread
.flags
& (1UL << 63)) {
107 printk("die_if_kernel recursion detected.\n");
111 current
->thread
.flags
|= (1UL << 63);
115 #ifndef CONFIG_MATHEMU
116 static long dummy_emul() { return 0; }
117 long (*alpha_fp_emul_imprecise
)(struct pt_regs
*regs
, unsigned long writemask
)
118 = (void *)dummy_emul
;
119 long (*alpha_fp_emul
) (unsigned long pc
)
120 = (void *)dummy_emul
;
122 long alpha_fp_emul_imprecise(struct pt_regs
*regs
, unsigned long writemask
);
123 long alpha_fp_emul (unsigned long pc
);
127 do_entArith(unsigned long summary
, unsigned long write_mask
,
128 unsigned long a2
, unsigned long a3
, unsigned long a4
,
129 unsigned long a5
, struct pt_regs regs
)
132 /* Software-completion summary bit is set, so try to
133 emulate the instruction. */
134 if (!amask(AMASK_PRECISE_TRAP
)) {
135 /* 21264 (except pass 1) has precise exceptions. */
136 if (alpha_fp_emul(regs
.pc
- 4))
139 if (alpha_fp_emul_imprecise(®s
, write_mask
))
145 printk("%s: arithmetic trap at %016lx: %02lx %016lx\n",
146 current
->comm
, regs
.pc
, summary
, write_mask
);
148 die_if_kernel("Arithmetic fault", ®s
, 0, 0);
149 send_sig(SIGFPE
, current
, 1);
153 do_entIF(unsigned long type
, unsigned long a1
,
154 unsigned long a2
, unsigned long a3
, unsigned long a4
,
155 unsigned long a5
, struct pt_regs regs
)
157 die_if_kernel((type
== 1 ? "Kernel Bug" : "Instruction fault"),
161 case 0: /* breakpoint */
162 if (ptrace_cancel_bpt(current
)) {
163 regs
.pc
-= 4; /* make pc point to former bpt */
165 send_sig(SIGTRAP
, current
, 1);
168 case 1: /* bugcheck */
169 send_sig(SIGTRAP
, current
, 1);
172 case 2: /* gentrap */
174 * The exception code should be passed on to the signal
175 * handler as the second argument. Linux doesn't do that
176 * yet (also notice that Linux *always* behaves like
177 * DEC Unix with SA_SIGINFO off; see DEC Unix man page
180 switch ((long) regs
.r16
) {
181 case GEN_INTOVF
: case GEN_INTDIV
: case GEN_FLTOVF
:
182 case GEN_FLTDIV
: case GEN_FLTUND
: case GEN_FLTINV
:
183 case GEN_FLTINE
: case GEN_ROPRAND
:
184 send_sig(SIGFPE
, current
, 1);
204 send_sig(SIGTRAP
, current
, 1);
209 case 3: /* FEN fault */
210 send_sig(SIGILL
, current
, 1);
214 if (implver() == IMPLVER_EV4
) {
215 /* EV4 does not implement anything except normal
216 rounding. Everything else will come here as
217 an illegal instruction. Emulate them. */
218 if (alpha_fp_emul(regs
.pc
- 4))
221 send_sig(SIGILL
, current
, 1);
225 panic("do_entIF: unexpected instruction-fault type");
229 /* There is an ifdef in the PALcode in MILO that enables a
230 "kernel debugging entry point" as an unprivilaged call_pal.
232 We don't want to have anything to do with it, but unfortunately
233 several versions of MILO included in distributions have it enabled,
234 and if we don't put something on the entry point we'll oops. */
237 do_entDbg(unsigned long type
, unsigned long a1
,
238 unsigned long a2
, unsigned long a3
, unsigned long a4
,
239 unsigned long a5
, struct pt_regs regs
)
241 die_if_kernel("Instruction fault", ®s
, type
, 0);
242 force_sig(SIGILL
, current
);
247 * entUna has a different register layout to be reasonably simple. It
248 * needs access to all the integer registers (the kernel doesn't use
249 * fp-regs), and it needs to have them in order for simpler access.
251 * Due to the non-standard register layout (and because we don't want
252 * to handle floating-point regs), user-mode unaligned accesses are
253 * handled separately by do_entUnaUser below.
255 * Oh, btw, we don't handle the "gp" register correctly, but if we fault
256 * on a gp-register unaligned load/store, something is _very_ wrong
257 * in the kernel anyway..
260 unsigned long regs
[32];
261 unsigned long ps
, pc
, gp
, a0
, a1
, a2
;
264 struct unaligned_stat
{
265 unsigned long count
, va
, pc
;
269 /* Macro for exception fixup code to access integer registers. */
270 #define una_reg(r) (regs.regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
274 do_entUna(void * va
, unsigned long opcode
, unsigned long reg
,
275 unsigned long a3
, unsigned long a4
, unsigned long a5
,
278 long error
, tmp1
, tmp2
, tmp3
, tmp4
;
279 unsigned long pc
= regs
.pc
- 4;
282 unaligned
[0].count
++;
283 unaligned
[0].va
= (unsigned long) va
;
284 unaligned
[0].pc
= pc
;
286 /* We don't want to use the generic get/put unaligned macros as
287 we want to trap exceptions. Only if we actually get an
288 exception will we decide whether we should have caught it. */
291 case 0x0c: /* ldwu */
292 __asm__
__volatile__(
293 "1: ldq_u %1,0(%3)\n"
294 "2: ldq_u %2,1(%3)\n"
298 ".section __ex_table,\"a\"\n"
300 " lda %1,3b-1b(%0)\n"
302 " lda %2,3b-2b(%0)\n"
304 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
308 una_reg(reg
) = tmp1
|tmp2
;
312 __asm__
__volatile__(
313 "1: ldq_u %1,0(%3)\n"
314 "2: ldq_u %2,3(%3)\n"
318 ".section __ex_table,\"a\"\n"
320 " lda %1,3b-1b(%0)\n"
322 " lda %2,3b-2b(%0)\n"
324 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
328 una_reg(reg
) = (int)(tmp1
|tmp2
);
332 __asm__
__volatile__(
333 "1: ldq_u %1,0(%3)\n"
334 "2: ldq_u %2,7(%3)\n"
338 ".section __ex_table,\"a\"\n"
340 " lda %1,3b-1b(%0)\n"
342 " lda %2,3b-2b(%0)\n"
344 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
348 una_reg(reg
) = tmp1
|tmp2
;
351 /* Note that the store sequences do not indicate that they change
352 memory because it _should_ be affecting nothing in this context.
353 (Otherwise we have other, much larger, problems.) */
355 __asm__
__volatile__(
356 "1: ldq_u %2,1(%5)\n"
357 "2: ldq_u %1,0(%5)\n"
364 "3: stq_u %2,1(%5)\n"
365 "4: stq_u %1,0(%5)\n"
367 ".section __ex_table,\"a\"\n"
369 " lda %2,5b-1b(%0)\n"
371 " lda %1,5b-2b(%0)\n"
373 " lda $31,5b-3b(%0)\n"
375 " lda $31,5b-4b(%0)\n"
377 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
378 "=&r"(tmp3
), "=&r"(tmp4
)
379 : "r"(va
), "r"(una_reg(reg
)), "0"(0));
385 __asm__
__volatile__(
386 "1: ldq_u %2,3(%5)\n"
387 "2: ldq_u %1,0(%5)\n"
394 "3: stq_u %2,3(%5)\n"
395 "4: stq_u %1,0(%5)\n"
397 ".section __ex_table,\"a\"\n"
399 " lda %2,5b-1b(%0)\n"
401 " lda %1,5b-2b(%0)\n"
403 " lda $31,5b-3b(%0)\n"
405 " lda $31,5b-4b(%0)\n"
407 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
408 "=&r"(tmp3
), "=&r"(tmp4
)
409 : "r"(va
), "r"(una_reg(reg
)), "0"(0));
415 __asm__
__volatile__(
416 "1: ldq_u %2,7(%5)\n"
417 "2: ldq_u %1,0(%5)\n"
424 "3: stq_u %2,7(%5)\n"
425 "4: stq_u %1,0(%5)\n"
427 ".section __ex_table,\"a\"\n\t"
429 " lda %2,5b-1b(%0)\n"
431 " lda %1,5b-2b(%0)\n"
433 " lda $31,5b-3b(%0)\n"
435 " lda $31,5b-4b(%0)\n"
437 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
438 "=&r"(tmp3
), "=&r"(tmp4
)
439 : "r"(va
), "r"(una_reg(reg
)), "0"(0));
446 printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n",
447 pc
, va
, opcode
, reg
);
451 /* Ok, we caught the exception, but we don't want it. Is there
452 someone to pass it along to? */
453 if ((fixup
= search_exception_table(pc
)) != 0) {
455 newpc
= fixup_exception(una_reg
, fixup
, pc
);
457 printk("Forwarding unaligned exception at %lx (%lx)\n",
465 * Yikes! No one to forward the exception to.
466 * Since the registers are in a weird format, dump them ourselves.
470 printk("%s(%d): unhandled unaligned exception\n",
471 current
->comm
, current
->pid
);
473 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n",
474 pc
, una_reg(26), regs
.ps
);
475 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n",
476 una_reg(0), una_reg(1), una_reg(2));
477 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n",
478 una_reg(3), una_reg(4), una_reg(5));
479 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n",
480 una_reg(6), una_reg(7), una_reg(8));
481 printk("r9 = %016lx r10= %016lx r11= %016lx\n",
482 una_reg(9), una_reg(10), una_reg(11));
483 printk("r12= %016lx r13= %016lx r14= %016lx\n",
484 una_reg(12), una_reg(13), una_reg(14));
485 printk("r15= %016lx\n", una_reg(15));
486 printk("r16= %016lx r17= %016lx r18= %016lx\n",
487 una_reg(16), una_reg(17), una_reg(18));
488 printk("r19= %016lx r20= %016lx r21= %016lx\n",
489 una_reg(19), una_reg(20), una_reg(21));
490 printk("r22= %016lx r23= %016lx r24= %016lx\n",
491 una_reg(22), una_reg(23), una_reg(24));
492 printk("r25= %016lx r27= %016lx r28= %016lx\n",
493 una_reg(25), una_reg(27), una_reg(28));
494 printk("gp = %016lx sp = %p\n", regs
.gp
, ®s
+1);
496 dik_show_code((unsigned int *)pc
);
497 dik_show_trace((unsigned long *)(®s
+1));
499 if (current
->thread
.flags
& (1UL << 63)) {
500 printk("die_if_kernel recursion detected.\n");
504 current
->thread
.flags
|= (1UL << 63);
509 * Convert an s-floating point value in memory format to the
510 * corresponding value in register format. The exponent
511 * needs to be remapped to preserve non-finite values
512 * (infinities, not-a-numbers, denormals).
514 static inline unsigned long
515 s_mem_to_reg (unsigned long s_mem
)
517 unsigned long frac
= (s_mem
>> 0) & 0x7fffff;
518 unsigned long sign
= (s_mem
>> 31) & 0x1;
519 unsigned long exp_msb
= (s_mem
>> 30) & 0x1;
520 unsigned long exp_low
= (s_mem
>> 23) & 0x7f;
523 exp
= (exp_msb
<< 10) | exp_low
; /* common case */
525 if (exp_low
== 0x7f) {
529 if (exp_low
== 0x00) {
535 return (sign
<< 63) | (exp
<< 52) | (frac
<< 29);
539 * Convert an s-floating point value in register format to the
540 * corresponding value in memory format.
542 static inline unsigned long
543 s_reg_to_mem (unsigned long s_reg
)
545 return ((s_reg
>> 62) << 30) | ((s_reg
<< 5) >> 34);
549 * Handle user-level unaligned fault. Handling user-level unaligned
550 * faults is *extremely* slow and produces nasty messages. A user
551 * program *should* fix unaligned faults ASAP.
553 * Notice that we have (almost) the regular kernel stack layout here,
554 * so finding the appropriate registers is a little more difficult
555 * than in the kernel case.
557 * Finally, we handle regular integer load/stores only. In
558 * particular, load-linked/store-conditionally and floating point
559 * load/stores are not supported. The former make no sense with
560 * unaligned faults (they are guaranteed to fail) and I don't think
561 * the latter will occur in any decent program.
563 * Sigh. We *do* have to handle some FP operations, because GCC will
564 * uses them as temporary storage for integer memory to memory copies.
565 * However, we need to deal with stt/ldt and sts/lds only.
568 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \
569 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \
570 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \
571 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
573 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \
574 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \
575 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
577 #define R(x) ((size_t) &((struct pt_regs *)0)->x)
579 static int unauser_reg_offsets
[32] = {
580 R(r0
), R(r1
), R(r2
), R(r3
), R(r4
), R(r5
), R(r6
), R(r7
), R(r8
),
581 /* r9 ... r15 are stored in front of regs. */
582 -56, -48, -40, -32, -24, -16, -8,
583 R(r16
), R(r17
), R(r18
),
584 R(r19
), R(r20
), R(r21
), R(r22
), R(r23
), R(r24
), R(r25
), R(r26
),
585 R(r27
), R(r28
), R(gp
),
592 do_entUnaUser(void * va
, unsigned long opcode
,
593 unsigned long reg
, struct pt_regs
*regs
)
596 static long last_time
= 0;
598 unsigned long tmp1
, tmp2
, tmp3
, tmp4
;
599 unsigned long fake_reg
, *reg_addr
= &fake_reg
;
600 unsigned long uac_bits
;
603 /* Check the UAC bits to decide what the user wants us to do
604 with the unaliged access. */
606 uac_bits
= (current
->thread
.flags
>> UAC_SHIFT
) & UAC_BITMASK
;
607 if (!(uac_bits
& UAC_NOPRINT
)) {
608 if (cnt
>= 5 && jiffies
- last_time
> 5*HZ
) {
612 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
613 current
->comm
, current
->pid
,
614 regs
->pc
- 4, va
, opcode
, reg
);
618 if (uac_bits
& UAC_SIGBUS
) {
621 if (uac_bits
& UAC_NOFIX
) {
622 /* Not sure why you'd want to use this, but... */
626 /* Don't bother reading ds in the access check since we already
627 know that this came from the user. Also rely on the fact that
628 the page at TASK_SIZE is unmapped and so can't be touched anyway. */
629 if (!__access_ok((unsigned long)va
, 0, USER_DS
))
632 ++unaligned
[1].count
;
633 unaligned
[1].va
= (unsigned long)va
;
634 unaligned
[1].pc
= regs
->pc
- 4;
636 if ((1L << opcode
) & OP_INT_MASK
) {
637 /* it's an integer load/store */
639 reg_addr
= (unsigned long *)
640 ((char *)regs
+ unauser_reg_offsets
[reg
]);
641 } else if (reg
== 30) {
642 /* usp in PAL regs */
645 /* zero "register" */
650 /* We don't want to use the generic get/put unaligned macros as
651 we want to trap exceptions. Only if we actually get an
652 exception will we decide whether we should have caught it. */
655 case 0x0c: /* ldwu */
656 __asm__
__volatile__(
657 "1: ldq_u %1,0(%3)\n"
658 "2: ldq_u %2,1(%3)\n"
662 ".section __ex_table,\"a\"\n"
664 " lda %1,3b-1b(%0)\n"
666 " lda %2,3b-2b(%0)\n"
668 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
672 *reg_addr
= tmp1
|tmp2
;
676 __asm__
__volatile__(
677 "1: ldq_u %1,0(%3)\n"
678 "2: ldq_u %2,3(%3)\n"
682 ".section __ex_table,\"a\"\n"
684 " lda %1,3b-1b(%0)\n"
686 " lda %2,3b-2b(%0)\n"
688 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
692 alpha_write_fp_reg(reg
, s_mem_to_reg((int)(tmp1
|tmp2
)));
696 __asm__
__volatile__(
697 "1: ldq_u %1,0(%3)\n"
698 "2: ldq_u %2,7(%3)\n"
702 ".section __ex_table,\"a\"\n"
704 " lda %1,3b-1b(%0)\n"
706 " lda %2,3b-2b(%0)\n"
708 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
712 alpha_write_fp_reg(reg
, tmp1
|tmp2
);
716 __asm__
__volatile__(
717 "1: ldq_u %1,0(%3)\n"
718 "2: ldq_u %2,3(%3)\n"
722 ".section __ex_table,\"a\"\n"
724 " lda %1,3b-1b(%0)\n"
726 " lda %2,3b-2b(%0)\n"
728 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
732 *reg_addr
= (int)(tmp1
|tmp2
);
736 __asm__
__volatile__(
737 "1: ldq_u %1,0(%3)\n"
738 "2: ldq_u %2,7(%3)\n"
742 ".section __ex_table,\"a\"\n"
744 " lda %1,3b-1b(%0)\n"
746 " lda %2,3b-2b(%0)\n"
748 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
)
752 *reg_addr
= tmp1
|tmp2
;
755 /* Note that the store sequences do not indicate that they change
756 memory because it _should_ be affecting nothing in this context.
757 (Otherwise we have other, much larger, problems.) */
759 __asm__
__volatile__(
760 "1: ldq_u %2,1(%5)\n"
761 "2: ldq_u %1,0(%5)\n"
768 "3: stq_u %2,1(%5)\n"
769 "4: stq_u %1,0(%5)\n"
771 ".section __ex_table,\"a\"\n"
773 " lda %2,5b-1b(%0)\n"
775 " lda %1,5b-2b(%0)\n"
777 " lda $31,5b-3b(%0)\n"
779 " lda $31,5b-4b(%0)\n"
781 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
782 "=&r"(tmp3
), "=&r"(tmp4
)
783 : "r"(va
), "r"(*reg_addr
), "0"(0));
789 fake_reg
= s_reg_to_mem(alpha_read_fp_reg(reg
));
793 __asm__
__volatile__(
794 "1: ldq_u %2,3(%5)\n"
795 "2: ldq_u %1,0(%5)\n"
802 "3: stq_u %2,3(%5)\n"
803 "4: stq_u %1,0(%5)\n"
805 ".section __ex_table,\"a\"\n"
807 " lda %2,5b-1b(%0)\n"
809 " lda %1,5b-2b(%0)\n"
811 " lda $31,5b-3b(%0)\n"
813 " lda $31,5b-4b(%0)\n"
815 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
816 "=&r"(tmp3
), "=&r"(tmp4
)
817 : "r"(va
), "r"(*reg_addr
), "0"(0));
823 fake_reg
= alpha_read_fp_reg(reg
);
827 __asm__
__volatile__(
828 "1: ldq_u %2,7(%5)\n"
829 "2: ldq_u %1,0(%5)\n"
836 "3: stq_u %2,7(%5)\n"
837 "4: stq_u %1,0(%5)\n"
839 ".section __ex_table,\"a\"\n\t"
841 " lda %2,5b-1b(%0)\n"
843 " lda %1,5b-2b(%0)\n"
845 " lda $31,5b-3b(%0)\n"
847 " lda $31,5b-4b(%0)\n"
849 : "=r"(error
), "=&r"(tmp1
), "=&r"(tmp2
),
850 "=&r"(tmp3
), "=&r"(tmp4
)
851 : "r"(va
), "r"(*reg_addr
), "0"(0));
857 /* What instruction were you trying to use, exactly? */
861 /* Only integer loads should get here; everyone else returns early. */
867 regs
->pc
-= 4; /* make pc point to faulting insn */
868 send_sig(SIGSEGV
, current
, 1);
873 send_sig(SIGBUS
, current
, 1);
878 * Unimplemented system calls.
881 alpha_ni_syscall(unsigned long a0
, unsigned long a1
, unsigned long a2
,
882 unsigned long a3
, unsigned long a4
, unsigned long a5
,
885 /* We only get here for OSF system calls, minus #112;
886 the rest go to sys_ni_syscall. */
887 printk("<sc %ld(%lx,%lx,%lx)>", regs
.r0
, a0
, a1
, a2
);
894 /* Tell PAL-code what global pointer we want in the kernel. */
895 register unsigned long gptr
__asm__("$29");