arch/alpha/kernel/machvec.h

   1 /*
   2  *      linux/arch/alpha/kernel/machvec.h
   3  *
   4  *      Copyright (C) 1997, 1998  Richard Henderson
   5  *
   6  * This file has goodies to help simplify instantiation of machine vectors.
   7  */
   8
   9 #include <linux/config.h>
  10
  11 /* Whee.  Both TSUNAMI and POLARIS don't have an HAE.  Fix things up for
  12    the GENERIC kernel by defining the HAE address to be that of the cache.
  13    Now we can read and write it as we like.  ;-)  */
  14 #define TSUNAMI_HAE_ADDRESS     (&alpha_mv.hae_cache)
  15 #define POLARIS_HAE_ADDRESS     (&alpha_mv.hae_cache)
  16
  17 /* Only a few systems don't define IACK_SC, handling all interrupts through
  18    the SRM console.  But splitting out that one case from IO() below
  19    seems like such a pain.  Define this to get things to compile.  */
  20 #define JENSEN_IACK_SC          1
  21 #define T2_IACK_SC              1
  22
  23
  24 /*
  25  * Some helpful macros for filling in the blanks.
  26  */
  27
  28 #define CAT1(x,y)  x##y
  29 #define CAT(x,y)   CAT1(x,y)
  30
  31 #define DO_DEFAULT_RTC rtc_port: 0x70
  32
  33 #define DO_EV4_MMU                                                      \
  34         max_asn:                        EV4_MAX_ASN,                    \
  35         mv_switch_mm:                   ev4_switch_mm,                  \
  36         mv_activate_mm:                 ev4_activate_mm,                \
  37         mv_flush_tlb_current:           ev4_flush_tlb_current,          \
  38         mv_flush_tlb_other:             ev4_flush_tlb_other,            \
  39         mv_flush_tlb_current_page:      ev4_flush_tlb_current_page
  40
  41 #define DO_EV5_MMU                                                      \
  42         max_asn:                        EV5_MAX_ASN,                    \
  43         mv_switch_mm:                   ev5_switch_mm,                  \
  44         mv_activate_mm:                 ev5_activate_mm,                \
  45         mv_flush_tlb_current:           ev5_flush_tlb_current,          \
  46         mv_flush_tlb_other:             ev5_flush_tlb_other,            \
  47         mv_flush_tlb_current_page:      ev5_flush_tlb_current_page
  48
  49 #define DO_EV6_MMU                                                      \
  50         max_asn:                        EV6_MAX_ASN,                    \
  51         mv_switch_mm:                   ev5_switch_mm,                  \
  52         mv_activate_mm:                 ev5_activate_mm,                \
  53         mv_flush_tlb_current:           ev5_flush_tlb_current,          \
  54         mv_flush_tlb_other:             ev5_flush_tlb_other,            \
  55         mv_flush_tlb_current_page:      ev5_flush_tlb_current_page
  56
  57 #define IO_LITE(UP,low1,low2)                                           \
  58         hae_register:           (unsigned long *) CAT(UP,_HAE_ADDRESS), \
  59         iack_sc:                CAT(UP,_IACK_SC),                       \
  60         mv_inb:                 CAT(low1,_inb),                         \
  61         mv_inw:                 CAT(low1,_inw),                         \
  62         mv_inl:                 CAT(low1,_inl),                         \
  63         mv_outb:                CAT(low1,_outb),                        \
  64         mv_outw:                CAT(low1,_outw),                        \
  65         mv_outl:                CAT(low1,_outl),                        \
  66         mv_readb:               CAT(low1,_readb),                       \
  67         mv_readw:               CAT(low1,_readw),                       \
  68         mv_readl:               CAT(low1,_readl),                       \
  69         mv_readq:               CAT(low1,_readq),                       \
  70         mv_writeb:              CAT(low1,_writeb),                      \
  71         mv_writew:              CAT(low1,_writew),                      \
  72         mv_writel:              CAT(low1,_writel),                      \
  73         mv_writeq:              CAT(low1,_writeq),                      \
  74         mv_dense_mem:           CAT(low2,_dense_mem)
  75
  76 #define IO(UP,low1,low2)                                                \
  77         IO_LITE(UP,low1,low2),                                          \
  78         hose_read_config_byte:  CAT(low2,_hose_read_config_byte),       \
  79         hose_read_config_word:  CAT(low2,_hose_read_config_word),       \
  80         hose_read_config_dword: CAT(low2,_hose_read_config_dword),      \
  81         hose_write_config_byte: CAT(low2,_hose_write_config_byte),      \
  82         hose_write_config_word: CAT(low2,_hose_write_config_word),      \
  83         hose_write_config_dword: CAT(low2,_hose_write_config_dword),    \
  84         dma_win_base:           CAT(UP,_DMA_WIN_BASE_DEFAULT),          \
  85         dma_win_size:           CAT(UP,_DMA_WIN_SIZE_DEFAULT)
  86
  87 /* Any assembler that can generate a GENERIC kernel can generate BWX
  88    instructions.  So always use them for PYXIS I/O.  */
  89
  90 #define DO_APECS_IO     IO(APECS,apecs,apecs)
  91 #define DO_CIA_IO       IO(CIA,cia,cia)
  92 #define DO_LCA_IO       IO(LCA,lca,lca)
  93 #define DO_MCPCIA_IO    IO(MCPCIA,mcpcia,mcpcia)
  94 #define DO_PYXIS_IO     IO(PYXIS,pyxis_bw,pyxis)
  95 #define DO_POLARIS_IO   IO(POLARIS,polaris,polaris)
  96 #define DO_T2_IO        IO(T2,t2,t2)
  97 #define DO_TSUNAMI_IO   IO(TSUNAMI,tsunami,tsunami)
  98
  99 #define BUS(which)                                      \
 100         mv_virt_to_bus: CAT(which,_virt_to_bus),        \
 101         mv_bus_to_virt: CAT(which,_bus_to_virt)
 102
 103 #define DO_APECS_BUS    BUS(apecs)
 104 #define DO_CIA_BUS      BUS(cia)
 105 #define DO_LCA_BUS      BUS(lca)
 106 #define DO_MCPCIA_BUS   BUS(mcpcia)
 107 #define DO_PYXIS_BUS    BUS(pyxis)
 108 #define DO_POLARIS_BUS  BUS(polaris)
 109 #define DO_T2_BUS       BUS(t2)
 110 #define DO_TSUNAMI_BUS  BUS(tsunami)
 111
 112
 113 /*
 114  * In a GENERIC kernel, we have lots of these vectors floating about,
 115  * all but one of which we want to go away.  In a non-GENERIC kernel,
 116  * we want only one, ever.
 117  *
 118  * Accomplish this in the GENERIC kernel by puting all of the vectors
 119  * in the .init.data section where they'll go away.  We'll copy the
 120  * one we want to the real alpha_mv vector in setup_arch.
 121  *
 122  * Accomplish this in a non-GENERIC kernel by ifdef'ing out all but
 123  * one of the vectors, which will not reside in .init.data.  We then
 124  * alias this one vector to alpha_mv, so no copy is needed.
 125  *
 126  * Upshot: set __initdata to nothing for non-GENERIC kernels.
 127  */
 128
 129 #ifdef CONFIG_ALPHA_GENERIC
 130 #define __initmv __initdata
 131 #define ALIAS_MV(x)
 132 #else
 133 #define __initmv
 134
 135 /* GCC actually has a syntax for defining aliases, but is under some
 136    delusion that you shouldn't be able to declare it extern somewhere
 137    else beforehand.  Fine.  We'll do it ourselves.  */
 138 #define ALIAS_MV(system) asm(".global alpha_mv\nalpha_mv = " #system "_mv");
 139 #endif