include/asm-arm/arch-arc/hardware.h

   1 /*
   2  * linux/include/asm-arm/arch-arc/hardware.h
   3  *
   4  * Copyright (C) 1996 Russell King.
   5  *
   6  * This file contains the hardware definitions of the
   7  * Acorn Archimedes/A5000 machines.
   8  *
   9  * Modifications:
  10  *  04-04-1998  PJB/RMK Merged arc and a5k versions
  11  */
  12
  13 #ifndef __ASM_ARCH_HARDWARE_H
  14 #define __ASM_ARCH_HARDWARE_H
  15
  16 #include <linux/config.h>
  17
  18 /*
  19  * What hardware must be present - these can be tested by the kernel
  20  * source.
  21  */
  22 #define HAS_IOC
  23 #include <asm/ioc.h>
  24 #define HAS_MEMC
  25 #include <asm/memc.h>
  26 #define HAS_MEMC1A
  27 #define HAS_VIDC
  28
  29 /*
  30  * Optional hardware
  31  */
  32 #define HAS_EXPMASK
  33
  34 /* Hardware addresses of major areas.
  35  *  *_START is the physical address
  36  *  *_SIZE  is the size of the region
  37  *  *_BASE  is the virtual address
  38  */
  39 #define IO_START                0x03000000
  40 #define IO_SIZE                 0x01000000
  41 #define IO_BASE                 0x03000000
  42
  43 /*
  44  * Screen mapping information
  45  */
  46 #define SCREEN_START            0x02000000
  47 #define SCREEN2_END             0x02078000
  48 #define SCREEN2_BASE            0x02000000
  49 #define SCREEN1_END             0x02000000
  50 #define SCREEN1_BASE            0x01f88000
  51
  52
  53 #ifndef __ASSEMBLER__
  54
  55 /*
  56  * for use with inb/outb
  57  */
  58 #define IO_VIDC_BASE            0x80100000
  59 #ifdef CONFIG_ARCH_ARC
  60 #define LATCHAADDR              0x80094010
  61 #define LATCHBADDR              0x80094006
  62 #endif
  63 #define IOC_BASE                0x80080000
  64
  65 #define IO_EC_IOC4_BASE         0x8009c000
  66 #define IO_EC_IOC_BASE          0x80090000
  67 #define IO_EC_MEMC_BASE         0x80000000
  68
  69 /*
  70  * IO definitions
  71  */
  72 #define EXPMASK_BASE            ((volatile unsigned char *)0x03360000)
  73 #define IOEB_BASE               ((volatile unsigned char *)0x03350050)
  74 #define PCIO_FLOPPYDMABASE      ((volatile unsigned char *)0x0302a000)
  75 #define PCIO_BASE               0x03010000
  76
  77 /*
  78  * RAM definitions
  79  */
  80 #define MAPTOPHYS(a)            (((unsigned long)a & 0x007fffff) + PAGE_OFFSET)
  81 #define KERNTOPHYS(a)           ((((unsigned long)(&a)) & 0x007fffff) + PAGE_OFFSET)
  82 #define GET_MEMORY_END(p)       (PAGE_OFFSET + (p->u1.s.page_size) * (p->u1.s.nr_pages))
  83 #define PARAMS_BASE             (PAGE_OFFSET + 0x7c000)
  84 #define KERNEL_BASE             (PAGE_OFFSET + 0x80000)
  85
  86 #else
  87
  88 #define IOEB_BASE               0x03350050
  89 #define IOC_BASE                0x03200000
  90 #define PCIO_FLOPPYDMABASE      0x0302a000
  91 #define PCIO_BASE               0x03010000
  92
  93 #endif
  94 #endif
  95