1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1998 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O
13 Center of Excellence in Space Data and Information Sciences
14 Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771
17 static char *version
=
18 "3c59x.c:v0.99H 11/17/98 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/vortex.html\n";
20 /* "Knobs" that adjust features and parameters. */
21 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
22 Setting to > 1512 effectively disables this feature. */
23 static const int rx_copybreak
= 200;
24 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
25 static const int mtu
= 1500;
26 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
27 static int max_interrupt_work
= 20;
29 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
30 #define vortex_debug debug
32 static int vortex_debug
= VORTEX_DEBUG
;
34 static int vortex_debug
= 1;
37 /* Some values here only for performance evaluation and path-coverage
39 static int rx_nocopy
= 0, rx_copy
= 0, queued_packet
= 0, rx_csumhits
;
41 /* A few values that may be tweaked. */
42 /* Time in jiffies before concluding the transmitter is hung. */
43 #define TX_TIMEOUT ((400*HZ)/1000)
45 /* Keep the ring sizes a power of two for efficiency. */
46 #define TX_RING_SIZE 16
47 #define RX_RING_SIZE 32
48 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
50 #include <linux/config.h>
51 #include <linux/version.h>
54 #include <linux/modversions.h>
56 #include <linux/module.h>
58 #define MOD_INC_USE_COUNT
59 #define MOD_DEC_USE_COUNT
62 #include <linux/kernel.h>
63 #include <linux/sched.h>
64 #include <linux/string.h>
65 #include <linux/timer.h>
66 #include <linux/errno.h>
68 #include <linux/ioport.h>
69 #include <linux/malloc.h>
70 #include <linux/interrupt.h>
71 #include <linux/pci.h>
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 #if LINUX_VERSION_CODE < 0x20155 || defined(CARDBUS)
76 #include <linux/bios32.h>
78 #include <asm/irq.h> /* For NR_IRQS only. */
79 #include <asm/bitops.h>
82 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
83 This is only in the support-all-kernels source code. */
85 #define RUN_AT(x) (jiffies + (x))
87 #include <linux/delay.h>
89 #if (LINUX_VERSION_CODE >= 0x20100)
90 char kernel_version
[] = UTS_RELEASE
;
93 #define ioremap(a,b) \
94 (((a)<0x100000) ? (void *)((u_long)(a)) : vremap(a,b))
96 do { if ((u_long)(v) > 0x100000) vfree(v); } while (0)
99 #if LINUX_VERSION_CODE <= 0x20139
100 #define net_device_stats enet_statistics
101 #define NETSTATS_VER2
103 #if LINUX_VERSION_CODE < 0x20138
104 #define test_and_set_bit(val, addr) set_bit(val, addr)
105 #define le32_to_cpu(val) (val)
106 #define cpu_to_le32(val) (val)
108 #if LINUX_VERSION_CODE < 0x20155
109 #define PCI_SUPPORT_VER1
111 #define PCI_SUPPORT_VER2
113 #if LINUX_VERSION_CODE < 0x20159
114 #define DEV_FREE_SKB(skb) dev_kfree_skb (skb, FREE_WRITE);
115 #else /* Grrr, unneeded incompatible change. */
116 #define DEV_FREE_SKB(skb) dev_kfree_skb(skb);
119 #if defined(MODULE) && LINUX_VERSION_CODE > 0x20115
120 MODULE_AUTHOR("Donald Becker <becker@cesdis.gsfc.nasa.gov>");
121 MODULE_DESCRIPTION("3Com 3c590/3c900 series Vortex/Boomerang driver");
122 MODULE_PARM(debug
, "i");
123 MODULE_PARM(options
, "1-" __MODULE_STRING(8) "i");
124 MODULE_PARM(full_duplex
, "1-" __MODULE_STRING(8) "i");
125 MODULE_PARM(rx_copybreak
, "i");
126 MODULE_PARM(max_interrupt_work
, "i");
127 MODULE_PARM(compaq_ioaddr
, "i");
128 MODULE_PARM(compaq_irq
, "i");
129 MODULE_PARM(compaq_device_id
, "i");
132 /* Operational parameter that usually are not changed. */
134 /* The Vortex size is twice that of the original EtherLinkIII series: the
135 runtime register window, window 1, is now always mapped in.
136 The Boomerang size is twice as large as the Vortex -- it has additional
137 bus master control registers. */
138 #define VORTEX_TOTAL_SIZE 0x20
139 #define BOOMERANG_TOTAL_SIZE 0x40
141 /* Set iff a MII transceiver on any interface requires mdio preamble.
142 This only set with the original DP83840 on older 3c905 boards, so the extra
143 code size of a per-interface flag is not worthwhile. */
144 static char mii_preamble_required
= 0;
149 I. Board Compatibility
151 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
152 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
153 versions of the FastEtherLink cards. The supported product IDs are
154 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
156 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
157 with the kernel source or available from
158 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
160 II. Board-specific settings
162 PCI bus devices are configured by the system at boot time, so no jumpers
163 need to be set on the board. The system BIOS should be set to assign the
164 PCI INTA signal to an otherwise unused system IRQ line.
166 The EEPROM settings for media type and forced-full-duplex are observed.
167 The EEPROM media type should be left at the default "autoselect" unless using
168 10base2 or AUI connections which cannot be reliably detected.
170 III. Driver operation
172 The 3c59x series use an interface that's very similar to the previous 3c5x9
173 series. The primary interface is two programmed-I/O FIFOs, with an
174 alternate single-contiguous-region bus-master transfer (see next).
176 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
177 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
178 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
179 programmed-I/O interface that has been removed in 'B' and subsequent board
182 One extension that is advertised in a very large font is that the adapters
183 are capable of being bus masters. On the Vortex chip this capability was
184 only for a single contiguous region making it far less useful than the full
185 bus master capability. There is a significant performance impact of taking
186 an extra interrupt or polling for the completion of each transfer, as well
187 as difficulty sharing the single transfer engine between the transmit and
188 receive threads. Using DMA transfers is a win only with large blocks or
189 with the flawed versions of the Intel Orion motherboard PCI controller.
191 The Boomerang chip's full-bus-master interface is useful, and has the
192 currently-unused advantages over other similar chips that queued transmit
193 packets may be reordered and receive buffer groups are associated with a
196 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
197 Rather than a fixed intermediate receive buffer, this scheme allocates
198 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
199 the copying breakpoint: it is chosen to trade-off the memory wasted by
200 passing the full-sized skbuff to the queue layer for all frames vs. the
201 copying cost of copying a frame to a correctly-sized skbuff.
204 IIIC. Synchronization
205 The driver runs as two independent, single-threaded flows of control. One
206 is the send-packet routine, which enforces single-threaded use by the
207 dev->tbusy flag. The other thread is the interrupt handler, which is single
208 threaded by the hardware and other software.
212 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
213 3c590, 3c595, and 3c900 boards.
214 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
215 the EISA version is called "Demon". According to Terry these names come
216 from rides at the local amusement park.
218 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
219 This driver only supports ethernet packets because of the skbuff allocation
223 /* This table drives the PCI probe routines. It's mostly boilerplate in all
224 of the drivers, and will likely be provided by some future kernel.
227 PCI_USES_IO
=1, PCI_USES_MEM
=2, PCI_USES_MASTER
=4,
228 PCI_ADDR0
=0x10<<0, PCI_ADDR1
=0x10<<1, PCI_ADDR2
=0x10<<2, PCI_ADDR3
=0x10<<3,
232 u16 vendor_id
, device_id
, device_id_mask
, flags
;
233 int drv_flags
, io_size
;
234 struct device
*(*probe1
)(int pci_bus
, int pci_devfn
, struct device
*dev
,
235 long ioaddr
, int irq
, int chip_idx
, int fnd_cnt
);
238 enum { IS_VORTEX
=1, IS_BOOMERANG
=2, IS_CYCLONE
=4,
239 HAS_PWR_CTRL
=0x10, HAS_MII
=0x20, HAS_NWAY
=0x40, HAS_CB_FNS
=0x80, };
240 static struct device
*vortex_probe1(int pci_bus
, int pci_devfn
,
241 struct device
*dev
, long ioaddr
,
242 int irq
, int dev_id
, int card_idx
);
243 static struct pci_id_info pci_tbl
[] = {
244 {"3c590 Vortex 10Mbps", 0x10B7, 0x5900, 0xffff,
245 PCI_USES_IO
|PCI_USES_MASTER
, IS_VORTEX
, 32, vortex_probe1
},
246 {"3c595 Vortex 100baseTx", 0x10B7, 0x5950, 0xffff,
247 PCI_USES_IO
|PCI_USES_MASTER
, IS_VORTEX
, 32, vortex_probe1
},
248 {"3c595 Vortex 100baseT4", 0x10B7, 0x5951, 0xffff,
249 PCI_USES_IO
|PCI_USES_MASTER
, IS_VORTEX
, 32, vortex_probe1
},
250 {"3c595 Vortex 100base-MII", 0x10B7, 0x5952, 0xffff,
251 PCI_USES_IO
|PCI_USES_MASTER
, IS_VORTEX
, 32, vortex_probe1
},
252 {"3Com Vortex", 0x10B7, 0x5900, 0xff00,
253 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
, 64, vortex_probe1
},
254 {"3c900 Boomerang 10baseT", 0x10B7, 0x9000, 0xffff,
255 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
, 64, vortex_probe1
},
256 {"3c900 Boomerang 10Mbps Combo", 0x10B7, 0x9001, 0xffff,
257 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
, 64, vortex_probe1
},
258 {"3c900 Cyclone 10Mbps Combo", 0x10B7, 0x9005, 0xffff,
259 PCI_USES_IO
|PCI_USES_MASTER
, IS_CYCLONE
, 128, vortex_probe1
},
260 {"3c900B-FL Cyclone 10base-FL", 0x10B7, 0x900A, 0xffff,
261 PCI_USES_IO
|PCI_USES_MASTER
, IS_CYCLONE
, 128, vortex_probe1
},
262 {"3c905 Boomerang 100baseTx", 0x10B7, 0x9050, 0xffff,
263 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
|HAS_MII
, 64, vortex_probe1
},
264 {"3c905 Boomerang 100baseT4", 0x10B7, 0x9051, 0xffff,
265 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
|HAS_MII
, 64, vortex_probe1
},
266 {"3c905B Cyclone 100baseTx", 0x10B7, 0x9055, 0xffff,
267 PCI_USES_IO
|PCI_USES_MASTER
, IS_CYCLONE
|HAS_NWAY
, 128, vortex_probe1
},
268 {"3c905B-FX Cyclone 100baseFx", 0x10B7, 0x905A, 0xffff,
269 PCI_USES_IO
|PCI_USES_MASTER
, IS_CYCLONE
, 128, vortex_probe1
},
270 {"3c980 Cyclone", 0x10B7, 0x9800, 0xfff0,
271 PCI_USES_IO
|PCI_USES_MASTER
, IS_CYCLONE
, 128, vortex_probe1
},
272 {"3c575 Boomerang CardBus", 0x10B7, 0x5057, 0xffff,
273 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
|HAS_MII
, 64, vortex_probe1
},
274 {"3CCFE575 Cyclone CardBus", 0x10B7, 0x5157, 0xffff,
275 PCI_USES_IO
|PCI_USES_MASTER
, IS_CYCLONE
|HAS_NWAY
|HAS_CB_FNS
,
277 {"3c575 series CardBus (unknown version)", 0x10B7, 0x5057, 0xf0ff,
278 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
|HAS_MII
, 64, vortex_probe1
},
279 {"3Com Boomerang (unknown version)", 0x10B7, 0x9000, 0xff00,
280 PCI_USES_IO
|PCI_USES_MASTER
, IS_BOOMERANG
, 64, vortex_probe1
},
281 {0,}, /* 0 terminated list. */
284 /* Operational definitions.
285 These are not used by other compilation units and thus are not
286 exported in a ".h" file.
288 First the windows. There are eight register windows, with the command
289 and status registers available in each.
291 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
293 #define EL3_STATUS 0x0e
295 /* The top five bits written to EL3_CMD are a command, the lower
296 11 bits are the parameter, if applicable.
297 Note that 11 parameters bits was fine for ethernet, but the new chip
298 can handle FDDI length frames (~4500 octets) and now parameters count
299 32-bit 'Dwords' rather than octets. */
302 TotalReset
= 0<<11, SelectWindow
= 1<<11, StartCoax
= 2<<11,
303 RxDisable
= 3<<11, RxEnable
= 4<<11, RxReset
= 5<<11,
304 UpStall
= 6<<11, UpUnstall
= (6<<11)+1,
305 DownStall
= (6<<11)+2, DownUnstall
= (6<<11)+3,
306 RxDiscard
= 8<<11, TxEnable
= 9<<11, TxDisable
= 10<<11, TxReset
= 11<<11,
307 FakeIntr
= 12<<11, AckIntr
= 13<<11, SetIntrEnb
= 14<<11,
308 SetStatusEnb
= 15<<11, SetRxFilter
= 16<<11, SetRxThreshold
= 17<<11,
309 SetTxThreshold
= 18<<11, SetTxStart
= 19<<11,
310 StartDMAUp
= 20<<11, StartDMADown
= (20<<11)+1, StatsEnable
= 21<<11,
311 StatsDisable
= 22<<11, StopCoax
= 23<<11, SetFilterBit
= 25<<11,};
313 /* The SetRxFilter command accepts the following classes: */
315 RxStation
= 1, RxMulticast
= 2, RxBroadcast
= 4, RxProm
= 8 };
317 /* Bits in the general status register. */
319 IntLatch
= 0x0001, HostError
= 0x0002, TxComplete
= 0x0004,
320 TxAvailable
= 0x0008, RxComplete
= 0x0010, RxEarly
= 0x0020,
321 IntReq
= 0x0040, StatsFull
= 0x0080,
322 DMADone
= 1<<8, DownComplete
= 1<<9, UpComplete
= 1<<10,
323 DMAInProgress
= 1<<11, /* DMA controller is still busy.*/
324 CmdInProgress
= 1<<12, /* EL3_CMD is still busy.*/
327 /* Register window 1 offsets, the window used in normal operation.
328 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
330 TX_FIFO
= 0x10, RX_FIFO
= 0x10, RxErrors
= 0x14,
331 RxStatus
= 0x18, Timer
=0x1A, TxStatus
= 0x1B,
332 TxFree
= 0x1C, /* Remaining free bytes in Tx buffer. */
335 Wn0EepromCmd
= 10, /* Window 0: EEPROM command register. */
336 Wn0EepromData
= 12, /* Window 0: EEPROM results register. */
337 IntrStatus
=0x0E, /* Valid in all windows. */
339 enum Win0_EEPROM_bits
{
340 EEPROM_Read
= 0x80, EEPROM_WRITE
= 0x40, EEPROM_ERASE
= 0xC0,
341 EEPROM_EWENB
= 0x30, /* Enable erasing/writing for 10 msec. */
342 EEPROM_EWDIS
= 0x00, /* Disable EWENB before 10 msec timeout. */
344 /* EEPROM locations. */
346 PhysAddr01
=0, PhysAddr23
=1, PhysAddr45
=2, ModelID
=3,
347 EtherLink3ID
=7, IFXcvrIO
=8, IRQLine
=9,
348 NodeAddr01
=10, NodeAddr23
=11, NodeAddr45
=12,
349 DriverTune
=13, Checksum
=15};
351 enum Window2
{ /* Window 2. */
354 enum Window3
{ /* Window 3: MAC/config bits. */
355 Wn3_Config
=0, Wn3_MAC_Ctrl
=6, Wn3_Options
=8,
359 struct w3_config_fields
{
360 unsigned int ram_size
:3, ram_width
:1, ram_speed
:2, rom_size
:2;
362 unsigned int ram_split
:2, pad18
:2, xcvr
:4, autoselect
:1;
367 enum Window4
{ /* Window 4: Xcvr/media bits. */
368 Wn4_FIFODiag
= 4, Wn4_NetDiag
= 6, Wn4_PhysicalMgmt
=8, Wn4_Media
= 10,
370 enum Win4_Media_bits
{
371 Media_SQE
= 0x0008, /* Enable SQE error counting for AUI. */
372 Media_10TP
= 0x00C0, /* Enable link beat and jabber for 10baseT. */
373 Media_Lnk
= 0x0080, /* Enable just link beat for 100TX/100FX. */
374 Media_LnkBeat
= 0x0800,
376 enum Window7
{ /* Window 7: Bus Master control. */
377 Wn7_MasterAddr
= 0, Wn7_MasterLen
= 6, Wn7_MasterStatus
= 12,
379 /* Boomerang bus master control registers. */
381 PktStatus
= 0x20, DownListPtr
= 0x24, FragAddr
= 0x28, FragLen
= 0x2c,
382 TxFreeThreshold
= 0x2f, UpPktStatus
= 0x30, UpListPtr
= 0x38,
385 /* The Rx and Tx descriptor lists.
386 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
387 alignment contraint on tx_ring[] and rx_ring[]. */
388 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
389 struct boom_rx_desc
{
390 u32 next
; /* Last entry points to 0. */
392 u32 addr
; /* Up to 63 addr/len pairs possible. */
393 s32 length
; /* Set LAST_FRAG to indicate last pair. */
395 /* Values for the Rx status entry. */
396 enum rx_desc_status
{
397 RxDComplete
=0x00008000, RxDError
=0x4000,
398 /* See boomerang_rx() for actual error bits */
399 IPChksumErr
=1<<25, TCPChksumErr
=1<<26, UDPChksumErr
=1<<27,
400 IPChksumValid
=1<<29, TCPChksumValid
=1<<30, UDPChksumValid
=1<<31,
403 struct boom_tx_desc
{
404 u32 next
; /* Last entry points to 0. */
405 s32 status
; /* bits 0:12 length, others see below. */
410 /* Values for the Tx status entry. */
411 enum tx_desc_status
{
412 CRCDisable
=0x2000, TxDComplete
=0x8000,
413 AddIPChksum
=0x02000000, AddTCPChksum
=0x04000000, AddUDPChksum
=0x08000000,
414 TxIntrUploaded
=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
417 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
418 enum ChipCaps
{ CapBusMaster
=0x20 };
420 struct vortex_private
{
421 /* The Rx and Tx rings should be quad-word-aligned. */
422 struct boom_rx_desc rx_ring
[RX_RING_SIZE
];
423 struct boom_tx_desc tx_ring
[TX_RING_SIZE
];
424 /* The addresses of transmit- and receive-in-place skbuffs. */
425 struct sk_buff
* rx_skbuff
[RX_RING_SIZE
];
426 struct sk_buff
* tx_skbuff
[TX_RING_SIZE
];
427 struct device
*next_module
;
429 unsigned int cur_rx
, cur_tx
; /* The next free ring entry */
430 unsigned int dirty_rx
, dirty_tx
; /* The ring entries to be free()ed. */
431 struct net_device_stats stats
;
432 struct sk_buff
*tx_skb
; /* Packet being eaten by bus master ctrl. */
434 /* PCI configuration space information. */
435 u8 pci_bus
, pci_devfn
; /* PCI bus location, for power management. */
436 char *cb_fn_base
; /* CardBus function status addr space. */
439 /* The remainder are related to chip state, mostly media selection. */
440 unsigned long in_interrupt
;
441 struct timer_list timer
; /* Media selection timer. */
442 int options
; /* User-settable misc. driver options. */
443 unsigned int media_override
:3, /* Passed-in media type. */
444 default_media
:4, /* Read from the EEPROM/Wn3_Config. */
445 full_duplex
:1, force_fd
:1, autoselect
:1,
446 bus_master
:1, /* Vortex can only do a fragment bus-m. */
447 full_bus_master_tx
:1, full_bus_master_rx
:2, /* Boomerang */
448 hw_csums
:1, /* Has hardware checksums. */
452 u16 available_media
; /* From Wn3_Options. */
453 u16 capabilities
, info1
, info2
; /* Various, from EEPROM. */
454 u16 advertising
; /* NWay media advertisement */
455 unsigned char phys
[2]; /* MII device addresses. */
458 /* The action to take with a media selection timer tick.
459 Note that we deviate from the 3Com order by checking 10base2 before AUI.
462 XCVR_10baseT
=0, XCVR_AUI
, XCVR_10baseTOnly
, XCVR_10base2
, XCVR_100baseTx
,
463 XCVR_100baseFx
, XCVR_MII
=6, XCVR_NWAY
=8, XCVR_ExtMII
=9, XCVR_Default
=10,
466 static struct media_table
{
468 unsigned int media_bits
:16, /* Bits to set in Wn4_Media register. */
469 mask
:8, /* The transceiver-present bit in Wn3_Config.*/
470 next
:8; /* The media type to try next. */
471 int wait
; /* Time before we check media status. */
473 { "10baseT", Media_10TP
,0x08, XCVR_10base2
, (14*HZ
)/10},
474 { "10Mbs AUI", Media_SQE
, 0x20, XCVR_Default
, (1*HZ
)/10},
475 { "undefined", 0, 0x80, XCVR_10baseT
, 10000},
476 { "10base2", 0, 0x10, XCVR_AUI
, (1*HZ
)/10},
477 { "100baseTX", Media_Lnk
, 0x02, XCVR_100baseFx
, (14*HZ
)/10},
478 { "100baseFX", Media_Lnk
, 0x04, XCVR_MII
, (14*HZ
)/10},
479 { "MII", 0, 0x41, XCVR_10baseT
, 3*HZ
},
480 { "undefined", 0, 0x01, XCVR_10baseT
, 10000},
481 { "Autonegotiate", 0, 0x41, XCVR_10baseT
, 3*HZ
},
482 { "MII-External", 0, 0x41, XCVR_10baseT
, 3*HZ
},
483 { "Default", 0, 0xFF, XCVR_10baseT
, 10000},
487 static int vortex_scan(struct device
*dev
, struct pci_id_info pci_tbl
[]);
489 static int vortex_open(struct device
*dev
);
490 static void mdio_sync(long ioaddr
, int bits
);
491 static int mdio_read(long ioaddr
, int phy_id
, int location
);
492 static void mdio_write(long ioaddr
, int phy_id
, int location
, int value
);
493 static void vortex_timer(unsigned long arg
);
494 static int vortex_start_xmit(struct sk_buff
*skb
, struct device
*dev
);
495 static int boomerang_start_xmit(struct sk_buff
*skb
, struct device
*dev
);
496 static int vortex_rx(struct device
*dev
);
497 static int boomerang_rx(struct device
*dev
);
498 static void vortex_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
);
499 static int vortex_close(struct device
*dev
);
500 static void update_stats(long ioaddr
, struct device
*dev
);
501 static struct net_device_stats
*vortex_get_stats(struct device
*dev
);
502 static void set_rx_mode(struct device
*dev
);
503 static int vortex_ioctl(struct device
*dev
, struct ifreq
*rq
, int cmd
);
506 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
507 /* Option count limit only -- unlimited interfaces are supported. */
509 static int options
[MAX_UNITS
] = { -1, -1, -1, -1, -1, -1, -1, -1,};
510 static int full_duplex
[MAX_UNITS
] = {-1, -1, -1, -1, -1, -1, -1, -1};
511 /* A list of all installed Vortex devices, for removing the driver module. */
512 static struct device
*root_vortex_dev
= NULL
;
516 /* Variables to work-around the Compaq PCI BIOS32 problem. */
517 static int compaq_ioaddr
= 0, compaq_irq
= 0, compaq_device_id
= 0x5900;
522 #include <pcmcia/driver_ops.h>
524 static dev_node_t
*vortex_attach(dev_locator_t
*loc
)
526 u16 dev_id
, vendor_id
;
532 if (loc
->bus
!= LOC_PCI
) return NULL
;
533 bus
= loc
->b
.pci
.bus
; devfn
= loc
->b
.pci
.devfn
;
534 pcibios_read_config_dword(bus
, devfn
, PCI_BASE_ADDRESS_0
, &io
);
535 pcibios_read_config_byte(bus
, devfn
, PCI_INTERRUPT_LINE
, &irq
);
536 pcibios_read_config_word(bus
, devfn
, PCI_VENDOR_ID
, &vendor_id
);
537 pcibios_read_config_word(bus
, devfn
, PCI_DEVICE_ID
, &dev_id
);
538 printk(KERN_INFO
"vortex_attach(bus %d, function %d, device %4.4x)\n",
541 if (io
== 0 || irq
== 0) {
542 printk(KERN_ERR
"The 3Com CardBus Ethernet interface was not "
543 "assigned an %s.\n" KERN_ERR
" It will not be activated.\n",
544 io
== 0 ? "I/O address" : "IRQ");
547 for (chip_idx
= 0; pci_tbl
[chip_idx
].vendor_id
; chip_idx
++)
548 if (vendor_id
== pci_tbl
[chip_idx
].vendor_id
549 && (dev_id
& pci_tbl
[chip_idx
].device_id_mask
) ==
550 pci_tbl
[chip_idx
].device_id
)
552 if (pci_tbl
[chip_idx
].vendor_id
== 0) { /* Compiled out! */
553 printk(KERN_INFO
"Unable to match chip type %4.4x %4.4x in "
554 "vortex_attach().\n", vendor_id
, dev_id
);
557 dev
= vortex_probe1(bus
, devfn
, NULL
, io
, irq
, chip_idx
, MAX_UNITS
+1);
559 dev_node_t
*node
= kmalloc(sizeof(dev_node_t
), GFP_KERNEL
);
560 strcpy(node
->dev_name
, dev
->name
);
561 node
->major
= node
->minor
= 0;
569 static void vortex_detach(dev_node_t
*node
)
571 struct device
**devp
, **next
;
572 printk(KERN_INFO
"vortex_detach(%s)\n", node
->dev_name
);
573 for (devp
= &root_vortex_dev
; *devp
; devp
= next
) {
574 next
= &((struct vortex_private
*)(*devp
)->priv
)->next_module
;
575 if (strcmp((*devp
)->name
, node
->dev_name
) == 0) break;
578 struct device
*dev
= *devp
;
579 struct vortex_private
*vp
= dev
->priv
;
580 if (dev
->flags
& IFF_UP
)
582 dev
->flags
&= ~(IFF_UP
|IFF_RUNNING
);
583 unregister_netdev(dev
);
584 if (vp
->cb_fn_base
) iounmap(vp
->cb_fn_base
);
593 struct driver_operations vortex_ops
= {
594 "3c575_cb", vortex_attach
, NULL
, NULL
, vortex_detach
597 #endif /* Cardbus support */
600 int init_module(void)
603 printk(KERN_INFO
"%s", version
);
605 register_driver(&vortex_ops
);
608 return vortex_scan(0, pci_tbl
);
613 int tc59x_probe(struct device
*dev
)
615 static int scanned
=0;
618 printk(KERN_INFO
"%s", version
);
619 return vortex_scan(dev
, pci_tbl
);
621 #endif /* not MODULE */
624 static int vortex_scan(struct device
*dev
, struct pci_id_info pci_tbl
[])
628 /* Allow an EISA-only driver. */
629 #if defined(CONFIG_PCI) || (defined(MODULE) && !defined(NO_PCI))
630 /* Ideally we would detect all cards in slot order. That would
631 be best done a central PCI probe dispatch, which wouldn't work
632 well with the current structure. So instead we detect 3Com cards
634 if (pcibios_present()) {
635 static int pci_index
= 0;
636 unsigned char pci_bus
, pci_device_fn
;
638 for (;pci_index
< 0xff; pci_index
++) {
639 u16 vendor
, device
, pci_command
, new_command
, pwr_cmd
;
643 if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET
<< 8, pci_index
,
644 &pci_bus
, &pci_device_fn
)
645 != PCIBIOS_SUCCESSFUL
)
647 pcibios_read_config_word(pci_bus
, pci_device_fn
,
648 PCI_VENDOR_ID
, &vendor
);
649 pcibios_read_config_word(pci_bus
, pci_device_fn
,
650 PCI_DEVICE_ID
, &device
);
651 for (chip_idx
= 0; pci_tbl
[chip_idx
].vendor_id
; chip_idx
++)
652 if (vendor
== pci_tbl
[chip_idx
].vendor_id
653 && (device
& pci_tbl
[chip_idx
].device_id_mask
) ==
654 pci_tbl
[chip_idx
].device_id
)
656 if (pci_tbl
[chip_idx
].vendor_id
== 0) /* Compiled out! */
660 #if LINUX_VERSION_CODE >= 0x20155
661 struct pci_dev
*pdev
= pci_find_slot(pci_bus
, pci_device_fn
);
662 ioaddr
= pdev
->base_address
[0] & ~3;
667 pcibios_read_config_byte(pci_bus
, pci_device_fn
,
668 PCI_INTERRUPT_LINE
, &pci_irq_line
);
669 pcibios_read_config_dword(pci_bus
, pci_device_fn
,
670 PCI_BASE_ADDRESS_0
, &pci_ioaddr
);
671 ioaddr
= pci_ioaddr
& ~3;;
676 /* Power-up the card. */
677 pcibios_read_config_word(pci_bus
, pci_device_fn
,
680 /* Save the ioaddr and IRQ info! */
681 printk(KERN_INFO
" A 3Com network adapter is powered down!"
682 " Setting the power state %4.4x->%4.4x.\n",
683 pwr_cmd
, pwr_cmd
& ~3);
684 pcibios_write_config_word(pci_bus
, pci_device_fn
,
686 printk(KERN_INFO
" Setting the IRQ to %d, IOADDR to %#lx.\n",
688 pcibios_write_config_byte(pci_bus
, pci_device_fn
,
689 PCI_INTERRUPT_LINE
, irq
);
690 pcibios_write_config_dword(pci_bus
, pci_device_fn
,
691 PCI_BASE_ADDRESS_0
, ioaddr
);
695 printk(KERN_WARNING
" A 3Com network adapter has been found, "
696 "however it has not been assigned an I/O address.\n"
697 " You may need to power-cycle the machine for this "
698 "device to work!\n");
702 if (check_region(ioaddr
, pci_tbl
[chip_idx
].io_size
))
705 /* Activate the card. */
706 pcibios_read_config_word(pci_bus
, pci_device_fn
,
707 PCI_COMMAND
, &pci_command
);
708 new_command
= pci_command
| PCI_COMMAND_MASTER
|PCI_COMMAND_IO
;
709 if (pci_command
!= new_command
) {
710 printk(KERN_INFO
" The PCI BIOS has not enabled the device "
711 "at %d/%d. Updating PCI command %4.4x->%4.4x.\n",
712 pci_bus
, pci_device_fn
, pci_command
, new_command
);
713 pcibios_write_config_word(pci_bus
, pci_device_fn
,
714 PCI_COMMAND
, new_command
);
717 dev
= vortex_probe1(pci_bus
, pci_device_fn
, dev
, ioaddr
, irq
,
718 chip_idx
, cards_found
);
721 /* Get and check the latency values. On the 3c590 series
722 the latency timer must be set to the maximum value to avoid
723 data corruption that occurs when the timer expires during
724 a transfer -- a bug in the Vortex chip only. */
726 u8 new_latency
= (device
& 0xff00) == 0x5900 ? 248 : 32;
728 pcibios_read_config_byte(pci_bus
, pci_device_fn
,
729 PCI_LATENCY_TIMER
, &pci_latency
);
730 if (pci_latency
< new_latency
) {
731 printk(KERN_INFO
"%s: Overriding PCI latency"
732 " timer (CFLT) setting of %d, new value is %d.\n",
733 dev
->name
, pci_latency
, new_latency
);
734 pcibios_write_config_byte(pci_bus
, pci_device_fn
,
735 PCI_LATENCY_TIMER
, new_latency
);
744 /* Now check all slots of the EISA bus. */
746 static long ioaddr
= 0x1000;
747 for ( ; ioaddr
< 0x9000; ioaddr
+= 0x1000) {
749 if (check_region(ioaddr
, VORTEX_TOTAL_SIZE
))
751 /* Check the standard EISA ID register for an encoded '3Com'. */
752 if (inw(ioaddr
+ 0xC80) != 0x6d50)
754 /* Check for a product that we support, 3c59{2,7} any rev. */
755 device_id
= (inb(ioaddr
+ 0xC82)<<8) + inb(ioaddr
+ 0xC83);
756 if ((device_id
& 0xFF00) != 0x5900)
758 vortex_probe1(0, 0, dev
, ioaddr
, inw(ioaddr
+ 0xC88) >> 12,
766 /* Special code to work-around the Compaq PCI BIOS32 problem. */
768 vortex_probe1(0, 0, dev
, compaq_ioaddr
, compaq_irq
,
769 compaq_device_id
, cards_found
++);
774 return cards_found
? 0 : -ENODEV
;
776 #endif /* ! Cardbus */
778 static struct device
*vortex_probe1(int pci_bus
, int pci_devfn
,
779 struct device
*dev
, long ioaddr
,
780 int irq
, int chip_idx
, int card_idx
)
782 struct vortex_private
*vp
;
784 unsigned int eeprom
[0x40], checksum
= 0; /* EEPROM contents */
787 dev
= init_etherdev(dev
, 0);
789 printk(KERN_INFO
"%s: 3Com %s at 0x%lx, ",
790 dev
->name
, pci_tbl
[chip_idx
].name
, ioaddr
);
792 dev
->base_addr
= ioaddr
;
796 /* Make certain the descriptor lists are aligned. */
798 void *mem
= kmalloc(sizeof(*vp
) + 15, GFP_KERNEL
);
799 vp
= (void *)(((long)mem
+ 15) & ~15);
802 memset(vp
, 0, sizeof(*vp
));
805 vp
->next_module
= root_vortex_dev
;
806 root_vortex_dev
= dev
;
808 vp
->chip_id
= chip_idx
;
809 vp
->pci_bus
= pci_bus
;
810 vp
->pci_devfn
= pci_devfn
;
812 /* The lower four bits are the media type. */
814 option
= dev
->mem_start
;
815 else if (card_idx
< MAX_UNITS
)
816 option
= options
[card_idx
];
821 vp
->media_override
= ((option
& 7) == 2) ? 0 : option
& 7;
822 vp
->full_duplex
= (option
& 8) ? 1 : 0;
823 vp
->bus_master
= (option
& 16) ? 1 : 0;
825 vp
->media_override
= 7;
829 if (card_idx
< MAX_UNITS
&& full_duplex
[card_idx
] > 0)
832 vp
->force_fd
= vp
->full_duplex
;
833 vp
->options
= option
;
835 /* Read the station address from the EEPROM. */
837 for (i
= 0; i
< 0x40; i
++) {
840 outw(0x230 + i
, ioaddr
+ Wn0EepromCmd
);
842 outw(EEPROM_Read
+ i
, ioaddr
+ Wn0EepromCmd
);
844 /* Pause for at least 162 us. for the read to take place. */
845 for (timer
= 10; timer
>= 0; timer
--) {
847 if ((inw(ioaddr
+ Wn0EepromCmd
) & 0x8000) == 0)
850 eeprom
[i
] = inw(ioaddr
+ Wn0EepromData
);
852 for (i
= 0; i
< 0x18; i
++)
853 checksum
^= eeprom
[i
];
854 checksum
= (checksum
^ (checksum
>> 8)) & 0xff;
855 if (checksum
!= 0x00) { /* Grrr, needless incompatible change 3Com. */
857 checksum
^= eeprom
[i
++];
858 checksum
= (checksum
^ (checksum
>> 8)) & 0xff;
860 if (checksum
!= 0x00)
861 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum
);
863 for (i
= 0; i
< 3; i
++)
864 ((u16
*)dev
->dev_addr
)[i
] = htons(eeprom
[i
+ 10]);
865 for (i
= 0; i
< 6; i
++)
866 printk("%c%2.2x", i
? ':' : ' ', dev
->dev_addr
[i
]);
868 printk(", IRQ %s\n", __irq_itoa(dev
->irq
));
870 printk(", IRQ %d\n", dev
->irq
);
871 /* Tell them about an invalid IRQ. */
872 if (vortex_debug
&& (dev
->irq
<= 0 || dev
->irq
>= NR_IRQS
))
873 printk(KERN_WARNING
" *** Warning: IRQ %d is unlikely to work! ***\n",
877 if (pci_tbl
[vp
->chip_id
].drv_flags
& HAS_CB_FNS
) {
878 u32 fn_st_addr
; /* Cardbus function status space */
879 pcibios_read_config_dword(pci_bus
, pci_devfn
, PCI_BASE_ADDRESS_2
,
882 vp
->cb_fn_base
= ioremap(fn_st_addr
& ~3, 128);
883 printk("%s: CardBus functions mapped %8.8x->%p (PCMCIA committee"
884 " brain-damage).\n", dev
->name
, fn_st_addr
, vp
->cb_fn_base
);
886 outw(0x10 | inw(ioaddr
+ Wn2_ResetOptions
), ioaddr
+ Wn2_ResetOptions
);
889 /* Extract our information from the EEPROM data. */
890 vp
->info1
= eeprom
[13];
891 vp
->info2
= eeprom
[15];
892 vp
->capabilities
= eeprom
[16];
894 if (vp
->info1
& 0x8000)
898 char *ram_split
[] = {"5:3", "3:1", "1:1", "3:5"};
899 union wn3_config config
;
901 vp
->available_media
= inw(ioaddr
+ Wn3_Options
);
902 if ((vp
->available_media
& 0xff) == 0) /* Broken 3c916 */
903 vp
->available_media
= 0x40;
904 config
.i
= inl(ioaddr
+ Wn3_Config
);
905 if (vortex_debug
> 1)
906 printk(KERN_DEBUG
" Internal config register is %4.4x, "
907 "transceivers %#x.\n", config
.i
, inw(ioaddr
+ Wn3_Options
));
908 printk(KERN_INFO
" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
909 8 << config
.u
.ram_size
,
910 config
.u
.ram_width
? "word" : "byte",
911 ram_split
[config
.u
.ram_split
],
912 config
.u
.autoselect
? "autoselect/" : "",
913 config
.u
.xcvr
> XCVR_ExtMII
? "<invalid transceiver>" :
914 media_tbl
[config
.u
.xcvr
].name
);
915 vp
->default_media
= config
.u
.xcvr
;
916 vp
->autoselect
= config
.u
.autoselect
;
919 if (vp
->media_override
!= 7) {
920 printk(KERN_INFO
" Media override to transceiver type %d (%s).\n",
921 vp
->media_override
, media_tbl
[vp
->media_override
].name
);
922 dev
->if_port
= vp
->media_override
;
924 dev
->if_port
= vp
->default_media
;
926 if (dev
->if_port
== XCVR_MII
|| dev
->if_port
== XCVR_NWAY
) {
927 int phy
, phy_idx
= 0;
929 mii_preamble_required
++;
930 mii_preamble_required
++;
931 mdio_read(ioaddr
, 24, 1);
932 for (phy
= 1; phy
<= 32 && phy_idx
< sizeof(vp
->phys
); phy
++) {
933 int mii_status
, phyx
= phy
& 0x1f;
934 mii_status
= mdio_read(ioaddr
, phyx
, 1);
935 if (mii_status
&& mii_status
!= 0xffff) {
936 vp
->phys
[phy_idx
++] = phyx
;
937 printk(KERN_INFO
" MII transceiver found at address %d,"
938 " status %4x.\n", phyx
, mii_status
);
939 if ((mii_status
& 0x0040) == 0)
940 mii_preamble_required
++;
943 mii_preamble_required
--;
945 printk(KERN_WARNING
" ***WARNING*** No MII transceivers found!\n");
948 vp
->advertising
= mdio_read(ioaddr
, vp
->phys
[0], 4);
949 if (vp
->full_duplex
) {
950 /* Only advertise the FD media types. */
951 vp
->advertising
&= ~0x02A0;
952 mdio_write(ioaddr
, vp
->phys
[0], 4, vp
->advertising
);
957 if (vp
->capabilities
& CapBusMaster
) {
958 vp
->full_bus_master_tx
= 1;
959 printk(KERN_INFO
" Enabling bus-master transmits and %s receives.\n",
960 (vp
->info2
& 1) ? "early" : "whole-frame" );
961 vp
->full_bus_master_rx
= (vp
->info2
& 1) ? 1 : 2;
964 /* We do a request_region() to register /proc/ioports info. */
965 request_region(ioaddr
, pci_tbl
[chip_idx
].io_size
, dev
->name
);
967 /* The 3c59x-specific entries in the device structure. */
968 dev
->open
= &vortex_open
;
969 dev
->hard_start_xmit
= &vortex_start_xmit
;
970 dev
->stop
= &vortex_close
;
971 dev
->get_stats
= &vortex_get_stats
;
972 dev
->do_ioctl
= &vortex_ioctl
;
973 dev
->set_multicast_list
= &set_rx_mode
;
980 vortex_open(struct device
*dev
)
982 long ioaddr
= dev
->base_addr
;
983 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
984 union wn3_config config
;
987 /* Before initializing select the active media port. */
989 config
.i
= inl(ioaddr
+ Wn3_Config
);
991 if (vp
->media_override
!= 7) {
992 if (vortex_debug
> 1)
993 printk(KERN_INFO
"%s: Media override to transceiver %d (%s).\n",
994 dev
->name
, vp
->media_override
,
995 media_tbl
[vp
->media_override
].name
);
996 dev
->if_port
= vp
->media_override
;
997 } else if (vp
->autoselect
&& pci_tbl
[vp
->chip_id
].drv_flags
& HAS_NWAY
) {
998 dev
->if_port
= XCVR_NWAY
;
999 } else if (vp
->autoselect
) {
1000 /* Find first available media type, starting with 100baseTx. */
1001 dev
->if_port
= XCVR_100baseTx
;
1002 while (! (vp
->available_media
& media_tbl
[dev
->if_port
].mask
))
1003 dev
->if_port
= media_tbl
[dev
->if_port
].next
;
1005 dev
->if_port
= vp
->default_media
;
1007 init_timer(&vp
->timer
);
1008 vp
->timer
.expires
= RUN_AT(media_tbl
[dev
->if_port
].wait
);
1009 vp
->timer
.data
= (unsigned long)dev
;
1010 vp
->timer
.function
= &vortex_timer
; /* timer handler */
1011 add_timer(&vp
->timer
);
1013 if (vortex_debug
> 1)
1014 printk(KERN_DEBUG
"%s: Initial media type %s.\n",
1015 dev
->name
, media_tbl
[dev
->if_port
].name
);
1017 vp
->full_duplex
= vp
->force_fd
;
1018 config
.u
.xcvr
= dev
->if_port
;
1019 outl(config
.i
, ioaddr
+ Wn3_Config
);
1021 if (dev
->if_port
== XCVR_MII
|| dev
->if_port
== XCVR_NWAY
) {
1022 int mii_reg1
, mii_reg5
;
1024 /* Read BMSR (reg1) only to clear old status. */
1025 mii_reg1
= mdio_read(ioaddr
, vp
->phys
[0], 1);
1026 mii_reg5
= mdio_read(ioaddr
, vp
->phys
[0], 5);
1027 if (mii_reg5
== 0xffff || mii_reg5
== 0x0000)
1028 ; /* No MII device or no link partner report */
1029 else if ((mii_reg5
& 0x0100) != 0 /* 100baseTx-FD */
1030 || (mii_reg5
& 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1031 vp
->full_duplex
= 1;
1032 if (vortex_debug
> 1)
1033 printk(KERN_INFO
"%s: MII #%d status %4.4x, link partner capability %4.4x,"
1034 " setting %s-duplex.\n", dev
->name
, vp
->phys
[0],
1035 mii_reg1
, mii_reg5
, vp
->full_duplex
? "full" : "half");
1039 /* Set the full-duplex bit. */
1040 outb(((vp
->info1
& 0x8000) || vp
->full_duplex
? 0x20 : 0) |
1041 (dev
->mtu
> 1500 ? 0x40 : 0), ioaddr
+ Wn3_MAC_Ctrl
);
1043 if (vortex_debug
> 1) {
1044 printk(KERN_DEBUG
"%s: vortex_open() InternalConfig %8.8x.\n",
1045 dev
->name
, config
.i
);
1048 outw(TxReset
, ioaddr
+ EL3_CMD
);
1049 for (i
= 2000; i
>= 0 ; i
--)
1050 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1053 outw(RxReset
, ioaddr
+ EL3_CMD
);
1054 /* Wait a few ticks for the RxReset command to complete. */
1055 for (i
= 2000; i
>= 0 ; i
--)
1056 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1059 outw(SetStatusEnb
| 0x00, ioaddr
+ EL3_CMD
);
1061 /* Use the now-standard shared IRQ implementation. */
1062 if (request_irq(dev
->irq
, &vortex_interrupt
, SA_SHIRQ
, dev
->name
, dev
)) {
1066 if (vortex_debug
> 1) {
1068 printk(KERN_DEBUG
"%s: vortex_open() irq %d media status %4.4x.\n",
1069 dev
->name
, dev
->irq
, inw(ioaddr
+ Wn4_Media
));
1072 /* Set the station address and mask in window 2 each time opened. */
1074 for (i
= 0; i
< 6; i
++)
1075 outb(dev
->dev_addr
[i
], ioaddr
+ i
);
1076 for (; i
< 12; i
+=2)
1077 outw(0, ioaddr
+ i
);
1079 if (dev
->if_port
== XCVR_10base2
)
1080 /* Start the thinnet transceiver. We should really wait 50ms...*/
1081 outw(StartCoax
, ioaddr
+ EL3_CMD
);
1082 if (dev
->if_port
!= XCVR_NWAY
) {
1084 outw((inw(ioaddr
+ Wn4_Media
) & ~(Media_10TP
|Media_SQE
)) |
1085 media_tbl
[dev
->if_port
].media_bits
, ioaddr
+ Wn4_Media
);
1088 /* Switch to the stats window, and clear all stats by reading. */
1089 outw(StatsDisable
, ioaddr
+ EL3_CMD
);
1091 for (i
= 0; i
< 10; i
++)
1095 /* New: On the Vortex we must also clear the BadSSD counter. */
1098 /* ..and on the Boomerang we enable the extra statistics bits. */
1099 outw(0x0040, ioaddr
+ Wn4_NetDiag
);
1101 /* Switch to register set 7 for normal use. */
1104 if (vp
->full_bus_master_rx
) { /* Boomerang bus master. */
1105 vp
->cur_rx
= vp
->dirty_rx
= 0;
1106 /* Initialize the RxEarly register as recommended. */
1107 outw(SetRxThreshold
+ (1536>>2), ioaddr
+ EL3_CMD
);
1108 outl(0x0020, ioaddr
+ PktStatus
);
1109 if (vortex_debug
> 2)
1110 printk(KERN_DEBUG
"%s: Filling in the Rx ring.\n", dev
->name
);
1111 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
1112 struct sk_buff
*skb
;
1113 vp
->rx_ring
[i
].next
= cpu_to_le32(virt_to_bus(&vp
->rx_ring
[i
+1]));
1114 vp
->rx_ring
[i
].status
= 0; /* Clear complete bit. */
1115 vp
->rx_ring
[i
].length
= cpu_to_le32(PKT_BUF_SZ
| LAST_FRAG
);
1116 skb
= dev_alloc_skb(PKT_BUF_SZ
);
1117 vp
->rx_skbuff
[i
] = skb
;
1119 break; /* Bad news! */
1120 skb
->dev
= dev
; /* Mark as being used by this device. */
1121 #if LINUX_VERSION_CODE >= 0x10300
1122 skb_reserve(skb
, 2); /* Align IP on 16 byte boundaries */
1123 vp
->rx_ring
[i
].addr
= cpu_to_le32(virt_to_bus(skb
->tail
));
1125 vp
->rx_ring
[i
].addr
= virt_to_bus(skb
->data
);
1128 /* Wrap the ring. */
1129 vp
->rx_ring
[i
-1].next
= cpu_to_le32(virt_to_bus(&vp
->rx_ring
[0]));
1130 outl(virt_to_bus(&vp
->rx_ring
[0]), ioaddr
+ UpListPtr
);
1132 if (vp
->full_bus_master_tx
) { /* Boomerang bus master Tx. */
1133 dev
->hard_start_xmit
= &boomerang_start_xmit
;
1134 vp
->cur_tx
= vp
->dirty_tx
= 0;
1135 outb(PKT_BUF_SZ
>>8, ioaddr
+ TxFreeThreshold
); /* Room for a packet. */
1136 /* Clear the Tx ring. */
1137 for (i
= 0; i
< TX_RING_SIZE
; i
++)
1138 vp
->tx_skbuff
[i
] = 0;
1139 outl(0, ioaddr
+ DownListPtr
);
1141 /* Set reciever mode: presumably accept b-case and phys addr only. */
1143 outw(StatsEnable
, ioaddr
+ EL3_CMD
); /* Turn on statistics. */
1145 vp
->in_interrupt
= 0;
1150 outw(RxEnable
, ioaddr
+ EL3_CMD
); /* Enable the receiver. */
1151 outw(TxEnable
, ioaddr
+ EL3_CMD
); /* Enable transmitter. */
1152 /* Allow status bits to be seen. */
1153 vp
->status_enable
= SetStatusEnb
| HostError
|IntReq
|StatsFull
|TxComplete
|
1154 (vp
->full_bus_master_tx
? DownComplete
: TxAvailable
) |
1155 (vp
->full_bus_master_rx
? UpComplete
: RxComplete
) |
1156 (vp
->bus_master
? DMADone
: 0);
1157 vp
->intr_enable
= SetIntrEnb
| IntLatch
| TxAvailable
| RxComplete
|
1158 StatsFull
| HostError
| TxComplete
| IntReq
1159 | (vp
->bus_master
? DMADone
: 0) | UpComplete
| DownComplete
;
1160 outw(vp
->status_enable
, ioaddr
+ EL3_CMD
);
1161 /* Ack all pending events, and set active indicator mask. */
1162 outw(AckIntr
| IntLatch
| TxAvailable
| RxEarly
| IntReq
,
1164 outw(vp
->intr_enable
, ioaddr
+ EL3_CMD
);
1165 if (vp
->cb_fn_base
) /* The PCMCIA people are idiots. */
1166 writel(0x8000, vp
->cb_fn_base
+ 4);
1173 static void vortex_timer(unsigned long data
)
1175 struct device
*dev
= (struct device
*)data
;
1176 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1177 long ioaddr
= dev
->base_addr
;
1180 int media_status
, mii_status
, old_window
;
1182 if (vortex_debug
> 1)
1183 printk(KERN_DEBUG
"%s: Media selection timer tick happened, %s.\n",
1184 dev
->name
, media_tbl
[dev
->if_port
].name
);
1186 disable_irq(dev
->irq
);
1187 old_window
= inw(ioaddr
+ EL3_CMD
) >> 13;
1189 media_status
= inw(ioaddr
+ Wn4_Media
);
1190 switch (dev
->if_port
) {
1191 case XCVR_10baseT
: case XCVR_100baseTx
: case XCVR_100baseFx
:
1192 if (media_status
& Media_LnkBeat
) {
1194 if (vortex_debug
> 1)
1195 printk(KERN_DEBUG
"%s: Media %s has link beat, %x.\n",
1196 dev
->name
, media_tbl
[dev
->if_port
].name
, media_status
);
1197 } else if (vortex_debug
> 1)
1198 printk(KERN_DEBUG
"%s: Media %s is has no link beat, %x.\n",
1199 dev
->name
, media_tbl
[dev
->if_port
].name
, media_status
);
1201 case XCVR_MII
: case XCVR_NWAY
:
1202 mii_status
= mdio_read(ioaddr
, vp
->phys
[0], 1);
1205 printk(KERN_DEBUG
"%s: MII transceiver has status %4.4x.\n",
1206 dev
->name
, mii_status
);
1207 if (mii_status
& 0x0004) {
1208 int mii_reg5
= mdio_read(ioaddr
, vp
->phys
[0], 5);
1209 if (! vp
->force_fd
&& mii_reg5
!= 0xffff) {
1210 int duplex
= (mii_reg5
&0x0100) ||
1211 (mii_reg5
& 0x01C0) == 0x0040;
1212 if (vp
->full_duplex
!= duplex
) {
1213 vp
->full_duplex
= duplex
;
1214 printk(KERN_INFO
"%s: Setting %s-duplex based on MII "
1215 "#%d link partner capability of %4.4x.\n",
1216 dev
->name
, vp
->full_duplex
? "full" : "half",
1217 vp
->phys
[0], mii_reg5
);
1218 /* Set the full-duplex bit. */
1219 outb((vp
->full_duplex
? 0x20 : 0) |
1220 (dev
->mtu
> 1500 ? 0x40 : 0),
1221 ioaddr
+ Wn3_MAC_Ctrl
);
1227 default: /* Other media types handled by Tx timeouts. */
1228 if (vortex_debug
> 1)
1229 printk(KERN_DEBUG
"%s: Media %s is has no indication, %x.\n",
1230 dev
->name
, media_tbl
[dev
->if_port
].name
, media_status
);
1234 union wn3_config config
;
1237 dev
->if_port
= media_tbl
[dev
->if_port
].next
;
1238 } while ( ! (vp
->available_media
& media_tbl
[dev
->if_port
].mask
));
1239 if (dev
->if_port
== XCVR_Default
) { /* Go back to default. */
1240 dev
->if_port
= vp
->default_media
;
1241 if (vortex_debug
> 1)
1242 printk(KERN_DEBUG
"%s: Media selection failing, using default "
1244 dev
->name
, media_tbl
[dev
->if_port
].name
);
1246 if (vortex_debug
> 1)
1247 printk(KERN_DEBUG
"%s: Media selection failed, now trying "
1249 dev
->name
, media_tbl
[dev
->if_port
].name
);
1250 next_tick
= RUN_AT(media_tbl
[dev
->if_port
].wait
);
1252 outw((media_status
& ~(Media_10TP
|Media_SQE
)) |
1253 media_tbl
[dev
->if_port
].media_bits
, ioaddr
+ Wn4_Media
);
1256 config
.i
= inl(ioaddr
+ Wn3_Config
);
1257 config
.u
.xcvr
= dev
->if_port
;
1258 outl(config
.i
, ioaddr
+ Wn3_Config
);
1260 outw(dev
->if_port
== XCVR_10base2
? StartCoax
: StopCoax
,
1263 EL3WINDOW(old_window
);
1264 enable_irq(dev
->irq
);
1266 if (vortex_debug
> 2)
1267 printk(KERN_DEBUG
"%s: Media selection timer finished, %s.\n",
1268 dev
->name
, media_tbl
[dev
->if_port
].name
);
1271 vp
->timer
.expires
= RUN_AT(next_tick
);
1272 add_timer(&vp
->timer
);
1277 static void vortex_tx_timeout(struct device
*dev
)
1279 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1280 long ioaddr
= dev
->base_addr
;
1283 printk(KERN_ERR
"%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1284 dev
->name
, inb(ioaddr
+ TxStatus
),
1285 inw(ioaddr
+ EL3_STATUS
));
1286 /* Slight code bloat to be user friendly. */
1287 if ((inb(ioaddr
+ TxStatus
) & 0x88) == 0x88)
1288 printk(KERN_ERR
"%s: Transmitter encountered 16 collisions --"
1289 " network cable problem?\n", dev
->name
);
1290 if (inw(ioaddr
+ EL3_STATUS
) & IntLatch
) {
1291 printk(KERN_ERR
"%s: Interrupt posted but not delivered --"
1292 " IRQ blocked by another device?\n", dev
->name
);
1293 /* Bad idea here.. but we might as well handle a few events. */
1294 vortex_interrupt(dev
->irq
, dev
, 0);
1296 outw(TxReset
, ioaddr
+ EL3_CMD
);
1297 for (j
= 200; j
>= 0 ; j
--)
1298 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1301 #if ! defined(final_version) && LINUX_VERSION_CODE >= 0x10300
1302 if (vp
->full_bus_master_tx
) {
1304 printk(KERN_DEBUG
" Flags; bus-master %d, full %d; dirty %d "
1306 vp
->full_bus_master_tx
, vp
->tx_full
, vp
->dirty_tx
, vp
->cur_tx
);
1307 printk(KERN_DEBUG
" Transmit list %8.8x vs. %p.\n",
1308 inl(ioaddr
+ DownListPtr
),
1309 &vp
->tx_ring
[vp
->dirty_tx
% TX_RING_SIZE
]);
1310 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
1311 printk(KERN_DEBUG
" %d: @%p length %8.8x status %8.8x\n", i
,
1313 le32_to_cpu(vp
->tx_ring
[i
].length
),
1314 le32_to_cpu(vp
->tx_ring
[i
].status
));
1318 vp
->stats
.tx_errors
++;
1319 if (vp
->full_bus_master_tx
) {
1320 if (vortex_debug
> 0)
1321 printk(KERN_DEBUG
"%s: Resetting the Tx ring pointer.\n",
1323 if (vp
->cur_tx
- vp
->dirty_tx
> 0 && inl(ioaddr
+ DownListPtr
) == 0)
1324 outl(virt_to_bus(&vp
->tx_ring
[vp
->dirty_tx
% TX_RING_SIZE
]),
1325 ioaddr
+ DownListPtr
);
1326 if (vp
->tx_full
&& (vp
->cur_tx
- vp
->dirty_tx
<= TX_RING_SIZE
- 1)) {
1328 clear_bit(0, (void*)&dev
->tbusy
);
1330 outb(PKT_BUF_SZ
>>8, ioaddr
+ TxFreeThreshold
);
1331 outw(DownUnstall
, ioaddr
+ EL3_CMD
);
1333 vp
->stats
.tx_dropped
++;
1335 /* Issue Tx Enable */
1336 outw(TxEnable
, ioaddr
+ EL3_CMD
);
1337 dev
->trans_start
= jiffies
;
1339 /* Switch to register set 7 for normal use. */
1344 * Handle uncommon interrupt sources. This is a separate routine to minimize
1348 vortex_error(struct device
*dev
, int status
)
1350 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1351 long ioaddr
= dev
->base_addr
;
1352 int do_tx_reset
= 0;
1355 if (status
& TxComplete
) { /* Really "TxError" for us. */
1356 unsigned char tx_status
= inb(ioaddr
+ TxStatus
);
1357 /* Presumably a tx-timeout. We must merely re-enable. */
1358 if (vortex_debug
> 2
1359 || (tx_status
!= 0x88 && vortex_debug
> 0))
1360 printk(KERN_DEBUG
"%s: Transmit error, Tx status register %2.2x.\n",
1361 dev
->name
, tx_status
);
1362 if (tx_status
& 0x14) vp
->stats
.tx_fifo_errors
++;
1363 if (tx_status
& 0x38) vp
->stats
.tx_aborted_errors
++;
1364 outb(0, ioaddr
+ TxStatus
);
1365 if (tx_status
& 0x30)
1367 else /* Merely re-enable the transmitter. */
1368 outw(TxEnable
, ioaddr
+ EL3_CMD
);
1370 if (status
& RxEarly
) { /* Rx early is unused. */
1372 outw(AckIntr
| RxEarly
, ioaddr
+ EL3_CMD
);
1374 if (status
& StatsFull
) { /* Empty statistics. */
1375 static int DoneDidThat
= 0;
1376 if (vortex_debug
> 4)
1377 printk(KERN_DEBUG
"%s: Updating stats.\n", dev
->name
);
1378 update_stats(ioaddr
, dev
);
1379 /* HACK: Disable statistics as an interrupt source. */
1380 /* This occurs when we have the wrong media type! */
1381 if (DoneDidThat
== 0 &&
1382 inw(ioaddr
+ EL3_STATUS
) & StatsFull
) {
1383 printk(KERN_WARNING
"%s: Updating statistics failed, disabling "
1384 "stats as an interrupt source.\n", dev
->name
);
1386 outw(SetIntrEnb
| (inw(ioaddr
+ 10) & ~StatsFull
), ioaddr
+ EL3_CMD
);
1391 if (status
& IntReq
) { /* Restore all interrupt sources. */
1392 outw(vp
->status_enable
, ioaddr
+ EL3_CMD
);
1393 outw(vp
->intr_enable
, ioaddr
+ EL3_CMD
);
1395 if (status
& HostError
) {
1398 fifo_diag
= inw(ioaddr
+ Wn4_FIFODiag
);
1399 if (vortex_debug
> 0)
1400 printk(KERN_ERR
"%s: Host error, FIFO diagnostic register %4.4x.\n",
1401 dev
->name
, fifo_diag
);
1402 /* Adapter failure requires Tx/Rx reset and reinit. */
1403 if (vp
->full_bus_master_tx
) {
1404 outw(TotalReset
| 0xff, ioaddr
+ EL3_CMD
);
1405 for (i
= 2000; i
>= 0 ; i
--)
1406 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1408 /* Re-enable the receiver. */
1409 outw(RxEnable
, ioaddr
+ EL3_CMD
);
1410 outw(TxEnable
, ioaddr
+ EL3_CMD
);
1411 } else if (fifo_diag
& 0x0400)
1413 if (fifo_diag
& 0x3000) {
1414 outw(RxReset
, ioaddr
+ EL3_CMD
);
1415 for (i
= 2000; i
>= 0 ; i
--)
1416 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1418 /* Set the Rx filter to the current state. */
1420 outw(RxEnable
, ioaddr
+ EL3_CMD
); /* Re-enable the receiver. */
1421 outw(AckIntr
| HostError
, ioaddr
+ EL3_CMD
);
1426 outw(TxReset
, ioaddr
+ EL3_CMD
);
1427 for (j
= 200; j
>= 0 ; j
--)
1428 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1430 outw(TxEnable
, ioaddr
+ EL3_CMD
);
1437 vortex_start_xmit(struct sk_buff
*skb
, struct device
*dev
)
1439 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1440 long ioaddr
= dev
->base_addr
;
1442 if (test_and_set_bit(0, (void*)&dev
->tbusy
) != 0) {
1443 if (jiffies
- dev
->trans_start
>= TX_TIMEOUT
)
1444 vortex_tx_timeout(dev
);
1448 /* Put out the doubleword header... */
1449 outl(skb
->len
, ioaddr
+ TX_FIFO
);
1450 if (vp
->bus_master
) {
1451 /* Set the bus-master controller to transfer the packet. */
1452 outl(virt_to_bus(skb
->data
), ioaddr
+ Wn7_MasterAddr
);
1453 outw((skb
->len
+ 3) & ~3, ioaddr
+ Wn7_MasterLen
);
1455 outw(StartDMADown
, ioaddr
+ EL3_CMD
);
1456 /* dev->tbusy will be cleared at the DMADone interrupt. */
1458 /* ... and the packet rounded to a doubleword. */
1459 outsl(ioaddr
+ TX_FIFO
, skb
->data
, (skb
->len
+ 3) >> 2);
1461 if (inw(ioaddr
+ TxFree
) > 1536) {
1462 clear_bit(0, (void*)&dev
->tbusy
);
1464 /* Interrupt us when the FIFO has room for max-sized packet. */
1465 outw(SetTxThreshold
+ (1536>>2), ioaddr
+ EL3_CMD
);
1468 dev
->trans_start
= jiffies
;
1470 /* Clear the Tx status stack. */
1475 while (--i
> 0 && (tx_status
= inb(ioaddr
+ TxStatus
)) > 0) {
1476 if (tx_status
& 0x3C) { /* A Tx-disabling error occurred. */
1477 if (vortex_debug
> 2)
1478 printk(KERN_DEBUG
"%s: Tx error, status %2.2x.\n",
1479 dev
->name
, tx_status
);
1480 if (tx_status
& 0x04) vp
->stats
.tx_fifo_errors
++;
1481 if (tx_status
& 0x38) vp
->stats
.tx_aborted_errors
++;
1482 if (tx_status
& 0x30) {
1484 outw(TxReset
, ioaddr
+ EL3_CMD
);
1485 for (j
= 200; j
>= 0 ; j
--)
1486 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1489 outw(TxEnable
, ioaddr
+ EL3_CMD
);
1491 outb(0x00, ioaddr
+ TxStatus
); /* Pop the status stack. */
1498 boomerang_start_xmit(struct sk_buff
*skb
, struct device
*dev
)
1500 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1501 long ioaddr
= dev
->base_addr
;
1503 if (test_and_set_bit(0, (void*)&dev
->tbusy
) != 0) {
1504 if (jiffies
- dev
->trans_start
>= TX_TIMEOUT
)
1505 vortex_tx_timeout(dev
);
1508 /* Calculate the next Tx descriptor entry. */
1509 int entry
= vp
->cur_tx
% TX_RING_SIZE
;
1510 struct boom_tx_desc
*prev_entry
=
1511 &vp
->tx_ring
[(vp
->cur_tx
-1) % TX_RING_SIZE
];
1512 unsigned long flags
;
1515 if (vortex_debug
> 3)
1516 printk(KERN_DEBUG
"%s: Trying to send a packet, Tx index %d.\n",
1517 dev
->name
, vp
->cur_tx
);
1519 if (vortex_debug
>0)
1520 printk(KERN_WARNING
"%s: Tx Ring full, refusing to send buffer.\n",
1524 vp
->tx_skbuff
[entry
] = skb
;
1525 vp
->tx_ring
[entry
].next
= 0;
1526 vp
->tx_ring
[entry
].addr
= cpu_to_le32(virt_to_bus(skb
->data
));
1527 vp
->tx_ring
[entry
].length
= cpu_to_le32(skb
->len
| LAST_FRAG
);
1528 vp
->tx_ring
[entry
].status
= cpu_to_le32(skb
->len
| TxIntrUploaded
);
1532 outw(DownStall
, ioaddr
+ EL3_CMD
);
1533 /* Wait for the stall to complete. */
1534 for (i
= 600; i
>= 0 ; i
--)
1535 if ( (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
) == 0)
1537 prev_entry
->next
= cpu_to_le32(virt_to_bus(&vp
->tx_ring
[entry
]));
1538 if (inl(ioaddr
+ DownListPtr
) == 0) {
1539 outl(virt_to_bus(&vp
->tx_ring
[entry
]), ioaddr
+ DownListPtr
);
1542 outw(DownUnstall
, ioaddr
+ EL3_CMD
);
1543 restore_flags(flags
);
1546 if (vp
->cur_tx
- vp
->dirty_tx
> TX_RING_SIZE
- 1)
1548 else { /* Clear previous interrupt enable. */
1549 prev_entry
->status
&= cpu_to_le32(~TxIntrUploaded
);
1550 clear_bit(0, (void*)&dev
->tbusy
);
1552 dev
->trans_start
= jiffies
;
1557 /* The interrupt handler does all of the Rx thread work and cleans up
1558 after the Tx thread. */
1559 static void vortex_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1561 struct device
*dev
= dev_id
;
1562 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1564 int latency
, status
;
1565 int work_done
= max_interrupt_work
;
1567 #if defined(__i386__)
1568 /* A lock to prevent simultaneous entry bug on Intel SMP machines. */
1569 if (test_and_set_bit(0, (void*)&dev
->interrupt
)) {
1570 printk(KERN_ERR
"%s: SMP simultaneous entry of an interrupt handler.\n",
1572 dev
->interrupt
= 0; /* Avoid halting machine. */
1576 if (dev
->interrupt
) {
1577 printk(KERN_ERR
"%s: Re-entering the interrupt handler.\n", dev
->name
);
1584 ioaddr
= dev
->base_addr
;
1585 latency
= inb(ioaddr
+ Timer
);
1586 status
= inw(ioaddr
+ EL3_STATUS
);
1588 if (vortex_debug
> 4)
1589 printk(KERN_DEBUG
"%s: interrupt, status %4.4x, latency %d ticks.\n",
1590 dev
->name
, status
, latency
);
1592 if (vortex_debug
> 5)
1593 printk(KERN_DEBUG
"%s: In interrupt loop, status %4.4x.\n",
1595 if (status
& RxComplete
)
1597 if (status
& UpComplete
) {
1598 outw(AckIntr
| UpComplete
, ioaddr
+ EL3_CMD
);
1602 if (status
& TxAvailable
) {
1603 if (vortex_debug
> 5)
1604 printk(KERN_DEBUG
" TX room bit was handled.\n");
1605 /* There's room in the FIFO for a full-sized packet. */
1606 outw(AckIntr
| TxAvailable
, ioaddr
+ EL3_CMD
);
1607 clear_bit(0, (void*)&dev
->tbusy
);
1611 if (status
& DownComplete
) {
1612 unsigned int dirty_tx
= vp
->dirty_tx
;
1614 while (vp
->cur_tx
- dirty_tx
> 0) {
1615 int entry
= dirty_tx
% TX_RING_SIZE
;
1616 if (inl(ioaddr
+ DownListPtr
) ==
1617 virt_to_bus(&vp
->tx_ring
[entry
]))
1618 break; /* It still hasn't been processed. */
1619 if (vp
->tx_skbuff
[entry
]) {
1620 DEV_FREE_SKB(vp
->tx_skbuff
[entry
]);
1621 vp
->tx_skbuff
[entry
] = 0;
1623 /* vp->stats.tx_packets++; Counted below. */
1626 vp
->dirty_tx
= dirty_tx
;
1627 outw(AckIntr
| DownComplete
, ioaddr
+ EL3_CMD
);
1628 if (vp
->tx_full
&& (vp
->cur_tx
- dirty_tx
<= TX_RING_SIZE
- 1)) {
1630 clear_bit(0, (void*)&dev
->tbusy
);
1634 if (status
& DMADone
) {
1635 if (inw(ioaddr
+ Wn7_MasterStatus
) & 0x1000) {
1636 outw(0x1000, ioaddr
+ Wn7_MasterStatus
); /* Ack the event. */
1637 DEV_FREE_SKB(vp
->tx_skb
); /* Release the transfered buffer */
1638 if (inw(ioaddr
+ TxFree
) > 1536) {
1639 clear_bit(0, (void*)&dev
->tbusy
);
1641 } else /* Interrupt when FIFO has room for max-sized packet. */
1642 outw(SetTxThreshold
+ (1536>>2), ioaddr
+ EL3_CMD
);
1645 /* Check for all uncommon interrupts at once. */
1646 if (status
& (HostError
| RxEarly
| StatsFull
| TxComplete
| IntReq
)) {
1647 if (status
== 0xffff)
1649 vortex_error(dev
, status
);
1652 if (--work_done
< 0) {
1653 if ((status
& (0x7fe - (UpComplete
| DownComplete
))) == 0) {
1654 /* Just ack these and return. */
1655 outw(AckIntr
| UpComplete
| DownComplete
, ioaddr
+ EL3_CMD
);
1657 printk(KERN_WARNING
"%s: Too much work in interrupt, status "
1658 "%4.4x. Temporarily disabling functions (%4.4x).\n",
1659 dev
->name
, status
, SetStatusEnb
| ((~status
) & 0x7FE));
1660 /* Disable all pending interrupts. */
1661 outw(SetStatusEnb
| ((~status
) & 0x7FE), ioaddr
+ EL3_CMD
);
1662 outw(AckIntr
| 0x7FF, ioaddr
+ EL3_CMD
);
1663 /* The timer will reenable interrupts. */
1667 /* Acknowledge the IRQ. */
1668 outw(AckIntr
| IntReq
| IntLatch
, ioaddr
+ EL3_CMD
);
1669 if (vp
->cb_fn_base
) /* The PCMCIA people are idiots. */
1670 writel(0x8000, vp
->cb_fn_base
+ 4);
1672 } while ((status
= inw(ioaddr
+ EL3_STATUS
)) & (IntLatch
| RxComplete
));
1674 if (vortex_debug
> 4)
1675 printk(KERN_DEBUG
"%s: exiting interrupt, status %4.4x.\n",
1678 #if defined(__i386__)
1679 clear_bit(0, (void*)&dev
->interrupt
);
1686 static int vortex_rx(struct device
*dev
)
1688 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1689 long ioaddr
= dev
->base_addr
;
1693 if (vortex_debug
> 5)
1694 printk(KERN_DEBUG
" In rx_packet(), status %4.4x, rx_status %4.4x.\n",
1695 inw(ioaddr
+EL3_STATUS
), inw(ioaddr
+RxStatus
));
1696 while ((rx_status
= inw(ioaddr
+ RxStatus
)) > 0) {
1697 if (rx_status
& 0x4000) { /* Error, update stats. */
1698 unsigned char rx_error
= inb(ioaddr
+ RxErrors
);
1699 if (vortex_debug
> 2)
1700 printk(KERN_DEBUG
" Rx error: status %2.2x.\n", rx_error
);
1701 vp
->stats
.rx_errors
++;
1702 if (rx_error
& 0x01) vp
->stats
.rx_over_errors
++;
1703 if (rx_error
& 0x02) vp
->stats
.rx_length_errors
++;
1704 if (rx_error
& 0x04) vp
->stats
.rx_frame_errors
++;
1705 if (rx_error
& 0x08) vp
->stats
.rx_crc_errors
++;
1706 if (rx_error
& 0x10) vp
->stats
.rx_length_errors
++;
1708 /* The packet length: up to 4.5K!. */
1709 int pkt_len
= rx_status
& 0x1fff;
1710 struct sk_buff
*skb
;
1712 skb
= dev_alloc_skb(pkt_len
+ 5);
1713 if (vortex_debug
> 4)
1714 printk(KERN_DEBUG
"Receiving packet size %d status %4.4x.\n",
1715 pkt_len
, rx_status
);
1718 skb_reserve(skb
, 2); /* Align IP on 16 byte boundaries */
1719 /* 'skb_put()' points to the start of sk_buff data area. */
1720 if (vp
->bus_master
&&
1721 ! (inw(ioaddr
+ Wn7_MasterStatus
) & 0x8000)) {
1722 outl(virt_to_bus(skb_put(skb
, pkt_len
)),
1723 ioaddr
+ Wn7_MasterAddr
);
1724 outw((skb
->len
+ 3) & ~3, ioaddr
+ Wn7_MasterLen
);
1725 outw(StartDMAUp
, ioaddr
+ EL3_CMD
);
1726 while (inw(ioaddr
+ Wn7_MasterStatus
) & 0x8000)
1729 insl(ioaddr
+ RX_FIFO
, skb_put(skb
, pkt_len
),
1730 (pkt_len
+ 3) >> 2);
1732 outw(RxDiscard
, ioaddr
+ EL3_CMD
); /* Pop top Rx packet. */
1733 skb
->protocol
= eth_type_trans(skb
, dev
);
1735 dev
->last_rx
= jiffies
;
1736 vp
->stats
.rx_packets
++;
1737 /* Wait a limited time to go to next packet. */
1738 for (i
= 200; i
>= 0; i
--)
1739 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1742 } else if (vortex_debug
)
1743 printk(KERN_NOTICE
"%s: No memory to allocate a sk_buff of "
1744 "size %d.\n", dev
->name
, pkt_len
);
1746 outw(RxDiscard
, ioaddr
+ EL3_CMD
);
1747 vp
->stats
.rx_dropped
++;
1748 /* Wait a limited time to skip this packet. */
1749 for (i
= 200; i
>= 0; i
--)
1750 if ( ! (inw(ioaddr
+ EL3_STATUS
) & CmdInProgress
))
1758 boomerang_rx(struct device
*dev
)
1760 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1761 int entry
= vp
->cur_rx
% RX_RING_SIZE
;
1762 long ioaddr
= dev
->base_addr
;
1764 int rx_work_limit
= vp
->dirty_rx
+ RX_RING_SIZE
- vp
->cur_rx
;
1766 if (vortex_debug
> 5)
1767 printk(KERN_DEBUG
" In boomerang_rx(), status %4.4x, rx_status "
1769 inw(ioaddr
+EL3_STATUS
), inw(ioaddr
+RxStatus
));
1770 while ((rx_status
= le32_to_cpu(vp
->rx_ring
[entry
].status
)) & RxDComplete
){
1771 if (--rx_work_limit
< 0)
1773 if (rx_status
& RxDError
) { /* Error, update stats. */
1774 unsigned char rx_error
= rx_status
>> 16;
1775 if (vortex_debug
> 2)
1776 printk(KERN_DEBUG
" Rx error: status %2.2x.\n", rx_error
);
1777 vp
->stats
.rx_errors
++;
1778 if (rx_error
& 0x01) vp
->stats
.rx_over_errors
++;
1779 if (rx_error
& 0x02) vp
->stats
.rx_length_errors
++;
1780 if (rx_error
& 0x04) vp
->stats
.rx_frame_errors
++;
1781 if (rx_error
& 0x08) vp
->stats
.rx_crc_errors
++;
1782 if (rx_error
& 0x10) vp
->stats
.rx_length_errors
++;
1784 /* The packet length: up to 4.5K!. */
1785 int pkt_len
= rx_status
& 0x1fff;
1786 struct sk_buff
*skb
;
1788 if (vortex_debug
> 4)
1789 printk(KERN_DEBUG
"Receiving packet size %d status %4.4x.\n",
1790 pkt_len
, rx_status
);
1792 /* Check if the packet is long enough to just accept without
1793 copying to a properly sized skbuff. */
1794 if (pkt_len
< rx_copybreak
1795 && (skb
= dev_alloc_skb(pkt_len
+ 2)) != 0) {
1797 skb_reserve(skb
, 2); /* Align IP on 16 byte boundaries */
1798 /* 'skb_put()' points to the start of sk_buff data area. */
1799 memcpy(skb_put(skb
, pkt_len
),
1800 bus_to_virt(le32_to_cpu(vp
->rx_ring
[entry
].addr
)),
1805 /* Pass up the skbuff already on the Rx ring. */
1806 skb
= vp
->rx_skbuff
[entry
];
1807 vp
->rx_skbuff
[entry
] = NULL
;
1808 temp
= skb_put(skb
, pkt_len
);
1809 /* Remove this checking code for final release. */
1810 if (bus_to_virt(le32_to_cpu(vp
->rx_ring
[entry
].addr
)) != temp
)
1811 printk(KERN_ERR
"%s: Warning -- the skbuff addresses do not match"
1812 " in boomerang_rx: %p vs. %p.\n", dev
->name
,
1813 bus_to_virt(le32_to_cpu(vp
->rx_ring
[entry
].addr
)),
1817 skb
->protocol
= eth_type_trans(skb
, dev
);
1818 { /* Use hardware checksum info. */
1819 int csum_bits
= rx_status
& 0xee000000;
1821 (csum_bits
== (IPChksumValid
| TCPChksumValid
) ||
1822 csum_bits
== (IPChksumValid
| UDPChksumValid
))) {
1823 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1828 dev
->last_rx
= jiffies
;
1829 vp
->stats
.rx_packets
++;
1831 entry
= (++vp
->cur_rx
) % RX_RING_SIZE
;
1833 /* Refill the Rx ring buffers. */
1834 for (; vp
->dirty_rx
< vp
->cur_rx
; vp
->dirty_rx
++) {
1835 struct sk_buff
*skb
;
1836 entry
= vp
->dirty_rx
% RX_RING_SIZE
;
1837 if (vp
->rx_skbuff
[entry
] == NULL
) {
1838 skb
= dev_alloc_skb(PKT_BUF_SZ
);
1840 break; /* Bad news! */
1841 skb
->dev
= dev
; /* Mark as being used by this device. */
1842 skb_reserve(skb
, 2); /* Align IP on 16 byte boundaries */
1843 vp
->rx_ring
[entry
].addr
= cpu_to_le32(virt_to_bus(skb
->tail
));
1844 vp
->rx_skbuff
[entry
] = skb
;
1846 vp
->rx_ring
[entry
].status
= 0; /* Clear complete bit. */
1847 outw(UpUnstall
, ioaddr
+ EL3_CMD
);
1853 vortex_close(struct device
*dev
)
1855 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1856 long ioaddr
= dev
->base_addr
;
1862 if (vortex_debug
> 1) {
1863 printk(KERN_DEBUG
"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
1864 dev
->name
, inw(ioaddr
+ EL3_STATUS
), inb(ioaddr
+ TxStatus
));
1865 printk(KERN_DEBUG
"%s: vortex close stats: rx_nocopy %d rx_copy %d"
1866 " tx_queued %d Rx pre-checksummed %d.\n",
1867 dev
->name
, rx_nocopy
, rx_copy
, queued_packet
, rx_csumhits
);
1870 del_timer(&vp
->timer
);
1872 /* Turn off statistics ASAP. We update vp->stats below. */
1873 outw(StatsDisable
, ioaddr
+ EL3_CMD
);
1875 /* Disable the receiver and transmitter. */
1876 outw(RxDisable
, ioaddr
+ EL3_CMD
);
1877 outw(TxDisable
, ioaddr
+ EL3_CMD
);
1879 if (dev
->if_port
== XCVR_10base2
)
1880 /* Turn off thinnet power. Green! */
1881 outw(StopCoax
, ioaddr
+ EL3_CMD
);
1883 free_irq(dev
->irq
, dev
);
1885 outw(SetIntrEnb
| 0x0000, ioaddr
+ EL3_CMD
);
1887 update_stats(ioaddr
, dev
);
1888 if (vp
->full_bus_master_rx
) { /* Free Boomerang bus master Rx buffers. */
1889 outl(0, ioaddr
+ UpListPtr
);
1890 for (i
= 0; i
< RX_RING_SIZE
; i
++)
1891 if (vp
->rx_skbuff
[i
]) {
1892 #if LINUX_VERSION_CODE < 0x20100
1893 vp
->rx_skbuff
[i
]->free
= 1;
1895 DEV_FREE_SKB(vp
->rx_skbuff
[i
]);
1896 vp
->rx_skbuff
[i
] = 0;
1899 if (vp
->full_bus_master_tx
) { /* Free Boomerang bus master Tx buffers. */
1900 outl(0, ioaddr
+ DownListPtr
);
1901 for (i
= 0; i
< TX_RING_SIZE
; i
++)
1902 if (vp
->tx_skbuff
[i
]) {
1903 DEV_FREE_SKB(vp
->tx_skbuff
[i
]);
1904 vp
->tx_skbuff
[i
] = 0;
1913 static struct net_device_stats
*vortex_get_stats(struct device
*dev
)
1915 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1916 unsigned long flags
;
1921 update_stats(dev
->base_addr
, dev
);
1922 restore_flags(flags
);
1927 /* Update statistics.
1928 Unlike with the EL3 we need not worry about interrupts changing
1929 the window setting from underneath us, but we must still guard
1930 against a race condition with a StatsUpdate interrupt updating the
1931 table. This is done by checking that the ASM (!) code generated uses
1932 atomic updates with '+='.
1934 static void update_stats(long ioaddr
, struct device
*dev
)
1936 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1938 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
1939 /* Switch to the stats window, and read everything. */
1941 vp
->stats
.tx_carrier_errors
+= inb(ioaddr
+ 0);
1942 vp
->stats
.tx_heartbeat_errors
+= inb(ioaddr
+ 1);
1943 /* Multiple collisions. */ inb(ioaddr
+ 2);
1944 vp
->stats
.collisions
+= inb(ioaddr
+ 3);
1945 vp
->stats
.tx_window_errors
+= inb(ioaddr
+ 4);
1946 vp
->stats
.rx_fifo_errors
+= inb(ioaddr
+ 5);
1947 vp
->stats
.tx_packets
+= inb(ioaddr
+ 6);
1948 vp
->stats
.tx_packets
+= (inb(ioaddr
+ 9)&0x30) << 4;
1949 /* Rx packets */ inb(ioaddr
+ 7); /* Must read to clear */
1950 /* Tx deferrals */ inb(ioaddr
+ 8);
1951 /* Don't bother with register 9, an extension of registers 6&7.
1952 If we do use the 6&7 values the atomic update assumption above
1954 inw(ioaddr
+ 10); /* Total Rx and Tx octets. */
1956 /* New: On the Vortex we must also clear the BadSSD counter. */
1960 /* We change back to window 7 (not 1) with the Vortex. */
1965 static int vortex_ioctl(struct device
*dev
, struct ifreq
*rq
, int cmd
)
1967 struct vortex_private
*vp
= (struct vortex_private
*)dev
->priv
;
1968 long ioaddr
= dev
->base_addr
;
1969 u16
*data
= (u16
*)&rq
->ifr_data
;
1970 int phy
= vp
->phys
[0] & 0x1f;
1973 case SIOCDEVPRIVATE
: /* Get the address of the PHY in use. */
1975 case SIOCDEVPRIVATE
+1: /* Read the specified MII register. */
1977 data
[3] = mdio_read(ioaddr
, data
[0] & 0x1f, data
[1] & 0x1f);
1979 case SIOCDEVPRIVATE
+2: /* Write the specified MII register */
1983 mdio_write(ioaddr
, data
[0] & 0x1f, data
[1] & 0x1f, data
[2]);
1990 /* Pre-Cyclone chips have no documented multicast filter, so the only
1991 multicast setting is to receive all multicast frames. At least
1992 the chip has a very clean way to set the mode, unlike many others. */
1993 static void set_rx_mode(struct device
*dev
)
1995 long ioaddr
= dev
->base_addr
;
1998 if (dev
->flags
& IFF_PROMISC
) {
1999 if (vortex_debug
> 0)
2000 printk(KERN_NOTICE
"%s: Setting promiscuous mode.\n", dev
->name
);
2001 new_mode
= SetRxFilter
|RxStation
|RxMulticast
|RxBroadcast
|RxProm
;
2002 } else if ((dev
->mc_list
) || (dev
->flags
& IFF_ALLMULTI
)) {
2003 new_mode
= SetRxFilter
|RxStation
|RxMulticast
|RxBroadcast
;
2005 new_mode
= SetRxFilter
| RxStation
| RxBroadcast
;
2007 outw(new_mode
, ioaddr
+ EL3_CMD
);
2011 /* MII transceiver control section.
2012 Read and write the MII registers using software-generated serial
2013 MDIO protocol. See the MII specifications or DP83840A data sheet
2016 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
2017 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
2018 "overclocking" issues. */
2019 #define mdio_delay() inl(mdio_addr)
2021 #define MDIO_SHIFT_CLK 0x01
2022 #define MDIO_DIR_WRITE 0x04
2023 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
2024 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
2025 #define MDIO_DATA_READ 0x02
2026 #define MDIO_ENB_IN 0x00
2028 /* Generate the preamble required for initial synchronization and
2029 a few older transceivers. */
2030 static void mdio_sync(long ioaddr
, int bits
)
2032 long mdio_addr
= ioaddr
+ Wn4_PhysicalMgmt
;
2034 /* Establish sync by sending at least 32 logic ones. */
2035 while (-- bits
>= 0) {
2036 outw(MDIO_DATA_WRITE1
, mdio_addr
);
2038 outw(MDIO_DATA_WRITE1
| MDIO_SHIFT_CLK
, mdio_addr
);
2043 static int mdio_read(long ioaddr
, int phy_id
, int location
)
2046 int read_cmd
= (0xf6 << 10) | (phy_id
<< 5) | location
;
2047 unsigned int retval
= 0;
2048 long mdio_addr
= ioaddr
+ Wn4_PhysicalMgmt
;
2050 if (mii_preamble_required
)
2051 mdio_sync(ioaddr
, 32);
2053 /* Shift the read command bits out. */
2054 for (i
= 14; i
>= 0; i
--) {
2055 int dataval
= (read_cmd
&(1<<i
)) ? MDIO_DATA_WRITE1
: MDIO_DATA_WRITE0
;
2056 outw(dataval
, mdio_addr
);
2058 outw(dataval
| MDIO_SHIFT_CLK
, mdio_addr
);
2061 /* Read the two transition, 16 data, and wire-idle bits. */
2062 for (i
= 19; i
> 0; i
--) {
2063 outw(MDIO_ENB_IN
, mdio_addr
);
2065 retval
= (retval
<< 1) | ((inw(mdio_addr
) & MDIO_DATA_READ
) ? 1 : 0);
2066 outw(MDIO_ENB_IN
| MDIO_SHIFT_CLK
, mdio_addr
);
2070 return (retval
>>1) & 0x1ffff;
2072 return retval
& 0x20000 ? 0xffff : retval
>>1 & 0xffff;
2076 static void mdio_write(long ioaddr
, int phy_id
, int location
, int value
)
2078 int write_cmd
= 0x50020000 | (phy_id
<< 23) | (location
<< 18) | value
;
2079 long mdio_addr
= ioaddr
+ Wn4_PhysicalMgmt
;
2082 if (mii_preamble_required
)
2083 mdio_sync(ioaddr
, 32);
2085 /* Shift the command bits out. */
2086 for (i
= 31; i
>= 0; i
--) {
2087 int dataval
= (write_cmd
&(1<<i
)) ? MDIO_DATA_WRITE1
: MDIO_DATA_WRITE0
;
2088 outw(dataval
, mdio_addr
);
2090 outw(dataval
| MDIO_SHIFT_CLK
, mdio_addr
);
2093 /* Leave the interface idle. */
2094 for (i
= 1; i
>= 0; i
--) {
2095 outw(MDIO_ENB_IN
, mdio_addr
);
2097 outw(MDIO_ENB_IN
| MDIO_SHIFT_CLK
, mdio_addr
);
2106 void cleanup_module(void)
2108 struct device
*next_dev
;
2111 unregister_driver(&vortex_ops
);
2114 /* No need to check MOD_IN_USE, as sys_delete_module() checks. */
2115 while (root_vortex_dev
) {
2116 struct vortex_private
*vp
=(void *)(root_vortex_dev
->priv
);
2117 next_dev
= vp
->next_module
;
2118 unregister_netdev(root_vortex_dev
);
2119 outw(TotalReset
, root_vortex_dev
->base_addr
+ EL3_CMD
);
2120 release_region(root_vortex_dev
->base_addr
,
2121 pci_tbl
[vp
->chip_id
].io_size
);
2122 kfree(root_vortex_dev
);
2123 kfree(vp
->priv_addr
);
2124 root_vortex_dev
= next_dev
;
2132 * compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c 3c59x.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
2133 * SMP-compile-command: "gcc -D__SMP__ -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c 3c59x.c"
2134 * cardbus-compile-command: "gcc -DCARDBUS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c 3c59x.c -o 3c575_cb.o -I/usr/src/pcmcia-cs-3.0.5/include/"