include/asm-arm/proc-armo/pgtable.h

   1 /*
   2  * linux/include/asm-arm/proc-armo/pgtable.h
   3  *
   4  * Copyright (C) 1995, 1996 Russell King
   5  * Modified 18/19-Oct-1997 for two-level page table
   6  */
   7 #ifndef __ASM_PROC_PGTABLE_H
   8 #define __ASM_PROC_PGTABLE_H
   9
  10 #include <linux/config.h>
  11 #include <linux/slab.h>
  12 #include <asm/arch/memory.h>            /* For TASK_SIZE */
  13
  14 #define LIBRARY_TEXT_START 0x0c000000
  15
  16 /*
  17  * Cache flushing...
  18  */
  19 #define flush_cache_all()                       do { } while (0)
  20 #define flush_cache_mm(mm)                      do { } while (0)
  21 #define flush_cache_range(mm,start,end)         do { } while (0)
  22 #define flush_cache_page(vma,vmaddr)            do { } while (0)
  23 #define flush_page_to_ram(page)                 do { } while (0)
  24 #define flush_icache_range(start,end)           do { } while (0)
  25
  26 /*
  27  * TLB flushing:
  28  *
  29  *  - flush_tlb() flushes the current mm struct TLBs
  30  *  - flush_tlb_all() flushes all processes TLBs
  31  *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
  32  *  - flush_tlb_page(vma, vmaddr) flushes one page
  33  *  - flush_tlb_range(mm, start, end) flushes a range of pages
  34  */
  35 #define flush_tlb()                     do { } while (0)
  36 #define flush_tlb_all()                 do { } while (0)
  37 #define flush_tlb_mm(mm)                do { } while (0)
  38 #define flush_tlb_range(mm, start, end) do { } while (0)
  39 #define flush_tlb_page(vma, vmaddr)     do { } while (0)
  40
  41 /*
  42  * We have a mem map cache...
  43  */
  44 extern __inline__ void update_memc_all(void)
  45 {
  46         struct task_struct *p;
  47
  48         p = &init_task;
  49         do {
  50                 processor.u.armv2._update_map(p);
  51                 p = p->next_task;
  52         } while (p != &init_task);
  53
  54         processor.u.armv2._remap_memc (current);
  55 }
  56
  57 extern __inline__ void update_memc_task(struct task_struct *tsk)
  58 {
  59         processor.u.armv2._update_map(tsk);
  60
  61         if (tsk == current)
  62                 processor.u.armv2._remap_memc (tsk);
  63 }
  64
  65 extern __inline__ void update_memc_mm(struct mm_struct *mm)
  66 {
  67         struct task_struct *p;
  68
  69         p = &init_task;
  70         do {
  71                 if (p->mm == mm)
  72                         processor.u.armv2._update_map(p);
  73                 p = p->next_task;
  74         } while (p != &init_task);
  75
  76         if (current->mm == mm)
  77                 processor.u.armv2._remap_memc (current);
  78 }
  79
  80 extern __inline__ void update_memc_addr(struct mm_struct *mm, unsigned long addr, pte_t pte)
  81 {
  82         struct task_struct *p;
  83
  84         p = &init_task;
  85         do {
  86                 if (p->mm == mm)
  87                         processor.u.armv2._update_mmu_cache(p, addr, pte);
  88                 p = p->next_task;
  89         } while (p != &init_task);
  90
  91         if (current->mm == mm)
  92                 processor.u.armv2._remap_memc (current);
  93 }
  94
  95 #define __flush_entry_to_ram(entry)
  96
  97 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  98 #define PMD_SHIFT       20
  99 #define PMD_SIZE        (1UL << PMD_SHIFT)
 100 #define PMD_MASK        (~(PMD_SIZE-1))
 101
 102 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 103 #define PGDIR_SHIFT     20
 104 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 105 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 106
 107 /*
 108  * entries per page directory level: the arm3 is one-level, so
 109  * we don't really have any PMD or PTE directory physically.
 110  *
 111  * 18-Oct-1997 RMK Now two-level (32x32)
 112  */
 113 #define PTRS_PER_PTE    32
 114 #define PTRS_PER_PMD    1
 115 #define PTRS_PER_PGD    32
 116 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
 117
 118 #define VMALLOC_START   0x01a00000
 119 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
 120 #define VMALLOC_END     0x01c00000
 121
 122 #define _PAGE_PRESENT           0x01
 123 #define _PAGE_READONLY          0x02
 124 #define _PAGE_NOT_USER          0x04
 125 #define _PAGE_OLD               0x08
 126 #define _PAGE_CLEAN             0x10
 127
 128 #define _PAGE_TABLE     (_PAGE_PRESENT)
 129 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN)
 130
 131 /*                               -- present --   -- !dirty --  --- !write ---   ---- !user --- */
 132 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY | _PAGE_NOT_USER)
 133 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_CLEAN                                  )
 134 #define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY                 )
 135 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY                 )
 136 #define PAGE_KERNEL     __pgprot(_PAGE_PRESENT                                | _PAGE_NOT_USER)
 137
 138 /*
 139  * The arm can't do page protection for execute, and considers that the same are read.
 140  * Also, write permissions imply read permissions. This is the closest we can get..
 141  */
 142 #define __P000  PAGE_NONE
 143 #define __P001  PAGE_READONLY
 144 #define __P010  PAGE_COPY
 145 #define __P011  PAGE_COPY
 146 #define __P100  PAGE_READONLY
 147 #define __P101  PAGE_READONLY
 148 #define __P110  PAGE_COPY
 149 #define __P111  PAGE_COPY
 150
 151 #define __S000  PAGE_NONE
 152 #define __S001  PAGE_READONLY
 153 #define __S010  PAGE_SHARED
 154 #define __S011  PAGE_SHARED
 155 #define __S100  PAGE_READONLY
 156 #define __S101  PAGE_READONLY
 157 #define __S110  PAGE_SHARED
 158 #define __S111  PAGE_SHARED
 159
 160 #undef TEST_VERIFY_AREA
 161
 162 extern unsigned long *empty_zero_page;
 163
 164 /*
 165  * BAD_PAGETABLE is used when we need a bogus page-table, while
 166  * BAD_PAGE is used for a bogus page.
 167  *
 168  * ZERO_PAGE is a global shared page that is always zero: used
 169  * for zero-mapped memory areas etc..
 170  */
 171 extern pte_t __bad_page(void);
 172 extern pte_t *__bad_pagetable(void);
 173
 174 #define BAD_PAGETABLE __bad_pagetable()
 175 #define BAD_PAGE __bad_page()
 176 #define ZERO_PAGE(vaddr) ((unsigned long) empty_zero_page)
 177
 178 /* number of bits that fit into a memory pointer */
 179 #define BYTES_PER_PTR                   (sizeof(unsigned long))
 180 #define BITS_PER_PTR                    (8*BYTES_PER_PTR)
 181
 182 /* to align the pointer to a pointer address */
 183 #define PTR_MASK                        (~(sizeof(void*)-1))
 184
 185 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
 186 #define SIZEOF_PTR_LOG2                 2
 187
 188 /* to find an entry in a page-table */
 189 #define PAGE_PTR(address) \
 190 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
 191
 192 /* to set the page-dir */
 193 #define SET_PAGE_DIR(tsk,pgdir)                                         \
 194 do {                                                                    \
 195         tsk->tss.memmap = (unsigned long)pgdir;                         \
 196         processor.u.armv2._update_map(tsk);                             \
 197         if ((tsk) == current)                                           \
 198                 processor.u.armv2._remap_memc (current);                \
 199 } while (0)
 200
 201 extern unsigned long physical_start;
 202 extern unsigned long physical_end;
 203
 204 #define pte_none(pte)           (!pte_val(pte))
 205 #define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
 206 #define pte_clear(ptep)         set_pte((ptep), __pte(0))
 207
 208 #define pmd_none(pmd)           (!pmd_val(pmd))
 209 #define pmd_bad(pmd)            ((pmd_val(pmd) & 0xfc000002))
 210 #define pmd_present(pmd)        (pmd_val(pmd) & _PAGE_PRESENT)
 211 #define pmd_clear(pmdp)         set_pmd(pmdp, __pmd(0))
 212
 213 /*
 214  * The "pgd_xxx()" functions here are trivial for a folded two-level
 215  * setup: the pgd is never bad, and a pmd always exists (as it's folded
 216  * into the pgd entry)
 217  */
 218 #define pgd_none(pgd)           (0)
 219 #define pgd_bad(pgd)            (0)
 220 #define pgd_present(pgd)        (1)
 221 #define pgd_clear(pgdp)
 222
 223 /*
 224  * The following only work if pte_present() is true.
 225  * Undefined behaviour if not..
 226  */
 227 extern inline int pte_read(pte_t pte)           { return !(pte_val(pte) & _PAGE_NOT_USER);     }
 228 extern inline int pte_write(pte_t pte)          { return !(pte_val(pte) & _PAGE_READONLY);     }
 229 extern inline int pte_exec(pte_t pte)           { return !(pte_val(pte) & _PAGE_NOT_USER);     }
 230 extern inline int pte_dirty(pte_t pte)          { return !(pte_val(pte) & _PAGE_CLEAN);        }
 231 extern inline int pte_young(pte_t pte)          { return !(pte_val(pte) & _PAGE_OLD);          }
 232 #define pte_cacheable(pte) 1
 233
 234 extern inline pte_t pte_nocache(pte_t pte)      { return pte; }
 235 extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) |= _PAGE_READONLY;  return pte; }
 236 extern inline pte_t pte_rdprotect(pte_t pte)    { pte_val(pte) |= _PAGE_NOT_USER;  return pte; }
 237 extern inline pte_t pte_exprotect(pte_t pte)    { pte_val(pte) |= _PAGE_NOT_USER;  return pte; }
 238 extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) |= _PAGE_CLEAN;     return pte; }
 239 extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) |= _PAGE_OLD;       return pte; }
 240
 241 extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) &= ~_PAGE_READONLY; return pte; }
 242 extern inline pte_t pte_mkread(pte_t pte)       { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; }
 243 extern inline pte_t pte_mkexec(pte_t pte)       { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; }
 244 extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) &= ~_PAGE_CLEAN;    return pte; }
 245 extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) &= ~_PAGE_OLD;      return pte; }
 246
 247 /*
 248  * Conversion functions: convert a page and protection to a page entry,
 249  * and a page entry and page directory to the page they refer to.
 250  */
 251 extern __inline__ pte_t mk_pte(unsigned long page, pgprot_t pgprot)
 252 {
 253         pte_t pte;
 254         pte_val(pte) = __virt_to_phys(page) | pgprot_val(pgprot);
 255         return pte;
 256 }
 257
 258 /* This takes a physical page address that is used by the remapping functions */
 259 extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
 260 {
 261         pte_t pte;
 262         pte_val(pte) = physpage + pgprot_val(pgprot);
 263         return pte;
 264 }
 265
 266 extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot)
 267 {
 268         pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
 269         return pte;
 270 }
 271
 272 /* Certain architectures need to do special things when pte's
 273  * within a page table are directly modified.  Thus, the following
 274  * hook is made available.
 275  */
 276 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
 277
 278 extern __inline__ unsigned long pte_page(pte_t pte)
 279 {
 280         return __phys_to_virt(pte_val(pte) & PAGE_MASK);
 281 }
 282
 283 extern __inline__ pmd_t mk_pmd(pte_t *ptep)
 284 {
 285         pmd_t pmd;
 286         pmd_val(pmd) = __virt_to_phys((unsigned long)ptep) | _PAGE_TABLE;
 287         return pmd;
 288 }
 289
 290 /* these are aliases for the above function */
 291 #define mk_user_pmd(ptep)   mk_pmd(ptep)
 292 #define mk_kernel_pmd(ptep) mk_pmd(ptep)
 293
 294 #define set_pmd(pmdp,pmd) ((*(pmdp)) = (pmd))
 295
 296 extern __inline__ unsigned long pmd_page(pmd_t pmd)
 297 {
 298         return __phys_to_virt(pmd_val(pmd) & ~_PAGE_TABLE);
 299 }
 300
 301 /* to find an entry in a kernel page-table-directory */
 302 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 303
 304 /* to find an entry in a page-table-directory */
 305 extern __inline__ pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
 306 {
 307         return mm->pgd + (address >> PGDIR_SHIFT);
 308 }
 309
 310 /* Find an entry in the second-level page table.. */
 311 #define pmd_offset(dir, address) ((pmd_t *)(dir))
 312
 313 /* Find an entry in the third-level page table.. */
 314 extern __inline__ pte_t * pte_offset(pmd_t *dir, unsigned long address)
 315 {
 316         return (pte_t *)pmd_page(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
 317 }
 318
 319 /*
 320  * Allocate and free page tables. The xxx_kernel() versions are
 321  * used to allocate a kernel page table - this turns on ASN bits
 322  * if any.
 323  */
 324
 325 #ifndef __SMP__
 326 #ifndef CONFIG_NO_PGT_CACHE
 327 extern struct pgtable_cache_struct {
 328         unsigned long *pgd_cache;
 329         unsigned long *pte_cache;
 330         unsigned long pgtable_cache_sz;
 331 } quicklists;
 332
 333 #define pmd_quicklist ((unsigned long *)0)
 334 #define pte_quicklist (quicklists.pte_cache)
 335 #define pgd_quicklist (quicklists.pgd_cache)
 336 #define pgtable_cache_size (quicklists.pgtable_cache_sz)
 337 #endif
 338
 339 #else
 340 #error Pgtable caches have to be per-CPU, so that no locking is needed.
 341 #endif
 342
 343 extern pgd_t *get_pgd_slow(void);
 344 extern void free_table(void *table);
 345
 346 #ifndef CONFIG_NO_PGT_CACHE
 347 extern __inline__ pgd_t *get_pgd_fast(void)
 348 {
 349         unsigned long *ret;
 350
 351         if((ret = pgd_quicklist) != NULL) {
 352                 pgd_quicklist = (unsigned long *)(*ret);
 353                 ret[0] = ret[1];
 354                 pgtable_cache_size--;
 355         } else
 356                 ret = (unsigned long *)get_pgd_slow();
 357         return (pgd_t *)ret;
 358 }
 359
 360 extern __inline__ void free_pgd_fast(pgd_t *pgd)
 361 {
 362         *(unsigned long *)pgd = (unsigned long) pgd_quicklist;
 363         pgd_quicklist = (unsigned long *) pgd;
 364         pgtable_cache_size++;
 365 }
 366 #endif
 367
 368 /* keep this as an inline so we get type checking */
 369 extern __inline__ void free_pgd_slow(pgd_t *pgd)
 370 {
 371         free_table((void *)pgd);
 372 }
 373
 374 extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted);
 375
 376 #ifndef CONFIG_NO_PGT_CACHE
 377 extern __inline__ pte_t *get_pte_fast(void)
 378 {
 379         unsigned long *ret;
 380
 381         if((ret = (unsigned long *)pte_quicklist) != NULL) {
 382                 pte_quicklist = (unsigned long *)(*ret);
 383                 ret[0] = ret[1];
 384                 pgtable_cache_size--;
 385         }
 386         return (pte_t *)ret;
 387 }
 388
 389 extern __inline__ void free_pte_fast(pte_t *pte)
 390 {
 391         *(unsigned long *)pte = (unsigned long) pte_quicklist;
 392         pte_quicklist = (unsigned long *) pte;
 393         pgtable_cache_size++;
 394 }
 395 #endif
 396
 397 /* keep this as an inline so we get type checking */
 398 extern __inline__ void free_pte_slow(pte_t *pte)
 399 {
 400         free_table((void *)pte);
 401 }
 402
 403 /* We don't use pmd cache, so this is a dummy routine */
 404 extern __inline__ pmd_t *get_pmd_fast(void)
 405 {
 406         return (pmd_t *)0;
 407 }
 408
 409 extern __inline__ void free_pmd_fast(pmd_t *pmd)
 410 {
 411 }
 412
 413 extern __inline__ void free_pmd_slow(pmd_t *pmd)
 414 {
 415 }
 416
 417 extern void __bad_pmd(pmd_t *pmd);
 418 extern void __bad_pmd_kernel(pmd_t *pmd);
 419
 420 #ifdef CONFIG_NO_PGT_CACHE
 421 #define pte_free_kernel(pte)    free_pte_slow(pte)
 422 #define pte_free(pte)           free_pte_slow(pte)
 423 #define pgd_free(pgd)           free_pgd_slow(pgd)
 424 #define pgd_alloc()             get_pgd_slow()
 425
 426 extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address)
 427 {
 428         address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 429
 430         if (pmd_none (*pmd)) {
 431                 return get_pte_slow(pmd, address);
 432         }
 433         if (pmd_bad (*pmd)) {
 434                 __bad_pmd(pmd);
 435                 return NULL;
 436         }
 437         return (pte_t *) pmd_page(*pmd) + address;
 438 }
 439 #else
 440 #define pte_free_kernel(pte)    free_pte_fast(pte)
 441 #define pte_free(pte)           free_pte_fast(pte)
 442 #define pgd_free(pgd)           free_pgd_fast(pgd)
 443 #define pgd_alloc()             get_pgd_fast()
 444
 445 extern __inline__ pte_t *pte_alloc(pmd_t * pmd, unsigned long address)
 446 {
 447         address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 448
 449         if (pmd_none (*pmd)) {
 450                 pte_t *page = (pte_t *) get_pte_fast();
 451
 452                 if (!page)
 453                         return get_pte_slow(pmd, address);
 454                 set_pmd(pmd, mk_pmd(page));
 455                 return page + address;
 456         }
 457         if (pmd_bad (*pmd)) {
 458                 __bad_pmd(pmd);
 459                 return NULL;
 460         }
 461         return (pte_t *) pmd_page(*pmd) + address;
 462 }
 463 #endif
 464
 465 /*
 466  * allocating and freeing a pmd is trivial: the 1-entry pmd is
 467  * inside the pgd, so has no extra memory associated with it.
 468  */
 469 extern __inline__ void pmd_free(pmd_t *pmd)
 470 {
 471 }
 472
 473 extern __inline__ pmd_t *pmd_alloc(pgd_t *pgd, unsigned long address)
 474 {
 475         return (pmd_t *) pgd;
 476 }
 477
 478 #define pmd_free_kernel         pmd_free
 479 #define pmd_alloc_kernel        pmd_alloc
 480 #define pte_alloc_kernel        pte_alloc
 481
 482 extern __inline__ void set_pgdir(unsigned long address, pgd_t entry)
 483 {
 484         struct task_struct * p;
 485
 486         read_lock(&tasklist_lock);
 487         for_each_task(p) {
 488                 if (!p->mm)
 489                         continue;
 490                 *pgd_offset(p->mm,address) = entry;
 491         }
 492         read_unlock(&tasklist_lock);
 493 #ifndef CONFIG_NO_PGT_CACHE
 494         {
 495                 pgd_t *pgd;
 496                 for (pgd = (pgd_t *)pgd_quicklist; pgd;
 497                      pgd = (pgd_t *)*(unsigned long *)pgd)
 498                         pgd[address >> PGDIR_SHIFT] = entry;
 499         }
 500 #endif
 501 }
 502
 503 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 504
 505 #define update_mmu_cache(vma,address,pte)
 506
 507 #define SWP_TYPE(entry) (((entry) >> 1) & 0x7f)
 508 #define SWP_OFFSET(entry) ((entry) >> 8)
 509 #define SWP_ENTRY(type,offset) (((type) << 1) | ((offset) <<  8))
 510
 511 #endif /* __ASM_PROC_PAGE_H */
 512