3 * setup.c: Baget/MIPS specific setup, including init of the feature struct.
5 * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
8 #include <linux/config.h>
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
13 #include <asm/addrspace.h>
14 #include <asm/reboot.h>
16 #include <asm/baget/baget.h>
18 extern long mips_memory_upper
;
20 extern void wbflush_setup(void);
22 #define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
23 #define MIN(a,b) (((a)<(b)) ? (a):(b))
25 __initfunc(static void vac_show(void))
28 unsigned short val
, decode
= vac_inw(VAC_DECODE_CTRL
);
29 unsigned short a24_base
= vac_inw(VAC_A24_BASE
);
30 unsigned long a24_addr
= ((unsigned long)
31 (a24_base
& VAC_A24_MASK
)) << 16;
32 char *decode_mode
[] = { "eprom", "vsb", "shared", "dram" };
33 char *address_mode
[] = { "", ", A16", ", A32/A24", ", A32/A24/A16" };
34 char *state
[] = { "", " on write", " on read", " on read/write", };
35 char *region_mode
[] = { "inactive", "shared", "vsb", "vme" };
36 char *asiz
[] = { "user", "A32", "A16", "A24" };
37 unsigned short regs
[] = { VAC_REG1
, VAC_REG2
, VAC_REG3
};
38 unsigned short bndr
[] = { VAC_DRAM_MASK
,VAC_BNDR2
,VAC_BNDR3
};
39 unsigned short io_sels
[] = { VAC_IOSEL0_CTRL
,
46 printk("[DSACKi %s, DRAMCS%s qualified, boundary%s qualified%s]\n",
47 (decode
& VAC_DECODE_DSACKI
) ? "on" : "off",
48 (decode
& VAC_DECODE_QFY_DRAMCS
) ? "" : " not",
49 (decode
& VAC_DECODE_QFY_BNDR
) ? "" : " not",
50 (decode
& VAC_DECODE_FPUCS
) ? ", fpu" : "");
53 if (decode
& VAC_DECODE_RDR_SLSEL0
)
54 printk("at %08lx (%d MB)\t[dram %s]\n",
55 ((unsigned long)vac_inw(VAC_SLSEL0_BASE
))<<16,
56 ((0xffff ^ vac_inw(VAC_SLSEL0_MASK
)) + 1) >> 4,
57 (decode
& VAC_DECODE_QFY_SLSEL0
) ? "qualified" : "");
62 if (decode
& VAC_DECODE_RDR_SLSEL1
)
63 printk("at %08lx (%d MB)\t[%s%s, %s]\n",
64 ((unsigned long)vac_inw(VAC_SLSEL1_BASE
))<<16,
65 ((0xffff ^ vac_inw(VAC_SLSEL1_MASK
)) + 1) >> 4,
66 decode_mode
[VAC_DECODE_MODE_VAL(decode
)],
67 address_mode
[VAC_DECODE_CMP_SLSEL1_VAL(decode
)],
68 (decode
& VAC_DECODE_QFY_SLSEL1
) ? "qualified" : "");
72 printk("icf global at %04x, module at %04x [%s]\n",
74 VAC_ICFSEL_GLOBAL_VAL(vac_inw(VAC_ICFSEL_BASE
)))<<4,
76 VAC_ICFSEL_MODULE_VAL(vac_inw(VAC_ICFSEL_BASE
)))<<4,
77 (decode
& VAC_DECODE_QFY_ICFSEL
) ? "qualified" : "");
80 printk("region0 at 00000000 (%dMB)\t[dram, %s, delay %d cpuclk"
82 (vac_inw(VAC_DRAM_MASK
)+1)>>4,
83 (decode
& VAC_DECODE_DSACK
) ? "D32" : "3state",
84 VAC_DECODE_CPUCLK_VAL(decode
));
86 for (i
= 0; i
< sizeof(regs
)/sizeof(regs
[0]); i
++) {
88 ((unsigned long)vac_inw(bndr
[i
]))<<16;
91 ((i
+1 == sizeof(bndr
)/sizeof(bndr
[0])) ?
92 0xff00 : vac_inw(bndr
[i
+1])))<<16;
95 val
= vac_inw(regs
[i
]);
96 printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
99 (unsigned int)((to
- from
) >> 20),
100 region_mode
[VAC_REG_MODE(val
)],
101 asiz
[VAC_REG_ASIZ_VAL(val
)],
102 ((val
& VAC_REG_WORD
) ? "D16" : "D32"),
103 CACHEABLE_STR(val
&VAC_A24_A24_CACHINH
));
105 if (a24_addr
>= from
&& a24_addr
< to
)
106 printk("\ta24 at %08lx (%dMB)\t[vme, A24/%s, %s]\n",
108 MIN((unsigned int)(a24_addr
- from
)>>20, 32),
109 (a24_base
& VAC_A24_DATAPATH
) ? "user" :
110 ((a24_base
& VAC_A24_D32_ENABLE
) ?
112 CACHEABLE_STR(a24_base
& VAC_A24_A24_CACHINH
));
115 printk("region4 at ff000000 (15MB)\t[eprom]\n");
116 val
= vac_inw(VAC_EPROMCS_CTRL
);
117 printk("\t[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
118 "read %d%s, write %d%s, assert %d%s]\n",
119 VAC_CTRL_DELAY_DSACKI_VAL(val
),
120 state
[val
& (VAC_CTRL_IORD
|VAC_CTRL_IOWR
)],
121 (val
& VAC_CTRL_DSACK0
) ? "dsack0*, " : "",
122 (val
& VAC_CTRL_DSACK1
) ? "dsack1*, " : "",
123 VAC_CTRL_RECOVERY_IOSELI_VAL(val
),
124 VAC_CTRL_DELAY_IORD_VAL(val
)/2,
125 (VAC_CTRL_DELAY_IORD_VAL(val
)&1) ? ".5" : "",
126 VAC_CTRL_DELAY_IOWR_VAL(val
)/2,
127 (VAC_CTRL_DELAY_IOWR_VAL(val
)&1) ? ".5" : "",
128 VAC_CTRL_DELAY_IOSELI_VAL(val
)/2,
129 (VAC_CTRL_DELAY_IOSELI_VAL(val
)&1) ? ".5" : "");
131 printk("region5 at fff00000 (896KB)\t[local io, %s]\n",
132 CACHEABLE_STR(vac_inw(VAC_A24_BASE
) & VAC_A24_IO_CACHINH
));
134 for (i
= 0; i
< sizeof(io_sels
)/sizeof(io_sels
[0]); i
++) {
135 val
= vac_inw(io_sels
[i
]);
136 printk("\tio%d[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
137 "\n\t read %d%s cpuclk, write %d%s cpuclk, "
138 "assert %d%s%s cpuclk]\n",
140 VAC_CTRL_DELAY_DSACKI_VAL(val
),
141 state
[val
& (VAC_CTRL_IORD
|VAC_CTRL_IOWR
)],
142 (val
& VAC_CTRL_DSACK0
) ? "dsack0*, " : "",
143 (val
& VAC_CTRL_DSACK1
) ? "dsack1*, " : "",
144 VAC_CTRL_RECOVERY_IOSELI_VAL(val
),
145 VAC_CTRL_DELAY_IORD_VAL(val
)/2,
146 (VAC_CTRL_DELAY_IORD_VAL(val
)&1) ? ".5" : "",
147 VAC_CTRL_DELAY_IOWR_VAL(val
)/2,
148 (VAC_CTRL_DELAY_IOWR_VAL(val
)&1) ? ".5" : "",
149 VAC_CTRL_DELAY_IOSELI_VAL(val
)/2,
150 (VAC_CTRL_DELAY_IOSELI_VAL(val
)&1) ? ".5" : "",
151 (vac_inw(VAC_DEV_LOC
) & VAC_DEV_LOC_IOSEL(i
)) ?
155 printk("region6 at fffe0000 (128KB)\t[vme, A16/%s, "
157 (a24_base
& VAC_A24_A16D32_ENABLE
) ?
158 ((a24_base
& VAC_A24_A16D32
) ? "D32" : "D16") : "user");
160 val
= vac_inw(VAC_SHRCS_CTRL
);
161 printk("shared[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
162 "read %d%s, write %d%s, assert %d%s]\n",
163 VAC_CTRL_DELAY_DSACKI_VAL(val
),
164 state
[val
& (VAC_CTRL_IORD
|VAC_CTRL_IOWR
)],
165 (val
& VAC_CTRL_DSACK0
) ? "dsack0*, " : "",
166 (val
& VAC_CTRL_DSACK1
) ? "dsack1*, " : "",
167 VAC_CTRL_RECOVERY_IOSELI_VAL(val
),
168 VAC_CTRL_DELAY_IORD_VAL(val
)/2,
169 (VAC_CTRL_DELAY_IORD_VAL(val
)&1) ? ".5" : "",
170 VAC_CTRL_DELAY_IOWR_VAL(val
)/2,
171 (VAC_CTRL_DELAY_IOWR_VAL(val
)&1) ? ".5" : "",
172 VAC_CTRL_DELAY_IOSELI_VAL(val
)/2,
173 (VAC_CTRL_DELAY_IOSELI_VAL(val
)&1) ? ".5" : "");
176 __initfunc(static void vac_init(void))
178 unsigned short mem_limit
= ((mips_memory_upper
-KSEG0
) >> 16);
180 switch(vac_inw(VAC_ID
)) {
182 printk("VAC068-F5: ");
188 panic("Unknown VAC revision number");
191 vac_outw(mem_limit
-1, VAC_DRAM_MASK
);
192 vac_outw(mem_limit
, VAC_BNDR2
);
193 vac_outw(mem_limit
, VAC_BNDR3
);
194 vac_outw(((BAGET_A24M_BASE
>>16)&~VAC_A24_D32_ENABLE
)|VAC_A24_DATAPATH
,
196 vac_outw(VAC_REG_INACTIVE
|VAC_REG_ASIZ0
,VAC_REG1
);
197 vac_outw(VAC_REG_INACTIVE
|VAC_REG_ASIZ0
,VAC_REG2
);
198 vac_outw(VAC_REG_MWB
|VAC_REG_ASIZ1
,VAC_REG3
);
199 vac_outw(BAGET_A24S_BASE
>>16,VAC_SLSEL0_BASE
);
200 vac_outw(BAGET_A24S_MASK
>>16,VAC_SLSEL0_MASK
);
201 vac_outw(BAGET_A24S_BASE
>>16,VAC_SLSEL1_BASE
);
202 vac_outw(BAGET_A24S_MASK
>>16,VAC_SLSEL1_MASK
);
203 vac_outw(BAGET_GSW_BASE
|BAGET_MSW_BASE(0),VAC_ICFSEL_BASE
);
204 vac_outw(VAC_DECODE_FPUCS
|
205 VAC_DECODE_CPUCLK(3)|
206 VAC_DECODE_RDR_SLSEL0
|VAC_DECODE_RDR_SLSEL1
|
209 VAC_DECODE_QFY_ICFSEL
|
210 VAC_DECODE_QFY_SLSEL1
|VAC_DECODE_QFY_SLSEL0
|
211 VAC_DECODE_CMP_SLSEL1_HI
|
213 VAC_DECODE_QFY_DRAMCS
|
214 VAC_DECODE_DSACKI
,VAC_DECODE_CTRL
);
215 vac_outw(VAC_PIO_FUNC_UART_A_TX
|VAC_PIO_FUNC_UART_A_RX
|
216 VAC_PIO_FUNC_UART_B_TX
|VAC_PIO_FUNC_UART_B_RX
|
219 VAC_PIO_FUNC_IRQ7
|VAC_PIO_FUNC_IRQ10
|VAC_PIO_FUNC_IRQ11
|
221 VAC_PIO_FUNC_FCIACK
,VAC_PIO_FUNC
);
222 vac_outw(VAC_PIO_DIR_FCIACK
|
236 VAC_PIO_DIR_OUT(13),VAC_PIO_DIRECTION
);
237 vac_outw(VAC_DEV_LOC_IOSEL(2),VAC_DEV_LOC
);
238 vac_outw(VAC_CTRL_IOWR
|
239 VAC_CTRL_DELAY_IOWR(3)|
240 VAC_CTRL_DELAY_IORD(3)|
241 VAC_CTRL_RECOVERY_IOSELI(1)|
242 VAC_CTRL_DELAY_DSACKI(8),VAC_SHRCS_CTRL
);
243 vac_outw(VAC_CTRL_IOWR
|
244 VAC_CTRL_DELAY_IOWR(3)|
245 VAC_CTRL_DELAY_IORD(3)|
246 VAC_CTRL_RECOVERY_IOSELI(1)|
247 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
248 VAC_CTRL_DELAY_DSACKI(8),VAC_EPROMCS_CTRL
);
249 vac_outw(VAC_CTRL_IOWR
|
250 VAC_CTRL_DELAY_IOWR(3)|
251 VAC_CTRL_DELAY_IORD(3)|
252 VAC_CTRL_RECOVERY_IOSELI(2)|
253 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
254 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL0_CTRL
);
255 vac_outw(VAC_CTRL_IOWR
|
256 VAC_CTRL_DELAY_IOWR(3)|
257 VAC_CTRL_DELAY_IORD(3)|
258 VAC_CTRL_RECOVERY_IOSELI(2)|
259 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
260 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL1_CTRL
);
261 vac_outw(VAC_CTRL_IOWR
|
262 VAC_CTRL_DELAY_IOWR(3)|
263 VAC_CTRL_DELAY_IORD(3)|
264 VAC_CTRL_RECOVERY_IOSELI(2)|
265 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
266 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL2_CTRL
);
267 vac_outw(VAC_CTRL_IOWR
|
268 VAC_CTRL_DELAY_IOWR(3)|
269 VAC_CTRL_DELAY_IORD(3)|
270 VAC_CTRL_RECOVERY_IOSELI(2)|
271 VAC_CTRL_DSACK0
|VAC_CTRL_DSACK1
|
272 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL3_CTRL
);
273 vac_outw(VAC_CTRL_IOWR
|
274 VAC_CTRL_DELAY_IOWR(3)|
275 VAC_CTRL_DELAY_IORD(3)|
276 VAC_CTRL_RECOVERY_IOSELI(2)|
277 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL4_CTRL
);
278 vac_outw(VAC_CTRL_IOWR
|
279 VAC_CTRL_DELAY_IOWR(3)|
280 VAC_CTRL_DELAY_IORD(3)|
281 VAC_CTRL_RECOVERY_IOSELI(2)|
282 VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL5_CTRL
);
287 __initfunc(static void vac_start(void))
290 vac_outw(VAC_INT_CTRL_TIMER_DISABLE
|
291 VAC_INT_CTRL_UART_B_DISABLE
|
292 VAC_INT_CTRL_UART_A_DISABLE
|
293 VAC_INT_CTRL_MBOX_DISABLE
|
294 VAC_INT_CTRL_PIO4_DISABLE
|
295 VAC_INT_CTRL_PIO7_DISABLE
|
296 VAC_INT_CTRL_PIO8_DISABLE
|
297 VAC_INT_CTRL_PIO9_DISABLE
,VAC_INT_CTRL
);
298 vac_outw(VAC_INT_CTRL_TIMER_PIO10
|
299 VAC_INT_CTRL_UART_B_PIO7
|
300 VAC_INT_CTRL_UART_A_PIO7
,VAC_INT_CTRL
);
302 * Set quadro speed for both UARTs.
303 * To do it we need use formulae from VIC/VAC manual,
304 * keeping in mind Baget's 50MHz frequency...
306 vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV
);
309 __initfunc(static void vic_show(void))
312 char *timeout
[] = { "4", "16", "32", "64", "128", "256", "disabled" };
313 char *deadlock
[] = { "[dedlk only]", "[dedlk only]",
314 "[dedlk], [halt w/ rmc], [lberr]",
315 "[dedlk], [halt w/o rmc], [lberr]" };
317 val
= vic_inb(VIC_IFACE_CFG
);
318 if (val
& VIC_IFACE_CFG_VME
)
319 printk("VMEbus controller ");
320 if (val
& VIC_IFACE_CFG_TURBO
)
322 if (val
& VIC_IFACE_CFG_MSTAB
)
323 printk("metastability delay ");
325 deadlock
[VIC_IFACE_CFG_DEADLOCK_VAL(val
)]);
328 printk("interrupts: ");
329 val
= vic_inb(VIC_ERR_INT
);
330 if (!(val
& VIC_ERR_INT_SYSFAIL
))
332 if (!(val
& VIC_ERR_INT_TIMO
))
334 if (!(val
& VIC_ERR_INT_WRPOST
))
335 printk("[write post]");
336 if (!(val
& VIC_ERR_INT_ACFAIL
))
340 printk("timeouts: ");
341 val
= vic_inb(VIC_XFER_TIMO
);
342 printk("local %s, vme %s ",
343 timeout
[VIC_XFER_TIMO_LOCAL_PERIOD_VAL(val
)],
344 timeout
[VIC_XFER_TIMO_VME_PERIOD_VAL(val
)]);
345 if (val
& VIC_XFER_TIMO_VME
)
346 printk("acquisition ");
347 if (val
& VIC_XFER_TIMO_ARB
)
348 printk("arbitration ");
351 val
= vic_inb(VIC_LOCAL_TIM
);
352 printk("pas time: (%d,%d), ds time: %d\n",
353 VIC_LOCAL_TIM_PAS_ASSERT_VAL(val
),
354 VIC_LOCAL_TIM_PAS_DEASSERT_VAL(val
),
355 VIC_LOCAT_TIM_DS_DEASSERT_VAL(val
));
357 val
= vic_inb(VIC_BXFER_DEF
);
359 if (val
& VIC_BXFER_DEF_DUAL
)
360 printk("[dual path]");
361 if (val
& VIC_BXFER_DEF_LOCAL_CROSS
)
362 printk("[local boundary cross]");
363 if (val
& VIC_BXFER_DEF_VME_CROSS
)
364 printk("[vme boundary cross]");
368 __initfunc(static void vic_init(void))
370 unsigned char id
= vic_inb(VIC_ID
);
371 if ((id
& 0xf0) != 0xf0)
372 panic("VIC not found");
373 printk(" VIC068A Rev. %X: ", id
& 0x0f);
375 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_II
);
376 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT1
);
377 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT2
);
378 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT3
);
379 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
,VIC_VME_INT4
);
381 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT5);
383 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
, VIC_VME_INT6
);
385 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
, VIC_VME_INT7
);
386 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE
, VIC_DMA_INT
);
387 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
388 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT1
);
389 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
390 VIC_INT_HIGH
|VIC_INT_DISABLE
, VIC_LINT2
);
391 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
392 VIC_INT_HIGH
|VIC_INT_DISABLE
, VIC_LINT3
);
393 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
394 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT4
);
396 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_LEVEL|
397 VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT5);
399 vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
400 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT6
);
401 vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO
|VIC_INT_EDGE
|
402 VIC_INT_LOW
|VIC_INT_DISABLE
, VIC_LINT7
);
404 vic_outb(VIC_INT_IPL(3)|
408 VIC_INT_SWITCH(3), VIC_ICGS_INT
);
409 vic_outb(VIC_INT_IPL(3)|
413 VIC_INT_SWITCH(3), VIC_ICMS_INT
);
414 vic_outb(VIC_INT_IPL(6)|
418 VIC_ERR_INT_ACFAIL
, VIC_ERR_INT
);
419 vic_outb(VIC_ICxS_BASE_ID(0xf), VIC_ICGS_BASE
);
420 vic_outb(VIC_ICxS_BASE_ID(0xe), VIC_ICMS_BASE
);
421 vic_outb(VIC_LOCAL_BASE_ID(0x6), VIC_LOCAL_BASE
);
422 vic_outb(VIC_ERR_BASE_ID(0x3), VIC_ERR_BASE
);
423 vic_outb(VIC_XFER_TIMO_VME_PERIOD_32
|
424 VIC_XFER_TIMO_LOCAL_PERIOD_32
, VIC_XFER_TIMO
);
425 vic_outb(VIC_LOCAL_TIM_PAS_ASSERT(2)|
426 VIC_LOCAT_TIM_DS_DEASSERT(1)|
427 VIC_LOCAL_TIM_PAS_DEASSERT(1), VIC_LOCAL_TIM
);
428 vic_outb(VIC_BXFER_DEF_VME_CROSS
|
429 VIC_BXFER_DEF_LOCAL_CROSS
|
431 VIC_BXFER_DEF_DUAL
, VIC_BXFER_DEF
);
432 vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE
|
433 VIC_SSxCR0_A32
|VIC_SSxCR0_D32
|
434 VIC_SS0CR0_TIMER_FREQ_NONE
, VIC_SS0CR0
);
435 vic_outb(VIC_SSxCR1_TF1(0xf)|
436 VIC_SSxCR1_TF2(0xf), VIC_SS0CR1
);
437 vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE
|
438 VIC_SSxCR0_A24
|VIC_SSxCR0_D32
, VIC_SS1CR0
);
439 vic_outb(VIC_SSxCR1_TF1(0xf)|
440 VIC_SSxCR1_TF2(0xf), VIC_SS1CR1
);
441 vic_outb(VIC_IFACE_CFG_NOHALT
|
442 VIC_IFACE_CFG_NOTURBO
, VIC_IFACE_CFG
);
443 vic_outb(VIC_AMS_CODE(0), VIC_AMS
);
444 vic_outb(VIC_BXFER_CTRL_INTERLEAVE(0), VIC_BXFER_CTRL
);
445 vic_outb(0, VIC_BXFER_LEN_LO
);
446 vic_outb(0, VIC_BXFER_LEN_HI
);
447 vic_outb(VIC_REQ_CFG_FAIRNESS_DISABLED
|
448 VIC_REQ_CFG_LEVEL(3)|
449 VIC_REQ_CFG_RR_ARBITRATION
, VIC_REQ_CFG
);
450 vic_outb(VIC_RELEASE_BLKXFER_BLEN(0)|
451 VIC_RELEASE_RWD
, VIC_RELEASE
);
452 vic_outb(VIC_IC6_RUN
, VIC_IC6
);
453 vic_outb(0, VIC_IC7
);
458 static void vic_start(void)
460 vic_outb(VIC_INT_IPL(3)|
464 VIC_INT_ENABLE
, VIC_LINT7
);
467 __initfunc(void baget_irq_setup(void))
469 extern void bagetIRQ(void);
471 /* Now, it's safe to set the exception vector. */
472 set_except_vector(0, bagetIRQ
);
475 extern void baget_machine_restart(char *command
);
476 extern void baget_machine_halt(void);
477 extern void baget_machine_power_off(void);
479 __initfunc(void baget_setup(void))
481 printk("BT23/63-201n found.\n");
482 *BAGET_WRERR_ACK
= 0;
483 irq_setup
= baget_irq_setup
;
487 _machine_restart
= baget_machine_restart
;
488 _machine_halt
= baget_machine_halt
;
489 _machine_power_off
= baget_machine_power_off
;