include/asm-sh/mmu_context.h

   1 /*
   2  * Copyright (C) 1999 Niibe Yutaka
   3  *
   4  * ASID handling idea taken from MIPS implementation.
   5  */
   6 #ifndef __ASM_SH_MMU_CONTEXT_H
   7 #define __ASM_SH_MMU_CONTEXT_H
   8
   9 /* The MMU "context" consists of two things:
  10      (a) TLB cache version (or round, cycle whatever expression you like)
  11      (b) ASID (Address Space IDentifier)
  12  */
  13
  14 /*
  15  * Cache of MMU context last used.
  16  */
  17 extern unsigned long mmu_context_cache;
  18
  19 #define MMU_CONTEXT_ASID_MASK           0x000000ff
  20 #define MMU_CONTEXT_VERSION_MASK        0xffffff00
  21 #define MMU_CONTEXT_FIRST_VERSION       0x00000100
  22 #define NO_CONTEXT                      0
  23
  24 /* ASID is 8-bit value, so it can't be 0x100 */
  25 #define MMU_NO_ASID                     0x100
  26
  27 /*
  28  * Virtual Page Number mask
  29  */
  30 #define MMU_VPN_MASK    0xfffff000
  31
  32 extern __inline__ void
  33 get_new_mmu_context(struct mm_struct *mm)
  34 {
  35         extern void flush_tlb_all(void);
  36
  37         unsigned long mc = ++mmu_context_cache;
  38
  39         if (!(mc & MMU_CONTEXT_ASID_MASK)) {
  40                 /* We exhaust ASID of this version.
  41                    Flush all TLB and start new cycle. */
  42                 flush_tlb_all();
  43                 /* Fix version if needed.
  44                    Note that we avoid version #0 to distingush NO_CONTEXT. */
  45                 if (!mc)
  46                         mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
  47         }
  48         mm->context = mc;
  49 }
  50
  51 /*
  52  * Get MMU context if needed.
  53  */
  54 extern __inline__ void
  55 get_mmu_context(struct mm_struct *mm)
  56 {
  57         if (mm) {
  58                 unsigned long mc = mmu_context_cache;
  59                 /* Check if we have old version of context.
  60                    If it's old, we need to get new context with new version. */
  61                 if ((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK)
  62                         get_new_mmu_context(mm);
  63         }
  64 }
  65
  66 /*
  67  * Initialize the context related info for a new mm_struct
  68  * instance.
  69  */
  70 extern __inline__ int init_new_context(struct task_struct *tsk,
  71                                         struct mm_struct *mm)
  72 {
  73         mm->context = NO_CONTEXT;
  74         return 0;
  75 }
  76
  77 /*
  78  * Destroy context related info for an mm_struct that is about
  79  * to be put to rest.
  80  */
  81 extern __inline__ void destroy_context(struct mm_struct *mm)
  82 {
  83         /* Do nothing */
  84 }
  85
  86 /* Other MMU related constants. */
  87
  88 #if defined(__sh3__)
  89 #define MMU_PTEH        0xFFFFFFF0      /* Page table entry register HIGH */
  90 #define MMU_PTEL        0xFFFFFFF4      /* Page table entry register LOW */
  91 #define MMU_TTB         0xFFFFFFF8      /* Translation table base register */
  92 #define MMU_TEA         0xFFFFFFFC      /* TLB Exception Address */
  93
  94 #define MMUCR           0xFFFFFFE0      /* MMU Control Register */
  95
  96 #define MMU_TLB_ADDRESS_ARRAY   0xF2000000
  97 #define MMU_PAGE_ASSOC_BIT      0x80
  98
  99 #define MMU_NTLB_ENTRIES        128     /* for 7708 */
 100 #define MMU_CONTROL_INIT        0x007   /* SV=0, TF=1, IX=1, AT=1 */
 101
 102 #elif defined(__SH4__)
 103 #define MMU_PTEH        0xFF000000      /* Page table entry register HIGH */
 104 #define MMU_PTEL        0xFF000004      /* Page table entry register LOW */
 105 #define MMU_TTB         0xFF000008      /* Translation table base register */
 106 #define MMU_TEA         0xFF00000C      /* TLB Exception Address */
 107
 108 #define MMUCR           0xFF000010      /* MMU Control Register */
 109
 110 #define MMU_ITLB_ADDRESS_ARRAY  0xF2000000
 111 #define MMU_UTLB_ADDRESS_ARRAY  0xF6000000
 112 #define MMU_PAGE_ASSOC_BIT      0x80
 113
 114 #define MMU_NTLB_ENTRIES        64      /* for 7750 */
 115 #define MMU_CONTROL_INIT        0x205   /* SQMD=1, SV=0, TI=1, AT=1 */
 116
 117 #define MMU_ITLB_DATA_ARRAY     0xF3000000
 118 #define MMU_UTLB_DATA_ARRAY     0xF7000000
 119
 120 #define MMU_UTLB_ENTRIES           64
 121 #define MMU_U_ENTRY_SHIFT           8
 122 #define MMU_UTLB_VALID          0x100
 123 #define MMU_ITLB_ENTRIES            4
 124 #define MMU_I_ENTRY_SHIFT           8
 125 #define MMU_ITLB_VALID          0x100
 126 #endif
 127
 128 extern __inline__ void set_asid(unsigned long asid)
 129 {
 130         unsigned long __dummy;
 131
 132         __asm__ __volatile__ ("mov.l    %2, %0\n\t"
 133                               "and      %3, %0\n\t"
 134                               "or       %1, %0\n\t"
 135                               "mov.l    %0, %2"
 136                               : "=&r" (__dummy)
 137                               : "r" (asid), "m" (__m(MMU_PTEH)),
 138                                 "r" (0xffffff00));
 139 }
 140
 141 extern __inline__ unsigned long get_asid(void)
 142 {
 143         unsigned long asid;
 144
 145         __asm__ __volatile__ ("mov.l    %1, %0"
 146                               : "=r" (asid)
 147                               : "m" (__m(MMU_PTEH)));
 148         asid &= MMU_CONTEXT_ASID_MASK;
 149         return asid;
 150 }
 151
 152 /*
 153  * After we have set current->mm to a new value, this activates
 154  * the context for the new mm so we see the new mappings.
 155  */
 156 extern __inline__ void activate_context(struct mm_struct *mm)
 157 {
 158         get_mmu_context(mm);
 159         set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
 160 }
 161
 162 /* MMU_TTB can be used for optimizing the fault handling.
 163    (Currently not used) */
 164 extern __inline__ void switch_mm(struct mm_struct *prev,
 165                                  struct mm_struct *next,
 166                                  struct task_struct *tsk, unsigned int cpu)
 167 {
 168         if (prev != next) {
 169                 unsigned long __pgdir = (unsigned long)next->pgd;
 170
 171                 clear_bit(cpu, &prev->cpu_vm_mask);
 172                 set_bit(cpu, &next->cpu_vm_mask);
 173                 __asm__ __volatile__("mov.l     %0, %1"
 174                                      : /* no output */
 175                                      : "r" (__pgdir), "m" (__m(MMU_TTB)));
 176                 activate_context(next);
 177         }
 178 }
 179
 180 #define activate_mm(prev, next) \
 181         switch_mm((prev),(next),NULL,smp_processor_id())
 182
 183 extern __inline__ void
 184 enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
 185 {
 186 }
 187 #endif /* __ASM_SH_MMU_CONTEXT_H */