1 #include <linux/config.h>
2 #include <linux/stddef.h>
3 #include <linux/init.h>
4 #include <linux/sched.h>
5 #include <linux/signal.h>
7 #include <linux/openpic.h>
13 #include <asm/pci-bridge.h>
16 /* pmac */struct pmac_irq_hw
{
23 /* XXX these addresses should be obtained from the device tree */
24 static volatile struct pmac_irq_hw
*pmac_irq_hw
[4] = {
25 (struct pmac_irq_hw
*) 0xf3000020,
26 (struct pmac_irq_hw
*) 0xf3000010,
27 (struct pmac_irq_hw
*) 0xf4000020,
28 (struct pmac_irq_hw
*) 0xf4000010,
32 static int max_real_irqs
;
33 static int has_openpic
= 0;
35 #define GATWICK_IRQ_POOL_SIZE 10
36 static struct interrupt_info gatwick_int_pool
[GATWICK_IRQ_POOL_SIZE
];
38 extern int pmac_pcibios_read_config_word(unsigned char bus
, unsigned char dev_fn
,
39 unsigned char offset
, unsigned short *val
);
40 extern int pmac_pcibios_write_config_word(unsigned char bus
, unsigned char dev_fn
,
41 unsigned char offset
, unsigned short val
);
44 * Mark an irq as "lost". This is only used on the pmac
45 * since it can lose interrupts (see pmac_set_irq_mask).
48 void __pmac
__no_use_set_lost(unsigned long irq_nr
)
50 if (!test_and_set_bit(irq_nr
, ppc_lost_interrupts
))
51 atomic_inc(&ppc_n_lost_interrupts
);
54 static void pmac_openpic_mask_irq(unsigned int irq_nr
)
56 openpic_disable_irq(irq_nr
);
59 static void pmac_openpic_unmask_irq(unsigned int irq_nr
)
61 openpic_enable_irq(irq_nr
);
64 static void pmac_openpic_ack_irq(unsigned int irq_nr
)
66 if ((irq_desc
[irq_nr
].status
& IRQ_LEVEL
) == 0)
67 openpic_eoi(smp_processor_id());
68 openpic_disable_irq(irq_nr
);
71 static void pmac_openpic_end_irq(unsigned int irq_nr
)
73 if ((irq_desc
[irq_nr
].status
& IRQ_LEVEL
) != 0)
74 openpic_eoi(smp_processor_id());
75 openpic_enable_irq(irq_nr
);
78 struct hw_interrupt_type pmac_open_pic
= {
82 pmac_openpic_unmask_irq
,
83 pmac_openpic_mask_irq
,
84 /* Theorically, the mask&ack should be NULL for OpenPIC. However, doing
85 * so shows tons of bogus interrupts coming in.
92 static void __pmac
pmac_mask_and_ack_irq(unsigned int irq_nr
)
94 unsigned long bit
= 1UL << (irq_nr
& 0x1f);
97 if ((unsigned)irq_nr
>= max_irqs
)
100 clear_bit(irq_nr
, ppc_cached_irq_mask
);
101 if (test_and_clear_bit(irq_nr
, ppc_lost_interrupts
))
102 atomic_dec(&ppc_n_lost_interrupts
);
103 out_le32(&pmac_irq_hw
[i
]->ack
, bit
);
104 out_le32(&pmac_irq_hw
[i
]->enable
, ppc_cached_irq_mask
[i
]);
105 out_le32(&pmac_irq_hw
[i
]->ack
, bit
);
107 /* make sure ack gets to controller before we enable
110 } while(in_le32(&pmac_irq_hw
[i
]->flag
) & bit
);
113 static void __pmac
pmac_set_irq_mask(unsigned int irq_nr
)
115 unsigned long bit
= 1UL << (irq_nr
& 0x1f);
118 if ((unsigned)irq_nr
>= max_irqs
)
121 /* enable unmasked interrupts */
122 out_le32(&pmac_irq_hw
[i
]->enable
, ppc_cached_irq_mask
[i
]);
125 /* make sure mask gets to controller before we
128 } while((in_le32(&pmac_irq_hw
[i
]->enable
) & bit
)
129 != (ppc_cached_irq_mask
[i
] & bit
));
132 * Unfortunately, setting the bit in the enable register
133 * when the device interrupt is already on *doesn't* set
134 * the bit in the flag register or request another interrupt.
136 if ((bit
& ppc_cached_irq_mask
[i
])
137 && (ld_le32(&pmac_irq_hw
[i
]->level
) & bit
)
138 && !(ld_le32(&pmac_irq_hw
[i
]->flag
) & bit
))
139 __set_lost((ulong
)irq_nr
);
142 static void __pmac
pmac_mask_irq(unsigned int irq_nr
)
144 clear_bit(irq_nr
, ppc_cached_irq_mask
);
145 pmac_set_irq_mask(irq_nr
);
149 static void __pmac
pmac_unmask_irq(unsigned int irq_nr
)
151 set_bit(irq_nr
, ppc_cached_irq_mask
);
152 pmac_set_irq_mask(irq_nr
);
155 struct hw_interrupt_type pmac_pic
= {
161 pmac_mask_and_ack_irq
,
166 struct hw_interrupt_type gatwick_pic
= {
172 pmac_mask_and_ack_irq
,
177 static void gatwick_action(int cpl
, void *dev_id
, struct pt_regs
*regs
)
181 for (irq
= max_irqs
; (irq
-= 32) >= max_real_irqs
; ) {
183 bits
= ld_le32(&pmac_irq_hw
[i
]->flag
)
184 | ppc_lost_interrupts
[i
];
187 irq
+= __ilog2(bits
);
190 /* The previous version of this code allowed for this case, we
191 * don't. Put this here to check for it.
194 if ( irq_desc
[irq
].handler
!= &gatwick_pic
)
195 printk("gatwick irq not from gatwick pic\n");
197 ppc_irq_dispatch_handler( regs
, irq
);
201 pmac_get_irq(struct pt_regs
*regs
)
204 unsigned long bits
= 0;
207 void pmac_smp_message_recv(struct pt_regs
*);
209 /* IPI's are a hack on the powersurge -- Cort */
210 if ( smp_processor_id() != 0 )
212 pmac_smp_message_recv(regs
);
213 return -2; /* ignore, already handled */
215 #endif /* CONFIG_SMP */
218 irq
= openpic_irq(smp_processor_id());
219 if (irq
== OPENPIC_VEC_SPURIOUS
)
220 /* We get those when doing polled ADB requests,
221 * using -2 is a temp hack to disable the printk
227 for (irq
= max_real_irqs
; (irq
-= 32) >= 0; ) {
229 bits
= ld_le32(&pmac_irq_hw
[i
]->flag
)
230 | ppc_lost_interrupts
[i
];
233 irq
+= __ilog2(bits
);
241 /* This routine will fix some missing interrupt values in the device tree
242 * on the gatwick mac-io controller used by some PowerBooks
245 pmac_fix_gatwick_interrupts(struct device_node
*gw
, int irq_base
)
247 struct device_node
*node
;
250 memset(gatwick_int_pool
, 0, sizeof(gatwick_int_pool
));
256 if (strcasecmp(node
->name
, "escc") == 0)
258 if (node
->child
->n_intrs
< 3) {
259 node
->child
->intrs
= &gatwick_int_pool
[count
];
262 node
->child
->n_intrs
= 3;
263 node
->child
->intrs
[0].line
= 15+irq_base
;
264 node
->child
->intrs
[1].line
= 4+irq_base
;
265 node
->child
->intrs
[2].line
= 5+irq_base
;
266 printk(KERN_INFO
"irq: fixed SCC on second controller (%d,%d,%d)\n",
267 node
->child
->intrs
[0].line
,
268 node
->child
->intrs
[1].line
,
269 node
->child
->intrs
[2].line
);
271 /* Fix media-bay & left SWIM */
272 if (strcasecmp(node
->name
, "media-bay") == 0) {
273 struct device_node
* ya_node
;
275 if (node
->n_intrs
== 0)
276 node
->intrs
= &gatwick_int_pool
[count
++];
278 node
->intrs
[0].line
= 29+irq_base
;
279 printk(KERN_INFO
"irq: fixed media-bay on second controller (%d)\n",
280 node
->intrs
[0].line
);
282 ya_node
= node
->child
;
285 if (strcasecmp(ya_node
->name
, "floppy") == 0) {
286 if (ya_node
->n_intrs
< 2) {
287 ya_node
->intrs
= &gatwick_int_pool
[count
];
290 ya_node
->n_intrs
= 2;
291 ya_node
->intrs
[0].line
= 19+irq_base
;
292 ya_node
->intrs
[1].line
= 1+irq_base
;
293 printk(KERN_INFO
"irq: fixed floppy on second controller (%d,%d)\n",
294 ya_node
->intrs
[0].line
, ya_node
->intrs
[1].line
);
296 if (strcasecmp(ya_node
->name
, "ata4") == 0) {
297 if (ya_node
->n_intrs
< 2) {
298 ya_node
->intrs
= &gatwick_int_pool
[count
];
301 ya_node
->n_intrs
= 2;
302 ya_node
->intrs
[0].line
= 14+irq_base
;
303 ya_node
->intrs
[1].line
= 3+irq_base
;
304 printk(KERN_INFO
"irq: fixed ide on second controller (%d,%d)\n",
305 ya_node
->intrs
[0].line
, ya_node
->intrs
[1].line
);
307 ya_node
= ya_node
->sibling
;
310 node
= node
->sibling
;
313 printk("WARNING !! Gatwick interrupt pool overflow\n");
314 printk(" GATWICK_IRQ_POOL_SIZE = %d\n", GATWICK_IRQ_POOL_SIZE
);
315 printk(" requested = %d\n", count
);
320 * The PowerBook 3400/2400/3500 can have a combo ethernet/modem
321 * card which includes an ohare chip that acts as a second interrupt
322 * controller. If we find this second ohare, set it up and fix the
323 * interrupt value in the device tree for the ethernet chip.
325 static void __init
enable_second_ohare(void)
327 unsigned char bus
, devfn
;
331 struct device_node
*irqctrler
= find_devices("pci106b,7");
332 struct device_node
*ether
;
334 if (irqctrler
== NULL
|| irqctrler
->n_addrs
<= 0)
336 addr
= (unsigned long) ioremap(irqctrler
->addrs
[0].address
, 0x40);
337 pmac_irq_hw
[1] = (volatile struct pmac_irq_hw
*)(addr
+ 0x20);
339 if (pci_device_loc(irqctrler
, &bus
, &devfn
) == 0) {
340 pmac_pcibios_read_config_word(bus
, devfn
, PCI_COMMAND
, &cmd
);
341 cmd
|= PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
;
342 cmd
&= ~PCI_COMMAND_IO
;
343 pmac_pcibios_write_config_word(bus
, devfn
, PCI_COMMAND
, cmd
);
346 second_irq
= irqctrler
->intrs
[0].line
;
347 printk(KERN_INFO
"irq: secondary controller on irq %d\n", second_irq
);
348 request_irq(second_irq
, gatwick_action
, SA_INTERRUPT
,
349 "interrupt cascade", 0 );
351 /* Fix interrupt for the modem/ethernet combo controller. The number
352 in the device tree (27) is bogus (correct for the ethernet-only
353 board but not the combo ethernet/modem board).
354 The real interrupt is 28 on the second controller -> 28+32 = 60.
356 ether
= find_devices("pci1011,14");
357 if (ether
&& ether
->n_intrs
> 0) {
358 ether
->intrs
[0].line
= 60;
359 printk(KERN_INFO
"irq: Fixed ethernet IRQ to %d\n",
360 ether
->intrs
[0].line
);
368 struct device_node
*irqctrler
;
370 int second_irq
= -999;
372 /* We first try to detect Apple's new Core99 chipset, since mac-io
373 * is quite different on those machines and contains an IBM MPIC2.
375 irqctrler
= find_type_devices("open-pic");
376 if (irqctrler
!= NULL
)
378 printk("PowerMac using OpenPIC irq controller\n");
379 if (irqctrler
->n_addrs
> 0)
382 struct device_node
* pswitch
;
383 #endif /* CONFIG_XMON */
384 OpenPIC
= (volatile struct OpenPIC
*)
385 ioremap(irqctrler
->addrs
[0].address
,
386 irqctrler
->addrs
[0].size
);
387 for ( i
= 0 ; i
< NR_IRQS
; i
++ )
388 irq_desc
[i
].handler
= &pmac_open_pic
;
392 pswitch
= find_devices("programmer-switch");
393 if (pswitch
&& pswitch
->n_intrs
)
394 request_irq(pswitch
->intrs
[0].line
, xmon_irq
, 0,
396 #endif /* CONFIG_XMON */
402 int_control
.int_set_lost
= __no_use_set_lost
;
404 * G3 powermacs and 1999 G3 PowerBooks have 64 interrupts,
405 * 1998 G3 Series PowerBooks have 128,
406 * other powermacs have 32.
407 * The combo ethernet/modem card for the Powerstar powerbooks
408 * (2400/3400/3500, ohare based) has a second ohare chip
409 * effectively making a total of 64.
411 max_irqs
= max_real_irqs
= 32;
412 irqctrler
= find_devices("mac-io");
421 for ( i
= 0; i
< max_real_irqs
; i
++ )
422 irq_desc
[i
].handler
= &pmac_pic
;
424 /* get addresses of first controller */
426 if (irqctrler
->n_addrs
> 0) {
427 addr
= (unsigned long)
428 ioremap(irqctrler
->addrs
[0].address
, 0x40);
429 for (i
= 0; i
< 2; ++i
)
430 pmac_irq_hw
[i
] = (volatile struct pmac_irq_hw
*)
431 (addr
+ (2 - i
) * 0x10);
434 /* get addresses of second controller */
435 irqctrler
= irqctrler
->next
;
436 if (irqctrler
&& irqctrler
->n_addrs
> 0) {
437 addr
= (unsigned long)
438 ioremap(irqctrler
->addrs
[0].address
, 0x40);
439 for (i
= 2; i
< 4; ++i
)
440 pmac_irq_hw
[i
] = (volatile struct pmac_irq_hw
*)
441 (addr
+ (4 - i
) * 0x10);
444 /* older powermacs have a GC (grand central) or ohare at
445 f3000000, with interrupt control registers at f3000020. */
446 addr
= (unsigned long) ioremap(0xf3000000, 0x40);
447 pmac_irq_hw
[0] = (volatile struct pmac_irq_hw
*) (addr
+ 0x20);
450 /* PowerBooks 3400 and 3500 can have a second controller in a second
451 ohare chip, on the combo ethernet/modem card */
452 if (machine_is_compatible("AAPL,3400/2400")
453 || machine_is_compatible("AAPL,3500"))
454 enable_second_ohare();
456 /* disable all interrupts in all controllers */
457 for (i
= 0; i
* 32 < max_irqs
; ++i
)
458 out_le32(&pmac_irq_hw
[i
]->enable
, 0);
460 /* get interrupt line of secondary interrupt controller */
462 second_irq
= irqctrler
->intrs
[0].line
;
463 printk(KERN_INFO
"irq: secondary controller on irq %d\n",
465 if (device_is_compatible(irqctrler
, "gatwick"))
466 pmac_fix_gatwick_interrupts(irqctrler
, max_real_irqs
);
467 for ( i
= max_real_irqs
; i
< max_irqs
; i
++ )
468 irq_desc
[i
].handler
= &gatwick_pic
;
469 request_irq( second_irq
, gatwick_action
, SA_INTERRUPT
,
470 "gatwick cascade", 0 );
472 printk("System has %d possible interrupts\n", max_irqs
);
473 if (max_irqs
!= max_real_irqs
)
474 printk(KERN_DEBUG
"%d interrupts on main controller\n",
478 request_irq(20, xmon_irq
, 0, "NMI - XMON", 0);
479 #endif /* CONFIG_XMON */
482 #ifdef CONFIG_PMAC_PBOOK
484 * These procedures are used in implementing sleep on the powerbooks.
485 * sleep_save_intrs() saves the states of all interrupt enables
486 * and disables all interupts except for the nominated one.
487 * sleep_restore_intrs() restores the states of all interrupt enables.
489 unsigned int sleep_save_mask
[2];
492 sleep_save_intrs(int viaint
)
494 sleep_save_mask
[0] = ppc_cached_irq_mask
[0];
495 sleep_save_mask
[1] = ppc_cached_irq_mask
[1];
496 ppc_cached_irq_mask
[0] = 0;
497 ppc_cached_irq_mask
[1] = 0;
498 set_bit(viaint
, ppc_cached_irq_mask
);
499 out_le32(&pmac_irq_hw
[0]->enable
, ppc_cached_irq_mask
[0]);
500 if (max_real_irqs
> 32)
501 out_le32(&pmac_irq_hw
[1]->enable
, ppc_cached_irq_mask
[1]);
502 (void)in_le32(&pmac_irq_hw
[0]->flag
);
503 /* make sure mask gets to controller before we return to caller */
505 (void)in_le32(&pmac_irq_hw
[0]->enable
);
509 sleep_restore_intrs(void)
513 out_le32(&pmac_irq_hw
[0]->enable
, 0);
514 if (max_real_irqs
> 32)
515 out_le32(&pmac_irq_hw
[1]->enable
, 0);
517 for (i
= 0; i
< max_real_irqs
; ++i
)
518 if (test_bit(i
, sleep_save_mask
))
521 #endif /* CONFIG_PMAC_PBOOK */