Linux 2.4.0-test7pre1
[davej-history.git] / drivers / scsi / esp.c
blob1dcc8acb892140110274a1d48b86eb276245c4a2
1 /* $Id: esp.c,v 1.94 2000/03/30 02:09:10 davem Exp $
2 * esp.c: EnhancedScsiProcessor Sun SCSI driver code.
4 * Copyright (C) 1995, 1998 David S. Miller (davem@caip.rutgers.edu)
5 */
7 /* TODO:
9 * 1) Maybe disable parity checking in config register one for SCSI1
10 * targets. (Gilmore says parity error on the SBus can lock up
11 * old sun4c's)
12 * 2) Add support for DMA2 pipelining.
13 * 3) Add tagged queueing.
16 #include <linux/config.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/malloc.h>
22 #include <linux/blk.h>
23 #include <linux/proc_fs.h>
24 #include <linux/stat.h>
25 #include <linux/init.h>
26 #include <linux/spinlock.h>
28 #include "scsi.h"
29 #include "hosts.h"
30 #include "esp.h"
32 #include <asm/sbus.h>
33 #include <asm/dma.h>
34 #include <asm/system.h>
35 #include <asm/machines.h>
36 #include <asm/ptrace.h>
37 #include <asm/pgtable.h>
38 #include <asm/oplib.h>
39 #include <asm/io.h>
40 #include <asm/irq.h>
41 #include <asm/idprom.h>
43 #include <linux/module.h>
45 #define DEBUG_ESP
46 /* #define DEBUG_ESP_HME */
47 /* #define DEBUG_ESP_DATA */
48 /* #define DEBUG_ESP_QUEUE */
49 /* #define DEBUG_ESP_DISCONNECT */
50 /* #define DEBUG_ESP_STATUS */
51 /* #define DEBUG_ESP_PHASES */
52 /* #define DEBUG_ESP_WORKBUS */
53 /* #define DEBUG_STATE_MACHINE */
54 /* #define DEBUG_ESP_CMDS */
55 /* #define DEBUG_ESP_IRQS */
56 /* #define DEBUG_SDTR */
57 /* #define DEBUG_ESP_SG */
59 /* Use the following to sprinkle debugging messages in a way which
60 * suits you if combinations of the above become too verbose when
61 * trying to track down a specific problem.
63 /* #define DEBUG_ESP_MISC */
65 #if defined(DEBUG_ESP)
66 #define ESPLOG(foo) printk foo
67 #else
68 #define ESPLOG(foo)
69 #endif /* (DEBUG_ESP) */
71 #if defined(DEBUG_ESP_HME)
72 #define ESPHME(foo) printk foo
73 #else
74 #define ESPHME(foo)
75 #endif
77 #if defined(DEBUG_ESP_DATA)
78 #define ESPDATA(foo) printk foo
79 #else
80 #define ESPDATA(foo)
81 #endif
83 #if defined(DEBUG_ESP_QUEUE)
84 #define ESPQUEUE(foo) printk foo
85 #else
86 #define ESPQUEUE(foo)
87 #endif
89 #if defined(DEBUG_ESP_DISCONNECT)
90 #define ESPDISC(foo) printk foo
91 #else
92 #define ESPDISC(foo)
93 #endif
95 #if defined(DEBUG_ESP_STATUS)
96 #define ESPSTAT(foo) printk foo
97 #else
98 #define ESPSTAT(foo)
99 #endif
101 #if defined(DEBUG_ESP_PHASES)
102 #define ESPPHASE(foo) printk foo
103 #else
104 #define ESPPHASE(foo)
105 #endif
107 #if defined(DEBUG_ESP_WORKBUS)
108 #define ESPBUS(foo) printk foo
109 #else
110 #define ESPBUS(foo)
111 #endif
113 #if defined(DEBUG_ESP_IRQS)
114 #define ESPIRQ(foo) printk foo
115 #else
116 #define ESPIRQ(foo)
117 #endif
119 #if defined(DEBUG_SDTR)
120 #define ESPSDTR(foo) printk foo
121 #else
122 #define ESPSDTR(foo)
123 #endif
125 #if defined(DEBUG_ESP_MISC)
126 #define ESPMISC(foo) printk foo
127 #else
128 #define ESPMISC(foo)
129 #endif
131 /* Command phase enumeration. */
132 enum {
133 not_issued = 0x00, /* Still in the issue_SC queue. */
135 /* Various forms of selecting a target. */
136 #define in_slct_mask 0x10
137 in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */
138 in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */
139 in_slct_msg = 0x12, /* select, then send a message */
140 in_slct_tag = 0x13, /* select and send tagged queue msg */
141 in_slct_sneg = 0x14, /* select and acquire sync capabilities */
143 /* Any post selection activity. */
144 #define in_phases_mask 0x20
145 in_datain = 0x20, /* Data is transferring from the bus */
146 in_dataout = 0x21, /* Data is transferring to the bus */
147 in_data_done = 0x22, /* Last DMA data operation done (maybe) */
148 in_msgin = 0x23, /* Eating message from target */
149 in_msgincont = 0x24, /* Eating more msg bytes from target */
150 in_msgindone = 0x25, /* Decide what to do with what we got */
151 in_msgout = 0x26, /* Sending message to target */
152 in_msgoutdone = 0x27, /* Done sending msg out */
153 in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */
154 in_cmdend = 0x29, /* Done sending slow cmd */
155 in_status = 0x2a, /* Was in status phase, finishing cmd */
156 in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */
157 in_the_dark = 0x2c, /* Don't know what bus phase we are in */
159 /* Special states, ie. not normal bus transitions... */
160 #define in_spec_mask 0x80
161 in_abortone = 0x80, /* Aborting one command currently */
162 in_abortall = 0x81, /* Blowing away all commands we have */
163 in_resetdev = 0x82, /* SCSI target reset in progress */
164 in_resetbus = 0x83, /* SCSI bus reset in progress */
165 in_tgterror = 0x84, /* Target did something stupid */
168 enum {
169 /* Zero has special meaning, see skipahead[12]. */
170 /*0*/ do_never,
172 /*1*/ do_phase_determine,
173 /*2*/ do_reset_bus,
174 /*3*/ do_reset_complete,
175 /*4*/ do_work_bus,
176 /*5*/ do_intr_end
179 /* The master ring of all esp hosts we are managing in this driver. */
180 static struct esp *espchain;
181 static spinlock_t espchain_lock = SPIN_LOCK_UNLOCKED;
182 static int esps_running = 0;
184 /* Forward declarations. */
185 static void esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
187 /* Debugging routines */
188 struct esp_cmdstrings {
189 u8 cmdchar;
190 char *text;
191 } esp_cmd_strings[] = {
192 /* Miscellaneous */
193 { ESP_CMD_NULL, "ESP_NOP", },
194 { ESP_CMD_FLUSH, "FIFO_FLUSH", },
195 { ESP_CMD_RC, "RSTESP", },
196 { ESP_CMD_RS, "RSTSCSI", },
197 /* Disconnected State Group */
198 { ESP_CMD_RSEL, "RESLCTSEQ", },
199 { ESP_CMD_SEL, "SLCTNATN", },
200 { ESP_CMD_SELA, "SLCTATN", },
201 { ESP_CMD_SELAS, "SLCTATNSTOP", },
202 { ESP_CMD_ESEL, "ENSLCTRESEL", },
203 { ESP_CMD_DSEL, "DISSELRESEL", },
204 { ESP_CMD_SA3, "SLCTATN3", },
205 { ESP_CMD_RSEL3, "RESLCTSEQ", },
206 /* Target State Group */
207 { ESP_CMD_SMSG, "SNDMSG", },
208 { ESP_CMD_SSTAT, "SNDSTATUS", },
209 { ESP_CMD_SDATA, "SNDDATA", },
210 { ESP_CMD_DSEQ, "DISCSEQ", },
211 { ESP_CMD_TSEQ, "TERMSEQ", },
212 { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
213 { ESP_CMD_DCNCT, "DISC", },
214 { ESP_CMD_RMSG, "RCVMSG", },
215 { ESP_CMD_RCMD, "RCVCMD", },
216 { ESP_CMD_RDATA, "RCVDATA", },
217 { ESP_CMD_RCSEQ, "RCVCMDSEQ", },
218 /* Initiator State Group */
219 { ESP_CMD_TI, "TRANSINFO", },
220 { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
221 { ESP_CMD_MOK, "MSGACCEPTED", },
222 { ESP_CMD_TPAD, "TPAD", },
223 { ESP_CMD_SATN, "SATN", },
224 { ESP_CMD_RATN, "RATN", },
226 #define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
228 /* Print textual representation of an ESP command */
229 static inline void esp_print_cmd(u8 espcmd)
231 u8 dma_bit = espcmd & ESP_CMD_DMA;
232 int i;
234 espcmd &= ~dma_bit;
235 for (i = 0; i < NUM_ESP_COMMANDS; i++)
236 if (esp_cmd_strings[i].cmdchar == espcmd)
237 break;
238 if (i == NUM_ESP_COMMANDS)
239 printk("ESP_Unknown");
240 else
241 printk("%s%s", esp_cmd_strings[i].text,
242 ((dma_bit) ? "+DMA" : ""));
245 /* Print the status register's value */
246 static inline void esp_print_statreg(u8 statreg)
248 u8 phase;
250 printk("STATUS<");
251 phase = statreg & ESP_STAT_PMASK;
252 printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
253 (phase == ESP_DIP ? "DATA-IN" :
254 (phase == ESP_CMDP ? "COMMAND" :
255 (phase == ESP_STATP ? "STATUS" :
256 (phase == ESP_MOP ? "MSG-OUT" :
257 (phase == ESP_MIP ? "MSG_IN" :
258 "unknown")))))));
259 if (statreg & ESP_STAT_TDONE)
260 printk("TRANS_DONE,");
261 if (statreg & ESP_STAT_TCNT)
262 printk("TCOUNT_ZERO,");
263 if (statreg & ESP_STAT_PERR)
264 printk("P_ERROR,");
265 if (statreg & ESP_STAT_SPAM)
266 printk("SPAM,");
267 if (statreg & ESP_STAT_INTR)
268 printk("IRQ,");
269 printk(">");
272 /* Print the interrupt register's value */
273 static inline void esp_print_ireg(u8 intreg)
275 printk("INTREG< ");
276 if (intreg & ESP_INTR_S)
277 printk("SLCT_NATN ");
278 if (intreg & ESP_INTR_SATN)
279 printk("SLCT_ATN ");
280 if (intreg & ESP_INTR_RSEL)
281 printk("RSLCT ");
282 if (intreg & ESP_INTR_FDONE)
283 printk("FDONE ");
284 if (intreg & ESP_INTR_BSERV)
285 printk("BSERV ");
286 if (intreg & ESP_INTR_DC)
287 printk("DISCNCT ");
288 if (intreg & ESP_INTR_IC)
289 printk("ILL_CMD ");
290 if (intreg & ESP_INTR_SR)
291 printk("SCSI_BUS_RESET ");
292 printk(">");
295 /* Print the sequence step registers contents */
296 static inline void esp_print_seqreg(u8 stepreg)
298 stepreg &= ESP_STEP_VBITS;
299 printk("STEP<%s>",
300 (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
301 (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
302 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
303 (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
304 (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
305 "UNKNOWN"))))));
308 static char *phase_string(int phase)
310 switch (phase) {
311 case not_issued:
312 return "UNISSUED";
313 case in_slct_norm:
314 return "SLCTNORM";
315 case in_slct_stop:
316 return "SLCTSTOP";
317 case in_slct_msg:
318 return "SLCTMSG";
319 case in_slct_tag:
320 return "SLCTTAG";
321 case in_slct_sneg:
322 return "SLCTSNEG";
323 case in_datain:
324 return "DATAIN";
325 case in_dataout:
326 return "DATAOUT";
327 case in_data_done:
328 return "DATADONE";
329 case in_msgin:
330 return "MSGIN";
331 case in_msgincont:
332 return "MSGINCONT";
333 case in_msgindone:
334 return "MSGINDONE";
335 case in_msgout:
336 return "MSGOUT";
337 case in_msgoutdone:
338 return "MSGOUTDONE";
339 case in_cmdbegin:
340 return "CMDBEGIN";
341 case in_cmdend:
342 return "CMDEND";
343 case in_status:
344 return "STATUS";
345 case in_freeing:
346 return "FREEING";
347 case in_the_dark:
348 return "CLUELESS";
349 case in_abortone:
350 return "ABORTONE";
351 case in_abortall:
352 return "ABORTALL";
353 case in_resetdev:
354 return "RESETDEV";
355 case in_resetbus:
356 return "RESETBUS";
357 case in_tgterror:
358 return "TGTERROR";
359 default:
360 return "UNKNOWN";
364 #ifdef DEBUG_STATE_MACHINE
365 static inline void esp_advance_phase(Scsi_Cmnd *s, int newphase)
367 ESPLOG(("<%s>", phase_string(newphase)));
368 s->SCp.sent_command = s->SCp.phase;
369 s->SCp.phase = newphase;
371 #else
372 #define esp_advance_phase(__s, __newphase) \
373 (__s)->SCp.sent_command = (__s)->SCp.phase; \
374 (__s)->SCp.phase = (__newphase);
375 #endif
377 #ifdef DEBUG_ESP_CMDS
378 extern inline void esp_cmd(struct esp *esp, u8 cmd)
380 esp->espcmdlog[esp->espcmdent] = cmd;
381 esp->espcmdent = (esp->espcmdent + 1) & 31;
382 sbus_writeb(cmd, esp->eregs + ESP_CMD);
384 #else
385 #define esp_cmd(__esp, __cmd) \
386 sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD)
387 #endif
389 #define ESP_INTSOFF(__dregs) \
390 sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR)
391 #define ESP_INTSON(__dregs) \
392 sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR)
393 #define ESP_IRQ_P(__dregs) \
394 (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR))
396 /* How we use the various Linux SCSI data structures for operation.
398 * struct scsi_cmnd:
400 * We keep track of the syncronous capabilities of a target
401 * in the device member, using sync_min_period and
402 * sync_max_offset. These are the values we directly write
403 * into the ESP registers while running a command. If offset
404 * is zero the ESP will use asynchronous transfers.
405 * If the borken flag is set we assume we shouldn't even bother
406 * trying to negotiate for synchronous transfer as this target
407 * is really stupid. If we notice the target is dropping the
408 * bus, and we have been allowing it to disconnect, we clear
409 * the disconnect flag.
413 /* Manipulation of the ESP command queues. Thanks to the aha152x driver
414 * and its author, Juergen E. Fischer, for the methods used here.
415 * Note that these are per-ESP queues, not global queues like
416 * the aha152x driver uses.
418 static inline void append_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
420 Scsi_Cmnd *end;
422 new_SC->host_scribble = (unsigned char *) NULL;
423 if (!*SC)
424 *SC = new_SC;
425 else {
426 for (end=*SC;end->host_scribble;end=(Scsi_Cmnd *)end->host_scribble)
428 end->host_scribble = (unsigned char *) new_SC;
432 static inline void prepend_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
434 new_SC->host_scribble = (unsigned char *) *SC;
435 *SC = new_SC;
438 static inline Scsi_Cmnd *remove_first_SC(Scsi_Cmnd **SC)
440 Scsi_Cmnd *ptr;
441 ptr = *SC;
442 if (ptr)
443 *SC = (Scsi_Cmnd *) (*SC)->host_scribble;
444 return ptr;
447 static inline Scsi_Cmnd *remove_SC(Scsi_Cmnd **SC, int target, int lun)
449 Scsi_Cmnd *ptr, *prev;
451 for (ptr = *SC, prev = NULL;
452 ptr && ((ptr->target != target) || (ptr->lun != lun));
453 prev = ptr, ptr = (Scsi_Cmnd *) ptr->host_scribble)
455 if (ptr) {
456 if (prev)
457 prev->host_scribble=ptr->host_scribble;
458 else
459 *SC=(Scsi_Cmnd *)ptr->host_scribble;
461 return ptr;
464 /* Resetting various pieces of the ESP scsi driver chipset/buses. */
465 static void esp_reset_dma(struct esp *esp)
467 unsigned long flags;
468 int can_do_burst16, can_do_burst32, can_do_burst64;
469 int can_do_sbus64;
470 u32 tmp;
472 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
473 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
474 can_do_burst64 = 0;
475 can_do_sbus64 = 0;
476 if (sbus_can_dma_64bit(esp->sdev))
477 can_do_sbus64 = 1;
478 if (sbus_can_burst64(esp->sdev))
479 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
481 /* Punt the DVMA into a known state. */
482 if (esp->dma->revision != dvmahme) {
483 tmp = sbus_readl(esp->dregs + DMA_CSR);
484 sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR);
485 sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR);
487 switch (esp->dma->revision) {
488 case dvmahme:
489 /* This is the HME DVMA gate array. */
491 save_flags(flags); cli(); /* I really hate this chip. */
493 sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR);
494 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
496 esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
497 esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);
499 if (can_do_burst64)
500 esp->prev_hme_dmacsr |= DMA_BRST64;
501 else if (can_do_burst32)
502 esp->prev_hme_dmacsr |= DMA_BRST32;
504 if (can_do_sbus64) {
505 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
506 sbus_set_sbus64(esp->sdev, esp->bursts);
509 /* This chip is horrible. */
510 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ)
511 udelay(1);
513 sbus_writel(0, esp->dregs + DMA_CSR);
514 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
516 /* This is necessary to avoid having the SCSI channel
517 * engine lock up on us.
519 sbus_writel(0, esp->dregs + DMA_ADDR);
521 restore_flags(flags);
522 break;
523 case dvmarev2:
524 /* This is the gate array found in the sun4m
525 * NCR SBUS I/O subsystem.
527 if (esp->erev != esp100) {
528 tmp = sbus_readl(esp->dregs + DMA_CSR);
529 sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR);
531 break;
532 case dvmarev3:
533 tmp = sbus_readl(esp->dregs + DMA_CSR);
534 tmp &= ~DMA_3CLKS;
535 tmp |= DMA_2CLKS;
536 if (can_do_burst32) {
537 tmp &= ~DMA_BRST_SZ;
538 tmp |= DMA_BRST32;
540 sbus_writel(tmp, esp->dregs + DMA_CSR);
541 break;
542 case dvmaesc1:
543 /* This is the DMA unit found on SCSI/Ether cards. */
544 tmp = sbus_readl(esp->dregs + DMA_CSR);
545 tmp |= DMA_ADD_ENABLE;
546 tmp &= ~DMA_BCNT_ENAB;
547 if (!can_do_burst32 && can_do_burst16) {
548 tmp |= DMA_ESC_BURST;
549 } else {
550 tmp &= ~(DMA_ESC_BURST);
552 sbus_writel(tmp, esp->dregs + DMA_CSR);
553 break;
554 default:
555 break;
557 ESP_INTSON(esp->dregs);
560 /* Reset the ESP chip, _not_ the SCSI bus. */
561 static void __init esp_reset_esp(struct esp *esp)
563 u8 family_code, version;
564 int i;
566 /* Now reset the ESP chip */
567 esp_cmd(esp, ESP_CMD_RC);
568 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
569 esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
571 /* Reload the configuration registers */
572 sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT);
573 esp->prev_stp = 0;
574 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
575 esp->prev_soff = 0;
576 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
577 sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO);
579 /* This is the only point at which it is reliable to read
580 * the ID-code for a fast ESP chip variants.
582 esp->max_period = ((35 * esp->ccycle) / 1000);
583 if (esp->erev == fast) {
584 version = sbus_readb(esp->eregs + ESP_UID);
585 family_code = (version & 0xf8) >> 3;
586 if (family_code == 0x02)
587 esp->erev = fas236;
588 else if (family_code == 0x0a)
589 esp->erev = fashme; /* Version is usually '5'. */
590 else
591 esp->erev = fas100a;
592 ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
593 esp->esp_id,
594 (esp->erev == fas236) ? "fas236" :
595 ((esp->erev == fas100a) ? "fas100a" :
596 "fasHME"), family_code, (version & 7)));
598 esp->min_period = ((4 * esp->ccycle) / 1000);
599 } else {
600 esp->min_period = ((5 * esp->ccycle) / 1000);
602 esp->max_period = (esp->max_period + 3)>>2;
603 esp->min_period = (esp->min_period + 3)>>2;
605 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
606 switch (esp->erev) {
607 case esp100:
608 /* nothing to do */
609 break;
610 case esp100a:
611 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
612 break;
613 case esp236:
614 /* Slow 236 */
615 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
616 esp->prev_cfg3 = esp->config3[0];
617 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
618 break;
619 case fashme:
620 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
621 /* fallthrough... */
622 case fas236:
623 /* Fast 236 or HME */
624 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
625 for (i = 0; i < 16; i++) {
626 if (esp->erev == fashme) {
627 u8 cfg3;
629 cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
630 if (esp->scsi_id >= 8)
631 cfg3 |= ESP_CONFIG3_IDBIT3;
632 esp->config3[i] |= cfg3;
633 } else {
634 esp->config3[i] |= ESP_CONFIG3_FCLK;
637 esp->prev_cfg3 = esp->config3[0];
638 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
639 if (esp->erev == fashme) {
640 esp->radelay = 80;
641 } else {
642 if (esp->diff)
643 esp->radelay = 0;
644 else
645 esp->radelay = 96;
647 break;
648 case fas100a:
649 /* Fast 100a */
650 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
651 for (i = 0; i < 16; i++)
652 esp->config3[i] |= ESP_CONFIG3_FCLOCK;
653 esp->prev_cfg3 = esp->config3[0];
654 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
655 esp->radelay = 32;
656 break;
657 default:
658 panic("esp: what could it be... I wonder...");
659 break;
662 /* Eat any bitrot in the chip */
663 sbus_readb(esp->eregs + ESP_INTRPT);
664 udelay(100);
667 /* This places the ESP into a known state at boot time. */
668 static void __init esp_bootup_reset(struct esp *esp)
670 u8 tmp;
672 /* Reset the DMA */
673 esp_reset_dma(esp);
675 /* Reset the ESP */
676 esp_reset_esp(esp);
678 /* Reset the SCSI bus, but tell ESP not to generate an irq */
679 tmp = sbus_readb(esp->eregs + ESP_CFG1);
680 tmp |= ESP_CONFIG1_SRRDISAB;
681 sbus_writeb(tmp, esp->eregs + ESP_CFG1);
683 esp_cmd(esp, ESP_CMD_RS);
684 udelay(400);
686 sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
688 /* Eat any bitrot in the chip and we are done... */
689 sbus_readb(esp->eregs + ESP_INTRPT);
692 static void esp_chain_add(struct esp *esp)
694 spin_lock_irq(&espchain_lock);
695 if (espchain) {
696 struct esp *elink = espchain;
697 while (elink->next)
698 elink = elink->next;
699 elink->next = esp;
700 } else {
701 espchain = esp;
703 esp->next = NULL;
704 spin_unlock_irq(&espchain_lock);
707 static void esp_chain_del(struct esp *esp)
709 spin_lock_irq(&espchain_lock);
710 if (espchain == esp) {
711 espchain = esp->next;
712 } else {
713 struct esp *elink = espchain;
714 while (elink->next != esp)
715 elink = elink->next;
716 elink->next = esp->next;
718 esp->next = NULL;
719 spin_unlock_irq(&espchain_lock);
722 static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev)
724 struct sbus_dev *sdev = esp->sdev;
725 struct sbus_dma *dma;
727 if (dma_sdev != NULL) {
728 for_each_dvma(dma) {
729 if (dma->sdev == dma_sdev)
730 break;
732 } else {
733 for_each_dvma(dma) {
734 /* If allocated already, can't use it. */
735 if (dma->allocated)
736 continue;
738 if (dma->sdev == NULL)
739 break;
741 /* If bus + slot are the same and it has the
742 * correct OBP name, it's ours.
744 if (sdev->bus == dma->sdev->bus &&
745 sdev->slot == dma->sdev->slot &&
746 (!strcmp(dma->sdev->prom_name, "dma") ||
747 !strcmp(dma->sdev->prom_name, "espdma")))
748 break;
752 /* If we don't know how to handle the dvma,
753 * do not use this device.
755 if (dma == NULL) {
756 printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id);
757 return -1;
759 if (dma->allocated) {
760 printk("esp%d: can't use my espdma\n", esp->esp_id);
761 return -1;
763 dma->allocated = 1;
764 esp->dma = dma;
765 esp->dregs = dma->regs;
767 return 0;
770 static int __init esp_map_regs(struct esp *esp, int hme)
772 struct sbus_dev *sdev = esp->sdev;
773 struct resource *res;
775 /* On HME, two reg sets exist, first is DVMA,
776 * second is ESP registers.
778 if (hme)
779 res = &sdev->resource[1];
780 else
781 res = &sdev->resource[0];
783 esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers");
785 if (esp->eregs == 0)
786 return -1;
787 return 0;
790 static int __init esp_map_cmdarea(struct esp *esp)
792 struct sbus_dev *sdev = esp->sdev;
794 esp->esp_command = sbus_alloc_consistent(sdev, 16,
795 &esp->esp_command_dvma);
796 if (esp->esp_command == NULL ||
797 esp->esp_command_dvma == 0)
798 return -1;
799 return 0;
802 static int __init esp_register_irq(struct esp *esp)
804 esp->ehost->irq = esp->irq = esp->sdev->irqs[0];
806 /* We used to try various overly-clever things to
807 * reduce the interrupt processing overhead on
808 * sun4c/sun4m when multiple ESP's shared the
809 * same IRQ. It was too complex and messy to
810 * sanely maintain.
812 if (request_irq(esp->ehost->irq, esp_intr,
813 SA_SHIRQ, "ESP SCSI", esp)) {
814 printk("esp%d: Cannot acquire irq line\n",
815 esp->esp_id);
816 return -1;
819 printk("esp%d: IRQ %s ", esp->esp_id,
820 __irq_itoa(esp->ehost->irq));
822 return 0;
825 static void __init esp_get_scsi_id(struct esp *esp)
827 struct sbus_dev *sdev = esp->sdev;
829 esp->scsi_id = prom_getintdefault(esp->prom_node,
830 "initiator-id",
831 -1);
832 if (esp->scsi_id == -1)
833 esp->scsi_id = prom_getintdefault(esp->prom_node,
834 "scsi-initiator-id",
835 -1);
836 if (esp->scsi_id == -1)
837 esp->scsi_id = (sdev->bus == NULL) ? 7 :
838 prom_getintdefault(sdev->bus->prom_node,
839 "scsi-initiator-id",
841 esp->ehost->this_id = esp->scsi_id;
842 esp->scsi_id_mask = (1 << esp->scsi_id);
846 static void __init esp_get_clock_params(struct esp *esp)
848 struct sbus_dev *sdev = esp->sdev;
849 int prom_node = esp->prom_node;
850 int sbus_prom_node;
851 unsigned int fmhz;
852 u8 ccf;
854 if (sdev != NULL && sdev->bus != NULL)
855 sbus_prom_node = sdev->bus->prom_node;
856 else
857 sbus_prom_node = 0;
859 /* This is getting messy but it has to be done
860 * correctly or else you get weird behavior all
861 * over the place. We are trying to basically
862 * figure out three pieces of information.
864 * a) Clock Conversion Factor
866 * This is a representation of the input
867 * crystal clock frequency going into the
868 * ESP on this machine. Any operation whose
869 * timing is longer than 400ns depends on this
870 * value being correct. For example, you'll
871 * get blips for arbitration/selection during
872 * high load or with multiple targets if this
873 * is not set correctly.
875 * b) Selection Time-Out
877 * The ESP isn't very bright and will arbitrate
878 * for the bus and try to select a target
879 * forever if you let it. This value tells
880 * the ESP when it has taken too long to
881 * negotiate and that it should interrupt
882 * the CPU so we can see what happened.
883 * The value is computed as follows (from
884 * NCR/Symbios chip docs).
886 * (Time Out Period) * (Input Clock)
887 * STO = ----------------------------------
888 * (8192) * (Clock Conversion Factor)
890 * You usually want the time out period to be
891 * around 250ms, I think we'll set it a little
892 * bit higher to account for fully loaded SCSI
893 * bus's and slow devices that don't respond so
894 * quickly to selection attempts. (yeah, I know
895 * this is out of spec. but there is a lot of
896 * buggy pieces of firmware out there so bite me)
898 * c) Imperical constants for synchronous offset
899 * and transfer period register values
901 * This entails the smallest and largest sync
902 * period we could ever handle on this ESP.
905 fmhz = prom_getintdefault(prom_node, "clock-frequency", -1);
906 if (fmhz == -1)
907 fmhz = (!sbus_prom_node) ? 0 :
908 prom_getintdefault(sbus_prom_node, "clock-frequency", -1);
910 if (fmhz <= (5000000))
911 ccf = 0;
912 else
913 ccf = (((5000000 - 1) + (fmhz))/(5000000));
915 if (!ccf || ccf > 8) {
916 /* If we can't find anything reasonable,
917 * just assume 20MHZ. This is the clock
918 * frequency of the older sun4c's where I've
919 * been unable to find the clock-frequency
920 * PROM property. All other machines provide
921 * useful values it seems.
923 ccf = ESP_CCF_F4;
924 fmhz = (20000000);
927 if (ccf == (ESP_CCF_F7 + 1))
928 esp->cfact = ESP_CCF_F0;
929 else if (ccf == ESP_CCF_NEVER)
930 esp->cfact = ESP_CCF_F2;
931 else
932 esp->cfact = ccf;
933 esp->raw_cfact = ccf;
935 esp->cfreq = fmhz;
936 esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
937 esp->ctick = ESP_TICK(ccf, esp->ccycle);
938 esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
939 esp->sync_defp = SYNC_DEFP_SLOW;
941 printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ",
942 esp->scsi_id, (fmhz / 1000000),
943 (int)esp->ccycle, (int)ccf, (int) esp->neg_defp);
946 static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
948 struct sbus_dev *sdev = esp->sdev;
949 u8 bursts;
951 bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
953 if (dma) {
954 u8 tmp = prom_getintdefault(dma->prom_node,
955 "burst-sizes", 0xff);
956 if (tmp != 0xff)
957 bursts &= tmp;
960 if (sdev->bus) {
961 u8 tmp = prom_getintdefault(sdev->bus->prom_node,
962 "burst-sizes", 0xff);
963 if (tmp != 0xff)
964 bursts &= tmp;
967 if (bursts == 0xff ||
968 (bursts & DMA_BURST16) == 0 ||
969 (bursts & DMA_BURST32) == 0)
970 bursts = (DMA_BURST32 - 1);
972 esp->bursts = bursts;
975 static void __init esp_get_revision(struct esp *esp)
977 u8 tmp;
979 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
980 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
981 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
983 tmp = sbus_readb(esp->eregs + ESP_CFG2);
984 tmp &= ~ESP_CONFIG2_MAGIC;
985 if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
986 /* If what we write to cfg2 does not come back, cfg2
987 * is not implemented, therefore this must be a plain
988 * esp100.
990 esp->erev = esp100;
991 printk("NCR53C90(esp100)\n");
992 } else {
993 esp->config2 = 0;
994 esp->prev_cfg3 = esp->config3[0] = 5;
995 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
996 sbus_writeb(0, esp->eregs + ESP_CFG3);
997 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
999 tmp = sbus_readb(esp->eregs + ESP_CFG3);
1000 if (tmp != 5) {
1001 /* The cfg2 register is implemented, however
1002 * cfg3 is not, must be esp100a.
1004 esp->erev = esp100a;
1005 printk("NCR53C90A(esp100a)\n");
1006 } else {
1007 int target;
1009 for (target = 0; target < 16; target++)
1010 esp->config3[target] = 0;
1011 esp->prev_cfg3 = 0;
1012 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
1014 /* All of cfg{1,2,3} implemented, must be one of
1015 * the fas variants, figure out which one.
1017 if (esp->raw_cfact > ESP_CCF_F5) {
1018 esp->erev = fast;
1019 esp->sync_defp = SYNC_DEFP_FAST;
1020 printk("NCR53C9XF(espfast)\n");
1021 } else {
1022 esp->erev = esp236;
1023 printk("NCR53C9x(esp236)\n");
1025 esp->config2 = 0;
1026 sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
1031 static void __init esp_init_swstate(struct esp *esp)
1033 int i;
1035 /* Driver spinlock... */
1036 spin_lock_init(&esp->lock);
1038 /* Command queues... */
1039 esp->current_SC = NULL;
1040 esp->disconnected_SC = NULL;
1041 esp->issue_SC = NULL;
1043 /* Target and current command state... */
1044 esp->targets_present = 0;
1045 esp->resetting_bus = 0;
1046 esp->snip = 0;
1048 /* Debugging... */
1049 for(i = 0; i < 32; i++)
1050 esp->espcmdlog[i] = 0;
1051 esp->espcmdent = 0;
1053 /* MSG phase state... */
1054 for(i = 0; i < 16; i++) {
1055 esp->cur_msgout[i] = 0;
1056 esp->cur_msgin[i] = 0;
1058 esp->prevmsgout = esp->prevmsgin = 0;
1059 esp->msgout_len = esp->msgin_len = 0;
1061 /* Clear the one behind caches to hold unmatchable values. */
1062 esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
1063 esp->prev_hme_dmacsr = 0xffffffff;
1066 static int __init detect_one_esp(Scsi_Host_Template *tpnt, struct sbus_dev *esp_dev,
1067 struct sbus_dev *espdma, struct sbus_bus *sbus,
1068 int id, int hme)
1070 struct Scsi_Host *esp_host = scsi_register(tpnt, sizeof(struct esp));
1071 struct esp *esp;
1073 if (!esp_host) {
1074 printk("ESP: Cannot register SCSI host\n");
1075 return -1;
1077 if (hme)
1078 esp_host->max_id = 16;
1079 esp = (struct esp *) esp_host->hostdata;
1080 esp->ehost = esp_host;
1081 esp->sdev = esp_dev;
1082 esp->esp_id = id;
1083 esp->prom_node = esp_dev->prom_node;
1084 prom_getstring(esp->prom_node, "name", esp->prom_name,
1085 sizeof(esp->prom_name));
1087 esp_chain_add(esp);
1088 if (esp_find_dvma(esp, espdma) < 0)
1089 goto fail_unlink;
1090 if (esp_map_regs(esp, hme) < 0) {
1091 printk("ESP registers unmappable");
1092 goto fail_dvma_release;
1094 if (esp_map_cmdarea(esp) < 0) {
1095 printk("ESP DVMA transport area unmappable");
1096 goto fail_unmap_regs;
1098 if (esp_register_irq(esp) < 0)
1099 goto fail_unmap_cmdarea;
1101 esp_get_scsi_id(esp);
1103 esp->diff = prom_getbool(esp->prom_node, "differential");
1104 if (esp->diff)
1105 printk("Differential ");
1107 esp_get_clock_params(esp);
1108 esp_get_bursts(esp, espdma);
1109 esp_get_revision(esp);
1110 esp_init_swstate(esp);
1112 esp_bootup_reset(esp);
1114 return 0;
1116 fail_unmap_cmdarea:
1117 sbus_free_consistent(esp->sdev, 16,
1118 (void *) esp->esp_command,
1119 esp->esp_command_dvma);
1121 fail_unmap_regs:
1122 sbus_iounmap(esp->eregs, ESP_REG_SIZE);
1124 fail_dvma_release:
1125 esp->dma->allocated = 0;
1127 fail_unlink:
1128 esp_chain_del(esp);
1129 scsi_unregister(esp_host);
1130 return -1;
1133 /* Detecting ESP chips on the machine. This is the simple and easy
1134 * version.
1137 #ifdef CONFIG_SUN4
1139 #include <asm/sun4paddr.h>
1141 int __init esp_detect(Scsi_Host_Template *tpnt)
1143 static struct sbus_dev esp_dev;
1144 int esps_in_use = 0;
1146 espchain = 0;
1148 if (sun4_esp_physaddr) {
1149 memset (&esp_dev, 0, sizeof(esp_dev));
1150 esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
1151 esp_dev.irqs[0] = 4;
1152 esp_dev.resource[0].start = sun4_esp_physaddr;
1153 esp_dev.resource[0].end = sun4_esp_physaddr + ESP_REG_SIZE - 1;
1154 esp_dev.resource[0].flags = IORESOURCE_IO;
1156 if (!detect_one_esp(tpnt, &esp_dev, NULL, NULL, 0, 0))
1157 esps_in_use++;
1158 printk("ESP: Total of 1 ESP hosts found, %d actually in use.\n", esps_in_use);
1159 esps_running = esps_in_use;
1161 return esps_in_use;
1164 #else /* !CONFIG_SUN4 */
1166 int __init esp_detect(Scsi_Host_Template *tpnt)
1168 struct sbus_bus *sbus;
1169 struct sbus_dev *esp_dev, *sbdev_iter;
1170 int nesps = 0, esps_in_use = 0;
1172 espchain = 0;
1173 if (!sbus_root) {
1174 #ifdef CONFIG_PCI
1175 return 0;
1176 #else
1177 panic("No SBUS in esp_detect()");
1178 #endif
1180 for_each_sbus(sbus) {
1181 for_each_sbusdev(sbdev_iter, sbus) {
1182 struct sbus_dev *espdma = NULL;
1183 int hme = 0;
1185 /* Is it an esp sbus device? */
1186 esp_dev = sbdev_iter;
1187 if (strcmp(esp_dev->prom_name, "esp") &&
1188 strcmp(esp_dev->prom_name, "SUNW,esp")) {
1189 if (!strcmp(esp_dev->prom_name, "SUNW,fas")) {
1190 hme = 1;
1191 espdma = esp_dev;
1192 } else {
1193 if (!esp_dev->child ||
1194 (strcmp(esp_dev->prom_name, "espdma") &&
1195 strcmp(esp_dev->prom_name, "dma")))
1196 continue; /* nope... */
1197 espdma = esp_dev;
1198 esp_dev = esp_dev->child;
1199 if (strcmp(esp_dev->prom_name, "esp") &&
1200 strcmp(esp_dev->prom_name, "SUNW,esp"))
1201 continue; /* how can this happen? */
1205 if (detect_one_esp(tpnt, esp_dev, espdma, sbus, nesps++, hme) < 0)
1206 continue;
1208 esps_in_use++;
1209 } /* for each sbusdev */
1210 } /* for each sbus */
1211 printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
1212 esps_in_use);
1213 esps_running = esps_in_use;
1214 return esps_in_use;
1217 #endif /* !CONFIG_SUN4 */
1219 /* The info function will return whatever useful
1220 * information the developer sees fit. If not provided, then
1221 * the name field will be used instead.
1223 const char *esp_info(struct Scsi_Host *host)
1225 struct esp *esp;
1227 esp = (struct esp *) host->hostdata;
1228 switch (esp->erev) {
1229 case esp100:
1230 return "Sparc ESP100 (NCR53C90)";
1231 case esp100a:
1232 return "Sparc ESP100A (NCR53C90A)";
1233 case esp236:
1234 return "Sparc ESP236";
1235 case fas236:
1236 return "Sparc ESP236-FAST";
1237 case fashme:
1238 return "Sparc ESP366-HME";
1239 case fas100a:
1240 return "Sparc ESP100A-FAST";
1241 default:
1242 return "Bogon ESP revision";
1246 /* From Wolfgang Stanglmeier's NCR scsi driver. */
1247 struct info_str
1249 char *buffer;
1250 int length;
1251 int offset;
1252 int pos;
1255 static void copy_mem_info(struct info_str *info, char *data, int len)
1257 if (info->pos + len > info->length)
1258 len = info->length - info->pos;
1260 if (info->pos + len < info->offset) {
1261 info->pos += len;
1262 return;
1264 if (info->pos < info->offset) {
1265 data += (info->offset - info->pos);
1266 len -= (info->offset - info->pos);
1269 if (len > 0) {
1270 memcpy(info->buffer + info->pos, data, len);
1271 info->pos += len;
1275 static int copy_info(struct info_str *info, char *fmt, ...)
1277 va_list args;
1278 char buf[81];
1279 int len;
1281 va_start(args, fmt);
1282 len = vsprintf(buf, fmt, args);
1283 va_end(args);
1285 copy_mem_info(info, buf, len);
1286 return len;
1289 static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len)
1291 struct info_str info;
1292 int i;
1294 info.buffer = ptr;
1295 info.length = len;
1296 info.offset = offset;
1297 info.pos = 0;
1299 copy_info(&info, "Sparc ESP Host Adapter:\n");
1300 copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node);
1301 copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
1302 copy_info(&info, "\tESP Model\t\t");
1303 switch (esp->erev) {
1304 case esp100:
1305 copy_info(&info, "ESP100\n");
1306 break;
1307 case esp100a:
1308 copy_info(&info, "ESP100A\n");
1309 break;
1310 case esp236:
1311 copy_info(&info, "ESP236\n");
1312 break;
1313 case fas236:
1314 copy_info(&info, "FAS236\n");
1315 break;
1316 case fas100a:
1317 copy_info(&info, "FAS100A\n");
1318 break;
1319 case fast:
1320 copy_info(&info, "FAST\n");
1321 break;
1322 case fashme:
1323 copy_info(&info, "Happy Meal FAS\n");
1324 break;
1325 case espunknown:
1326 default:
1327 copy_info(&info, "Unknown!\n");
1328 break;
1330 copy_info(&info, "\tDMA Revision\t\t");
1331 switch (esp->dma->revision) {
1332 case dvmarev0:
1333 copy_info(&info, "Rev 0\n");
1334 break;
1335 case dvmaesc1:
1336 copy_info(&info, "ESC Rev 1\n");
1337 break;
1338 case dvmarev1:
1339 copy_info(&info, "Rev 1\n");
1340 break;
1341 case dvmarev2:
1342 copy_info(&info, "Rev 2\n");
1343 break;
1344 case dvmarev3:
1345 copy_info(&info, "Rev 3\n");
1346 break;
1347 case dvmarevplus:
1348 copy_info(&info, "Rev 1+\n");
1349 break;
1350 case dvmahme:
1351 copy_info(&info, "Rev HME/FAS\n");
1352 break;
1353 default:
1354 copy_info(&info, "Unknown!\n");
1355 break;
1357 copy_info(&info, "\tLive Targets\t\t[ ");
1358 for (i = 0; i < 15; i++) {
1359 if (esp->targets_present & (1 << i))
1360 copy_info(&info, "%d ", i);
1362 copy_info(&info, "]\n\n");
1364 /* Now describe the state of each existing target. */
1365 copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
1366 for (i = 0; i < 15; i++) {
1367 if (esp->targets_present & (1 << i)) {
1368 Scsi_Device *SDptr = esp->ehost->host_queue;
1370 while ((SDptr->host != esp->ehost) &&
1371 (SDptr->id != i) &&
1372 (SDptr->next))
1373 SDptr = SDptr->next;
1375 copy_info(&info, "%d\t\t", i);
1376 copy_info(&info, "%08lx\t", esp->config3[i]);
1377 copy_info(&info, "[%02lx,%02lx]\t\t\t", SDptr->sync_max_offset,
1378 SDptr->sync_min_period);
1379 copy_info(&info, "%s\t\t", SDptr->disconnect ? "yes" : "no");
1380 copy_info(&info, "%s\n",
1381 (esp->config3[i] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
1384 return info.pos > info.offset? info.pos - info.offset : 0;
1387 /* ESP proc filesystem code. */
1388 int esp_proc_info(char *buffer, char **start, off_t offset, int length,
1389 int hostno, int inout)
1391 struct esp *esp;
1393 if (inout)
1394 return -EINVAL; /* not yet */
1396 for_each_esp(esp) {
1397 if (esp->ehost->host_no == hostno)
1398 break;
1400 if (!esp)
1401 return -EINVAL;
1403 if (start)
1404 *start = buffer;
1406 return esp_host_info(esp, buffer, offset, length);
1409 static void esp_get_dmabufs(struct esp *esp, Scsi_Cmnd *sp)
1411 if (sp->use_sg == 0) {
1412 sp->SCp.this_residual = sp->request_bufflen;
1413 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
1414 sp->SCp.buffers_residual = 0;
1415 if (sp->request_bufflen) {
1416 sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer,
1417 sp->SCp.this_residual,
1418 scsi_to_sbus_dma_dir(sp->sc_data_direction));
1419 sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in);
1420 } else {
1421 sp->SCp.ptr = NULL;
1423 } else {
1424 sp->SCp.buffer = (struct scatterlist *) sp->buffer;
1425 sp->SCp.buffers_residual = sbus_map_sg(esp->sdev,
1426 sp->SCp.buffer,
1427 sp->use_sg,
1428 scsi_to_sbus_dma_dir(sp->sc_data_direction));
1429 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
1430 sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer));
1434 static void esp_release_dmabufs(struct esp *esp, Scsi_Cmnd *sp)
1436 if (sp->use_sg) {
1437 sbus_unmap_sg(esp->sdev, sp->buffer, sp->use_sg,
1438 scsi_to_sbus_dma_dir(sp->sc_data_direction));
1439 } else if (sp->request_bufflen) {
1440 sbus_unmap_single(esp->sdev,
1441 sp->SCp.have_data_in,
1442 sp->request_bufflen,
1443 scsi_to_sbus_dma_dir(sp->sc_data_direction));
1447 static void esp_restore_pointers(struct esp *esp, Scsi_Cmnd *sp)
1449 struct esp_pointers *ep = &esp->data_pointers[sp->target];
1451 sp->SCp.ptr = ep->saved_ptr;
1452 sp->SCp.buffer = ep->saved_buffer;
1453 sp->SCp.this_residual = ep->saved_this_residual;
1454 sp->SCp.buffers_residual = ep->saved_buffers_residual;
1457 static void esp_save_pointers(struct esp *esp, Scsi_Cmnd *sp)
1459 struct esp_pointers *ep = &esp->data_pointers[sp->target];
1461 ep->saved_ptr = sp->SCp.ptr;
1462 ep->saved_buffer = sp->SCp.buffer;
1463 ep->saved_this_residual = sp->SCp.this_residual;
1464 ep->saved_buffers_residual = sp->SCp.buffers_residual;
1467 /* Some rules:
1469 * 1) Never ever panic while something is live on the bus.
1470 * If there is to be any chance of syncing the disks this
1471 * rule is to be obeyed.
1473 * 2) Any target that causes a foul condition will no longer
1474 * have synchronous transfers done to it, no questions
1475 * asked.
1477 * 3) Keep register accesses to a minimum. Think about some
1478 * day when we have Xbus machines this is running on and
1479 * the ESP chip is on the other end of the machine on a
1480 * different board from the cpu where this is running.
1483 /* Fire off a command. We assume the bus is free and that the only
1484 * case where we could see an interrupt is where we have disconnected
1485 * commands active and they are trying to reselect us.
1487 static inline void esp_check_cmd(struct esp *esp, Scsi_Cmnd *sp)
1489 switch (sp->cmd_len) {
1490 case 6:
1491 case 10:
1492 case 12:
1493 esp->esp_slowcmd = 0;
1494 break;
1496 default:
1497 esp->esp_slowcmd = 1;
1498 esp->esp_scmdleft = sp->cmd_len;
1499 esp->esp_scmdp = &sp->cmnd[0];
1500 break;
1504 static inline void build_sync_nego_msg(struct esp *esp, int period, int offset)
1506 esp->cur_msgout[0] = EXTENDED_MESSAGE;
1507 esp->cur_msgout[1] = 3;
1508 esp->cur_msgout[2] = EXTENDED_SDTR;
1509 esp->cur_msgout[3] = period;
1510 esp->cur_msgout[4] = offset;
1511 esp->msgout_len = 5;
1514 /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
1515 static inline void build_wide_nego_msg(struct esp *esp, int size)
1517 esp->cur_msgout[0] = EXTENDED_MESSAGE;
1518 esp->cur_msgout[1] = 2;
1519 esp->cur_msgout[2] = EXTENDED_WDTR;
1520 switch (size) {
1521 case 32:
1522 esp->cur_msgout[3] = 2;
1523 break;
1524 case 16:
1525 esp->cur_msgout[3] = 1;
1526 break;
1527 case 8:
1528 default:
1529 esp->cur_msgout[3] = 0;
1530 break;
1533 esp->msgout_len = 4;
1536 static void esp_exec_cmd(struct esp *esp)
1538 Scsi_Cmnd *SCptr;
1539 Scsi_Device *SDptr;
1540 volatile u8 *cmdp = esp->esp_command;
1541 u8 the_esp_command;
1542 int lun, target;
1543 int i;
1545 /* Hold off if we have disconnected commands and
1546 * an IRQ is showing...
1548 if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs))
1549 return;
1551 /* Grab first member of the issue queue. */
1552 SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
1554 /* Safe to panic here because current_SC is null. */
1555 if (!SCptr)
1556 panic("esp: esp_exec_cmd and issue queue is NULL");
1558 SDptr = SCptr->device;
1559 lun = SCptr->lun;
1560 target = SCptr->target;
1562 esp->snip = 0;
1563 esp->msgout_len = 0;
1565 /* Send it out whole, or piece by piece? The ESP
1566 * only knows how to automatically send out 6, 10,
1567 * and 12 byte commands. I used to think that the
1568 * Linux SCSI code would never throw anything other
1569 * than that to us, but then again there is the
1570 * SCSI generic driver which can send us anything.
1572 esp_check_cmd(esp, SCptr);
1574 /* If arbitration/selection is successful, the ESP will leave
1575 * ATN asserted, causing the target to go into message out
1576 * phase. The ESP will feed the target the identify and then
1577 * the target can only legally go to one of command,
1578 * datain/out, status, or message in phase, or stay in message
1579 * out phase (should we be trying to send a sync negotiation
1580 * message after the identify). It is not allowed to drop
1581 * BSY, but some buggy targets do and we check for this
1582 * condition in the selection complete code. Most of the time
1583 * we'll make the command bytes available to the ESP and it
1584 * will not interrupt us until it finishes command phase, we
1585 * cannot do this for command sizes the ESP does not
1586 * understand and in this case we'll get interrupted right
1587 * when the target goes into command phase.
1589 * It is absolutely _illegal_ in the presence of SCSI-2 devices
1590 * to use the ESP select w/o ATN command. When SCSI-2 devices are
1591 * present on the bus we _must_ always go straight to message out
1592 * phase with an identify message for the target. Being that
1593 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
1594 * selections should not confuse SCSI-1 we hope.
1597 if (SDptr->sync) {
1598 /* this targets sync is known */
1599 do_sync_known:
1600 if (SDptr->disconnect)
1601 *cmdp++ = IDENTIFY(1, lun);
1602 else
1603 *cmdp++ = IDENTIFY(0, lun);
1605 if (esp->esp_slowcmd) {
1606 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1607 esp_advance_phase(SCptr, in_slct_stop);
1608 } else {
1609 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1610 esp_advance_phase(SCptr, in_slct_norm);
1612 } else if (!(esp->targets_present & (1<<target)) || !(SDptr->disconnect)) {
1613 /* After the bootup SCSI code sends both the
1614 * TEST_UNIT_READY and INQUIRY commands we want
1615 * to at least attempt allowing the device to
1616 * disconnect.
1618 ESPMISC(("esp: Selecting device for first time. target=%d "
1619 "lun=%d\n", target, SCptr->lun));
1620 if (!SDptr->borken && !SDptr->disconnect)
1621 SDptr->disconnect = 1;
1623 *cmdp++ = IDENTIFY(0, lun);
1624 esp->prevmsgout = NOP;
1625 esp_advance_phase(SCptr, in_slct_norm);
1626 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1628 /* Take no chances... */
1629 SDptr->sync_max_offset = 0;
1630 SDptr->sync_min_period = 0;
1631 } else {
1632 /* Sorry, I have had way too many problems with
1633 * various CDROM devices on ESP. -DaveM
1635 int cdrom_hwbug_wkaround = 0;
1637 /* Never allow disconnects or synchronous transfers on
1638 * SparcStation1 and SparcStation1+. Allowing those
1639 * to be enabled seems to lockup the machine completely.
1641 if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
1642 (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
1643 /* But we are nice and allow tapes and removable
1644 * disks (but not CDROMs) to disconnect.
1646 if(SDptr->type == TYPE_TAPE ||
1647 (SDptr->type != TYPE_ROM && SDptr->removable))
1648 SDptr->disconnect = 1;
1649 else
1650 SDptr->disconnect = 0;
1651 SDptr->sync_max_offset = 0;
1652 SDptr->sync_min_period = 0;
1653 SDptr->sync = 1;
1654 esp->snip = 0;
1655 goto do_sync_known;
1658 /* We've talked to this guy before,
1659 * but never negotiated. Let's try,
1660 * need to attempt WIDE first, before
1661 * sync nego, as per SCSI 2 standard.
1663 if (esp->erev == fashme && !SDptr->wide) {
1664 if (!SDptr->borken &&
1665 SDptr->type != TYPE_ROM &&
1666 SDptr->removable == 0) {
1667 build_wide_nego_msg(esp, 16);
1668 SDptr->wide = 1;
1669 esp->wnip = 1;
1670 goto after_nego_msg_built;
1671 } else {
1672 SDptr->wide = 1;
1673 /* Fall through and try sync. */
1677 if (!SDptr->borken) {
1678 if ((SDptr->type == TYPE_ROM)) {
1679 /* Nice try sucker... */
1680 ESPMISC(("esp%d: Disabling sync for buggy "
1681 "CDROM.\n", esp->esp_id));
1682 cdrom_hwbug_wkaround = 1;
1683 build_sync_nego_msg(esp, 0, 0);
1684 } else if (SDptr->removable != 0) {
1685 ESPMISC(("esp%d: Not negotiating sync/wide but "
1686 "allowing disconnect for removable media.\n",
1687 esp->esp_id));
1688 build_sync_nego_msg(esp, 0, 0);
1689 } else {
1690 build_sync_nego_msg(esp, esp->sync_defp, 15);
1692 } else {
1693 build_sync_nego_msg(esp, 0, 0);
1695 SDptr->sync = 1;
1696 esp->snip = 1;
1698 after_nego_msg_built:
1699 /* A fix for broken SCSI1 targets, when they disconnect
1700 * they lock up the bus and confuse ESP. So disallow
1701 * disconnects for SCSI1 targets for now until we
1702 * find a better fix.
1704 * Addendum: This is funny, I figured out what was going
1705 * on. The blotzed SCSI1 target would disconnect,
1706 * one of the other SCSI2 targets or both would be
1707 * disconnected as well. The SCSI1 target would
1708 * stay disconnected long enough that we start
1709 * up a command on one of the SCSI2 targets. As
1710 * the ESP is arbitrating for the bus the SCSI1
1711 * target begins to arbitrate as well to reselect
1712 * the ESP. The SCSI1 target refuses to drop it's
1713 * ID bit on the data bus even though the ESP is
1714 * at ID 7 and is the obvious winner for any
1715 * arbitration. The ESP is a poor sport and refuses
1716 * to lose arbitration, it will continue indefinately
1717 * trying to arbitrate for the bus and can only be
1718 * stopped via a chip reset or SCSI bus reset.
1719 * Therefore _no_ disconnects for SCSI1 targets
1720 * thank you very much. ;-)
1722 if(((SDptr->scsi_level < 3) &&
1723 (SDptr->type != TYPE_TAPE) &&
1724 SDptr->removable == 0) ||
1725 cdrom_hwbug_wkaround || SDptr->borken) {
1726 ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
1727 "lun %d\n", esp->esp_id, SCptr->target, SCptr->lun));
1728 SDptr->disconnect = 0;
1729 *cmdp++ = IDENTIFY(0, lun);
1730 } else {
1731 *cmdp++ = IDENTIFY(1, lun);
1734 /* ESP fifo is only so big...
1735 * Make this look like a slow command.
1737 esp->esp_slowcmd = 1;
1738 esp->esp_scmdleft = SCptr->cmd_len;
1739 esp->esp_scmdp = &SCptr->cmnd[0];
1741 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1742 esp_advance_phase(SCptr, in_slct_msg);
1745 if (!esp->esp_slowcmd)
1746 for (i = 0; i < SCptr->cmd_len; i++)
1747 *cmdp++ = SCptr->cmnd[i];
1749 /* HME sucks... */
1750 if (esp->erev == fashme)
1751 sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT),
1752 esp->eregs + ESP_BUSID);
1753 else
1754 sbus_writeb(target & 7, esp->eregs + ESP_BUSID);
1755 if (esp->prev_soff != SDptr->sync_max_offset ||
1756 esp->prev_stp != SDptr->sync_min_period ||
1757 (esp->erev > esp100a &&
1758 esp->prev_cfg3 != esp->config3[target])) {
1759 esp->prev_soff = SDptr->sync_max_offset;
1760 esp->prev_stp = SDptr->sync_min_period;
1761 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
1762 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
1763 if (esp->erev > esp100a) {
1764 esp->prev_cfg3 = esp->config3[target];
1765 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
1768 i = (cmdp - esp->esp_command);
1770 if (esp->erev == fashme) {
1771 esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */
1773 /* Set up the DMA and HME counters */
1774 sbus_writeb(i, esp->eregs + ESP_TCLOW);
1775 sbus_writeb(0, esp->eregs + ESP_TCMED);
1776 sbus_writeb(0, esp->eregs + FAS_RLO);
1777 sbus_writeb(0, esp->eregs + FAS_RHI);
1778 esp_cmd(esp, the_esp_command);
1780 /* Talk about touchy hardware... */
1781 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
1782 (DMA_SCSI_DISAB | DMA_ENABLE)) &
1783 ~(DMA_ST_WRITE));
1784 sbus_writel(16, esp->dregs + DMA_COUNT);
1785 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
1786 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
1787 } else {
1788 u32 tmp;
1790 /* Set up the DMA and ESP counters */
1791 sbus_writeb(i, esp->eregs + ESP_TCLOW);
1792 sbus_writeb(0, esp->eregs + ESP_TCMED);
1793 tmp = sbus_readl(esp->dregs + DMA_CSR);
1794 tmp &= ~DMA_ST_WRITE;
1795 tmp |= DMA_ENABLE;
1796 sbus_writel(tmp, esp->dregs + DMA_CSR);
1797 if (esp->dma->revision == dvmaesc1) {
1798 if (i) /* Workaround ESC gate array SBUS rerun bug. */
1799 sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT);
1801 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
1803 /* Tell ESP to "go". */
1804 esp_cmd(esp, the_esp_command);
1808 /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
1809 int esp_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
1811 struct esp *esp;
1812 unsigned long flags;
1814 /* Set up func ptr and initial driver cmd-phase. */
1815 SCpnt->scsi_done = done;
1816 SCpnt->SCp.phase = not_issued;
1818 /* We use the scratch area. */
1819 ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->target, SCpnt->lun));
1820 ESPDISC(("N<%02x,%02x>", SCpnt->target, SCpnt->lun));
1822 esp = (struct esp *) SCpnt->host->hostdata;
1823 esp_get_dmabufs(esp, SCpnt);
1824 esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
1826 SCpnt->SCp.Status = CHECK_CONDITION;
1827 SCpnt->SCp.Message = 0xff;
1828 SCpnt->SCp.sent_command = 0;
1830 spin_lock_irqsave(&esp->lock, flags);
1832 /* Place into our queue. */
1833 if (SCpnt->cmnd[0] == REQUEST_SENSE) {
1834 ESPQUEUE(("RQSENSE\n"));
1835 prepend_SC(&esp->issue_SC, SCpnt);
1836 } else {
1837 ESPQUEUE(("\n"));
1838 append_SC(&esp->issue_SC, SCpnt);
1841 /* Run it now if we can. */
1842 if (!esp->current_SC && !esp->resetting_bus)
1843 esp_exec_cmd(esp);
1845 spin_unlock_irqrestore(&esp->lock, flags);
1847 return 0;
1850 /* Only queuing supported in this ESP driver. */
1851 int esp_command(Scsi_Cmnd *SCpnt)
1853 struct esp *esp = (struct esp *) SCpnt->host->hostdata;
1855 ESPLOG(("esp%d: esp_command() called...\n", esp->esp_id));
1856 return -1;
1859 /* Dump driver state. */
1860 static void esp_dump_cmd(Scsi_Cmnd *SCptr)
1862 ESPLOG(("[tgt<%02x> lun<%02x> "
1863 "pphase<%s> cphase<%s>]",
1864 SCptr->target, SCptr->lun,
1865 phase_string(SCptr->SCp.sent_command),
1866 phase_string(SCptr->SCp.phase)));
1869 static void esp_dump_state(struct esp *esp)
1871 Scsi_Cmnd *SCptr = esp->current_SC;
1872 #ifdef DEBUG_ESP_CMDS
1873 int i;
1874 #endif
1876 ESPLOG(("esp%d: dumping state\n", esp->esp_id));
1877 ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
1878 esp->esp_id,
1879 sbus_readl(esp->dregs + DMA_CSR),
1880 sbus_readl(esp->dregs + DMA_ADDR)));
1881 ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1882 esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
1883 ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1884 esp->esp_id,
1885 sbus_readb(esp->eregs + ESP_STATUS),
1886 sbus_readb(esp->eregs + ESP_SSTEP),
1887 sbus_readb(esp->eregs + ESP_INTRPT)));
1888 #ifdef DEBUG_ESP_CMDS
1889 printk("esp%d: last ESP cmds [", esp->esp_id);
1890 i = (esp->espcmdent - 1) & 31;
1891 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1892 i = (i - 1) & 31;
1893 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1894 i = (i - 1) & 31;
1895 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1896 i = (i - 1) & 31;
1897 printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1898 printk("]\n");
1899 #endif /* (DEBUG_ESP_CMDS) */
1901 if (SCptr) {
1902 ESPLOG(("esp%d: current command ", esp->esp_id));
1903 esp_dump_cmd(SCptr);
1905 ESPLOG(("\n"));
1906 SCptr = esp->disconnected_SC;
1907 ESPLOG(("esp%d: disconnected ", esp->esp_id));
1908 while (SCptr) {
1909 esp_dump_cmd(SCptr);
1910 SCptr = (Scsi_Cmnd *) SCptr->host_scribble;
1912 ESPLOG(("\n"));
1915 /* Abort a command. */
1916 int esp_abort(Scsi_Cmnd *SCptr)
1918 struct esp *esp = (struct esp *) SCptr->host->hostdata;
1919 unsigned long flags;
1920 int don;
1922 spin_lock_irqsave(&esp->lock, flags);
1924 ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
1925 esp_dump_state(esp);
1927 /* Wheee, if this is the current command on the bus, the
1928 * best we can do is assert ATN and wait for msgout phase.
1929 * This should even fix a hung SCSI bus when we lose state
1930 * in the driver and timeout because the eventual phase change
1931 * will cause the ESP to (eventually) give an interrupt.
1933 if (esp->current_SC == SCptr) {
1934 esp->cur_msgout[0] = ABORT;
1935 esp->msgout_len = 1;
1936 esp->msgout_ctr = 0;
1937 esp_cmd(esp, ESP_CMD_SATN);
1938 spin_unlock_irqrestore(&esp->lock, flags);
1939 return SCSI_ABORT_PENDING;
1942 /* If it is still in the issue queue then we can safely
1943 * call the completion routine and report abort success.
1945 don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB);
1946 if (don) {
1947 ESP_INTSOFF(esp->dregs);
1949 if (esp->issue_SC) {
1950 Scsi_Cmnd **prev, *this;
1951 for (prev = (&esp->issue_SC), this = esp->issue_SC;
1952 this != NULL;
1953 prev = (Scsi_Cmnd **) &(this->host_scribble),
1954 this = (Scsi_Cmnd *) this->host_scribble) {
1956 if (this == SCptr) {
1957 *prev = (Scsi_Cmnd *) this->host_scribble;
1958 this->host_scribble = NULL;
1960 spin_unlock_irqrestore(&esp->lock, flags);
1962 esp_release_dmabufs(esp, this);
1963 this->result = DID_ABORT << 16;
1964 this->scsi_done(this);
1965 if (don)
1966 ESP_INTSON(esp->dregs);
1968 return SCSI_ABORT_SUCCESS;
1973 /* Yuck, the command to abort is disconnected, it is not
1974 * worth trying to abort it now if something else is live
1975 * on the bus at this time. So, we let the SCSI code wait
1976 * a little bit and try again later.
1978 if (esp->current_SC) {
1979 if (don)
1980 ESP_INTSON(esp->dregs);
1981 spin_unlock_irqrestore(&esp->lock, flags);
1982 return SCSI_ABORT_BUSY;
1985 /* It's disconnected, we have to reconnect to re-establish
1986 * the nexus and tell the device to abort. However, we really
1987 * cannot 'reconnect' per se, therefore we tell the upper layer
1988 * the safest thing we can. This is, wait a bit, if nothing
1989 * happens, we are really hung so reset the bus.
1992 if (don)
1993 ESP_INTSON(esp->dregs);
1994 spin_unlock_irqrestore(&esp->lock, flags);
1995 return SCSI_ABORT_SNOOZE;
1998 /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
1999 * arrived indicating the end of the SCSI bus reset. Our job
2000 * is to clean out the command queues and begin re-execution
2001 * of SCSI commands once more.
2003 static int esp_finish_reset(struct esp *esp)
2005 Scsi_Cmnd *sp = esp->current_SC;
2007 /* Clean up currently executing command, if any. */
2008 if (sp != NULL) {
2009 esp->current_SC = NULL;
2010 spin_unlock(&esp->lock);
2012 esp_release_dmabufs(esp, sp);
2013 sp->result = (DID_RESET << 16);
2015 spin_lock(&io_request_lock);
2016 sp->scsi_done(sp);
2017 spin_unlock(&io_request_lock);
2019 spin_lock(&esp->lock);
2022 /* Clean up disconnected queue, they have been invalidated
2023 * by the bus reset.
2025 if (esp->disconnected_SC) {
2026 while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
2027 spin_unlock(&esp->lock);
2029 esp_release_dmabufs(esp, sp);
2030 sp->result = (DID_RESET << 16);
2032 spin_lock(&io_request_lock);
2033 sp->scsi_done(sp);
2034 spin_unlock(&io_request_lock);
2036 spin_lock(&esp->lock);
2040 /* SCSI bus reset is complete. */
2041 esp->resetting_bus = 0;
2043 /* Ok, now it is safe to get commands going once more. */
2044 if (esp->issue_SC)
2045 esp_exec_cmd(esp);
2047 return do_intr_end;
2050 static int esp_do_resetbus(struct esp *esp)
2052 ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
2053 esp->resetting_bus = 1;
2054 esp_cmd(esp, ESP_CMD_RS);
2056 return do_intr_end;
2059 /* Reset ESP chip, reset hanging bus, then kill active and
2060 * disconnected commands for targets without soft reset.
2062 int esp_reset(Scsi_Cmnd *SCptr, unsigned int how)
2064 struct esp *esp = (struct esp *) SCptr->host->hostdata;
2065 unsigned long flags;
2067 spin_lock_irqsave(&esp->lock, flags);
2068 (void) esp_do_resetbus(esp);
2069 spin_unlock_irqrestore(&esp->lock, flags);
2071 return SCSI_RESET_PENDING;
2074 /* Internal ESP done function. */
2075 static void esp_done(struct esp *esp, int error)
2077 Scsi_Cmnd *done_SC = esp->current_SC;
2079 esp->current_SC = NULL;
2081 spin_unlock(&esp->lock);
2082 esp_release_dmabufs(esp, done_SC);
2083 done_SC->result = error;
2085 spin_lock(&io_request_lock);
2086 done_SC->scsi_done(done_SC);
2087 spin_unlock(&io_request_lock);
2089 /* Bus is free, issue any commands in the queue. */
2090 spin_lock(&esp->lock);
2091 if (esp->issue_SC && !esp->current_SC)
2092 esp_exec_cmd(esp);
2096 /* Wheee, ESP interrupt engine. */
2098 /* Forward declarations. */
2099 static int esp_do_phase_determine(struct esp *esp);
2100 static int esp_do_data_finale(struct esp *esp);
2101 static int esp_select_complete(struct esp *esp);
2102 static int esp_do_status(struct esp *esp);
2103 static int esp_do_msgin(struct esp *esp);
2104 static int esp_do_msgindone(struct esp *esp);
2105 static int esp_do_msgout(struct esp *esp);
2106 static int esp_do_cmdbegin(struct esp *esp);
2108 #define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
2109 #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
2111 /* Read any bytes found in the FAS366 fifo, storing them into
2112 * the ESP driver software state structure.
2114 static void hme_fifo_read(struct esp *esp)
2116 u8 count = 0;
2117 u8 status = esp->sreg;
2119 /* Cannot safely frob the fifo for these following cases, but
2120 * we must always read the fifo when the reselect interrupt
2121 * is pending.
2123 if (((esp->ireg & ESP_INTR_RSEL) == 0) &&
2124 (sreg_datainp(status) ||
2125 sreg_dataoutp(status) ||
2126 (esp->current_SC &&
2127 esp->current_SC->SCp.phase == in_data_done))) {
2128 ESPHME(("<wkaround_skipped>"));
2129 } else {
2130 unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES;
2132 /* The HME stores bytes in multiples of 2 in the fifo. */
2133 ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
2134 while (fcnt) {
2135 esp->hme_fifo_workaround_buffer[count++] =
2136 sbus_readb(esp->eregs + ESP_FDATA);
2137 esp->hme_fifo_workaround_buffer[count++] =
2138 sbus_readb(esp->eregs + ESP_FDATA);
2139 ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
2140 fcnt--;
2142 if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) {
2143 ESPHME(("<poke_byte>"));
2144 sbus_writeb(0, esp->eregs + ESP_FDATA);
2145 esp->hme_fifo_workaround_buffer[count++] =
2146 sbus_readb(esp->eregs + ESP_FDATA);
2147 ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
2148 ESPHME(("CMD_FLUSH"));
2149 esp_cmd(esp, ESP_CMD_FLUSH);
2150 } else {
2151 ESPHME(("no_xtra_byte"));
2154 ESPHME(("wkarnd_cnt=%d]", (int)count));
2155 esp->hme_fifo_workaround_count = count;
2158 static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count)
2160 esp_cmd(esp, ESP_CMD_FLUSH);
2161 while (count) {
2162 u8 tmp = *bytes++;
2163 sbus_writeb(tmp, esp->eregs + ESP_FDATA);
2164 sbus_writeb(0, esp->eregs + ESP_FDATA);
2165 count--;
2169 /* We try to avoid some interrupts by jumping ahead and see if the ESP
2170 * has gotten far enough yet. Hence the following.
2172 static inline int skipahead1(struct esp *esp, Scsi_Cmnd *scp,
2173 int prev_phase, int new_phase)
2175 if (scp->SCp.sent_command != prev_phase)
2176 return 0;
2177 if (ESP_IRQ_P(esp->dregs)) {
2178 /* Yes, we are able to save an interrupt. */
2179 if (esp->erev == fashme)
2180 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
2181 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
2182 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
2183 if (esp->erev == fashme) {
2184 /* This chip is really losing. */
2185 ESPHME(("HME["));
2186 /* Must latch fifo before reading the interrupt
2187 * register else garbage ends up in the FIFO
2188 * which confuses the driver utterly.
2189 * Happy Meal indeed....
2191 ESPHME(("fifo_workaround]"));
2192 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2193 (esp->sreg2 & ESP_STAT2_F1BYTE))
2194 hme_fifo_read(esp);
2196 if (!(esp->ireg & ESP_INTR_SR))
2197 return 0;
2198 else
2199 return do_reset_complete;
2201 /* Ho hum, target is taking forever... */
2202 scp->SCp.sent_command = new_phase; /* so we don't recurse... */
2203 return do_intr_end;
2206 static inline int skipahead2(struct esp *esp, Scsi_Cmnd *scp,
2207 int prev_phase1, int prev_phase2, int new_phase)
2209 if (scp->SCp.sent_command != prev_phase1 &&
2210 scp->SCp.sent_command != prev_phase2)
2211 return 0;
2212 if (ESP_IRQ_P(esp->dregs)) {
2213 /* Yes, we are able to save an interrupt. */
2214 if (esp->erev == fashme)
2215 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
2216 esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
2217 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
2218 if (esp->erev == fashme) {
2219 /* This chip is really losing. */
2220 ESPHME(("HME["));
2222 /* Must latch fifo before reading the interrupt
2223 * register else garbage ends up in the FIFO
2224 * which confuses the driver utterly.
2225 * Happy Meal indeed....
2227 ESPHME(("fifo_workaround]"));
2228 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2229 (esp->sreg2 & ESP_STAT2_F1BYTE))
2230 hme_fifo_read(esp);
2232 if (!(esp->ireg & ESP_INTR_SR))
2233 return 0;
2234 else
2235 return do_reset_complete;
2237 /* Ho hum, target is taking forever... */
2238 scp->SCp.sent_command = new_phase; /* so we don't recurse... */
2239 return do_intr_end;
2242 /* Now some dma helpers. */
2243 static void dma_setup(struct esp *esp, __u32 addr, int count, int write)
2245 u32 nreg = sbus_readl(esp->dregs + DMA_CSR);
2247 if (write)
2248 nreg |= DMA_ST_WRITE;
2249 else
2250 nreg &= ~(DMA_ST_WRITE);
2251 nreg |= DMA_ENABLE;
2252 sbus_writel(nreg, esp->dregs + DMA_CSR);
2253 if (esp->dma->revision == dvmaesc1) {
2254 /* This ESC gate array sucks! */
2255 __u32 src = addr;
2256 __u32 dest = src + count;
2258 if (dest & (PAGE_SIZE - 1))
2259 count = PAGE_ALIGN(count);
2260 sbus_writel(count, esp->dregs + DMA_COUNT);
2262 sbus_writel(addr, esp->dregs + DMA_ADDR);
2265 static void dma_drain(struct esp *esp)
2267 u32 tmp;
2269 if (esp->dma->revision == dvmahme)
2270 return;
2271 if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) {
2272 switch (esp->dma->revision) {
2273 default:
2274 tmp |= DMA_FIFO_STDRAIN;
2275 sbus_writel(tmp, esp->dregs + DMA_CSR);
2277 case dvmarev3:
2278 case dvmaesc1:
2279 while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
2280 udelay(1);
2285 static void dma_invalidate(struct esp *esp)
2287 u32 tmp;
2289 if (esp->dma->revision == dvmahme) {
2290 sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
2292 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
2293 (DMA_PARITY_OFF | DMA_2CLKS |
2294 DMA_SCSI_DISAB | DMA_INT_ENAB)) &
2295 ~(DMA_ST_WRITE | DMA_ENABLE));
2297 sbus_writel(0, esp->dregs + DMA_CSR);
2298 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
2300 /* This is necessary to avoid having the SCSI channel
2301 * engine lock up on us.
2303 sbus_writel(0, esp->dregs + DMA_ADDR);
2304 } else {
2305 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
2306 udelay(1);
2308 tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
2309 tmp |= DMA_FIFO_INV;
2310 sbus_writel(tmp, esp->dregs + DMA_CSR);
2311 tmp &= ~DMA_FIFO_INV;
2312 sbus_writel(tmp, esp->dregs + DMA_CSR);
2316 static inline void dma_flashclear(struct esp *esp)
2318 dma_drain(esp);
2319 dma_invalidate(esp);
2322 static int dma_can_transfer(struct esp *esp, Scsi_Cmnd *sp)
2324 __u32 base, end, sz;
2326 if (esp->dma->revision == dvmarev3) {
2327 sz = sp->SCp.this_residual;
2328 if (sz > 0x1000000)
2329 sz = 0x1000000;
2330 } else {
2331 base = ((__u32)((unsigned long)sp->SCp.ptr));
2332 base &= (0x1000000 - 1);
2333 end = (base + sp->SCp.this_residual);
2334 if (end > 0x1000000)
2335 end = 0x1000000;
2336 sz = (end - base);
2338 return sz;
2341 /* Misc. esp helper macros. */
2342 #define esp_setcount(__eregs, __cnt, __hme) \
2343 sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \
2344 sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \
2345 if (__hme) { \
2346 sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \
2347 sbus_writeb(0, (__eregs) + FAS_RHI); \
2350 #define esp_getcount(__eregs, __hme) \
2351 ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \
2352 ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \
2353 ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0))
2355 #define fcount(__esp) \
2356 (((__esp)->erev == fashme) ? \
2357 (__esp)->hme_fifo_workaround_count : \
2358 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES)
2360 #define fnzero(__esp) \
2361 (((__esp)->erev == fashme) ? 0 : \
2362 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO)
2364 /* XXX speculative nops unnecessary when continuing amidst a data phase
2365 * XXX even on esp100!!! another case of flooding the bus with I/O reg
2366 * XXX writes...
2368 #define esp_maybe_nop(__esp) \
2369 if ((__esp)->erev == esp100) \
2370 esp_cmd((__esp), ESP_CMD_NULL)
2372 #define sreg_to_dataphase(__sreg) \
2373 ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
2375 /* The ESP100 when in synchronous data phase, can mistake a long final
2376 * REQ pulse from the target as an extra byte, it places whatever is on
2377 * the data lines into the fifo. For now, we will assume when this
2378 * happens that the target is a bit quirky and we don't want to
2379 * be talking synchronously to it anyways. Regardless, we need to
2380 * tell the ESP to eat the extraneous byte so that we can proceed
2381 * to the next phase.
2383 static int esp100_sync_hwbug(struct esp *esp, Scsi_Cmnd *sp, int fifocnt)
2385 /* Do not touch this piece of code. */
2386 if ((!(esp->erev == esp100)) ||
2387 (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) &&
2388 !fifocnt) &&
2389 !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) {
2390 if (sp->SCp.phase == in_dataout)
2391 esp_cmd(esp, ESP_CMD_FLUSH);
2392 return 0;
2393 } else {
2394 /* Async mode for this guy. */
2395 build_sync_nego_msg(esp, 0, 0);
2397 /* Ack the bogus byte, but set ATN first. */
2398 esp_cmd(esp, ESP_CMD_SATN);
2399 esp_cmd(esp, ESP_CMD_MOK);
2400 return 1;
2404 /* This closes the window during a selection with a reselect pending, because
2405 * we use DMA for the selection process the FIFO should hold the correct
2406 * contents if we get reselected during this process. So we just need to
2407 * ack the possible illegal cmd interrupt pending on the esp100.
2409 static inline int esp100_reconnect_hwbug(struct esp *esp)
2411 u8 tmp;
2413 if (esp->erev != esp100)
2414 return 0;
2415 tmp = sbus_readb(esp->eregs + ESP_INTRPT);
2416 if (tmp & ESP_INTR_SR)
2417 return 1;
2418 return 0;
2421 /* This verifies the BUSID bits during a reselection so that we know which
2422 * target is talking to us.
2424 static inline int reconnect_target(struct esp *esp)
2426 int it, me = esp->scsi_id_mask, targ = 0;
2428 if (2 != fcount(esp))
2429 return -1;
2430 if (esp->erev == fashme) {
2431 /* HME does not latch it's own BUS ID bits during
2432 * a reselection. Also the target number is given
2433 * as an unsigned char, not as a sole bit number
2434 * like the other ESP's do.
2435 * Happy Meal indeed....
2437 targ = esp->hme_fifo_workaround_buffer[0];
2438 } else {
2439 it = sbus_readb(esp->eregs + ESP_FDATA);
2440 if (!(it & me))
2441 return -1;
2442 it &= ~me;
2443 if (it & (it - 1))
2444 return -1;
2445 while (!(it & 1))
2446 targ++, it >>= 1;
2448 return targ;
2451 /* This verifies the identify from the target so that we know which lun is
2452 * being reconnected.
2454 static inline int reconnect_lun(struct esp *esp)
2456 int lun;
2458 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
2459 return -1;
2460 if (esp->erev == fashme)
2461 lun = esp->hme_fifo_workaround_buffer[1];
2462 else
2463 lun = sbus_readb(esp->eregs + ESP_FDATA);
2465 /* Yes, you read this correctly. We report lun of zero
2466 * if we see parity error. ESP reports parity error for
2467 * the lun byte, and this is the only way to hope to recover
2468 * because the target is connected.
2470 if (esp->sreg & ESP_STAT_PERR)
2471 return 0;
2473 /* Check for illegal bits being set in the lun. */
2474 if ((lun & 0x40) || !(lun & 0x80))
2475 return -1;
2477 return lun & 7;
2480 /* This puts the driver in a state where it can revitalize a command that
2481 * is being continued due to reselection.
2483 static inline void esp_connect(struct esp *esp, Scsi_Cmnd *sp)
2485 Scsi_Device *dp = sp->device;
2487 if (esp->prev_soff != dp->sync_max_offset ||
2488 esp->prev_stp != dp->sync_min_period ||
2489 (esp->erev > esp100a &&
2490 esp->prev_cfg3 != esp->config3[sp->target])) {
2491 esp->prev_soff = dp->sync_max_offset;
2492 esp->prev_stp = dp->sync_min_period;
2493 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
2494 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
2495 if (esp->erev > esp100a) {
2496 esp->prev_cfg3 = esp->config3[sp->target];
2497 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
2500 esp->current_SC = sp;
2503 /* This will place the current working command back into the issue queue
2504 * if we are to receive a reselection amidst a selection attempt.
2506 static inline void esp_reconnect(struct esp *esp, Scsi_Cmnd *sp)
2508 if (!esp->disconnected_SC)
2509 ESPLOG(("esp%d: Weird, being reselected but disconnected "
2510 "command queue is empty.\n", esp->esp_id));
2511 esp->snip = 0;
2512 esp->current_SC = 0;
2513 sp->SCp.phase = not_issued;
2514 append_SC(&esp->issue_SC, sp);
2517 /* Begin message in phase. */
2518 static int esp_do_msgin(struct esp *esp)
2520 /* Must be very careful with the fifo on the HME */
2521 if ((esp->erev != fashme) ||
2522 !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY))
2523 esp_cmd(esp, ESP_CMD_FLUSH);
2524 esp_maybe_nop(esp);
2525 esp_cmd(esp, ESP_CMD_TI);
2526 esp->msgin_len = 1;
2527 esp->msgin_ctr = 0;
2528 esp_advance_phase(esp->current_SC, in_msgindone);
2529 return do_work_bus;
2532 /* This uses various DMA csr fields and the fifo flags count value to
2533 * determine how many bytes were successfully sent/received by the ESP.
2535 static inline int esp_bytes_sent(struct esp *esp, int fifo_count)
2537 int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma;
2539 if (esp->dma->revision == dvmarev1)
2540 rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11));
2541 return rval - fifo_count;
2544 static inline void advance_sg(Scsi_Cmnd *sp)
2546 ++sp->SCp.buffer;
2547 --sp->SCp.buffers_residual;
2548 sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
2549 sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer));
2552 /* Please note that the way I've coded these routines is that I _always_
2553 * check for a disconnect during any and all information transfer
2554 * phases. The SCSI standard states that the target _can_ cause a BUS
2555 * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
2556 * that during information transfer phases the target controls every
2557 * change in phase, the only thing the initiator can do is "ask" for
2558 * a message out phase by driving ATN true. The target can, and sometimes
2559 * will, completely ignore this request so we cannot assume anything when
2560 * we try to force a message out phase to abort/reset a target. Most of
2561 * the time the target will eventually be nice and go to message out, so
2562 * we may have to hold on to our state about what we want to tell the target
2563 * for some period of time.
2566 /* I think I have things working here correctly. Even partial transfers
2567 * within a buffer or sub-buffer should not upset us at all no matter
2568 * how bad the target and/or ESP fucks things up.
2570 static int esp_do_data(struct esp *esp)
2572 Scsi_Cmnd *SCptr = esp->current_SC;
2573 int thisphase, hmuch;
2575 ESPDATA(("esp_do_data: "));
2576 esp_maybe_nop(esp);
2577 thisphase = sreg_to_dataphase(esp->sreg);
2578 esp_advance_phase(SCptr, thisphase);
2579 ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
2580 hmuch = dma_can_transfer(esp, SCptr);
2581 ESPDATA(("hmuch<%d> ", hmuch));
2582 esp->current_transfer_size = hmuch;
2584 if (esp->erev == fashme) {
2585 u32 tmp = esp->prev_hme_dmacsr;
2587 /* Always set the ESP count registers first. */
2588 esp_setcount(esp->eregs, hmuch, 1);
2590 /* Get the DMA csr computed. */
2591 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
2592 if (thisphase == in_datain)
2593 tmp |= DMA_ST_WRITE;
2594 else
2595 tmp &= ~(DMA_ST_WRITE);
2596 esp->prev_hme_dmacsr = tmp;
2598 ESPDATA(("DMA|TI --> do_intr_end\n"));
2599 if (thisphase == in_datain) {
2600 sbus_writel(hmuch, esp->dregs + DMA_COUNT);
2601 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2602 } else {
2603 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2604 sbus_writel(hmuch, esp->dregs + DMA_COUNT);
2606 sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR);
2607 sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
2608 } else {
2609 esp_setcount(esp->eregs, hmuch, 0);
2610 dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)),
2611 hmuch, (thisphase == in_datain));
2612 ESPDATA(("DMA|TI --> do_intr_end\n"));
2613 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2615 return do_intr_end;
2618 /* See how successful the data transfer was. */
2619 static int esp_do_data_finale(struct esp *esp)
2621 Scsi_Cmnd *SCptr = esp->current_SC;
2622 int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
2624 ESPDATA(("esp_do_data_finale: "));
2626 if (SCptr->SCp.phase == in_datain) {
2627 if (esp->sreg & ESP_STAT_PERR) {
2628 /* Yuck, parity error. The ESP asserts ATN
2629 * so that we can go to message out phase
2630 * immediately and inform the target that
2631 * something bad happened.
2633 ESPLOG(("esp%d: data bad parity detected.\n",
2634 esp->esp_id));
2635 esp->cur_msgout[0] = INITIATOR_ERROR;
2636 esp->msgout_len = 1;
2638 dma_drain(esp);
2640 dma_invalidate(esp);
2642 /* This could happen for the above parity error case. */
2643 if (esp->ireg != ESP_INTR_BSERV) {
2644 /* Please go to msgout phase, please please please... */
2645 ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
2646 esp->esp_id));
2647 return esp_do_phase_determine(esp);
2650 /* Check for partial transfers and other horrible events.
2651 * Note, here we read the real fifo flags register even
2652 * on HME broken adapters because we skip the HME fifo
2653 * workaround code in esp_handle() if we are doing data
2654 * phase things. We don't want to fuck directly with
2655 * the fifo like that, especially if doing syncronous
2656 * transfers! Also, will need to double the count on
2657 * HME if we are doing wide transfers, as the HME fifo
2658 * will move and count 16-bit quantities during wide data.
2659 * SMCC _and_ Qlogic can both bite me.
2661 fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
2662 if (esp->erev != fashme)
2663 ecount = esp_getcount(esp->eregs, 0);
2664 bytes_sent = esp->current_transfer_size;
2666 ESPDATA(("trans_sz(%d), ", bytes_sent));
2667 if (esp->erev == fashme) {
2668 if (!(esp->sreg & ESP_STAT_TCNT)) {
2669 ecount = esp_getcount(esp->eregs, 1);
2670 bytes_sent -= ecount;
2673 /* Always subtract any cruft remaining in the FIFO. */
2674 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
2675 fifocnt <<= 1;
2676 if (SCptr->SCp.phase == in_dataout)
2677 bytes_sent -= fifocnt;
2679 /* I have an IBM disk which exhibits the following
2680 * behavior during writes to it. It disconnects in
2681 * the middle of a partial transfer, the current sglist
2682 * buffer is 1024 bytes, the disk stops data transfer
2683 * at 512 bytes.
2685 * However the FAS366 reports that 32 more bytes were
2686 * transferred than really were. This is precisely
2687 * the size of a fully loaded FIFO in wide scsi mode.
2688 * The FIFO state recorded indicates that it is empty.
2690 * I have no idea if this is a bug in the FAS366 chip
2691 * or a bug in the firmware on this IBM disk. In any
2692 * event the following seems to be a good workaround. -DaveM
2694 if (bytes_sent != esp->current_transfer_size &&
2695 SCptr->SCp.phase == in_dataout) {
2696 int mask = (64 - 1);
2698 if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0)
2699 mask >>= 1;
2701 if (bytes_sent & mask)
2702 bytes_sent -= (bytes_sent & mask);
2704 } else {
2705 if (!(esp->sreg & ESP_STAT_TCNT))
2706 bytes_sent -= ecount;
2707 if (SCptr->SCp.phase == in_dataout)
2708 bytes_sent -= fifocnt;
2711 ESPDATA(("bytes_sent(%d), ", bytes_sent));
2713 /* If we were in synchronous mode, check for peculiarities. */
2714 if (esp->erev == fashme) {
2715 if (SCptr->device->sync_max_offset) {
2716 if (SCptr->SCp.phase == in_dataout)
2717 esp_cmd(esp, ESP_CMD_FLUSH);
2718 } else {
2719 esp_cmd(esp, ESP_CMD_FLUSH);
2721 } else {
2722 if (SCptr->device->sync_max_offset)
2723 bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt);
2724 else
2725 esp_cmd(esp, ESP_CMD_FLUSH);
2728 /* Until we are sure of what has happened, we are certainly
2729 * in the dark.
2731 esp_advance_phase(SCptr, in_the_dark);
2733 if (bytes_sent < 0) {
2734 /* I've seen this happen due to lost state in this
2735 * driver. No idea why it happened, but allowing
2736 * this value to be negative caused things to
2737 * lock up. This allows greater chance of recovery.
2738 * In fact every time I've seen this, it has been
2739 * a driver bug without question.
2741 ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
2742 ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
2743 esp->esp_id,
2744 esp->current_transfer_size, fifocnt, ecount));
2745 ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
2746 esp->esp_id,
2747 SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
2748 ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
2749 SCptr->target));
2750 SCptr->device->borken = 1;
2751 SCptr->device->sync = 0;
2752 bytes_sent = 0;
2755 /* Update the state of our transfer. */
2756 SCptr->SCp.ptr += bytes_sent;
2757 SCptr->SCp.this_residual -= bytes_sent;
2758 if (SCptr->SCp.this_residual < 0) {
2759 /* shit */
2760 ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
2761 SCptr->SCp.this_residual = 0;
2764 /* Maybe continue. */
2765 if (!bogus_data) {
2766 ESPDATA(("!bogus_data, "));
2768 /* NO MATTER WHAT, we advance the scatterlist,
2769 * if the target should decide to disconnect
2770 * in between scatter chunks (which is common)
2771 * we could die horribly! I used to have the sg
2772 * advance occur only if we are going back into
2773 * (or are staying in) a data phase, you can
2774 * imagine the hell I went through trying to
2775 * figure this out.
2777 if (SCptr->use_sg && !SCptr->SCp.this_residual)
2778 advance_sg(SCptr);
2779 if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
2780 ESPDATA(("to more data\n"));
2781 return esp_do_data(esp);
2783 ESPDATA(("to new phase\n"));
2784 return esp_do_phase_determine(esp);
2786 /* Bogus data, just wait for next interrupt. */
2787 ESPLOG(("esp%d: bogus_data during end of data phase\n",
2788 esp->esp_id));
2789 return do_intr_end;
2792 /* We received a non-good status return at the end of
2793 * running a SCSI command. This is used to decide if
2794 * we should clear our synchronous transfer state for
2795 * such a device when that happens.
2797 * The idea is that when spinning up a disk or rewinding
2798 * a tape, we don't want to go into a loop re-negotiating
2799 * synchronous capabilities over and over.
2801 static int esp_should_clear_sync(Scsi_Cmnd *sp)
2803 u8 cmd1 = sp->cmnd[0];
2804 u8 cmd2 = sp->data_cmnd[0];
2806 /* These cases are for spinning up a disk and
2807 * waiting for that spinup to complete.
2809 if (cmd1 == START_STOP ||
2810 cmd2 == START_STOP)
2811 return 0;
2813 if (cmd1 == TEST_UNIT_READY ||
2814 cmd2 == TEST_UNIT_READY)
2815 return 0;
2817 /* One more special case for SCSI tape drives,
2818 * this is what is used to probe the device for
2819 * completion of a rewind or tape load operation.
2821 if (sp->device->type == TYPE_TAPE) {
2822 if (cmd1 == MODE_SENSE ||
2823 cmd2 == MODE_SENSE)
2824 return 0;
2827 return 1;
2830 /* Either a command is completing or a target is dropping off the bus
2831 * to continue the command in the background so we can do other work.
2833 static int esp_do_freebus(struct esp *esp)
2835 Scsi_Cmnd *SCptr = esp->current_SC;
2836 int rval;
2838 rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing);
2839 if (rval)
2840 return rval;
2841 if (esp->ireg != ESP_INTR_DC) {
2842 ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
2843 return do_reset_bus; /* target will not drop BSY... */
2845 esp->msgout_len = 0;
2846 esp->prevmsgout = NOP;
2847 if (esp->prevmsgin == COMMAND_COMPLETE) {
2848 /* Normal end of nexus. */
2849 if (esp->disconnected_SC || (esp->erev == fashme))
2850 esp_cmd(esp, ESP_CMD_ESEL);
2852 if (SCptr->SCp.Status != GOOD &&
2853 SCptr->SCp.Status != CONDITION_GOOD &&
2854 ((1<<SCptr->target) & esp->targets_present) &&
2855 SCptr->device->sync &&
2856 SCptr->device->sync_max_offset) {
2857 /* SCSI standard says that the synchronous capabilities
2858 * should be renegotiated at this point. Most likely
2859 * we are about to request sense from this target
2860 * in which case we want to avoid using sync
2861 * transfers until we are sure of the current target
2862 * state.
2864 ESPMISC(("esp: Status <%d> for target %d lun %d\n",
2865 SCptr->SCp.Status, SCptr->target, SCptr->lun));
2867 /* But don't do this when spinning up a disk at
2868 * boot time while we poll for completion as it
2869 * fills up the console with messages. Also, tapes
2870 * can report not ready many times right after
2871 * loading up a tape.
2873 if (esp_should_clear_sync(SCptr) != 0)
2874 SCptr->device->sync = 0;
2876 ESPDISC(("F<%02x,%02x>", SCptr->target, SCptr->lun));
2877 esp_done(esp, ((SCptr->SCp.Status & 0xff) |
2878 ((SCptr->SCp.Message & 0xff)<<8) |
2879 (DID_OK << 16)));
2880 } else if (esp->prevmsgin == DISCONNECT) {
2881 /* Normal disconnect. */
2882 esp_cmd(esp, ESP_CMD_ESEL);
2883 ESPDISC(("D<%02x,%02x>", SCptr->target, SCptr->lun));
2884 append_SC(&esp->disconnected_SC, SCptr);
2885 esp->current_SC = NULL;
2886 if (esp->issue_SC)
2887 esp_exec_cmd(esp);
2888 } else {
2889 /* Driver bug, we do not expect a disconnect here
2890 * and should not have advanced the state engine
2891 * to in_freeing.
2893 ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
2894 esp->esp_id));
2895 return do_reset_bus;
2897 return do_intr_end;
2900 /* When a reselect occurs, and we cannot find the command to
2901 * reconnect to in our queues, we do this.
2903 static int esp_bad_reconnect(struct esp *esp)
2905 Scsi_Cmnd *sp;
2907 ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
2908 esp->esp_id));
2909 ESPLOG(("QUEUE DUMP\n"));
2910 sp = esp->issue_SC;
2911 ESPLOG(("esp%d: issue_SC[", esp->esp_id));
2912 while (sp) {
2913 ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
2914 sp = (Scsi_Cmnd *) sp->host_scribble;
2916 ESPLOG(("]\n"));
2917 sp = esp->current_SC;
2918 ESPLOG(("esp%d: current_SC[", esp->esp_id));
2919 if (sp)
2920 ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
2921 else
2922 ESPLOG(("<NULL>"));
2923 ESPLOG(("]\n"));
2924 sp = esp->disconnected_SC;
2925 ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
2926 while (sp) {
2927 ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
2928 sp = (Scsi_Cmnd *) sp->host_scribble;
2930 ESPLOG(("]\n"));
2931 return do_reset_bus;
2934 /* Do the needy when a target tries to reconnect to us. */
2935 static int esp_do_reconnect(struct esp *esp)
2937 int lun, target;
2938 Scsi_Cmnd *SCptr;
2940 /* Check for all bogus conditions first. */
2941 target = reconnect_target(esp);
2942 if (target < 0) {
2943 ESPDISC(("bad bus bits\n"));
2944 return do_reset_bus;
2946 lun = reconnect_lun(esp);
2947 if (lun < 0) {
2948 ESPDISC(("target=%2x, bad identify msg\n", target));
2949 return do_reset_bus;
2952 /* Things look ok... */
2953 ESPDISC(("R<%02x,%02x>", target, lun));
2955 /* Must not flush FIFO or DVMA on HME. */
2956 if (esp->erev != fashme) {
2957 esp_cmd(esp, ESP_CMD_FLUSH);
2958 if (esp100_reconnect_hwbug(esp))
2959 return do_reset_bus;
2960 esp_cmd(esp, ESP_CMD_NULL);
2963 SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun);
2964 if (!SCptr)
2965 return esp_bad_reconnect(esp);
2967 esp_connect(esp, SCptr);
2968 esp_cmd(esp, ESP_CMD_MOK);
2970 if (esp->erev == fashme)
2971 sbus_writeb(((SCptr->target & 0xf) |
2972 (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)),
2973 esp->eregs + ESP_BUSID);
2975 /* Reconnect implies a restore pointers operation. */
2976 esp_restore_pointers(esp, SCptr);
2978 esp->snip = 0;
2979 esp_advance_phase(SCptr, in_the_dark);
2980 return do_intr_end;
2983 /* End of NEXUS (hopefully), pick up status + message byte then leave if
2984 * all goes well.
2986 static int esp_do_status(struct esp *esp)
2988 Scsi_Cmnd *SCptr = esp->current_SC;
2989 int intr, rval;
2991 rval = skipahead1(esp, SCptr, in_the_dark, in_status);
2992 if (rval)
2993 return rval;
2994 intr = esp->ireg;
2995 ESPSTAT(("esp_do_status: "));
2996 if (intr != ESP_INTR_DC) {
2997 int message_out = 0; /* for parity problems */
2999 /* Ack the message. */
3000 ESPSTAT(("ack msg, "));
3001 esp_cmd(esp, ESP_CMD_MOK);
3003 if (esp->erev != fashme) {
3004 dma_flashclear(esp);
3006 /* Wait till the first bits settle. */
3007 while (esp->esp_command[0] == 0xff)
3008 udelay(1);
3009 } else {
3010 esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
3011 esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
3014 ESPSTAT(("got something, "));
3015 /* ESP chimes in with one of
3017 * 1) function done interrupt:
3018 * both status and message in bytes
3019 * are available
3021 * 2) bus service interrupt:
3022 * only status byte was acquired
3024 * 3) Anything else:
3025 * can't happen, but we test for it
3026 * anyways
3028 * ALSO: If bad parity was detected on either
3029 * the status _or_ the message byte then
3030 * the ESP has asserted ATN on the bus
3031 * and we must therefore wait for the
3032 * next phase change.
3034 if (intr & ESP_INTR_FDONE) {
3035 /* We got it all, hallejulia. */
3036 ESPSTAT(("got both, "));
3037 SCptr->SCp.Status = esp->esp_command[0];
3038 SCptr->SCp.Message = esp->esp_command[1];
3039 esp->prevmsgin = SCptr->SCp.Message;
3040 esp->cur_msgin[0] = SCptr->SCp.Message;
3041 if (esp->sreg & ESP_STAT_PERR) {
3042 /* There was bad parity for the
3043 * message byte, the status byte
3044 * was ok.
3046 message_out = MSG_PARITY_ERROR;
3048 } else if (intr == ESP_INTR_BSERV) {
3049 /* Only got status byte. */
3050 ESPLOG(("esp%d: got status only, ", esp->esp_id));
3051 if (!(esp->sreg & ESP_STAT_PERR)) {
3052 SCptr->SCp.Status = esp->esp_command[0];
3053 SCptr->SCp.Message = 0xff;
3054 } else {
3055 /* The status byte had bad parity.
3056 * we leave the scsi_pointer Status
3057 * field alone as we set it to a default
3058 * of CHECK_CONDITION in esp_queue.
3060 message_out = INITIATOR_ERROR;
3062 } else {
3063 /* This shouldn't happen ever. */
3064 ESPSTAT(("got bolixed\n"));
3065 esp_advance_phase(SCptr, in_the_dark);
3066 return esp_do_phase_determine(esp);
3069 if (!message_out) {
3070 ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
3071 SCptr->SCp.Message));
3072 if (SCptr->SCp.Message == COMMAND_COMPLETE) {
3073 ESPSTAT(("and was COMMAND_COMPLETE\n"));
3074 esp_advance_phase(SCptr, in_freeing);
3075 return esp_do_freebus(esp);
3076 } else {
3077 ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
3078 esp->esp_id));
3079 esp->msgin_len = esp->msgin_ctr = 1;
3080 esp_advance_phase(SCptr, in_msgindone);
3081 return esp_do_msgindone(esp);
3083 } else {
3084 /* With luck we'll be able to let the target
3085 * know that bad parity happened, it will know
3086 * which byte caused the problems and send it
3087 * again. For the case where the status byte
3088 * receives bad parity, I do not believe most
3089 * targets recover very well. We'll see.
3091 ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
3092 esp->esp_id, message_out));
3093 esp->cur_msgout[0] = message_out;
3094 esp->msgout_len = esp->msgout_ctr = 1;
3095 esp_advance_phase(SCptr, in_the_dark);
3096 return esp_do_phase_determine(esp);
3098 } else {
3099 /* If we disconnect now, all hell breaks loose. */
3100 ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
3101 esp_advance_phase(SCptr, in_the_dark);
3102 return esp_do_phase_determine(esp);
3106 static int esp_enter_status(struct esp *esp)
3108 u8 thecmd = ESP_CMD_ICCSEQ;
3110 esp_cmd(esp, ESP_CMD_FLUSH);
3111 if (esp->erev != fashme) {
3112 u32 tmp;
3114 esp->esp_command[0] = esp->esp_command[1] = 0xff;
3115 sbus_writeb(2, esp->eregs + ESP_TCLOW);
3116 sbus_writeb(0, esp->eregs + ESP_TCMED);
3117 tmp = sbus_readl(esp->dregs + DMA_CSR);
3118 tmp |= (DMA_ST_WRITE | DMA_ENABLE);
3119 sbus_writel(tmp, esp->dregs + DMA_CSR);
3120 if (esp->dma->revision == dvmaesc1)
3121 sbus_writel(0x100, esp->dregs + DMA_COUNT);
3122 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
3123 thecmd |= ESP_CMD_DMA;
3125 esp_cmd(esp, thecmd);
3126 esp_advance_phase(esp->current_SC, in_status);
3128 return esp_do_status(esp);
3131 static int esp_disconnect_amidst_phases(struct esp *esp)
3133 Scsi_Cmnd *sp = esp->current_SC;
3134 Scsi_Device *dp = sp->device;
3136 /* This means real problems if we see this
3137 * here. Unless we were actually trying
3138 * to force the device to abort/reset.
3140 ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
3141 ESPLOG(("pphase<%s> cphase<%s>, ",
3142 phase_string(sp->SCp.phase),
3143 phase_string(sp->SCp.sent_command)));
3145 if (esp->disconnected_SC != NULL || (esp->erev == fashme))
3146 esp_cmd(esp, ESP_CMD_ESEL);
3148 switch (esp->cur_msgout[0]) {
3149 default:
3150 /* We didn't expect this to happen at all. */
3151 ESPLOG(("device is bolixed\n"));
3152 esp_advance_phase(sp, in_tgterror);
3153 esp_done(esp, (DID_ERROR << 16));
3154 break;
3156 case BUS_DEVICE_RESET:
3157 ESPLOG(("device reset successful\n"));
3158 dp->sync_max_offset = 0;
3159 dp->sync_min_period = 0;
3160 dp->sync = 0;
3161 esp_advance_phase(sp, in_resetdev);
3162 esp_done(esp, (DID_RESET << 16));
3163 break;
3165 case ABORT:
3166 ESPLOG(("device abort successful\n"));
3167 esp_advance_phase(sp, in_abortone);
3168 esp_done(esp, (DID_ABORT << 16));
3169 break;
3172 return do_intr_end;
3175 static int esp_enter_msgout(struct esp *esp)
3177 esp_advance_phase(esp->current_SC, in_msgout);
3178 return esp_do_msgout(esp);
3181 static int esp_enter_msgin(struct esp *esp)
3183 esp_advance_phase(esp->current_SC, in_msgin);
3184 return esp_do_msgin(esp);
3187 static int esp_enter_cmd(struct esp *esp)
3189 esp_advance_phase(esp->current_SC, in_cmdbegin);
3190 return esp_do_cmdbegin(esp);
3193 static int esp_enter_badphase(struct esp *esp)
3195 ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
3196 esp->sreg & ESP_STAT_PMASK));
3197 return do_reset_bus;
3200 typedef int (*espfunc_t)(struct esp *);
3202 static espfunc_t phase_vector[] = {
3203 esp_do_data, /* ESP_DOP */
3204 esp_do_data, /* ESP_DIP */
3205 esp_enter_cmd, /* ESP_CMDP */
3206 esp_enter_status, /* ESP_STATP */
3207 esp_enter_badphase, /* ESP_STAT_PMSG */
3208 esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */
3209 esp_enter_msgout, /* ESP_MOP */
3210 esp_enter_msgin, /* ESP_MIP */
3213 /* The target has control of the bus and we have to see where it has
3214 * taken us.
3216 static int esp_do_phase_determine(struct esp *esp)
3218 if ((esp->ireg & ESP_INTR_DC) != 0)
3219 return esp_disconnect_amidst_phases(esp);
3220 return phase_vector[esp->sreg & ESP_STAT_PMASK](esp);
3223 /* First interrupt after exec'ing a cmd comes here. */
3224 static int esp_select_complete(struct esp *esp)
3226 Scsi_Cmnd *SCptr = esp->current_SC;
3227 Scsi_Device *SDptr = SCptr->device;
3228 int cmd_bytes_sent, fcnt;
3230 if (esp->erev != fashme)
3231 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
3233 if (esp->erev == fashme)
3234 fcnt = esp->hme_fifo_workaround_count;
3235 else
3236 fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
3238 cmd_bytes_sent = esp_bytes_sent(esp, fcnt);
3239 dma_invalidate(esp);
3241 /* Let's check to see if a reselect happened
3242 * while we we're trying to select. This must
3243 * be checked first.
3245 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
3246 esp_reconnect(esp, SCptr);
3247 return esp_do_reconnect(esp);
3250 /* Looks like things worked, we should see a bus service &
3251 * a function complete interrupt at this point. Note we
3252 * are doing a direct comparison because we don't want to
3253 * be fooled into thinking selection was successful if
3254 * ESP_INTR_DC is set, see below.
3256 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
3257 /* target speaks... */
3258 esp->targets_present |= (1<<SCptr->target);
3260 /* What if the target ignores the sdtr? */
3261 if (esp->snip)
3262 SDptr->sync = 1;
3264 /* See how far, if at all, we got in getting
3265 * the information out to the target.
3267 switch (esp->seqreg) {
3268 default:
3270 case ESP_STEP_ASEL:
3271 /* Arbitration won, target selected, but
3272 * we are in some phase which is not command
3273 * phase nor is it message out phase.
3275 * XXX We've confused the target, obviously.
3276 * XXX So clear it's state, but we also end
3277 * XXX up clearing everyone elses. That isn't
3278 * XXX so nice. I'd like to just reset this
3279 * XXX target, but if I cannot even get it's
3280 * XXX attention and finish selection to talk
3281 * XXX to it, there is not much more I can do.
3282 * XXX If we have a loaded bus we're going to
3283 * XXX spend the next second or so renegotiating
3284 * XXX for synchronous transfers.
3286 ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
3287 esp->esp_id, SCptr->target));
3289 case ESP_STEP_SID:
3290 /* Arbitration won, target selected, went
3291 * to message out phase, sent one message
3292 * byte, then we stopped. ATN is asserted
3293 * on the SCSI bus and the target is still
3294 * there hanging on. This is a legal
3295 * sequence step if we gave the ESP a select
3296 * and stop command.
3298 * XXX See above, I could set the borken flag
3299 * XXX in the device struct and retry the
3300 * XXX command. But would that help for
3301 * XXX tagged capable targets?
3304 case ESP_STEP_NCMD:
3305 /* Arbitration won, target selected, maybe
3306 * sent the one message byte in message out
3307 * phase, but we did not go to command phase
3308 * in the end. Actually, we could have sent
3309 * only some of the message bytes if we tried
3310 * to send out the entire identify and tag
3311 * message using ESP_CMD_SA3.
3313 cmd_bytes_sent = 0;
3314 break;
3316 case ESP_STEP_PPC:
3317 /* No, not the powerPC pinhead. Arbitration
3318 * won, all message bytes sent if we went to
3319 * message out phase, went to command phase
3320 * but only part of the command was sent.
3322 * XXX I've seen this, but usually in conjunction
3323 * XXX with a gross error which appears to have
3324 * XXX occurred between the time I told the
3325 * XXX ESP to arbitrate and when I got the
3326 * XXX interrupt. Could I have misloaded the
3327 * XXX command bytes into the fifo? Actually,
3328 * XXX I most likely missed a phase, and therefore
3329 * XXX went into never never land and didn't even
3330 * XXX know it. That was the old driver though.
3331 * XXX What is even more peculiar is that the ESP
3332 * XXX showed the proper function complete and
3333 * XXX bus service bits in the interrupt register.
3336 case ESP_STEP_FINI4:
3337 case ESP_STEP_FINI5:
3338 case ESP_STEP_FINI6:
3339 case ESP_STEP_FINI7:
3340 /* Account for the identify message */
3341 if (SCptr->SCp.phase == in_slct_norm)
3342 cmd_bytes_sent -= 1;
3345 if (esp->erev != fashme)
3346 esp_cmd(esp, ESP_CMD_NULL);
3348 /* Be careful, we could really get fucked during synchronous
3349 * data transfers if we try to flush the fifo now.
3351 if ((esp->erev != fashme) && /* not a Happy Meal and... */
3352 !fcnt && /* Fifo is empty and... */
3353 /* either we are not doing synchronous transfers or... */
3354 (!SDptr->sync_max_offset ||
3355 /* We are not going into data in phase. */
3356 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
3357 esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */
3359 /* See how far we got if this is not a slow command. */
3360 if (!esp->esp_slowcmd) {
3361 if (cmd_bytes_sent < 0)
3362 cmd_bytes_sent = 0;
3363 if (cmd_bytes_sent != SCptr->cmd_len) {
3364 /* Crapola, mark it as a slowcmd
3365 * so that we have some chance of
3366 * keeping the command alive with
3367 * good luck.
3369 * XXX Actually, if we didn't send it all
3370 * XXX this means either we didn't set things
3371 * XXX up properly (driver bug) or the target
3372 * XXX or the ESP detected parity on one of
3373 * XXX the command bytes. This makes much
3374 * XXX more sense, and therefore this code
3375 * XXX should be changed to send out a
3376 * XXX parity error message or if the status
3377 * XXX register shows no parity error then
3378 * XXX just expect the target to bring the
3379 * XXX bus into message in phase so that it
3380 * XXX can send us the parity error message.
3381 * XXX SCSI sucks...
3383 esp->esp_slowcmd = 1;
3384 esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
3385 esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
3389 /* Now figure out where we went. */
3390 esp_advance_phase(SCptr, in_the_dark);
3391 return esp_do_phase_determine(esp);
3394 /* Did the target even make it? */
3395 if (esp->ireg == ESP_INTR_DC) {
3396 /* wheee... nobody there or they didn't like
3397 * what we told it to do, clean up.
3400 /* If anyone is off the bus, but working on
3401 * a command in the background for us, tell
3402 * the ESP to listen for them.
3404 if (esp->disconnected_SC)
3405 esp_cmd(esp, ESP_CMD_ESEL);
3407 if (((1<<SCptr->target) & esp->targets_present) &&
3408 esp->seqreg != 0 &&
3409 (esp->cur_msgout[0] == EXTENDED_MESSAGE) &&
3410 (SCptr->SCp.phase == in_slct_msg ||
3411 SCptr->SCp.phase == in_slct_stop)) {
3412 /* shit */
3413 esp->snip = 0;
3414 ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
3415 "lun %d\n", esp->esp_id, SCptr->target, SCptr->lun));
3416 SDptr->sync_max_offset = 0;
3417 SDptr->sync_min_period = 0;
3418 SDptr->sync = 1; /* so we don't negotiate again */
3420 /* Run the command again, this time though we
3421 * won't try to negotiate for synchronous transfers.
3423 * XXX I'd like to do something like send an
3424 * XXX INITIATOR_ERROR or ABORT message to the
3425 * XXX target to tell it, "Sorry I confused you,
3426 * XXX please come back and I will be nicer next
3427 * XXX time". But that requires having the target
3428 * XXX on the bus, and it has dropped BSY on us.
3430 esp->current_SC = NULL;
3431 esp_advance_phase(SCptr, not_issued);
3432 prepend_SC(&esp->issue_SC, SCptr);
3433 esp_exec_cmd(esp);
3434 return do_intr_end;
3437 /* Ok, this is normal, this is what we see during boot
3438 * or whenever when we are scanning the bus for targets.
3439 * But first make sure that is really what is happening.
3441 if (((1<<SCptr->target) & esp->targets_present)) {
3442 ESPLOG(("esp%d: Warning, live target %d not responding to "
3443 "selection.\n", esp->esp_id, SCptr->target));
3445 /* This _CAN_ happen. The SCSI standard states that
3446 * the target is to _not_ respond to selection if
3447 * _it_ detects bad parity on the bus for any reason.
3448 * Therefore, we assume that if we've talked successfully
3449 * to this target before, bad parity is the problem.
3451 esp_done(esp, (DID_PARITY << 16));
3452 } else {
3453 /* Else, there really isn't anyone there. */
3454 ESPMISC(("esp: selection failure, maybe nobody there?\n"));
3455 ESPMISC(("esp: target %d lun %d\n",
3456 SCptr->target, SCptr->lun));
3457 esp_done(esp, (DID_BAD_TARGET << 16));
3459 return do_intr_end;
3462 ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
3463 printk("esp%d: Currently -- ", esp->esp_id);
3464 esp_print_ireg(esp->ireg); printk(" ");
3465 esp_print_statreg(esp->sreg); printk(" ");
3466 esp_print_seqreg(esp->seqreg); printk("\n");
3467 printk("esp%d: New -- ", esp->esp_id);
3468 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
3469 esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP);
3470 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
3471 esp_print_ireg(esp->ireg); printk(" ");
3472 esp_print_statreg(esp->sreg); printk(" ");
3473 esp_print_seqreg(esp->seqreg); printk("\n");
3474 ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
3475 return do_reset_bus; /* ugh... */
3478 /* Continue reading bytes for msgin phase. */
3479 static int esp_do_msgincont(struct esp *esp)
3481 if (esp->ireg & ESP_INTR_BSERV) {
3482 /* in the right phase too? */
3483 if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
3484 /* phew... */
3485 esp_cmd(esp, ESP_CMD_TI);
3486 esp_advance_phase(esp->current_SC, in_msgindone);
3487 return do_intr_end;
3490 /* We changed phase but ESP shows bus service,
3491 * in this case it is most likely that we, the
3492 * hacker who has been up for 20hrs straight
3493 * staring at the screen, drowned in coffee
3494 * smelling like retched cigarette ashes
3495 * have miscoded something..... so, try to
3496 * recover as best we can.
3498 ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
3500 esp_advance_phase(esp->current_SC, in_the_dark);
3501 return do_phase_determine;
3504 static int check_singlebyte_msg(struct esp *esp)
3506 esp->prevmsgin = esp->cur_msgin[0];
3507 if (esp->cur_msgin[0] & 0x80) {
3508 /* wheee... */
3509 ESPLOG(("esp%d: target sends identify amidst phases\n",
3510 esp->esp_id));
3511 esp_advance_phase(esp->current_SC, in_the_dark);
3512 return 0;
3513 } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) ||
3514 (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
3515 esp->msgin_len = 2;
3516 esp_advance_phase(esp->current_SC, in_msgincont);
3517 return 0;
3519 esp_advance_phase(esp->current_SC, in_the_dark);
3520 switch (esp->cur_msgin[0]) {
3521 default:
3522 /* We don't want to hear about it. */
3523 ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
3524 esp->cur_msgin[0]));
3525 return MESSAGE_REJECT;
3527 case NOP:
3528 ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
3529 esp->current_SC->target));
3530 return 0;
3532 case RESTORE_POINTERS:
3533 /* In this case we might also have to backup the
3534 * "slow command" pointer. It is rare to get such
3535 * a save/restore pointer sequence so early in the
3536 * bus transition sequences, but cover it.
3538 if (esp->esp_slowcmd) {
3539 esp->esp_scmdleft = esp->current_SC->cmd_len;
3540 esp->esp_scmdp = &esp->current_SC->cmnd[0];
3542 esp_restore_pointers(esp, esp->current_SC);
3543 return 0;
3545 case SAVE_POINTERS:
3546 esp_save_pointers(esp, esp->current_SC);
3547 return 0;
3549 case COMMAND_COMPLETE:
3550 case DISCONNECT:
3551 /* Freeing the bus, let it go. */
3552 esp->current_SC->SCp.phase = in_freeing;
3553 return 0;
3555 case MESSAGE_REJECT:
3556 ESPMISC(("msg reject, "));
3557 if (esp->prevmsgout == EXTENDED_MESSAGE) {
3558 Scsi_Device *SDptr = esp->current_SC->device;
3560 /* Doesn't look like this target can
3561 * do synchronous or WIDE transfers.
3563 ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
3564 SDptr->sync = 1;
3565 SDptr->wide = 1;
3566 SDptr->sync_min_period = 0;
3567 SDptr->sync_max_offset = 0;
3568 return 0;
3569 } else {
3570 ESPMISC(("not sync nego, sending ABORT\n"));
3571 return ABORT;
3576 /* Target negotiates for synchronous transfers before we do, this
3577 * is legal although very strange. What is even funnier is that
3578 * the SCSI2 standard specifically recommends against targets doing
3579 * this because so many initiators cannot cope with this occuring.
3581 static int target_with_ants_in_pants(struct esp *esp,
3582 Scsi_Cmnd *SCptr,
3583 Scsi_Device *SDptr)
3585 if (SDptr->sync || SDptr->borken) {
3586 /* sorry, no can do */
3587 ESPSDTR(("forcing to async, "));
3588 build_sync_nego_msg(esp, 0, 0);
3589 SDptr->sync = 1;
3590 esp->snip = 1;
3591 ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
3592 esp_advance_phase(SCptr, in_the_dark);
3593 return EXTENDED_MESSAGE;
3596 /* Ok, we'll check them out... */
3597 return 0;
3600 static void sync_report(struct esp *esp)
3602 int msg3, msg4;
3603 char *type;
3605 msg3 = esp->cur_msgin[3];
3606 msg4 = esp->cur_msgin[4];
3607 if (msg4) {
3608 int hz = 1000000000 / (msg3 * 4);
3609 int integer = hz / 1000000;
3610 int fraction = (hz - (integer * 1000000)) / 10000;
3611 if ((esp->erev == fashme) &&
3612 (esp->config3[esp->current_SC->target] & ESP_CONFIG3_EWIDE)) {
3613 type = "FAST-WIDE";
3614 integer <<= 1;
3615 fraction <<= 1;
3616 } else if ((msg3 * 4) < 200) {
3617 type = "FAST";
3618 } else {
3619 type = "synchronous";
3622 /* Do not transform this back into one big printk
3623 * again, it triggers a bug in our sparc64-gcc272
3624 * sibling call optimization. -DaveM
3626 ESPLOG((KERN_INFO "esp%d: target %d ",
3627 esp->esp_id, esp->current_SC->target));
3628 ESPLOG(("[period %dns offset %d %d.%02dMHz ",
3629 (int) msg3 * 4, (int) msg4,
3630 integer, fraction));
3631 ESPLOG(("%s SCSI%s]\n", type,
3632 (((msg3 * 4) < 200) ? "-II" : "")));
3633 } else {
3634 ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
3635 esp->esp_id, esp->current_SC->target));
3639 static int check_multibyte_msg(struct esp *esp)
3641 Scsi_Cmnd *SCptr = esp->current_SC;
3642 Scsi_Device *SDptr = SCptr->device;
3643 u8 regval = 0;
3644 int message_out = 0;
3646 ESPSDTR(("chk multibyte msg: "));
3647 if (esp->cur_msgin[2] == EXTENDED_SDTR) {
3648 int period = esp->cur_msgin[3];
3649 int offset = esp->cur_msgin[4];
3651 ESPSDTR(("is sync nego response, "));
3652 if (!esp->snip) {
3653 int rval;
3655 /* Target negotiates first! */
3656 ESPSDTR(("target jumps the gun, "));
3657 message_out = EXTENDED_MESSAGE; /* we must respond */
3658 rval = target_with_ants_in_pants(esp, SCptr, SDptr);
3659 if (rval)
3660 return rval;
3663 ESPSDTR(("examining sdtr, "));
3665 /* Offset cannot be larger than ESP fifo size. */
3666 if (offset > 15) {
3667 ESPSDTR(("offset too big %2x, ", offset));
3668 offset = 15;
3669 ESPSDTR(("sending back new offset\n"));
3670 build_sync_nego_msg(esp, period, offset);
3671 return EXTENDED_MESSAGE;
3674 if (offset && period > esp->max_period) {
3675 /* Yeee, async for this slow device. */
3676 ESPSDTR(("period too long %2x, ", period));
3677 build_sync_nego_msg(esp, 0, 0);
3678 ESPSDTR(("hoping for msgout\n"));
3679 esp_advance_phase(esp->current_SC, in_the_dark);
3680 return EXTENDED_MESSAGE;
3681 } else if (offset && period < esp->min_period) {
3682 ESPSDTR(("period too short %2x, ", period));
3683 period = esp->min_period;
3684 if (esp->erev > esp236)
3685 regval = 4;
3686 else
3687 regval = 5;
3688 } else if (offset) {
3689 int tmp;
3691 ESPSDTR(("period is ok, "));
3692 tmp = esp->ccycle / 1000;
3693 regval = (((period << 2) + tmp - 1) / tmp);
3694 if (regval && ((esp->erev == fas100a ||
3695 esp->erev == fas236 ||
3696 esp->erev == fashme))) {
3697 if (period >= 50)
3698 regval--;
3702 if (offset) {
3703 u8 bit;
3705 SDptr->sync_min_period = (regval & 0x1f);
3706 SDptr->sync_max_offset = (offset | esp->radelay);
3707 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
3708 if ((esp->erev == fas100a) || (esp->erev == fashme))
3709 bit = ESP_CONFIG3_FAST;
3710 else
3711 bit = ESP_CONFIG3_FSCSI;
3712 if (period < 50) {
3713 /* On FAS366, if using fast-20 synchronous transfers
3714 * we need to make sure the REQ/ACK assert/deassert
3715 * control bits are clear.
3717 if (esp->erev == fashme)
3718 SDptr->sync_max_offset &= ~esp->radelay;
3719 esp->config3[SCptr->target] |= bit;
3720 } else {
3721 esp->config3[SCptr->target] &= ~bit;
3723 esp->prev_cfg3 = esp->config3[SCptr->target];
3724 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3726 esp->prev_soff = SDptr->sync_max_offset;
3727 esp->prev_stp = SDptr->sync_min_period;
3728 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
3729 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
3730 ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
3731 SDptr->sync_max_offset,
3732 SDptr->sync_min_period,
3733 esp->config3[SCptr->target]));
3735 esp->snip = 0;
3736 } else if (SDptr->sync_max_offset) {
3737 u8 bit;
3739 /* back to async mode */
3740 ESPSDTR(("unaccaptable sync nego, forcing async\n"));
3741 SDptr->sync_max_offset = 0;
3742 SDptr->sync_min_period = 0;
3743 esp->prev_soff = 0;
3744 esp->prev_stp = 0;
3745 sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
3746 sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
3747 if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
3748 if ((esp->erev == fas100a) || (esp->erev == fashme))
3749 bit = ESP_CONFIG3_FAST;
3750 else
3751 bit = ESP_CONFIG3_FSCSI;
3752 esp->config3[SCptr->target] &= ~bit;
3753 esp->prev_cfg3 = esp->config3[SCptr->target];
3754 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3758 sync_report(esp);
3760 ESPSDTR(("chk multibyte msg: sync is known, "));
3761 SDptr->sync = 1;
3763 if (message_out) {
3764 ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
3765 esp->esp_id));
3766 build_sync_nego_msg(esp, period, offset);
3767 esp_advance_phase(SCptr, in_the_dark);
3768 return EXTENDED_MESSAGE;
3771 ESPSDTR(("returning zero\n"));
3772 esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
3773 return 0;
3774 } else if (esp->cur_msgin[2] == EXTENDED_WDTR) {
3775 int size = 8 << esp->cur_msgin[3];
3777 esp->wnip = 0;
3778 if (esp->erev != fashme) {
3779 ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
3780 esp->esp_id));
3781 message_out = MESSAGE_REJECT;
3782 } else if (size > 16) {
3783 ESPLOG(("esp%d: AIEEE wide transfer for %d size "
3784 "not supported.\n", esp->esp_id, size));
3785 message_out = MESSAGE_REJECT;
3786 } else {
3787 /* Things look good; let's see what we got. */
3788 if (size == 16) {
3789 /* Set config 3 register for this target. */
3790 esp->config3[SCptr->target] |= ESP_CONFIG3_EWIDE;
3791 } else {
3792 /* Just make sure it was one byte sized. */
3793 if (size != 8) {
3794 ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
3795 esp->esp_id, size));
3796 message_out = MESSAGE_REJECT;
3797 goto finish;
3799 /* Pure paranoia. */
3800 esp->config3[SCptr->target] &= ~(ESP_CONFIG3_EWIDE);
3802 esp->prev_cfg3 = esp->config3[SCptr->target];
3803 sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3805 /* Regardless, next try for sync transfers. */
3806 build_sync_nego_msg(esp, esp->sync_defp, 15);
3807 SDptr->sync = 1;
3808 esp->snip = 1;
3809 message_out = EXTENDED_MESSAGE;
3811 } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
3812 ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
3813 message_out = MESSAGE_REJECT;
3815 finish:
3816 esp_advance_phase(SCptr, in_the_dark);
3817 return message_out;
3820 static int esp_do_msgindone(struct esp *esp)
3822 Scsi_Cmnd *SCptr = esp->current_SC;
3823 int message_out = 0, it = 0, rval;
3825 rval = skipahead1(esp, SCptr, in_msgin, in_msgindone);
3826 if (rval)
3827 return rval;
3828 if (SCptr->SCp.sent_command != in_status) {
3829 if (!(esp->ireg & ESP_INTR_DC)) {
3830 if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
3831 message_out = MSG_PARITY_ERROR;
3832 esp_cmd(esp, ESP_CMD_FLUSH);
3833 } else if (esp->erev != fashme &&
3834 (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) {
3835 /* We certainly dropped the ball somewhere. */
3836 message_out = INITIATOR_ERROR;
3837 esp_cmd(esp, ESP_CMD_FLUSH);
3838 } else if (!esp->msgin_len) {
3839 if (esp->erev == fashme)
3840 it = esp->hme_fifo_workaround_buffer[0];
3841 else
3842 it = sbus_readb(esp->eregs + ESP_FDATA);
3843 esp_advance_phase(SCptr, in_msgincont);
3844 } else {
3845 /* it is ok and we want it */
3846 if (esp->erev == fashme)
3847 it = esp->cur_msgin[esp->msgin_ctr] =
3848 esp->hme_fifo_workaround_buffer[0];
3849 else
3850 it = esp->cur_msgin[esp->msgin_ctr] =
3851 sbus_readb(esp->eregs + ESP_FDATA);
3852 esp->msgin_ctr++;
3854 } else {
3855 esp_advance_phase(SCptr, in_the_dark);
3856 return do_work_bus;
3858 } else {
3859 it = esp->cur_msgin[0];
3861 if (!message_out && esp->msgin_len) {
3862 if (esp->msgin_ctr < esp->msgin_len) {
3863 esp_advance_phase(SCptr, in_msgincont);
3864 } else if (esp->msgin_len == 1) {
3865 message_out = check_singlebyte_msg(esp);
3866 } else if (esp->msgin_len == 2) {
3867 if (esp->cur_msgin[0] == EXTENDED_MESSAGE) {
3868 if ((it + 2) >= 15) {
3869 message_out = MESSAGE_REJECT;
3870 } else {
3871 esp->msgin_len = (it + 2);
3872 esp_advance_phase(SCptr, in_msgincont);
3874 } else {
3875 message_out = MESSAGE_REJECT; /* foo on you */
3877 } else {
3878 message_out = check_multibyte_msg(esp);
3881 if (message_out < 0) {
3882 return -message_out;
3883 } else if (message_out) {
3884 if (((message_out != 1) &&
3885 ((message_out < 0x20) || (message_out & 0x80))))
3886 esp->msgout_len = 1;
3887 esp->cur_msgout[0] = message_out;
3888 esp_cmd(esp, ESP_CMD_SATN);
3889 esp_advance_phase(SCptr, in_the_dark);
3890 esp->msgin_len = 0;
3892 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
3893 esp->sreg &= ~(ESP_STAT_INTR);
3894 if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
3895 esp_cmd(esp, ESP_CMD_MOK);
3896 if ((SCptr->SCp.sent_command == in_msgindone) &&
3897 (SCptr->SCp.phase == in_freeing))
3898 return esp_do_freebus(esp);
3899 return do_intr_end;
3902 static int esp_do_cmdbegin(struct esp *esp)
3904 Scsi_Cmnd *SCptr = esp->current_SC;
3906 esp_advance_phase(SCptr, in_cmdend);
3907 if (esp->erev == fashme) {
3908 u32 tmp = sbus_readl(esp->dregs + DMA_CSR);
3909 int i;
3911 for (i = 0; i < esp->esp_scmdleft; i++)
3912 esp->esp_command[i] = *esp->esp_scmdp++;
3913 esp->esp_scmdleft = 0;
3914 esp_cmd(esp, ESP_CMD_FLUSH);
3915 esp_setcount(esp->eregs, i, 1);
3916 esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI));
3917 tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
3918 tmp &= ~(DMA_ST_WRITE);
3919 sbus_writel(i, esp->dregs + DMA_COUNT);
3920 sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
3921 sbus_writel(tmp, esp->dregs + DMA_CSR);
3922 } else {
3923 u8 tmp;
3925 esp_cmd(esp, ESP_CMD_FLUSH);
3926 tmp = *esp->esp_scmdp++;
3927 esp->esp_scmdleft--;
3928 sbus_writeb(tmp, esp->eregs + ESP_FDATA);
3929 esp_cmd(esp, ESP_CMD_TI);
3931 return do_intr_end;
3934 static int esp_do_cmddone(struct esp *esp)
3936 if (esp->erev == fashme)
3937 dma_invalidate(esp);
3938 else
3939 esp_cmd(esp, ESP_CMD_NULL);
3941 if (esp->ireg & ESP_INTR_BSERV) {
3942 esp_advance_phase(esp->current_SC, in_the_dark);
3943 return esp_do_phase_determine(esp);
3946 ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
3947 esp->esp_id));
3948 return do_reset_bus;
3951 static int esp_do_msgout(struct esp *esp)
3953 esp_cmd(esp, ESP_CMD_FLUSH);
3954 switch (esp->msgout_len) {
3955 case 1:
3956 if (esp->erev == fashme)
3957 hme_fifo_push(esp, &esp->cur_msgout[0], 1);
3958 else
3959 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
3961 esp_cmd(esp, ESP_CMD_TI);
3962 break;
3964 case 2:
3965 esp->esp_command[0] = esp->cur_msgout[0];
3966 esp->esp_command[1] = esp->cur_msgout[1];
3968 if (esp->erev == fashme) {
3969 hme_fifo_push(esp, &esp->cur_msgout[0], 2);
3970 esp_cmd(esp, ESP_CMD_TI);
3971 } else {
3972 dma_setup(esp, esp->esp_command_dvma, 2, 0);
3973 esp_setcount(esp->eregs, 2, 0);
3974 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
3976 break;
3978 case 4:
3979 esp->esp_command[0] = esp->cur_msgout[0];
3980 esp->esp_command[1] = esp->cur_msgout[1];
3981 esp->esp_command[2] = esp->cur_msgout[2];
3982 esp->esp_command[3] = esp->cur_msgout[3];
3983 esp->snip = 1;
3985 if (esp->erev == fashme) {
3986 hme_fifo_push(esp, &esp->cur_msgout[0], 4);
3987 esp_cmd(esp, ESP_CMD_TI);
3988 } else {
3989 dma_setup(esp, esp->esp_command_dvma, 4, 0);
3990 esp_setcount(esp->eregs, 4, 0);
3991 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
3993 break;
3995 case 5:
3996 esp->esp_command[0] = esp->cur_msgout[0];
3997 esp->esp_command[1] = esp->cur_msgout[1];
3998 esp->esp_command[2] = esp->cur_msgout[2];
3999 esp->esp_command[3] = esp->cur_msgout[3];
4000 esp->esp_command[4] = esp->cur_msgout[4];
4001 esp->snip = 1;
4003 if (esp->erev == fashme) {
4004 hme_fifo_push(esp, &esp->cur_msgout[0], 5);
4005 esp_cmd(esp, ESP_CMD_TI);
4006 } else {
4007 dma_setup(esp, esp->esp_command_dvma, 5, 0);
4008 esp_setcount(esp->eregs, 5, 0);
4009 esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
4011 break;
4013 default:
4014 /* whoops */
4015 ESPMISC(("bogus msgout sending NOP\n"));
4016 esp->cur_msgout[0] = NOP;
4018 if (esp->erev == fashme) {
4019 hme_fifo_push(esp, &esp->cur_msgout[0], 1);
4020 } else {
4021 sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
4024 esp->msgout_len = 1;
4025 esp_cmd(esp, ESP_CMD_TI);
4026 break;
4029 esp_advance_phase(esp->current_SC, in_msgoutdone);
4030 return do_intr_end;
4033 static int esp_do_msgoutdone(struct esp *esp)
4035 if (esp->msgout_len > 1) {
4036 /* XXX HME/FAS ATN deassert workaround required,
4037 * XXX no DMA flushing, only possible ESP_CMD_FLUSH
4038 * XXX to kill the fifo.
4040 if (esp->erev != fashme) {
4041 u32 tmp;
4043 while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
4044 udelay(1);
4045 tmp &= ~DMA_ENABLE;
4046 sbus_writel(tmp, esp->dregs + DMA_CSR);
4047 dma_invalidate(esp);
4048 } else {
4049 esp_cmd(esp, ESP_CMD_FLUSH);
4052 if (!(esp->ireg & ESP_INTR_DC)) {
4053 if (esp->erev != fashme)
4054 esp_cmd(esp, ESP_CMD_NULL);
4055 switch (esp->sreg & ESP_STAT_PMASK) {
4056 case ESP_MOP:
4057 /* whoops, parity error */
4058 ESPLOG(("esp%d: still in msgout, parity error assumed\n",
4059 esp->esp_id));
4060 if (esp->msgout_len > 1)
4061 esp_cmd(esp, ESP_CMD_SATN);
4062 esp_advance_phase(esp->current_SC, in_msgout);
4063 return do_work_bus;
4065 case ESP_DIP:
4066 break;
4068 default:
4069 /* Happy Meal fifo is touchy... */
4070 if ((esp->erev != fashme) &&
4071 !fcount(esp) &&
4072 !(esp->current_SC->device->sync_max_offset))
4073 esp_cmd(esp, ESP_CMD_FLUSH);
4074 break;
4077 } else {
4078 ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id));
4079 return do_reset_bus;
4082 /* If we sent out a synchronous negotiation message, update
4083 * our state.
4085 if (esp->cur_msgout[2] == EXTENDED_MESSAGE &&
4086 esp->cur_msgout[4] == EXTENDED_SDTR) {
4087 esp->snip = 1; /* anal retentiveness... */
4090 esp->prevmsgout = esp->cur_msgout[0];
4091 esp->msgout_len = 0;
4092 esp_advance_phase(esp->current_SC, in_the_dark);
4093 return esp_do_phase_determine(esp);
4096 static int esp_bus_unexpected(struct esp *esp)
4098 ESPLOG(("esp%d: command in weird state %2x\n",
4099 esp->esp_id, esp->current_SC->SCp.phase));
4100 return do_reset_bus;
4103 static espfunc_t bus_vector[] = {
4104 esp_do_data_finale,
4105 esp_do_data_finale,
4106 esp_bus_unexpected,
4107 esp_do_msgin,
4108 esp_do_msgincont,
4109 esp_do_msgindone,
4110 esp_do_msgout,
4111 esp_do_msgoutdone,
4112 esp_do_cmdbegin,
4113 esp_do_cmddone,
4114 esp_do_status,
4115 esp_do_freebus,
4116 esp_do_phase_determine,
4117 esp_bus_unexpected,
4118 esp_bus_unexpected,
4119 esp_bus_unexpected,
4122 /* This is the second tier in our dual-level SCSI state machine. */
4123 static int esp_work_bus(struct esp *esp)
4125 Scsi_Cmnd *SCptr = esp->current_SC;
4126 unsigned int phase;
4128 ESPBUS(("esp_work_bus: "));
4129 if (!SCptr) {
4130 ESPBUS(("reconnect\n"));
4131 return esp_do_reconnect(esp);
4133 phase = SCptr->SCp.phase;
4134 if ((phase & 0xf0) == in_phases_mask)
4135 return bus_vector[(phase & 0x0f)](esp);
4136 else if ((phase & 0xf0) == in_slct_mask)
4137 return esp_select_complete(esp);
4138 else
4139 return esp_bus_unexpected(esp);
4142 static espfunc_t isvc_vector[] = {
4144 esp_do_phase_determine,
4145 esp_do_resetbus,
4146 esp_finish_reset,
4147 esp_work_bus
4150 /* Main interrupt handler for an esp adapter. */
4151 static void esp_handle(struct esp *esp)
4153 Scsi_Cmnd *SCptr;
4154 int what_next = do_intr_end;
4156 SCptr = esp->current_SC;
4158 /* Check for errors. */
4159 esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
4160 esp->sreg &= (~ESP_STAT_INTR);
4161 if (esp->erev == fashme) {
4162 esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
4163 esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
4166 if (esp->sreg & (ESP_STAT_SPAM)) {
4167 /* Gross error, could be due to one of:
4169 * - top of fifo overwritten, could be because
4170 * we tried to do a synchronous transfer with
4171 * an offset greater than ESP fifo size
4173 * - top of command register overwritten
4175 * - DMA setup to go in one direction, SCSI
4176 * bus points in the other, whoops
4178 * - weird phase change during asynchronous
4179 * data phase while we are initiator
4181 ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
4183 /* If a command is live on the bus we cannot safely
4184 * reset the bus, so we'll just let the pieces fall
4185 * where they may. Here we are hoping that the
4186 * target will be able to cleanly go away soon
4187 * so we can safely reset things.
4189 if (!SCptr) {
4190 ESPLOG(("esp%d: No current cmd during gross error, "
4191 "resetting bus\n", esp->esp_id));
4192 what_next = do_reset_bus;
4193 goto state_machine;
4197 if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) {
4198 /* A DMA gate array error. Here we must
4199 * be seeing one of two things. Either the
4200 * virtual to physical address translation
4201 * on the SBUS could not occur, else the
4202 * translation it did get pointed to a bogus
4203 * page. Ho hum...
4205 ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id,
4206 sbus_readl(esp->dregs + DMA_CSR)));
4208 /* DMA gate array itself must be reset to clear the
4209 * error condition.
4211 esp_reset_dma(esp);
4213 what_next = do_reset_bus;
4214 goto state_machine;
4217 esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */
4219 if (esp->erev == fashme) {
4220 /* This chip is really losing. */
4221 ESPHME(("HME["));
4223 ESPHME(("sreg2=%02x,", esp->sreg2));
4224 /* Must latch fifo before reading the interrupt
4225 * register else garbage ends up in the FIFO
4226 * which confuses the driver utterly.
4228 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
4229 (esp->sreg2 & ESP_STAT2_F1BYTE)) {
4230 ESPHME(("fifo_workaround]"));
4231 hme_fifo_read(esp);
4232 } else {
4233 ESPHME(("no_fifo_workaround]"));
4237 /* No current cmd is only valid at this point when there are
4238 * commands off the bus or we are trying a reset.
4240 if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
4241 /* Panic is safe, since current_SC is null. */
4242 ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
4243 panic("esp_handle: current_SC == penguin within interrupt!");
4246 if (esp->ireg & (ESP_INTR_IC)) {
4247 /* Illegal command fed to ESP. Outside of obvious
4248 * software bugs that could cause this, there is
4249 * a condition with esp100 where we can confuse the
4250 * ESP into an erroneous illegal command interrupt
4251 * because it does not scrape the FIFO properly
4252 * for reselection. See esp100_reconnect_hwbug()
4253 * to see how we try very hard to avoid this.
4255 ESPLOG(("esp%d: illegal command\n", esp->esp_id));
4257 esp_dump_state(esp);
4259 if (SCptr != NULL) {
4260 /* Devices with very buggy firmware can drop BSY
4261 * during a scatter list interrupt when using sync
4262 * mode transfers. We continue the transfer as
4263 * expected, the target drops the bus, the ESP
4264 * gets confused, and we get a illegal command
4265 * interrupt because the bus is in the disconnected
4266 * state now and ESP_CMD_TI is only allowed when
4267 * a nexus is alive on the bus.
4269 ESPLOG(("esp%d: Forcing async and disabling disconnect for "
4270 "target %d\n", esp->esp_id, SCptr->target));
4271 SCptr->device->borken = 1; /* foo on you */
4274 what_next = do_reset_bus;
4275 } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
4276 if (SCptr) {
4277 unsigned int phase = SCptr->SCp.phase;
4279 if (phase & in_phases_mask) {
4280 what_next = esp_work_bus(esp);
4281 } else if (phase & in_slct_mask) {
4282 what_next = esp_select_complete(esp);
4283 } else {
4284 ESPLOG(("esp%d: interrupt for no good reason...\n",
4285 esp->esp_id));
4286 what_next = do_intr_end;
4288 } else {
4289 ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
4290 esp->esp_id));
4291 what_next = do_reset_bus;
4293 } else if (esp->ireg & ESP_INTR_SR) {
4294 ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
4295 what_next = do_reset_complete;
4296 } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
4297 ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
4298 esp->esp_id));
4299 what_next = do_reset_bus;
4300 } else if (esp->ireg & ESP_INTR_RSEL) {
4301 if (SCptr == NULL) {
4302 /* This is ok. */
4303 what_next = esp_do_reconnect(esp);
4304 } else if (SCptr->SCp.phase & in_slct_mask) {
4305 /* Only selection code knows how to clean
4306 * up properly.
4308 ESPDISC(("Reselected during selection attempt\n"));
4309 what_next = esp_select_complete(esp);
4310 } else {
4311 ESPLOG(("esp%d: Reselected while bus is busy\n",
4312 esp->esp_id));
4313 what_next = do_reset_bus;
4317 /* This is tier-one in our dual level SCSI state machine. */
4318 state_machine:
4319 while (what_next != do_intr_end) {
4320 if (what_next >= do_phase_determine &&
4321 what_next < do_intr_end) {
4322 what_next = isvc_vector[what_next](esp);
4323 } else {
4324 /* state is completely lost ;-( */
4325 ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
4326 esp->esp_id));
4327 what_next = do_reset_bus;
4332 /* Service only the ESP described by dev_id. */
4333 static void esp_intr(int irq, void *dev_id, struct pt_regs *pregs)
4335 struct esp *esp = dev_id;
4336 unsigned long flags;
4338 spin_lock_irqsave(&esp->lock, flags);
4339 if (ESP_IRQ_P(esp->dregs)) {
4340 ESP_INTSOFF(esp->dregs);
4342 ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id));
4343 esp_handle(esp);
4344 ESPIRQ((")"));
4346 ESP_INTSON(esp->dregs);
4348 spin_unlock_irqrestore(&esp->lock, flags);
4351 int esp_revoke(Scsi_Device* SDptr)
4353 struct esp *esp = (struct esp *) SDptr->host->hostdata;
4354 esp->targets_present &= ~(1 << SDptr->id);
4355 return 0;
4358 #ifdef MODULE
4359 Scsi_Host_Template driver_template = SCSI_SPARC_ESP;
4361 #include "scsi_module.c"
4363 EXPORT_NO_SYMBOLS;
4364 #endif /* MODULE */