Import 2.1.36
[davej-history.git] / drivers / net / baycom.c
blob7569d66e736058dc60150de9eb00723b0fc35d52
1 /*****************************************************************************/
3 /*
4 * baycom.c -- baycom ser12 and par96 radio modem driver.
6 * Copyright (C) 1996 Thomas Sailer (sailer@ife.ee.ethz.ch)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 * Please note that the GPL allows you to use the driver, NOT the radio.
23 * In order to use the radio, you need a license from the communications
24 * authority of your country.
27 * Supported modems
29 * ser12: This is a very simple 1200 baud AFSK modem. The modem consists only
30 * of a modulator/demodulator chip, usually a TI TCM3105. The computer
31 * is responsible for regenerating the receiver bit clock, as well as
32 * for handling the HDLC protocol. The modem connects to a serial port,
33 * hence the name. Since the serial port is not used as an async serial
34 * port, the kernel driver for serial ports cannot be used, and this
35 * driver only supports standard serial hardware (8250, 16450, 16550)
37 * par96: This is a modem for 9600 baud FSK compatible to the G3RUH standard.
38 * The modem does all the filtering and regenerates the receiver clock.
39 * Data is transferred from and to the PC via a shift register.
40 * The shift register is filled with 16 bits and an interrupt is
41 * signalled. The PC then empties the shift register in a burst. This
42 * modem connects to the parallel port, hence the name. The modem
43 * leaves the implementation of the HDLC protocol and the scrambler
44 * polynomial to the PC. This modem is no longer available (at least
45 * from Baycom) and has been replaced by the PICPAR modem (see below).
46 * You may however still build one from the schematics published in
47 * cq-DL :-).
49 * picpar: This is a redesign of the par96 modem by Henning Rech, DF9IC. The
50 * modem is protocol compatible to par96, but uses only three low
51 * power ICs and can therefore be fed from the parallel port and
52 * does not require an additional power supply. It features
53 * built in DCD circuitry. The driver should therefore be configured
54 * for hardware DCD.
57 * Command line options (insmod command line)
59 * mode driver mode string. Valid choices are ser12 and par96. An
60 * optional * enables software DCD.
61 * 2=par96/par97, any other value invalid
62 * iobase base address of the port; common values are for ser12 0x3f8,
63 * 0x2f8, 0x3e8, 0x2e8 and for par96/par97 0x378, 0x278, 0x3bc
64 * irq interrupt line of the port; common values are for ser12 3,4
65 * and for par96/par97 7
68 * History:
69 * 0.1 26.06.96 Adapted from baycom.c and made network driver interface
70 * 18.10.96 Changed to new user space access routines (copy_{to,from}_user)
73 /*****************************************************************************/
75 #include <linux/module.h>
76 #include <linux/kernel.h>
77 #include <linux/sched.h>
78 #include <linux/types.h>
79 #include <linux/fcntl.h>
80 #include <linux/interrupt.h>
81 #include <linux/ioport.h>
82 #include <linux/in.h>
83 #include <linux/string.h>
84 #include <asm/system.h>
85 #include <asm/bitops.h>
86 #include <asm/io.h>
87 #include <linux/delay.h>
88 #include <linux/errno.h>
89 #include <linux/netdevice.h>
90 #include <linux/hdlcdrv.h>
91 #include <linux/baycom.h>
92 #include <linux/init.h>
94 /* --------------------------------------------------------------------- */
97 * currently this module is supposed to support both module styles, i.e.
98 * the old one present up to about 2.1.9, and the new one functioning
99 * starting with 2.1.21. The reason is I have a kit allowing to compile
100 * this module also under 2.0.x which was requested by several people.
101 * This will go in 2.2
103 #include <linux/version.h>
105 #if LINUX_VERSION_CODE >= 0x20100
106 #include <asm/uaccess.h>
107 #else
108 #include <asm/segment.h>
109 #include <linux/mm.h>
111 #undef put_user
112 #undef get_user
114 #define put_user(x,ptr) ({ __put_user((unsigned long)(x),(ptr),sizeof(*(ptr))); 0; })
115 #define get_user(x,ptr) ({ x = ((__typeof__(*(ptr)))__get_user((ptr),sizeof(*(ptr)))); 0; })
117 extern inline int copy_from_user(void *to, const void *from, unsigned long n)
119 int i = verify_area(VERIFY_READ, from, n);
120 if (i)
121 return i;
122 memcpy_fromfs(to, from, n);
123 return 0;
126 extern inline int copy_to_user(void *to, const void *from, unsigned long n)
128 int i = verify_area(VERIFY_WRITE, to, n);
129 if (i)
130 return i;
131 memcpy_tofs(to, from, n);
132 return 0;
134 #endif
136 /* --------------------------------------------------------------------- */
138 #define BAYCOM_DEBUG
141 * modem options; bit mask
143 #define BAYCOM_OPTIONS_SOFTDCD 1
145 /* --------------------------------------------------------------------- */
147 static const char bc_drvname[] = "baycom";
148 static const char bc_drvinfo[] = KERN_INFO "baycom: (C) 1996 Thomas Sailer, HB9JNX/AE4WA\n"
149 KERN_INFO "baycom: version 0.3 compiled " __TIME__ " " __DATE__ "\n";
151 /* --------------------------------------------------------------------- */
153 #define NR_PORTS 4
155 static struct device baycom_device[NR_PORTS];
157 static struct {
158 char *mode;
159 int iobase, irq;
160 } baycom_ports[NR_PORTS] = { { NULL, 0, 0 }, };
162 /* --------------------------------------------------------------------- */
164 #define RBR(iobase) (iobase+0)
165 #define THR(iobase) (iobase+0)
166 #define IER(iobase) (iobase+1)
167 #define IIR(iobase) (iobase+2)
168 #define FCR(iobase) (iobase+2)
169 #define LCR(iobase) (iobase+3)
170 #define MCR(iobase) (iobase+4)
171 #define LSR(iobase) (iobase+5)
172 #define MSR(iobase) (iobase+6)
173 #define SCR(iobase) (iobase+7)
174 #define DLL(iobase) (iobase+0)
175 #define DLM(iobase) (iobase+1)
177 #define SER12_EXTENT 8
179 #define LPT_DATA(iobase) (iobase+0)
180 #define LPT_STATUS(iobase) (iobase+1)
181 #define LPT_CONTROL(iobase) (iobase+2)
182 #define LPT_IRQ_ENABLE 0x10
183 #define PAR96_BURSTBITS 16
184 #define PAR96_BURST 4
185 #define PAR96_PTT 2
186 #define PAR96_TXBIT 1
187 #define PAR96_ACK 0x40
188 #define PAR96_RXBIT 0x20
189 #define PAR96_DCD 0x10
190 #define PAR97_POWER 0xf8
192 #define PAR96_EXTENT 3
194 /* ---------------------------------------------------------------------- */
196 * Information that need to be kept for each board.
199 struct baycom_state {
200 struct hdlcdrv_state hdrv;
202 unsigned int options;
204 struct modem_state {
205 short arb_divider;
206 unsigned char flags;
207 unsigned int shreg;
208 struct modem_state_ser12 {
209 unsigned char last_sample;
210 unsigned char interm_sample;
211 unsigned int bit_pll;
212 unsigned int dcd_shreg;
213 int dcd_sum0, dcd_sum1, dcd_sum2;
214 unsigned int dcd_time;
215 unsigned char last_rxbit;
216 unsigned char tx_bit;
217 } ser12;
218 struct modem_state_par96 {
219 int dcd_count;
220 unsigned int dcd_shreg;
221 unsigned long descram;
222 unsigned long scram;
223 } par96;
224 } modem;
226 #ifdef BAYCOM_DEBUG
227 struct debug_vals {
228 unsigned long last_jiffies;
229 unsigned cur_intcnt;
230 unsigned last_intcnt;
231 int cur_pllcorr;
232 int last_pllcorr;
233 } debug_vals;
234 #endif /* BAYCOM_DEBUG */
237 /* --------------------------------------------------------------------- */
239 #define min(a, b) (((a) < (b)) ? (a) : (b))
240 #define max(a, b) (((a) > (b)) ? (a) : (b))
242 /* --------------------------------------------------------------------- */
244 static void inline baycom_int_freq(struct baycom_state *bc)
246 #ifdef BAYCOM_DEBUG
247 unsigned long cur_jiffies = jiffies;
249 * measure the interrupt frequency
251 bc->debug_vals.cur_intcnt++;
252 if ((cur_jiffies - bc->debug_vals.last_jiffies) >= HZ) {
253 bc->debug_vals.last_jiffies = cur_jiffies;
254 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
255 bc->debug_vals.cur_intcnt = 0;
256 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
257 bc->debug_vals.cur_pllcorr = 0;
259 #endif /* BAYCOM_DEBUG */
262 /* --------------------------------------------------------------------- */
264 * ===================== SER12 specific routines =========================
267 static void inline ser12_set_divisor(struct device *dev,
268 unsigned char divisor)
270 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */
271 outb(divisor, DLL(dev->base_addr));
272 outb(0, DLM(dev->base_addr));
273 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */
275 * make sure the next interrupt is generated;
276 * 0 must be used to power the modem; the modem draws its
277 * power from the TxD line
279 outb(0x00, THR(dev->base_addr));
281 * it is important not to set the divider while transmitting;
282 * this reportedly makes some UARTs generating interrupts
283 * in the hundredthousands per second region
284 * Reported by: Ignacio.Arenaza@studi.epfl.ch (Ignacio Arenaza Nuno)
288 /* --------------------------------------------------------------------- */
291 * must call the TX arbitrator every 10ms
293 #define SER12_ARB_DIVIDER(bc) ((bc->options & BAYCOM_OPTIONS_SOFTDCD) ? \
294 36 : 24)
295 #define SER12_DCD_INTERVAL(bc) ((bc->options & BAYCOM_OPTIONS_SOFTDCD) ? \
296 240 : 12)
298 static inline void ser12_tx(struct device *dev, struct baycom_state *bc)
300 /* one interrupt per channel bit */
301 ser12_set_divisor(dev, 12);
303 * first output the last bit (!) then call HDLC transmitter,
304 * since this may take quite long
306 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr));
307 if (bc->modem.shreg <= 1)
308 bc->modem.shreg = 0x10000 | hdlcdrv_getbits(&bc->hdrv);
309 bc->modem.ser12.tx_bit = !(bc->modem.ser12.tx_bit ^
310 (bc->modem.shreg & 1));
311 bc->modem.shreg >>= 1;
314 /* --------------------------------------------------------------------- */
316 static inline void ser12_rx(struct device *dev, struct baycom_state *bc)
318 unsigned char cur_s;
320 * do demodulator
322 cur_s = inb(MSR(dev->base_addr)) & 0x10; /* the CTS line */
323 hdlcdrv_channelbit(&bc->hdrv, cur_s);
324 bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
325 (cur_s != bc->modem.ser12.last_sample);
326 bc->modem.ser12.last_sample = cur_s;
327 if(bc->modem.ser12.dcd_shreg & 1) {
328 if (bc->options & BAYCOM_OPTIONS_SOFTDCD) {
329 unsigned int dcdspos, dcdsneg;
331 dcdspos = dcdsneg = 0;
332 dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
333 if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
334 dcdspos += 2;
335 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
336 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
337 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
339 bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
340 } else
341 bc->modem.ser12.dcd_sum0--;
343 if(!bc->modem.ser12.dcd_time) {
344 hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
345 bc->modem.ser12.dcd_sum1 +
346 bc->modem.ser12.dcd_sum2) < 0);
347 bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
348 bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
349 /* offset to ensure DCD off on silent input */
350 bc->modem.ser12.dcd_sum0 = 2;
351 bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
353 bc->modem.ser12.dcd_time--;
354 if (bc->options & BAYCOM_OPTIONS_SOFTDCD) {
356 * PLL code for the improved software DCD algorithm
358 if (bc->modem.ser12.interm_sample) {
360 * intermediate sample; set timing correction to normal
362 ser12_set_divisor(dev, 4);
363 } else {
365 * do PLL correction and call HDLC receiver
367 switch (bc->modem.ser12.dcd_shreg & 7) {
368 case 1: /* transition too late */
369 ser12_set_divisor(dev, 5);
370 #ifdef BAYCOM_DEBUG
371 bc->debug_vals.cur_pllcorr++;
372 #endif /* BAYCOM_DEBUG */
373 break;
374 case 4: /* transition too early */
375 ser12_set_divisor(dev, 3);
376 #ifdef BAYCOM_DEBUG
377 bc->debug_vals.cur_pllcorr--;
378 #endif /* BAYCOM_DEBUG */
379 break;
380 default:
381 ser12_set_divisor(dev, 4);
382 break;
384 bc->modem.shreg >>= 1;
385 if (bc->modem.ser12.last_sample ==
386 bc->modem.ser12.last_rxbit)
387 bc->modem.shreg |= 0x10000;
388 bc->modem.ser12.last_rxbit =
389 bc->modem.ser12.last_sample;
391 if (++bc->modem.ser12.interm_sample >= 3)
392 bc->modem.ser12.interm_sample = 0;
394 * DCD stuff
396 if (bc->modem.ser12.dcd_shreg & 1) {
397 unsigned int dcdspos, dcdsneg;
399 dcdspos = dcdsneg = 0;
400 dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
401 dcdspos += (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
402 << 1;
403 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
404 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
405 dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
407 bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
409 } else {
411 * PLL algorithm for the hardware squelch DCD algorithm
413 if (bc->modem.ser12.interm_sample) {
415 * intermediate sample; set timing correction to normal
417 ser12_set_divisor(dev, 6);
418 } else {
420 * do PLL correction and call HDLC receiver
422 switch (bc->modem.ser12.dcd_shreg & 3) {
423 case 1: /* transition too late */
424 ser12_set_divisor(dev, 7);
425 #ifdef BAYCOM_DEBUG
426 bc->debug_vals.cur_pllcorr++;
427 #endif /* BAYCOM_DEBUG */
428 break;
429 case 2: /* transition too early */
430 ser12_set_divisor(dev, 5);
431 #ifdef BAYCOM_DEBUG
432 bc->debug_vals.cur_pllcorr--;
433 #endif /* BAYCOM_DEBUG */
434 break;
435 default:
436 ser12_set_divisor(dev, 6);
437 break;
439 bc->modem.shreg >>= 1;
440 if (bc->modem.ser12.last_sample ==
441 bc->modem.ser12.last_rxbit)
442 bc->modem.shreg |= 0x10000;
443 bc->modem.ser12.last_rxbit =
444 bc->modem.ser12.last_sample;
446 bc->modem.ser12.interm_sample = !bc->modem.ser12.interm_sample;
448 * DCD stuff
450 bc->modem.ser12.dcd_sum0 -= (bc->modem.ser12.dcd_shreg & 1);
452 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */
453 if (bc->modem.shreg & 1) {
454 hdlcdrv_putbits(&bc->hdrv, bc->modem.shreg >> 1);
455 bc->modem.shreg = 0x10000;
457 if(!bc->modem.ser12.dcd_time) {
458 hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
459 bc->modem.ser12.dcd_sum1 +
460 bc->modem.ser12.dcd_sum2) < 0);
461 bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
462 bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
463 /* offset to ensure DCD off on silent input */
464 bc->modem.ser12.dcd_sum0 = 2;
465 bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
467 bc->modem.ser12.dcd_time--;
470 /* --------------------------------------------------------------------- */
472 static void ser12_interrupt(int irq, void *dev_id, struct pt_regs *regs)
474 struct device *dev = (struct device *)dev_id;
475 struct baycom_state *bc = (struct baycom_state *)dev->priv;
477 if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
478 return;
480 baycom_int_freq(bc);
482 * check if transmitter active
484 if (hdlcdrv_ptt(&bc->hdrv))
485 ser12_tx(dev, bc);
486 else {
487 ser12_rx(dev, bc);
488 if (--bc->modem.arb_divider <= 0) {
489 bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
490 sti();
491 hdlcdrv_arbitrate(dev, &bc->hdrv);
494 sti();
495 hdlcdrv_transmitter(dev, &bc->hdrv);
496 hdlcdrv_receiver(dev, &bc->hdrv);
499 /* --------------------------------------------------------------------- */
501 enum uart { c_uart_unknown, c_uart_8250,
502 c_uart_16450, c_uart_16550, c_uart_16550A};
503 static const char *uart_str[] =
504 { "unknown", "8250", "16450", "16550", "16550A" };
506 static enum uart ser12_check_uart(unsigned int iobase)
508 unsigned char b1,b2,b3;
509 enum uart u;
510 enum uart uart_tab[] =
511 { c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A };
513 b1 = inb(MCR(iobase));
514 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */
515 b2 = inb(MSR(iobase));
516 outb(0x1a, MCR(iobase));
517 b3 = inb(MSR(iobase)) & 0xf0;
518 outb(b1, MCR(iobase)); /* restore old values */
519 outb(b2, MSR(iobase));
520 if (b3 != 0x90)
521 return c_uart_unknown;
522 inb(RBR(iobase));
523 inb(RBR(iobase));
524 outb(0x01, FCR(iobase)); /* enable FIFOs */
525 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
526 if (u == c_uart_16450) {
527 outb(0x5a, SCR(iobase));
528 b1 = inb(SCR(iobase));
529 outb(0xa5, SCR(iobase));
530 b2 = inb(SCR(iobase));
531 if ((b1 != 0x5a) || (b2 != 0xa5))
532 u = c_uart_8250;
534 return u;
537 /* --------------------------------------------------------------------- */
539 static int ser12_open(struct device *dev)
541 struct baycom_state *bc = (struct baycom_state *)dev->priv;
542 enum uart u;
544 if (!dev || !bc)
545 return -ENXIO;
546 if (!dev->base_addr || dev->base_addr > 0x1000-SER12_EXTENT ||
547 dev->irq < 2 || dev->irq > 15)
548 return -ENXIO;
549 if (check_region(dev->base_addr, SER12_EXTENT))
550 return -EACCES;
551 memset(&bc->modem, 0, sizeof(bc->modem));
552 bc->hdrv.par.bitrate = 1200;
553 if ((u = ser12_check_uart(dev->base_addr)) == c_uart_unknown)
554 return -EIO;
555 outb(0, FCR(dev->base_addr)); /* disable FIFOs */
556 outb(0x0d, MCR(dev->base_addr));
557 outb(0x0d, MCR(dev->base_addr));
558 outb(0, IER(dev->base_addr));
559 if (request_irq(dev->irq, ser12_interrupt, SA_INTERRUPT,
560 "baycom_ser12", dev))
561 return -EBUSY;
562 request_region(dev->base_addr, SER12_EXTENT, "baycom_ser12");
564 * enable transmitter empty interrupt
566 outb(2, IER(dev->base_addr));
568 * set the SIO to 6 Bits/character and 19200 or 28800 baud, so that
569 * we get exactly (hopefully) 2 or 3 interrupts per radio symbol,
570 * depending on the usage of the software DCD routine
572 ser12_set_divisor(dev, (bc->options & BAYCOM_OPTIONS_SOFTDCD) ? 4 : 6);
573 printk(KERN_INFO "%s: ser12 at iobase 0x%lx irq %u options "
574 "0x%x uart %s\n", bc_drvname, dev->base_addr, dev->irq,
575 bc->options, uart_str[u]);
576 MOD_INC_USE_COUNT;
577 return 0;
580 /* --------------------------------------------------------------------- */
582 static int ser12_close(struct device *dev)
584 struct baycom_state *bc = (struct baycom_state *)dev->priv;
586 if (!dev || !bc)
587 return -EINVAL;
589 * disable interrupts
591 outb(0, IER(dev->base_addr));
592 outb(1, MCR(dev->base_addr));
593 free_irq(dev->irq, dev);
594 release_region(dev->base_addr, SER12_EXTENT);
595 printk(KERN_INFO "%s: close ser12 at iobase 0x%lx irq %u\n",
596 bc_drvname, dev->base_addr, dev->irq);
597 MOD_DEC_USE_COUNT;
598 return 0;
601 /* --------------------------------------------------------------------- */
603 * ===================== PAR96 specific routines =========================
606 #define PAR96_DESCRAM_TAP1 0x20000
607 #define PAR96_DESCRAM_TAP2 0x01000
608 #define PAR96_DESCRAM_TAP3 0x00001
610 #define PAR96_DESCRAM_TAPSH1 17
611 #define PAR96_DESCRAM_TAPSH2 12
612 #define PAR96_DESCRAM_TAPSH3 0
614 #define PAR96_SCRAM_TAP1 0x20000 /* X^17 */
615 #define PAR96_SCRAM_TAPN 0x00021 /* X^0+X^5 */
617 /* --------------------------------------------------------------------- */
619 static inline void par96_tx(struct device *dev, struct baycom_state *bc)
621 int i;
622 unsigned int data = hdlcdrv_getbits(&bc->hdrv);
624 for(i = 0; i < PAR96_BURSTBITS; i++, data >>= 1) {
625 unsigned char val = PAR97_POWER;
626 bc->modem.par96.scram = ((bc->modem.par96.scram << 1) |
627 (bc->modem.par96.scram & 1));
628 if (!(data & 1))
629 bc->modem.par96.scram ^= 1;
630 if (bc->modem.par96.scram & (PAR96_SCRAM_TAP1 << 1))
631 bc->modem.par96.scram ^=
632 (PAR96_SCRAM_TAPN << 1);
633 if (bc->modem.par96.scram & (PAR96_SCRAM_TAP1 << 2))
634 val |= PAR96_TXBIT;
635 outb(val, LPT_DATA(dev->base_addr));
636 outb(val | PAR96_BURST, LPT_DATA(dev->base_addr));
640 /* --------------------------------------------------------------------- */
642 static inline void par96_rx(struct device *dev, struct baycom_state *bc)
644 int i;
645 unsigned int data, mask, mask2, descx;
648 * do receiver; differential decode and descramble on the fly
650 for(data = i = 0; i < PAR96_BURSTBITS; i++) {
651 bc->modem.par96.descram = (bc->modem.par96.descram << 1);
652 if (inb(LPT_STATUS(dev->base_addr)) & PAR96_RXBIT)
653 bc->modem.par96.descram |= 1;
654 descx = bc->modem.par96.descram ^
655 (bc->modem.par96.descram >> 1);
656 /* now the diff decoded data is inverted in descram */
657 outb(PAR97_POWER | PAR96_PTT, LPT_DATA(dev->base_addr));
658 descx ^= ((descx >> PAR96_DESCRAM_TAPSH1) ^
659 (descx >> PAR96_DESCRAM_TAPSH2));
660 data >>= 1;
661 if (!(descx & 1))
662 data |= 0x8000;
663 outb(PAR97_POWER | PAR96_PTT | PAR96_BURST,
664 LPT_DATA(dev->base_addr));
666 hdlcdrv_putbits(&bc->hdrv, data);
668 * do DCD algorithm
670 if (bc->options & BAYCOM_OPTIONS_SOFTDCD) {
671 bc->modem.par96.dcd_shreg = (bc->modem.par96.dcd_shreg >> 16)
672 | (data << 16);
673 /* search for flags and set the dcd counter appropriately */
674 for(mask = 0x1fe00, mask2 = 0xfc00, i = 0;
675 i < PAR96_BURSTBITS; i++, mask <<= 1, mask2 <<= 1)
676 if ((bc->modem.par96.dcd_shreg & mask) == mask2)
677 bc->modem.par96.dcd_count = HDLCDRV_MAXFLEN+4;
678 /* check for abort/noise sequences */
679 for(mask = 0x1fe00, mask2 = 0x1fe00, i = 0;
680 i < PAR96_BURSTBITS; i++, mask <<= 1, mask2 <<= 1)
681 if (((bc->modem.par96.dcd_shreg & mask) == mask2) &&
682 (bc->modem.par96.dcd_count >= 0))
683 bc->modem.par96.dcd_count -= HDLCDRV_MAXFLEN-10;
684 /* decrement and set the dcd variable */
685 if (bc->modem.par96.dcd_count >= 0)
686 bc->modem.par96.dcd_count -= 2;
687 hdlcdrv_setdcd(&bc->hdrv, bc->modem.par96.dcd_count > 0);
688 } else {
689 hdlcdrv_setdcd(&bc->hdrv, !!(inb(LPT_STATUS(dev->base_addr))
690 & PAR96_DCD));
694 /* --------------------------------------------------------------------- */
696 static void par96_interrupt(int irq, void *dev_id, struct pt_regs *regs)
698 struct device *dev = (struct device *)dev_id;
699 struct baycom_state *bc = (struct baycom_state *)dev->priv;
701 if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
702 return;
704 baycom_int_freq(bc);
706 * check if transmitter active
708 if (hdlcdrv_ptt(&bc->hdrv))
709 par96_tx(dev, bc);
710 else {
711 par96_rx(dev, bc);
712 if (--bc->modem.arb_divider <= 0) {
713 bc->modem.arb_divider = 6;
714 sti();
715 hdlcdrv_arbitrate(dev, &bc->hdrv);
718 sti();
719 hdlcdrv_transmitter(dev, &bc->hdrv);
720 hdlcdrv_receiver(dev, &bc->hdrv);
723 /* --------------------------------------------------------------------- */
725 static int par96_check_lpt(unsigned int iobase)
727 unsigned char b1,b2;
728 int i;
730 b1 = inb(LPT_DATA(iobase));
731 b2 = inb(LPT_CONTROL(iobase));
732 outb(0xaa, LPT_DATA(iobase));
733 i = inb(LPT_DATA(iobase)) == 0xaa;
734 outb(0x55, LPT_DATA(iobase));
735 i &= inb(LPT_DATA(iobase)) == 0x55;
736 outb(0x0a, LPT_CONTROL(iobase));
737 i &= (inb(LPT_CONTROL(iobase)) & 0xf) == 0x0a;
738 outb(0x05, LPT_CONTROL(iobase));
739 i &= (inb(LPT_CONTROL(iobase)) & 0xf) == 0x05;
740 outb(b1, LPT_DATA(iobase));
741 outb(b2, LPT_CONTROL(iobase));
742 return !i;
745 /* --------------------------------------------------------------------- */
747 static int par96_open(struct device *dev)
749 struct baycom_state *bc = (struct baycom_state *)dev->priv;
751 if (!dev || !bc)
752 return -ENXIO;
753 if (!dev->base_addr || dev->base_addr > 0x1000-PAR96_EXTENT ||
754 dev->irq < 2 || dev->irq > 15)
755 return -ENXIO;
756 if (check_region(dev->base_addr, PAR96_EXTENT))
757 return -EACCES;
758 memset(&bc->modem, 0, sizeof(bc->modem));
759 bc->hdrv.par.bitrate = 9600;
760 if (par96_check_lpt(dev->base_addr))
761 return -EIO;
762 /* disable interrupt */
763 outb(0, LPT_CONTROL(dev->base_addr));
764 /* switch off PTT */
765 outb(PAR96_PTT | PAR97_POWER, LPT_DATA(dev->base_addr));
766 printk(KERN_INFO "%s: par96 at iobase 0x%lx irq %u options 0x%x\n",
767 bc_drvname, dev->base_addr, dev->irq, bc->options);
768 if (request_irq(dev->irq, par96_interrupt, SA_INTERRUPT,
769 "baycom_par96", dev))
770 return -EBUSY;
771 request_region(dev->base_addr, PAR96_EXTENT, "baycom_par96");
772 /* enable interrupt */
773 outb(LPT_IRQ_ENABLE, LPT_CONTROL(dev->base_addr));
774 MOD_INC_USE_COUNT;
775 return 0;
778 /* --------------------------------------------------------------------- */
780 static int par96_close(struct device *dev)
782 struct baycom_state *bc = (struct baycom_state *)dev->priv;
784 if (!dev || !bc)
785 return -EINVAL;
786 /* disable interrupt */
787 outb(0, LPT_CONTROL(dev->base_addr));
788 /* switch off PTT */
789 outb(PAR96_PTT | PAR97_POWER, LPT_DATA(dev->base_addr));
790 free_irq(dev->irq, dev);
791 release_region(dev->base_addr, PAR96_EXTENT);
792 printk(KERN_INFO "%s: close par96 at iobase 0x%lx irq %u\n",
793 bc_drvname, dev->base_addr, dev->irq);
794 MOD_DEC_USE_COUNT;
795 return 0;
798 /* --------------------------------------------------------------------- */
800 * ===================== hdlcdrv driver interface =========================
803 /* --------------------------------------------------------------------- */
805 static int baycom_ioctl(struct device *dev, struct ifreq *ifr,
806 struct hdlcdrv_ioctl *hi, int cmd);
808 /* --------------------------------------------------------------------- */
810 static struct hdlcdrv_ops ser12_ops = {
811 bc_drvname,
812 bc_drvinfo,
813 ser12_open,
814 ser12_close,
815 baycom_ioctl
818 /* --------------------------------------------------------------------- */
820 static struct hdlcdrv_ops par96_ops = {
821 bc_drvname,
822 bc_drvinfo,
823 par96_open,
824 par96_close,
825 baycom_ioctl
828 /* --------------------------------------------------------------------- */
830 static struct hdlcdrv_ops dummy_ops = {
831 bc_drvname,
832 bc_drvinfo,
833 NULL,
834 NULL,
835 baycom_ioctl
838 /* --------------------------------------------------------------------- */
840 static int baycom_setmode(struct baycom_state *bc, char *modestr)
842 struct hdlcdrv_ops *newops = NULL;
843 unsigned long flags;
845 if (!strncmp(modestr, "off", 3))
846 newops = &dummy_ops;
847 else if (!strncmp(modestr, "ser12", 5))
848 newops = &ser12_ops;
849 else if (!strncmp(modestr, "par96", 5))
850 newops = &par96_ops;
851 else
852 return -EINVAL;
853 save_flags(flags);
854 cli();
855 bc->hdrv.ops = newops;
856 bc->options = !!strchr(modestr, '*');
857 restore_flags(flags);
858 return 0;
861 /* --------------------------------------------------------------------- */
863 static int baycom_ioctl(struct device *dev, struct ifreq *ifr,
864 struct hdlcdrv_ioctl *hi, int cmd)
866 struct baycom_state *bc;
867 struct baycom_ioctl bi;
868 int cmd2;
870 if (!dev || !dev->priv ||
871 ((struct baycom_state *)dev->priv)->hdrv.magic != HDLCDRV_MAGIC) {
872 printk(KERN_ERR "bc_ioctl: invalid device struct\n");
873 return -EINVAL;
875 bc = (struct baycom_state *)dev->priv;
877 if (cmd != SIOCDEVPRIVATE)
878 return -ENOIOCTLCMD;
879 if (get_user(cmd2, (int *)ifr->ifr_data))
880 return -EFAULT;
881 switch (hi->cmd) {
882 default:
883 break;
885 case HDLCDRVCTL_GETMODE:
886 if (bc->hdrv.ops == &ser12_ops)
887 strcpy(hi->data.modename, "ser12");
888 else if (bc->hdrv.ops == &par96_ops)
889 strcpy(hi->data.modename, "par96");
890 else if (bc->hdrv.ops == &dummy_ops)
891 strcpy(hi->data.modename, "off");
892 else
893 strcpy(hi->data.modename, "invalid");
894 if (bc->options & 1)
895 strcat(hi->data.modename, "*");
896 if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
897 return -EFAULT;
898 return 0;
900 case HDLCDRVCTL_SETMODE:
901 if (!suser() || dev->start)
902 return -EACCES;
903 hi->data.modename[sizeof(hi->data.modename)-1] = '\0';
904 return baycom_setmode(bc, hi->data.modename);
906 case HDLCDRVCTL_MODELIST:
907 strcpy(hi->data.modename, "ser12,par96");
908 if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
909 return -EFAULT;
910 return 0;
912 case HDLCDRVCTL_MODEMPARMASK:
913 return HDLCDRV_PARMASK_IOBASE | HDLCDRV_PARMASK_IRQ;
917 if (copy_from_user(&bi, ifr->ifr_data, sizeof(bi)))
918 return -EFAULT;
919 switch (bi.cmd) {
920 default:
921 return -ENOIOCTLCMD;
923 #ifdef BAYCOM_DEBUG
924 case BAYCOMCTL_GETDEBUG:
925 bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
926 bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
927 bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
928 break;
929 #endif /* BAYCOM_DEBUG */
932 if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
933 return -EFAULT;
934 return 0;
938 /* --------------------------------------------------------------------- */
940 __initfunc(int baycom_init(void))
942 int i, j, found = 0;
943 char set_hw = 1;
944 struct baycom_state *bc;
945 char ifname[HDLCDRV_IFNAMELEN];
948 printk(bc_drvinfo);
950 * register net devices
952 for (i = 0; i < NR_PORTS; i++) {
953 struct device *dev = baycom_device+i;
954 sprintf(ifname, "bc%d", i);
956 if (!baycom_ports[i].mode)
957 set_hw = 0;
958 if (!set_hw)
959 baycom_ports[i].iobase = baycom_ports[i].irq = 0;
960 j = hdlcdrv_register_hdlcdrv(dev, &dummy_ops,
961 sizeof(struct baycom_state),
962 ifname, baycom_ports[i].iobase,
963 baycom_ports[i].irq, 0);
964 if (!j) {
965 bc = (struct baycom_state *)dev->priv;
966 if (set_hw && baycom_setmode(bc, baycom_ports[i].mode))
967 set_hw = 0;
968 found++;
969 } else {
970 printk(KERN_WARNING "%s: cannot register net device\n",
971 bc_drvname);
974 if (!found)
975 return -ENXIO;
976 return 0;
979 /* --------------------------------------------------------------------- */
981 #ifdef MODULE
984 * command line settable parameters
986 static char *mode = NULL;
987 static int iobase = 0x3f8;
988 static int irq = 4;
990 #if LINUX_VERSION_CODE >= 0x20115
992 MODULE_PARM(mode, "s");
993 MODULE_PARM_DESC(mode, "baycom operating mode; eg. ser12* or par96");
994 MODULE_PARM(iobase, "i");
995 MODULE_PARM_DESC(iobase, "baycom io base address");
996 MODULE_PARM(irq, "i");
997 MODULE_PARM_DESC(irq, "baycom irq number");
999 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
1000 MODULE_DESCRIPTION("Baycom ser12, par96 and picpar amateur radio modem driver");
1002 #endif
1004 int init_module(void)
1006 baycom_ports[0].mode = mode;
1007 baycom_ports[0].iobase = iobase;
1008 baycom_ports[0].irq = irq;
1009 baycom_ports[1].mode = NULL;
1011 return baycom_init();
1014 /* --------------------------------------------------------------------- */
1016 void cleanup_module(void)
1018 int i;
1020 for(i = 0; i < NR_PORTS; i++) {
1021 struct device *dev = baycom_device+i;
1022 struct baycom_state *bc = (struct baycom_state *)dev->priv;
1024 if (bc) {
1025 if (bc->hdrv.magic != HDLCDRV_MAGIC)
1026 printk(KERN_ERR "baycom: invalid magic in "
1027 "cleanup_module\n");
1028 else
1029 hdlcdrv_unregister_hdlcdrv(dev);
1034 #else /* MODULE */
1035 /* --------------------------------------------------------------------- */
1037 * format: baycom=io,irq,mode
1038 * mode: {ser12,par96}[*]
1039 * * indicates sofware DCD
1042 __initfunc(void baycom_setup(char *str, int *ints))
1044 int i;
1046 for (i = 0; (i < NR_PORTS) && (baycom_ports[i].mode); i++);
1047 if ((i >= NR_PORTS) || (ints[0] < 2)) {
1048 printk(KERN_INFO "%s: too many or invalid interface "
1049 "specifications\n", bc_drvname);
1050 return;
1052 baycom_ports[i].mode = str;
1053 baycom_ports[i].iobase = ints[1];
1054 baycom_ports[i].irq = ints[2];
1055 if (i < NR_PORTS-1)
1056 baycom_ports[i+1].mode = NULL;
1059 #endif /* MODULE */
1060 /* --------------------------------------------------------------------- */