drivers/ieee1394/aic5800.c

   1 /*
   2  * +++ THIS DRIVER IS ORPHANED AND UNSUPPORTED +++
   3  *
   4  * aic5800.c - Adaptec AIC-5800 PCI-IEEE1394 chip driver
   5  * Copyright (C)1999 Emanuel Pirker <epirker@edu.uni-klu.ac.at>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software Foundation,
  19  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/slab.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/wait.h>
  26 #include <linux/errno.h>
  27 #include <linux/module.h>
  28 #include <linux/pci.h>
  29 #include <linux/fs.h>
  30 #include <linux/poll.h>
  31 #include <linux/delay.h>
  32 #include <asm/byteorder.h>
  33 #include <asm/atomic.h>
  34 #include <asm/io.h>
  35 #include <asm/uaccess.h>
  36
  37 #include "ieee1394_types.h"
  38 #include "hosts.h"
  39 #include "ieee1394_core.h"
  40 #include "ieee1394.h"
  41 #include "aic5800.h"
  42
  43
  44
  45 /// print general (card independent) information
  46 #define PRINT_G(level, fmt, args...) printk(level "aic5800: " fmt "\n" , ## args)
  47 /// print card specific information
  48 #define PRINT(level, card, fmt, args...) printk(level "aic5800-%d: " fmt "\n" , card , ## args)
  49
  50 /// card array
  51 static struct aic5800 cards[MAX_AIC5800_CARDS];
  52 /// holds the number of installed aic5800 cards
  53 static int num_of_cards = 0;
  54
  55 static int add_card(struct pci_dev *dev);
  56 static void remove_card(struct aic5800 *aic);
  57 static int init_driver(void);
  58
  59
  60 /*****************************************************************
  61  * Auxiliary functions needed to read the EEPROM
  62  * Daniel Minitti
  63  *****************************************************************/
  64 #define SEEPDOUT        0x1
  65 #define SEEPDIN 0x02
  66 #define SEEPSK  0x04
  67 #define SEEPCS  0x08
  68 #define SEEPCYC 0x10
  69 #define SEEPBUSY        0x20
  70
  71 #define CLOCK_PULSE() {\
  72         int cnt=200;\
  73         while(cnt-->0 && reg_read(aic, misc_SEEPCTL) & SEEPBUSY);\
  74         if (reg_read(aic, misc_SEEPCTL) & SEEPBUSY) printk("BUSY ");\
  75         }
  76
  77 static inline unsigned short read_seeprom_word(struct aic5800 *aic,
  78                                                int offset)
  79 {
  80         int i;
  81         unsigned char temp;
  82         unsigned char read_cmd[3] = {1,1,0};
  83         unsigned short rd;
  84
  85         // send chip select for one clock cycle.
  86         reg_write(aic, misc_SEEPCTL, SEEPSK|SEEPCS);
  87         CLOCK_PULSE();
  88
  89         // write start bit (1) & READ op-code (10b)
  90         for (i=0; i<sizeof(read_cmd); i++) {
  91                 temp = SEEPCS | SEEPCYC | read_cmd[i];
  92                 reg_write(aic, misc_SEEPCTL, temp);
  93                 CLOCK_PULSE();
  94                 temp = temp ^ SEEPSK;
  95                 reg_write(aic, misc_SEEPCTL, temp);
  96                 CLOCK_PULSE();
  97         }
  98         // write 8 bit address (MSB --> LSB)
  99         for (i=7; i>=0; i--) {
 100                 temp = offset;
 101                 temp = (temp >> i) & 1;
 102                 temp = SEEPCS | SEEPCYC | temp;
 103                 reg_write(aic, misc_SEEPCTL, temp);
 104                 CLOCK_PULSE();
 105                 temp = temp ^ SEEPSK;
 106                 reg_write(aic, misc_SEEPCTL, temp);
 107                 CLOCK_PULSE();
 108         }
 109         // read 16 bit (MSB --> LSB)
 110         rd = 0;
 111         for (i=0; i<=16; i++) {
 112                 temp = SEEPCS | SEEPCYC;
 113                 reg_write(aic, misc_SEEPCTL, temp);
 114                 CLOCK_PULSE();
 115                 temp = temp ^ SEEPSK;
 116                 rd = (rd << 1) | (unsigned short)((reg_read(aic, misc_SEEPCTL)
 117 & SEEPDIN)>>1);
 118                 reg_write(aic, misc_SEEPCTL, temp);
 119                 CLOCK_PULSE();
 120         }
 121
 122         // reset chip select for the next command cycle
 123         reg_write(aic, misc_SEEPCTL, SEEPCYC);
 124         CLOCK_PULSE();
 125         reg_write(aic, misc_SEEPCTL, SEEPCYC | SEEPSK);
 126         CLOCK_PULSE();
 127         reg_write(aic, misc_SEEPCTL, SEEPCYC);
 128         CLOCK_PULSE();
 129
 130         reg_write(aic, misc_SEEPCTL, 0);
 131         CLOCK_PULSE();
 132
 133         return rd;
 134 }
 135
 136 #undef DEBUG_SEEPROM
 137
 138 /** Read 64-bit GUID (Global Unique ID) from SEEPROM
 139  *
 140  * It works well on AHA-8945.
 141  * On AHA-8920 it works well only on first time, It returns ffff... on
 142  * the other times.
 143  *****************************************************************/
 144 static unsigned long long read_guid(struct aic5800 *aic)
 145 {
 146         int i;
 147         unsigned long long guid;
 148
 149 #ifdef DEBUG_SEEPROM
 150         printk("\n");
 151         printk("SEEPCTL value = 0x%x\n", reg_read(aic, misc_SEEPCTL));
 152 #endif
 153
 154         /* read GUID */
 155         guid = 0;
 156         for (i=0x10; i<0x14; i++)
 157                 guid = (guid << 16) | read_seeprom_word(aic,i);
 158
 159 #ifdef DEBUG_SEEPROM
 160         for (i=0; i<3; i++)
 161                 printk("%x ", (unsigned int) read_seeprom_word(aic,i));
 162         printk("\nGUID = ");
 163         for (i=3; i>=0; i--)
 164                 printk("%x ", (unsigned int)(guid>>(16*i))&0xffff);
 165
 166         printk("\nSEEPCTL value = 0x%x\n", reg_read(aic, misc_SEEPCTL));
 167 #endif
 168         return guid;
 169 }
 170
 171 #undef CLOCK_PULSE()
 172
 173 static int aic_detect(struct hpsb_host_template *tmpl)
 174 {
 175         struct hpsb_host *host;
 176         int i;
 177
 178         init_driver();
 179
 180         for (i = 0; i < num_of_cards; i++) {
 181                 host = hpsb_get_host(tmpl, 0);
 182                 if (host == NULL) {
 183                         /* simply don't init more after out of mem */
 184                         return i;
 185                 }
 186                 host->hostdata = &cards[i];
 187                 cards[i].host = host;
 188         }
 189
 190         return num_of_cards;
 191 }
 192
 193 static int aic_devctl(struct hpsb_host *host, enum devctl_cmd cmd, int arg)
 194 {
 195     struct aic5800 *aic = host->hostdata;
 196     int retval = 0;
 197     unsigned long flags;
 198     struct hpsb_packet *packet, *lastpacket;
 199
 200     switch (cmd) {
 201     case RESET_BUS:
 202         reg_write(aic, misc_PhyControl, 0x00004140 );
 203         break;
 204
 205     case GET_CYCLE_COUNTER:
 206         arg = reg_read(aic, misc_CycleTimer);
 207         break;
 208
 209     case SET_CYCLE_COUNTER:
 210         reg_write(aic, misc_CycleTimer, arg);
 211         break;
 212
 213     case SET_BUS_ID:
 214         reg_clear_bits(aic, misc_NodeID, 0xFFC0);
 215         reg_set_bits(aic, misc_NodeID, (arg<<6));
 216         break;
 217
 218     case ACT_CYCLE_MASTER:
 219         if (arg) {
 220             /* enable cycleMaster */
 221             reg_set_bits(aic, misc_Control, 0x20000);
 222         } else {
 223             /* disable cycleMaster */
 224             reg_clear_bits(aic, misc_Control, 0x20000);
 225         };
 226         break;
 227
 228     case CANCEL_REQUESTS:
 229         spin_lock_irqsave(&aic->async_queue_lock, flags);
 230         /* stop any chip activity */
 231         reg_write( aic, AT_ChannelControl, 0x80000000);
 232         packet = aic->async_queue;
 233         aic->async_queue = NULL;
 234         spin_unlock_irqrestore(&aic->async_queue_lock, flags);
 235
 236         while (packet != NULL) {
 237             lastpacket = packet;
 238             packet = packet->xnext;
 239             hpsb_packet_sent(host, lastpacket, ACKX_ABORTED);
 240         }
 241
 242         break;
 243
 244     case MODIFY_USAGE:
 245         if (arg) {
 246             MOD_INC_USE_COUNT;
 247         } else {
 248             MOD_DEC_USE_COUNT;
 249         }
 250         break;
 251
 252 #if 0
 253    case DEBUG_DUMPINFO:
 254       PRINT(KERN_INFO, aic->id, AIC5800_DRIVER_NAME);
 255       PRINT(KERN_INFO, aic->id, "  Register MMIO base: 0x%p\n",
 256             aic->registers);
 257       PRINT(KERN_INFO, aic->id, "  NodeID: 0x%x\n",
 258             reg_read(aic, misc_NodeID) );
 259       PRINT(KERN_INFO,aic->id, "  #Intr: %lu  BusResets: %lu\n",
 260               aic->NumInterrupts, aic->NumBusResets);
 261       PRINT(KERN_INFO, aic->id, "  TxPackets: %lu    RxPackets: %lu\n",
 262               aic->TxPackets, aic->RxPackets);
 263       PRINT(KERN_INFO,aic->id, "  TxRdy: %lu  ATErr: %lu HdrErr: %lu TcodeErr: %lu SendRej: %lu\n",
 264             aic->TxRdy, aic->ATError, aic->HdrErr,
 265             aic->TCodeErr, aic->SendRej);
 266       break;
 267 #endif
 268
 269     default:
 270         PRINT(KERN_ERR, aic->id, "unknown devctl command %d", cmd);
 271         retval = -1;
 272     }
 273
 274     return retval;
 275
 276 }
 277
 278 /** Initialize the host adapter chip and corresponding data
 279     structures. We reset the chip, enable transmitter, receiver,
 280     the physical DMA units, cycle timer, cycle source, reception
 281     of selfid packets and initialize several other registers. */
 282 static int aic_initialize(struct hpsb_host *host)
 283 {
 284     int i;
 285     struct aic5800 *aic = host->hostdata;
 286
 287     /* Reset data structures */
 288     aic->async_queue = NULL;
 289     spin_lock_init(&aic->async_queue_lock);
 290
 291     /* Reset the chip */
 292     reg_write( aic, misc_Reset, 0x37);
 293     udelay(10); // FIXME
 294     reg_write( aic, misc_Reset, 0);
 295
 296     /* Enable Transmitter/Receiver, enable physDMA,
 297      * enable CycleTimer, cycleSource */
 298     reg_write( aic, misc_Control, 0x82050003);
 299
 300     /* Enable reception of SelfID packets */
 301     reg_set_bits(aic, misc_PacketControl, 0x20);
 302
 303     reg_write(aic, AT_InterruptSelect, 0x00F0001);
 304     reg_write(aic, AT_BranchSelect, 0x0100010);
 305     reg_write(aic, AT_WaitSelect, 0x00F0001);
 306     reg_write(aic, misc_ATRetries, reg_read(aic, misc_ATRetries) | 0x7);
 307
 308     /* initialize AR DMA */
 309
 310     /* unset run bit */
 311     reg_write( aic, AR_ChannelControl, 0x80000000);
 312
 313     /* here we should have 0 iterations because of the code
 314        in the DmaAR handler. However, to be sure we do it */
 315     i = 0;
 316     while (reg_read(aic, AR_ChannelStatus) & 0x400) {
 317         i++;
 318         if (i>100000) {
 319             PRINT(KERN_ERR, aic->id,
 320                   "Huh! Can't set AR_ChannelControl... card can not receive!");
 321             break;
 322         }
 323     }
 324
 325     (aic->AR_program)->control = ( DMA_CMD_INPUTLAST | DMA_KEY_STREAM0
 326                                    | DMA_INTR_ALWAYS | DMA_BRANCH_ALWAYS)
 327         + AIC5800_ARFIFO_SIZE;
 328     (aic->AR_program)->address = virt_to_bus(aic->rcv_page);
 329     (aic->AR_program)->branchAddress = virt_to_bus(aic->AR_program);
 330     (aic->AR_program)->status = AIC5800_ARFIFO_SIZE;
 331
 332     (aic->AR_program+1)->control = DMA_CMD_STOP;
 333     (aic->AR_program+1)->address = 0;
 334     (aic->AR_program+1)->branchAddress = 0;
 335     (aic->AR_program+1)->status = 0;
 336
 337     reg_write( aic, AR_CommandPtr, (u32) virt_to_bus(aic->AR_program));
 338     reg_write( aic, AR_ChannelControl, 0x80008000);
 339
 340     /* Enable Interrupts */
 341     reg_write(aic, misc_InterruptClear, 0xFFFFFFFF);
 342     reg_write(aic, misc_InterruptMask, 0xFFFFFFFF);
 343     /*reg_write(aic, misc_InterruptMask, 0x00F1F03F);*/
 344
 345     return 1;
 346 }
 347
 348 static void aic_release(struct hpsb_host *host)
 349 {
 350     struct aic5800 *aic;
 351
 352     if (host != NULL) {
 353         aic = host->hostdata;
 354         remove_card(aic);
 355     }
 356 }
 357
 358 /* This must be called with the async_queue_lock held. */
 359 static void send_next_async(struct aic5800 *aic)
 360 {
 361     int i;
 362     struct hpsb_packet *packet = aic->async_queue;
 363
 364     /* stop the channel program if it's still running */
 365     reg_write( aic, AT_ChannelControl, 0x80000000);
 366
 367     /* re-format packet header for AIC-5800 chip */
 368     packet->header[1] = (packet->header[1] & 0xFFFF) |
 369         (packet->header[0] & 0xFFFF0000);
 370     packet->header[0] = (packet->header[0] & 0xFFFF);
 371
 372 #ifndef __BIG_ENDIAN
 373     /* Packet must be byte-swapped in non-big-endian environments,
 374      * see AIC-5800 specification...
 375      */
 376     { u32 i;
 377     for ( i = 0 ; i < packet->header_size/sizeof(u32) ; i++ )
 378         packet->header[i] = cpu_to_be32( packet->header[i] );
 379     for ( i = 0 ; i < packet->data_size/sizeof(u32) ; i++ )
 380         packet->data[i] = cpu_to_be32( packet->data[i] );
 381     }
 382
 383 #endif
 384
 385     /* typically we use only a few iterations here */
 386     i = 0;
 387     while (reg_read(aic, AT_ChannelStatus) & 0x400) {
 388         i++;
 389         if (i>5000) {
 390             PRINT(KERN_ERR, aic->id,
 391                   "runaway loop 1 in send_next_async() - bailing out...");
 392             break;
 393         };
 394     };
 395
 396     /* set data buffer address and packet length */
 397     memset(aic->AT_program, 0, MAX_AT_PROGRAM_SIZE * sizeof(struct dma_cmd));
 398
 399     if (packet->data_size) {
 400         aic->AT_program[0].control = ( DMA_CMD_OUTPUTMORE | DMA_KEY_STREAM0 ) +
 401             packet -> header_size;
 402         aic->AT_program[0].address = virt_to_bus( packet->header );
 403         aic->AT_program[1].control = ( DMA_CMD_OUTPUTLAST | DMA_KEY_STREAM0
 404                                        | DMA_INTR_ALWAYS )
 405             + packet -> data_size;
 406         aic->AT_program[1].address = virt_to_bus( packet->data );
 407
 408         aic->AT_program[2].control = DMA_CMD_STOP;
 409
 410     } else {
 411         aic->AT_program[0].control = ( DMA_CMD_OUTPUTLAST | DMA_INTR_ALWAYS |
 412                                        DMA_KEY_STREAM0 ) +
 413             packet -> header_size;
 414         aic->AT_program[0].address = virt_to_bus( packet->header );
 415
 416         aic->AT_program[1].control = DMA_CMD_STOP;
 417     };
 418
 419     /* set program start address */
 420     reg_write(aic, AT_CommandPtr, (unsigned int) virt_to_bus(aic->AT_program));
 421
 422     /* typically we use only a few iterations here */
 423     i = 0;
 424     while (reg_read(aic, AT_CommandPtr) != (unsigned int)
 425            virt_to_bus(aic->AT_program)) {
 426                 i++;
 427         if (i>5000) {
 428             PRINT(KERN_ERR, aic->id,
 429                   "runaway loop 2 in send_next_async() - bailing out...");
 430             break;
 431         };
 432     };
 433
 434     /* run program */
 435     reg_write( aic, AT_ChannelControl, 0x80008000);
 436 }
 437
 438
 439 static int aic_transmit(struct hpsb_host *host, struct hpsb_packet *packet)
 440 {
 441     struct aic5800 *aic = host->hostdata;
 442     struct hpsb_packet *p;
 443     unsigned long flags;
 444
 445     if (packet->data_size >= 4096) {
 446         PRINT(KERN_ERR, aic->id, "transmit packet data too big (%d)",
 447               packet->data_size);
 448         return 0;
 449     }
 450
 451     packet->xnext = NULL;
 452
 453     spin_lock_irqsave(&aic->async_queue_lock, flags);
 454
 455     if (aic->async_queue == NULL) {
 456         aic->async_queue = packet;
 457         send_next_async(aic);
 458     } else {
 459         p = aic->async_queue;
 460         while (p->xnext != NULL) {
 461             p = p->xnext;
 462         }
 463
 464         p->xnext = packet;
 465     }
 466
 467     spin_unlock_irqrestore(&aic->async_queue_lock, flags);
 468
 469     return 1;
 470 }
 471
 472 static int get_phy_reg(struct aic5800 *aic, int addr)
 473 {
 474         int retval;
 475         int i = 0;
 476
 477         /* sanity check */
 478         if (addr > 15) {
 479                 PRINT(KERN_ERR, aic->id, __FUNCTION__
 480                       ": PHY register address %d out of range", addr);
 481                 return -1;
 482         }
 483
 484         /* request data from PHY */
 485         reg_write(aic, misc_PhyControl, LINK_PHY_READ | LINK_PHY_ADDR(addr));
 486
 487         /* read data from PhyControl register */
 488         /* note that we have to wait until the register is updated */
 489         do {
 490                 retval = reg_read(aic, misc_PhyControl);
 491
 492                 if (i > 10000) {
 493                         PRINT(KERN_ERR, aic->id, __FUNCTION__
 494                               ": runaway loop, aborting");
 495                         retval = -1;
 496                         break;
 497                 }
 498                 i++;
 499         } while ((retval & 0xf000000) != LINK_PHY_RADDR(addr));
 500
 501         /* we don't want a PhyInt interrupt */
 502         reg_write(aic, misc_InterruptClear, INT_PhyInt);
 503
 504         if (retval != -1) {
 505                 return ((retval & 0xff0000)>>16);
 506         } else {
 507                 return -1;
 508         }
 509 }
 510
 511 static quadlet_t generate_own_selfid(struct aic5800 *aic, int phyid)
 512 {
 513     quadlet_t lsid;
 514     char phyreg[7];
 515     int i;
 516
 517     for (i = 1; i < 7; i++) {
 518         phyreg[i] = get_phy_reg(aic, i);
 519     }
 520
 521     /* Standard PHY register map */
 522     lsid = 0x80400000 | (phyid << 24);
 523     lsid |= (phyreg[1] & 0x3f) << 16; /* gap count */
 524     lsid |= (phyreg[2] & 0xc0) << 8; /* max speed */
 525     lsid |= (phyreg[6] & 0x01) << 11; /* contender (phy dep) */
 526     lsid |= (phyreg[6] & 0x10) >> 3; /* initiated reset */
 527
 528     for (i = 0; i < (phyreg[2] & 0x1f); i++) { /* ports */
 529         if (phyreg[3 + i] & 0x4) {
 530             lsid |= (((phyreg[3 + i] & 0x8) | 0x10) >> 3)
 531                                                     << (6 - i*2);
 532         } else {
 533             lsid |= 1 << (6 - i*2);
 534         }
 535     }
 536
 537     return lsid;
 538 };
 539
 540 /* moved out to make interrupt routine more readable */
 541 inline static void handle_selfid(struct aic5800 *aic, struct hpsb_host *host,
 542                           int phyid, int isroot, size_t size)
 543 {
 544     quadlet_t *q = aic->rcv_page;
 545     quadlet_t lsid;
 546
 547     /* we need our own self-id packet */
 548     lsid = generate_own_selfid(aic, phyid);
 549
 550     /* unconnected state? only begin and end marker in rcv_page */
 551     if (size==8) {
 552         hpsb_selfid_received(host, lsid);
 553     }
 554
 555     /* process buffer... AIC's FIFO often contains some strangenesses */
 556     while (size > 0) {
 557         if (q[0] == 0xe0) {
 558             /* marker */
 559             q += 1;
 560             size -= 4;
 561             continue;
 562         };
 563         if (q[0] == 0x1) {
 564             /* marker */
 565             q += 1;
 566             size -= 4;
 567             break;
 568         };
 569
 570         if (q[0] == ~q[1]) {
 571             /* correct self-id */
 572
 573             if ((q[0] & 0x3f800000) == ((phyid + 1) << 24)) {
 574                 /* its our turn now! */
 575                 //PRINT(KERN_INFO,
 576                 //      aic->id, "selfid packet 0x%x included", lsid);
 577
 578                 hpsb_selfid_received(host, lsid);
 579             }
 580
 581             //PRINT(KERN_INFO, aic->id, "selfid packet 0x%x rcvd", q[0]);
 582             hpsb_selfid_received(host, q[0]);
 583             q += 2;
 584             size -= 8;
 585             continue;
 586         };
 587     }
 588
 589     /* if we are root, our self-id packet is last */
 590     if (isroot && phyid != 0) {
 591         hpsb_selfid_received(host, lsid);
 592     }
 593
 594     hpsb_selfid_complete(host, phyid, isroot);
 595 }
 596
 597 static void aic_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 598 {
 599     struct aic5800 *aic = (struct aic5800 *)dev_id;
 600     struct hpsb_host *host = aic->host;
 601     quadlet_t *q = aic->rcv_page;
 602
 603     int phyid = -1, isroot = 0;
 604
 605     u32 interruptEvent = reg_read(aic, misc_InterruptEvents);
 606     reg_write(aic, misc_InterruptClear, interruptEvent);
 607
 608     //printk("InterruptEvent 0x%x\n", interruptEvent);
 609     if ( (interruptEvent & 0x3f) == 0x3f ) {
 610         PRINT(KERN_INFO, aic->id, "Dma Engine Error");
 611     };
 612
 613     if ( interruptEvent & INT_DmaAT ) {
 614         if (aic->AT_program[0].status & 0xFFFF)
 615             PRINT(KERN_INFO, aic->id, "AT: could not transfer %d bytes",
 616                   aic->AT_program[0].status & 0xFFFF);
 617     };
 618
 619     if ( interruptEvent & INT_PhyInt) {
 620         PRINT(KERN_INFO, aic->id, "PhyInt");
 621     };
 622
 623     if ( interruptEvent & INT_DmaAR ) {
 624         int rcv_bytes;
 625         int i;
 626
 627         /* we calculate the number of received bytes from the
 628            residual count field */
 629         rcv_bytes = AIC5800_ARFIFO_SIZE - (aic->AR_program->status & 0xFFFF);
 630
 631         //PRINT(KERN_INFO, aic->id, "AR_status 0x%x, %d bytes read", aic->AR_program->status, rcv_bytes);
 632
 633         if ((aic->AR_program->status & 0x84000000)
 634             && (aic->AR_program->status & 0xFFFF) >= 8 ) {
 635
 636 #ifndef __BIG_ENDIAN
 637             /* we have to do byte-swapping on non-bigendian architectures */
 638             for (i=0; i< (rcv_bytes / sizeof(quadlet_t)); i++) {
 639                 *q = be32_to_cpu(*q);
 640                 q++;
 641             };
 642             q = aic->rcv_page;
 643 #endif
 644
 645             if (*q == 0xe0) {
 646                 phyid = reg_read(aic, misc_NodeID);
 647                 isroot = phyid & 0x800000;
 648                 phyid = phyid & 0x3F;
 649                 handle_selfid(aic, host, phyid, isroot, rcv_bytes);
 650             } else {
 651                 hpsb_packet_received(host, aic->rcv_page, rcv_bytes, 0);
 652             };
 653         } else {
 654             PRINT(KERN_ERR, aic->id,
 655                   "AR DMA program status value 0x%x is incorrect!",
 656                   aic->AR_program->status);
 657         };
 658     }
 659     if ( interruptEvent & INT_BusReset ) {
 660         PRINT(KERN_INFO, aic->id, "bus reset occured");
 661         if (!host->in_bus_reset) {
 662             hpsb_bus_reset(host);
 663         }
 664         reg_set_bits(aic, misc_Control, 0x1);
 665         aic->NumBusResets++;
 666     };
 667
 668     if (interruptEvent & INT_RcvData ) {
 669         aic->RxPackets++;
 670     };
 671
 672     if (interruptEvent & INT_TxRdy) {
 673         /* async packet sent - transmitter ready */
 674         u32 ack;
 675         struct hpsb_packet *packet;
 676
 677         if (aic->async_queue) {
 678
 679             spin_lock(&aic->async_queue_lock);
 680
 681
 682             ack = reg_read(aic, AT_ChannelStatus) & 0xF;
 683
 684             packet = aic->async_queue;
 685             aic->async_queue = packet->xnext;
 686
 687             if (aic->async_queue != NULL) {
 688                 send_next_async(aic);
 689             }
 690             spin_unlock(&aic->async_queue_lock);
 691             PRINT(KERN_INFO,aic->id,"packet sent with ack code %d",ack);
 692             hpsb_packet_sent(host, packet, ack);
 693         } // else
 694             //PRINT(KERN_INFO,aic->id,"packet sent without async_queue (self-id?)");
 695
 696         aic->TxRdy++;
 697     };
 698     if (interruptEvent & INT_ATError ) {
 699         PRINT(KERN_INFO,aic->id,"ATError");
 700         aic->ATError++;
 701     };
 702     if (interruptEvent & INT_SendRej ) {
 703         aic->SendRej++;
 704     };
 705     if (interruptEvent & INT_HdrErr ) {
 706         aic->HdrErr++;
 707     };
 708     if (interruptEvent & INT_TCodeErr ) {
 709         PRINT(KERN_INFO,aic->id,"TCodeErr");
 710         aic->TCodeErr++;
 711     };
 712
 713     aic->NumInterrupts++;
 714
 715 }
 716
 717 inline static void * quadquadalign(void *buf)
 718 {
 719   if ((unsigned int) buf % 0x10 != 0) {
 720         return (void *)(((unsigned int)buf + 0x10) & 0xFFFFFFF0);
 721         } else {
 722         return buf;
 723   };
 724 }
 725
 726 static int add_card(struct pci_dev *dev)
 727 {
 728 #define FAIL(fmt, args...) do {\
 729         PRINT_G(KERN_ERR, fmt , ## args); \
 730         num_of_cards--; \
 731         remove_card(aic); \
 732         return 1; } while (0)
 733
 734         struct aic5800 *aic; /* shortcut to currently handled device */
 735         unsigned long page;
 736
 737         if (pci_enable_device(dev))
 738                 return 1;
 739
 740         if (num_of_cards == MAX_AIC5800_CARDS) {
 741                 PRINT_G(KERN_WARNING, "cannot handle more than %d cards.  "
 742                         "Adjust MAX_AIC5800_CARDS in aic5800.h.",
 743                         MAX_AIC5800_CARDS);
 744                 return 1;
 745         }
 746
 747         aic = &cards[num_of_cards++];
 748
 749         aic->id = num_of_cards-1;
 750         aic->dev = dev;
 751
 752         if (!request_irq(dev->irq, aic_irq_handler, SA_SHIRQ,
 753                          AIC5800_DRIVER_NAME, aic)) {
 754                 PRINT(KERN_INFO, aic->id, "allocated interrupt %d", dev->irq);
 755         } else {
 756                 FAIL("failed to allocate shared interrupt %d", dev->irq);
 757         }
 758
 759         page = get_free_page(GFP_KERNEL);
 760         if (page != 0) {
 761                 aic->rcv_page = phys_to_virt(page);
 762         } else {
 763                 FAIL("failed to allocate receive buffer");
 764         }
 765
 766 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,13)
 767         aic->registers = ioremap_nocache(dev->base_address[0],
 768                                           AIC5800_REGSPACE_SIZE);
 769 #else
 770         aic->registers = ioremap_nocache(dev->resource[0].start,
 771                                           AIC5800_REGSPACE_SIZE);
 772 #endif
 773
 774         if (aic->registers == NULL) {
 775                 FAIL("failed to remap registers - card not accessible");
 776         }
 777
 778         PRINT(KERN_INFO, aic->id, "remapped memory space reg 0x%p",
 779               aic->registers);
 780
 781         aic->pbuf = kmalloc(AIC5800_PBUF_SIZE, GFP_KERNEL);
 782
 783         if (!aic->pbuf) {
 784                 FAIL("failed to allocate program buffer");
 785         }
 786
 787         aic->AT_program = quadquadalign(aic->pbuf);
 788         aic->AT_program[2].control = DMA_CMD_STOP;
 789
 790         aic->AR_program = aic->AT_program + MAX_AT_PROGRAM_SIZE *
 791             sizeof(struct dma_cmd);
 792
 793         return 0;
 794 #undef FAIL
 795 }
 796
 797 static void remove_card(struct aic5800 *aic)
 798 {
 799     /* Disable interrupts of this controller */
 800     reg_write(aic, misc_InterruptMask, 0);
 801     /* Free AR buffer */
 802     free_page(virt_to_phys(aic->rcv_page));
 803     /* Free channel program buffer */
 804     kfree(aic->pbuf);
 805     /* Free interrupt request */
 806     free_irq(aic->dev->irq, aic);
 807     /* Unmap register space */
 808     iounmap(aic->registers);
 809 }
 810
 811 static int init_driver()
 812 {
 813         struct pci_dev *dev = NULL;
 814         int success = 0;
 815
 816         if (num_of_cards) {
 817                 PRINT_G(KERN_DEBUG, __PRETTY_FUNCTION__ " called again");
 818                 return 0;
 819         }
 820
 821         while ((dev = pci_find_device(PCI_VENDOR_ID_ADAPTEC,
 822                                       PCI_DEVICE_ID_ADAPTEC_5800, dev))
 823                != NULL) {
 824                 if (add_card(dev) == 0) {
 825                         success = 1;
 826                 }
 827         }
 828
 829         if (success == 0) {
 830                 PRINT_G(KERN_WARNING, "no operable AIC-5800 based cards found");
 831                 return -ENXIO;
 832         }
 833
 834         return 0;
 835 }
 836
 837 /** Prepare our local CSR ROM. This is done by using the software-stored
 838     ROM and inserting the GUID read from the EEPROM */
 839 static size_t get_aic_rom(struct hpsb_host *host, const quadlet_t **ptr)
 840 {
 841     struct aic5800 *aic = host -> hostdata;
 842     u64 guid;
 843
 844     /* Read the GUID from the card's EEPROM and put it into the right
 845        place in the CONFIG ROM. */
 846     guid = read_guid(aic);
 847     aic5800_csr_rom[15] = (u32) (guid >> 32);
 848     aic5800_csr_rom[16] = (u32) (guid & 0xFFFF);
 849
 850     *ptr = aic5800_csr_rom;
 851
 852     return sizeof(aic5800_csr_rom);
 853 }
 854
 855 struct hpsb_host_template *get_aic_template(void)
 856 {
 857         static struct hpsb_host_template tmpl;
 858         static int initialized = 0;
 859
 860         if (!initialized) {
 861                 /* Initialize by field names so that a template structure
 862                  * reorganization does not influence this code. */
 863                 tmpl.name = "aic5800";
 864
 865                 tmpl.detect_hosts = aic_detect;
 866                 tmpl.initialize_host = aic_initialize;
 867                 tmpl.release_host = aic_release;
 868                 tmpl.get_rom = get_aic_rom;
 869                 tmpl.transmit_packet = aic_transmit;
 870                 tmpl.devctl = aic_devctl;
 871
 872                 initialized = 1;
 873         }
 874
 875         return &tmpl;
 876 }
 877
 878 #ifdef MODULE
 879
 880 /* EXPORT_NO_SYMBOLS; */
 881
 882 MODULE_AUTHOR("Emanuel Pirker <epirker@edu.uni-klu.ac.at>");
 883 MODULE_DESCRIPTION("Adaptec AIC-5800 PCI-to-IEEE1394 controller driver");
 884 MODULE_SUPPORTED_DEVICE("aic5800");
 885
 886 void cleanup_module(void)
 887 {
 888         hpsb_unregister_lowlevel(get_aic_template());
 889         PRINT_G(KERN_INFO, "removed " AIC5800_DRIVER_NAME " module");
 890 }
 891
 892 int init_module(void)
 893 {
 894         if (hpsb_register_lowlevel(get_aic_template())) {
 895                 PRINT_G(KERN_ERR, "registering failed");
 896                 return -ENXIO;
 897         } else {
 898                 return 0;
 899         }
 900 }
 901
 902 #endif /* MODULE */