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[davej-history.git] / drivers / macintosh / via-pmu.c
blobb1bb32a28df05e0ab3c788b6688ad8c0f8de241e
1 /*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 */
13 #include <stdarg.h>
14 #include <linux/config.h>
15 #include <linux/types.h>
16 #include <linux/errno.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/sched.h>
20 #include <linux/miscdevice.h>
21 #include <linux/blkdev.h>
22 #include <linux/pci.h>
23 #include <linux/malloc.h>
24 #include <asm/prom.h>
25 #include <asm/adb.h>
26 #include <asm/pmu.h>
27 #include <asm/cuda.h>
28 #include <asm/io.h>
29 #include <asm/pgtable.h>
30 #include <asm/system.h>
31 #include <asm/init.h>
32 #include <asm/irq.h>
33 #include <asm/feature.h>
34
35 /* Misc minor number allocated for /dev/pmu */
36 #define PMU_MINOR 154
37
38 static volatile unsigned char *via;
39
40 /* VIA registers - spaced 0x200 bytes apart */
41 #define RS 0x200 /* skip between registers */
42 #define B 0 /* B-side data */
43 #define A RS /* A-side data */
44 #define DIRB (2*RS) /* B-side direction (1=output) */
45 #define DIRA (3*RS) /* A-side direction (1=output) */
46 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
47 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
48 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
49 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
50 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
51 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
52 #define SR (10*RS) /* Shift register */
53 #define ACR (11*RS) /* Auxiliary control register */
54 #define PCR (12*RS) /* Peripheral control register */
55 #define IFR (13*RS) /* Interrupt flag register */
56 #define IER (14*RS) /* Interrupt enable register */
57 #define ANH (15*RS) /* A-side data, no handshake */
58
59 /* Bits in B data register: both active low */
60 #define TACK 0x08 /* Transfer acknowledge (input) */
61 #define TREQ 0x10 /* Transfer request (output) */
62
63 /* Bits in ACR */
64 #define SR_CTRL 0x1c /* Shift register control bits */
65 #define SR_EXT 0x0c /* Shift on external clock */
66 #define SR_OUT 0x10 /* Shift out if 1 */
67
68 /* Bits in IFR and IER */
69 #define IER_SET 0x80 /* set bits in IER */
70 #define IER_CLR 0 /* clear bits in IER */
71 #define SR_INT 0x04 /* Shift register full/empty */
72 #define CB1_INT 0x10 /* transition on CB1 input */
73
74 static enum pmu_state {
75 idle,
76 sending,
77 intack,
78 reading,
79 reading_intr,
80 } pmu_state;
81
82 static struct adb_request *current_req;
83 static struct adb_request *last_req;
84 static struct adb_request *req_awaiting_reply;
85 static unsigned char interrupt_data[32];
86 static unsigned char *reply_ptr;
87 static int data_index;
88 static int data_len;
89 static int adb_int_pending;
90 static int pmu_adb_flags;
91 static int adb_dev_map = 0;
92 static struct adb_request bright_req_1, bright_req_2;
93 static struct device_node *vias;
94
95 int asleep;
96 struct notifier_block *sleep_notifier_list;
97
98 static int init_pmu(void);
99 static int pmu_queue_request(struct adb_request *req);
100 static void pmu_start(void);
101 static void via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs);
102 static int pmu_adb_send_request(struct adb_request *req, int sync);
103 static int pmu_adb_autopoll(int devs);
104 static int pmu_reset_bus(void);
105 static void send_byte(int x);
106 static void recv_byte(void);
107 static void pmu_sr_intr(struct pt_regs *regs);
108 static void pmu_done(struct adb_request *req);
109 static void pmu_handle_data(unsigned char *data, int len,
110 struct pt_regs *regs);
111 static void set_brightness(int level);
112 static void set_volume(int level);
113
114 /*
115 * This table indicates for each PMU opcode:
116 * - the number of data bytes to be sent with the command, or -1
117 * if a length byte should be sent,
118 * - the number of response bytes which the PMU will return, or
119 * -1 if it will send a length byte.
120 */
121 static s8 pmu_data_len[256][2] = {
122 /* 0 1 2 3 4 5 6 7 */
123 /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
124 /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
125 /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
126 /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
127 /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
128 /*28*/ { 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
129 /*30*/ { 4, 0},{20, 0},{ 2, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
130 /*38*/ { 0, 4},{ 0,20},{ 1, 1},{ 2, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
131 /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
132 /*48*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
133 /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
134 /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
135 /*60*/ { 2, 0},{-1, 0},{ 2, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
136 /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
137 /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
138 /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 4, 1},{ 4, 1},
139 /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
140 /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
141 /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
142 /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
143 /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
144 /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
145 /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
146 /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
147 /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
148 /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
149 /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
150 /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
151 /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
152 /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
153 /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
154 /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
155 };
156
157 __openfirmware
158
159 void
160 find_via_pmu()
161 {
162 vias = find_devices("via-pmu");
163 if (vias == 0)
164 return;
165 if (vias->next != 0)
166 printk(KERN_WARNING "Warning: only using 1st via-pmu\n");
167
168 feature_set(vias, FEATURE_VIA_enable);
169
170 #if 0
171 { int i;
172
173 printk("via_pmu_init: node = %p, addrs =", vias->node);
174 for (i = 0; i < vias->n_addrs; ++i)
175 printk(" %x(%x)", vias->addrs[i].address, vias->addrs[i].size);
176 printk(", intrs =");
177 for (i = 0; i < vias->n_intrs; ++i)
178 printk(" %x", vias->intrs[i].line);
179 printk("\n"); }
180 #endif
181
182 if (vias->n_addrs != 1 || vias->n_intrs != 1) {
183 printk(KERN_ERR "via-pmu: %d addresses, %d interrupts!\n",
184 vias->n_addrs, vias->n_intrs);
185 if (vias->n_addrs < 1 || vias->n_intrs < 1)
186 return;
187 }
188 via = (volatile unsigned char *) ioremap(vias->addrs->address, 0x2000);
189
190 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
191
192 pmu_state = idle;
193
194 if (!init_pmu())
195 via = NULL;
196
197 adb_hardware = ADB_VIAPMU;
198 }
199
200 void
201 via_pmu_init(void)
202 {
203 if (vias == NULL)
204 return;
205
206 bright_req_1.complete = 1;
207 bright_req_2.complete = 1;
208
209 if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
210 (void *)0)) {
211 printk(KERN_ERR "VIA-PMU: can't get irq %d\n",
212 vias->intrs[0].line);
213 return;
214 }
215
216 /* Enable interrupts */
217 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
218
219 /* Set function pointers */
220 adb_send_request = pmu_adb_send_request;
221 adb_autopoll = pmu_adb_autopoll;
222 adb_reset_bus = pmu_reset_bus;
223 }
224
225 static int
226 init_pmu()
227 {
228 int timeout;
229 struct adb_request req;
230
231 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
232 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
233
234 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0xff);
235 timeout = 100000;
236 while (!req.complete) {
237 if (--timeout < 0) {
238 printk(KERN_ERR "init_pmu: no response from PMU\n");
239 return 0;
240 }
241 udelay(10);
242 pmu_poll();
243 }
244
245 /* ack all pending interrupts */
246 timeout = 100000;
247 interrupt_data[0] = 1;
248 while (interrupt_data[0] || pmu_state != idle) {
249 if (--timeout < 0) {
250 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
251 return 0;
252 }
253 if (pmu_state == idle)
254 adb_int_pending = 1;
255 via_pmu_interrupt(0, 0, 0);
256 udelay(10);
257 }
258
259 return 1;
260 }
261
262 /* Send an ADB command */
263 static int
264 pmu_adb_send_request(struct adb_request *req, int sync)
265 {
266 int i;
267
268 for (i = req->nbytes - 1; i > 0; --i)
269 req->data[i+3] = req->data[i];
270 req->data[3] = req->nbytes - 1;
271 req->data[2] = pmu_adb_flags;
272 req->data[1] = req->data[0];
273 req->data[0] = PMU_ADB_CMD;
274 req->nbytes += 3;
275 req->reply_expected = 1;
276 req->reply_len = 0;
277 i = pmu_queue_request(req);
278 if (i)
279 return i;
280 if (sync) {
281 while (!req->complete)
282 pmu_poll();
283 }
284 return 0;
285 }
286
287 /* Enable/disable autopolling */
288 static int
289 pmu_adb_autopoll(int devs)
290 {
291 struct adb_request req;
292
293 if (devs) {
294 adb_dev_map = devs;
295 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
296 adb_dev_map >> 8, adb_dev_map);
297 pmu_adb_flags = 2;
298 } else {
299 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
300 pmu_adb_flags = 0;
301 }
302 while (!req.complete)
303 pmu_poll();
304 return 0;
305 }
306
307 /* Reset the ADB bus */
308 static int
309 pmu_reset_bus(void)
310 {
311 struct adb_request req;
312 long timeout;
313 int save_autopoll = adb_dev_map;
314
315 /* anyone got a better idea?? */
316 pmu_adb_autopoll(0);
317
318 req.nbytes = 5;
319 req.done = NULL;
320 req.data[0] = PMU_ADB_CMD;
321 req.data[1] = 0;
322 req.data[2] = 3;
323 req.data[3] = 0;
324 req.data[4] = 0;
325 req.reply_len = 0;
326 req.reply_expected = 1;
327 if (pmu_queue_request(&req) != 0)
328 {
329 printk(KERN_ERR "pmu_reset_bus: pmu_queue_request failed\n");
330 return 0;
331 }
332 while (!req.complete)
333 pmu_poll();
334 timeout = 100000;
335 while (!req.complete) {
336 if (--timeout < 0) {
337 printk(KERN_ERR "pmu_reset_bus (reset): no response from PMU\n");
338 return 0;
339 }
340 udelay(10);
341 pmu_poll();
342 }
343
344 if (save_autopoll != 0)
345 pmu_adb_autopoll(save_autopoll);
346
347 return 1;
348 }
349
350 /* Construct and send a pmu request */
351 int
352 pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
353 int nbytes, ...)
354 {
355 va_list list;
356 int i;
357
358 if (nbytes < 0 || nbytes > 32) {
359 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
360 req->complete = 1;
361 return -EINVAL;
362 }
363 req->nbytes = nbytes;
364 req->done = done;
365 va_start(list, nbytes);
366 for (i = 0; i < nbytes; ++i)
367 req->data[i] = va_arg(list, int);
368 va_end(list);
369 if (pmu_data_len[req->data[0]][1] != 0) {
370 req->reply[0] = ADB_RET_OK;
371 req->reply_len = 1;
372 } else
373 req->reply_len = 0;
374 req->reply_expected = 0;
375 return pmu_queue_request(req);
376 }
377
378 /*
379 * This procedure handles requests written to /dev/adb where the
380 * first byte is CUDA_PACKET or PMU_PACKET. For CUDA_PACKET, we
381 * emulate a few CUDA requests.
382 */
383 int
384 pmu_send_request(struct adb_request *req)
385 {
386 int i;
387
388 switch (req->data[0]) {
389 case PMU_PACKET:
390 for (i = 0; i < req->nbytes - 1; ++i)
391 req->data[i] = req->data[i+1];
392 --req->nbytes;
393 if (pmu_data_len[req->data[0]][1] != 0) {
394 req->reply[0] = ADB_RET_OK;
395 req->reply_len = 1;
396 } else
397 req->reply_len = 0;
398 return pmu_queue_request(req);
399 case CUDA_PACKET:
400 switch (req->data[1]) {
401 case CUDA_GET_TIME:
402 if (req->nbytes != 2)
403 break;
404 req->data[0] = PMU_READ_RTC;
405 req->nbytes = 1;
406 req->reply_len = 3;
407 req->reply[0] = CUDA_PACKET;
408 req->reply[1] = 0;
409 req->reply[2] = CUDA_GET_TIME;
410 return pmu_queue_request(req);
411 case CUDA_SET_TIME:
412 if (req->nbytes != 6)
413 break;
414 req->data[0] = PMU_SET_RTC;
415 req->nbytes = 5;
416 for (i = 1; i <= 4; ++i)
417 req->data[i] = req->data[i+1];
418 req->reply_len = 3;
419 req->reply[0] = CUDA_PACKET;
420 req->reply[1] = 0;
421 req->reply[2] = CUDA_SET_TIME;
422 return pmu_queue_request(req);
423 }
424 break;
425 }
426 return -EINVAL;
427 }
428
429 int
430 pmu_queue_request(struct adb_request *req)
431 {
432 unsigned long flags;
433 int nsend;
434
435 if (via == NULL) {
436 req->complete = 1;
437 return -ENXIO;
438 }
439 if (req->nbytes <= 0) {
440 req->complete = 1;
441 return 0;
442 }
443 nsend = pmu_data_len[req->data[0]][0];
444 if (nsend >= 0 && req->nbytes != nsend + 1) {
445 req->complete = 1;
446 return -EINVAL;
447 }
448
449 req->next = 0;
450 req->sent = 0;
451 req->complete = 0;
452 save_flags(flags); cli();
453
454 if (current_req != 0) {
455 last_req->next = req;
456 last_req = req;
457 } else {
458 current_req = req;
459 last_req = req;
460 if (pmu_state == idle)
461 pmu_start();
462 }
463
464 restore_flags(flags);
465 return 0;
466 }
467
468 static void
469 send_byte(int x)
470 {
471 out_8(&via[ACR], 0x1c);
472 out_8(&via[SR], x);
473 out_8(&via[B], via[B] & ~0x10); /* assert TREQ */
474 }
475
476 static void
477 recv_byte()
478 {
479 out_8(&via[ACR], 0x0c);
480 in_8(&via[SR]); /* resets SR */
481 out_8(&via[B], via[B] & ~0x10);
482 }
483
484 static void
485 pmu_start()
486 {
487 unsigned long flags;
488 struct adb_request *req;
489
490 /* assert pmu_state == idle */
491 /* get the packet to send */
492 save_flags(flags); cli();
493 req = current_req;
494 if (req == 0 || pmu_state != idle
495 || (req->reply_expected && req_awaiting_reply))
496 goto out;
497
498 pmu_state = sending;
499 data_index = 1;
500 data_len = pmu_data_len[req->data[0]][0];
501
502 /* set the shift register to shift out and send a byte */
503 send_byte(req->data[0]);
504
505 out:
506 restore_flags(flags);
507 }
508
509 void
510 pmu_poll()
511 {
512 int ie;
513
514 ie = _disable_interrupts();
515 if (via[IFR] & (SR_INT | CB1_INT))
516 via_pmu_interrupt(0, 0, 0);
517 _enable_interrupts(ie);
518 }
519
520 static void
521 via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
522 {
523 int intr;
524 int nloop = 0;
525
526 while ((intr = in_8(&via[IFR])) != 0) {
527 if (++nloop > 1000) {
528 printk(KERN_DEBUG "PMU: stuck in intr loop, "
529 "intr=%x pmu_state=%d\n", intr, pmu_state);
530 break;
531 }
532 if (intr & SR_INT)
533 pmu_sr_intr(regs);
534 else if (intr & CB1_INT) {
535 adb_int_pending = 1;
536 out_8(&via[IFR], CB1_INT);
537 } else
538 {
539 /* -- Disabled printk, will happen _really_ often on
540 PowerBooks ((CB2 interrupts) --
541 printk(KERN_DEBUG "PMU: spurrious interrupt intr=%x\n", intr); */
542 out_8(&via[IFR], intr);
543 }
544 }
545 if (pmu_state == idle) {
546 if (adb_int_pending) {
547 pmu_state = intack;
548 send_byte(PMU_INT_ACK);
549 adb_int_pending = 0;
550 } else if (current_req) {
551 pmu_start();
552 }
553 }
554 }
555
556 static void
557 pmu_sr_intr(struct pt_regs *regs)
558 {
559 struct adb_request *req;
560 int bite, timeout;
561
562 if (via[B] & TACK)
563 printk(KERN_DEBUG "PMU: sr_intr but ack still high! (%x)\n",
564 via[B]);
565
566 /* if reading grab the byte, and reset the interrupt */
567 if ((via[ACR] & SR_OUT) == 0)
568 bite = in_8(&via[SR]);
569 out_8(&via[IFR], SR_INT);
570
571 /* reset TREQ and wait for TACK to go high */
572 out_8(&via[B], via[B] | TREQ);
573 timeout = 3200;
574 while ((in_8(&via[B]) & TACK) == 0) {
575 if (--timeout < 0) {
576 printk(KERN_ERR "PMU not responding (!ack)\n");
577 return;
578 }
579 udelay(10);
580 }
581
582 switch (pmu_state) {
583 case sending:
584 req = current_req;
585 if (data_len < 0) {
586 data_len = req->nbytes - 1;
587 send_byte(data_len);
588 break;
589 }
590 if (data_index <= data_len) {
591 send_byte(req->data[data_index++]);
592 break;
593 }
594 req->sent = 1;
595 data_len = pmu_data_len[req->data[0]][1];
596 if (data_len == 0) {
597 pmu_state = idle;
598 current_req = req->next;
599 if (req->reply_expected)
600 req_awaiting_reply = req;
601 else
602 pmu_done(req);
603 } else {
604 pmu_state = reading;
605 data_index = 0;
606 reply_ptr = req->reply + req->reply_len;
607 recv_byte();
608 }
609 break;
610
611 case intack:
612 data_index = 0;
613 data_len = -1;
614 pmu_state = reading_intr;
615 reply_ptr = interrupt_data;
616 recv_byte();
617 break;
618
619 case reading:
620 case reading_intr:
621 if (data_len == -1) {
622 data_len = bite;
623 if (bite > 32)
624 printk(KERN_ERR "PMU: bad reply len %d\n",
625 bite);
626 } else {
627 reply_ptr[data_index++] = bite;
628 }
629 if (data_index < data_len) {
630 recv_byte();
631 break;
632 }
633
634 if (pmu_state == reading_intr) {
635 pmu_handle_data(interrupt_data, data_index, regs);
636 } else {
637 req = current_req;
638 current_req = req->next;
639 req->reply_len += data_index;
640 pmu_done(req);
641 }
642 pmu_state = idle;
643
644 break;
645
646 default:
647 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
648 pmu_state);
649 }
650 }
651
652 static void
653 pmu_done(struct adb_request *req)
654 {
655 req->complete = 1;
656 if (req->done)
657 (*req->done)(req);
658 }
659
660 /* Interrupt data could be the result data from an ADB cmd */
661 static void
662 pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
663 {
664 static int show_pmu_ints = 1;
665
666 asleep = 0;
667 if (len < 1) {
668 adb_int_pending = 0;
669 return;
670 }
671 if (data[0] & PMU_INT_ADB) {
672 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
673 struct adb_request *req = req_awaiting_reply;
674 if (req == 0) {
675 printk(KERN_ERR "PMU: extra ADB reply\n");
676 return;
677 }
678 req_awaiting_reply = 0;
679 if (len <= 2)
680 req->reply_len = 0;
681 else {
682 memcpy(req->reply, data + 1, len - 1);
683 req->reply_len = len - 1;
684 }
685 pmu_done(req);
686 } else {
687 adb_input(data+1, len-1, regs, 1);
688 }
689 } else {
690 if (data[0] == 0x08 && len == 3) {
691 /* sound/brightness buttons pressed */
692 set_brightness(data[1]);
693 set_volume(data[2]);
694 } else if (show_pmu_ints
695 && !(data[0] == PMU_INT_TICK && len == 1)) {
696 int i;
697 printk(KERN_DEBUG "pmu intr");
698 for (i = 0; i < len; ++i)
699 printk(" %.2x", data[i]);
700 printk("\n");
701 }
702 }
703 }
704
705 int backlight_bright = -1;
706 int backlight_enabled = 0;
707
708 #define LEVEL_TO_BRIGHT(lev) ((lev) < 8? 0x7f: 0x4a - ((lev) >> 2))
709
710 void
711 pmu_enable_backlight(int on)
712 {
713 struct adb_request req;
714
715 if (on) {
716 if (backlight_bright < 0) {
717 pmu_request(&req, NULL, 2, 0xd9, 0);
718 while (!req.complete)
719 pmu_poll();
720 backlight_bright = LEVEL_TO_BRIGHT(req.reply[1]);
721 }
722 pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
723 backlight_bright);
724 while (!req.complete)
725 pmu_poll();
726 }
727 pmu_request(&req, NULL, 2, PMU_BACKLIGHT_CTRL, on? 0x81: 1);
728 while (!req.complete)
729 pmu_poll();
730 backlight_enabled = on;
731 }
732
733 static void
734 set_brightness(int level)
735 {
736 backlight_bright = LEVEL_TO_BRIGHT(level);
737 if (!backlight_enabled)
738 return;
739 if (bright_req_1.complete)
740 pmu_request(&bright_req_1, NULL, 2, PMU_BACKLIGHT_BRIGHT,
741 backlight_bright);
742 if (bright_req_2.complete)
743 pmu_request(&bright_req_2, NULL, 2, PMU_BACKLIGHT_CTRL,
744 backlight_bright < 0x7f? 0x81: 1);
745 }
746
747 static void
748 set_volume(int level)
749 {
750 }
751
752 void
753 pmu_restart(void)
754 {
755 struct adb_request req;
756
757 _disable_interrupts();
758
759 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
760 PMU_INT_TICK );
761 while(!req.complete)
762 pmu_poll();
763
764 pmu_request(&req, NULL, 1, PMU_RESET);
765 while(!req.complete || (pmu_state != idle))
766 pmu_poll();
767 for (;;)
768 ;
769 }
770
771 void
772 pmu_shutdown(void)
773 {
774 struct adb_request req;
775
776 _disable_interrupts();
777
778 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
779 PMU_INT_TICK );
780 while(!req.complete)
781 pmu_poll();
782
783 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
784 'M', 'A', 'T', 'T');
785 while(!req.complete || (pmu_state != idle))
786 pmu_poll();
787 for (;;)
788 ;
789 }
790
791
792 #ifdef CONFIG_PMAC_PBOOK
793
794 /*
795 * This struct is used to store config register values for
796 * PCI devices which may get powered off when we sleep.
797 */
798 static struct pci_save {
799 u16 command;
800 u16 cache_lat;
801 u16 intr;
802 } *pbook_pci_saves;
803 static int n_pbook_pci_saves;
804
805 static inline void
806 pbook_pci_save(void)
807 {
808 int npci;
809 struct pci_dev *pd;
810 struct pci_save *ps;
811
812 npci = 0;
813 for (pd = pci_devices; pd != NULL; pd = pd->next)
814 ++npci;
815 n_pbook_pci_saves = npci;
816 if (npci == 0)
817 return;
818 ps = (struct pci_save *) kmalloc(npci * sizeof(*ps), GFP_KERNEL);
819 pbook_pci_saves = ps;
820 if (ps == NULL)
821 return;
822
823 for (pd = pci_devices; pd != NULL && npci != 0; pd = pd->next) {
824 pci_read_config_word(pd, PCI_COMMAND, &ps->command);
825 pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
826 pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
827 ++ps;
828 --npci;
829 }
830 }
831
832 static inline void
833 pbook_pci_restore(void)
834 {
835 u16 cmd;
836 struct pci_save *ps = pbook_pci_saves;
837 struct pci_dev *pd;
838 int j;
839
840 for (pd = pci_devices; pd != NULL; pd = pd->next, ++ps) {
841 if (ps->command == 0)
842 continue;
843 pci_read_config_word(pd, PCI_COMMAND, &cmd);
844 if ((ps->command & ~cmd) == 0)
845 continue;
846 switch (pd->hdr_type) {
847 case PCI_HEADER_TYPE_NORMAL:
848 for (j = 0; j < 6; ++j)
849 pci_write_config_dword(pd,
850 PCI_BASE_ADDRESS_0 + j*4,
851 pd->base_address[j]);
852 pci_write_config_dword(pd, PCI_ROM_ADDRESS,
853 pd->rom_address);
854 pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
855 ps->cache_lat);
856 pci_write_config_word(pd, PCI_INTERRUPT_LINE,
857 ps->intr);
858 pci_write_config_word(pd, PCI_COMMAND, ps->command);
859 break;
860 /* other header types not restored at present */
861 }
862 }
863 }
864
865 /*
866 * Put the powerbook to sleep.
867 */
868 #define IRQ_ENABLE ((unsigned int *)0xf3000024)
869 #define MEM_CTRL ((unsigned int *)0xf8000070)
870
871 int powerbook_sleep(void)
872 {
873 int ret, i, x;
874 static int save_backlight;
875 static unsigned int save_irqen;
876 unsigned long msr;
877 unsigned int hid0;
878 unsigned long p, wait;
879 struct adb_request sleep_req;
880
881 /* Notify device drivers */
882 ret = notifier_call_chain(&sleep_notifier_list, PBOOK_SLEEP, NULL);
883 if (ret & NOTIFY_STOP_MASK)
884 return -EBUSY;
885
886 /* Sync the disks. */
887 /* XXX It would be nice to have some way to ensure that
888 * nobody is dirtying any new buffers while we wait. */
889 fsync_dev(0);
890
891 /* Turn off the display backlight */
892 save_backlight = backlight_enabled;
893 if (save_backlight)
894 pmu_enable_backlight(0);
895
896 /* Give the disks a little time to actually finish writing */
897 for (wait = jiffies + (HZ/4); jiffies < wait; )
898 mb();
899
900 /* Disable all interrupts except pmu */
901 save_irqen = in_le32(IRQ_ENABLE);
902 for (i = 0; i < 32; ++i)
903 if (i != vias->intrs[0].line && (save_irqen & (1 << i)))
904 disable_irq(i);
905 asm volatile("mtdec %0" : : "r" (0x7fffffff));
906
907 /* Save the state of PCI config space for some slots */
908 pbook_pci_save();
909
910 /* Set the memory controller to keep the memory refreshed
911 while we're asleep */
912 for (i = 0x403f; i >= 0x4000; --i) {
913 out_be32(MEM_CTRL, i);
914 do {
915 x = (in_be32(MEM_CTRL) >> 16) & 0x3ff;
916 } while (x == 0);
917 if (x >= 0x100)
918 break;
919 }
920
921 /* Ask the PMU to put us to sleep */
922 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
923 while (!sleep_req.complete)
924 mb();
925 /* displacement-flush the L2 cache - necessary? */
926 for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
927 i = *(volatile int *)p;
928 asleep = 1;
929
930 /* Put the CPU into sleep mode */
931 asm volatile("mfspr %0,1008" : "=r" (hid0) :);
932 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
933 asm volatile("mtspr 1008,%0" : : "r" (hid0));
934 save_flags(msr);
935 msr |= MSR_POW | MSR_EE;
936 restore_flags(msr);
937 udelay(10);
938
939 /* OK, we're awake again, start restoring things */
940 out_be32(MEM_CTRL, 0x3f);
941 pbook_pci_restore();
942
943 /* wait for the PMU interrupt sequence to complete */
944 while (asleep)
945 mb();
946
947 /* reenable interrupts */
948 for (i = 0; i < 32; ++i)
949 if (i != vias->intrs[0].line && (save_irqen & (1 << i)))
950 enable_irq(i);
951
952 /* Notify drivers */
953 notifier_call_chain(&sleep_notifier_list, PBOOK_WAKE, NULL);
954
955 /* reenable ADB autopoll */
956 pmu_adb_autopoll(adb_dev_map);
957
958 /* Turn on the screen backlight, if it was on before */
959 if (save_backlight)
960 pmu_enable_backlight(1);
961
962 /* Wait for the hard disk to spin up */
963
964 return 0;
965 }
966
967 /*
968 * Support for /dev/pmu device
969 */
970 static int pmu_open(struct inode *inode, struct file *file)
971 {
972 return 0;
973 }
974
975 static ssize_t pmu_read(struct file *file, char *buf,
976 size_t count, loff_t *ppos)
977 {
978 return 0;
979 }
980
981 static ssize_t pmu_write(struct file *file, const char *buf,
982 size_t count, loff_t *ppos)
983 {
984 return 0;
985 }
986
987 static int pmu_ioctl(struct inode * inode, struct file *filp,
988 u_int cmd, u_long arg)
989 {
990 switch (cmd) {
991 case PMU_IOC_SLEEP:
992 return powerbook_sleep();
993 }
994 return -EINVAL;
995 }
996
997 static struct file_operations pmu_device_fops = {
998 NULL, /* no seek */
999 pmu_read,
1000 pmu_write,
1001 NULL, /* no readdir */
1002 NULL, /* no poll yet */
1003 pmu_ioctl,
1004 NULL, /* no mmap */
1005 pmu_open,
1006 NULL, /* flush */
1007 NULL /* no release */
1008 };
1009
1010 static struct miscdevice pmu_device = {
1011 PMU_MINOR, "pmu", &pmu_device_fops
1012 };
1013
1014 void pmu_device_init(void)
1015 {
1016 if (via)
1017 misc_register(&pmu_device);
1018 }
1019 #endif /* CONFIG_PMAC_PBOOK */
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