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The main notables are the network fixes (uninitialized skb->dev could and
[davej-history.git] / drivers / net / irda / smc-ircc.c
blob358ee18beb68ff4cec08bf227827ef4ea6597745
1 /*********************************************************************
2 *
3 * Filename: smc-ircc.c
4 * Version: 0.4
5 * Description: Driver for the SMC Infrared Communications Controller
6 * Status: Experimental.
7 * Author: Thomas Davis (tadavis@jps.net)
8 * Created at:
9 * Modified at: Tue Feb 22 10:05:06 2000
10 * Modified by: Dag Brattli <dag@brattli.net>
11 *
12 * Copyright (c) 1999-2000 Dag Brattli
13 * Copyright (c) 1998-1999 Thomas Davis,
14 * All Rights Reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 *
31 * SIO's: SMC FDC37N869, FDC37C669, FDC37N958
32 * Applicable Models : Fujitsu Lifebook 635t, Sony PCG-505TX
33 *
34 ********************************************************************/
35
36 #include <linux/module.h>
37 #include <linux/kernel.h>
38 #include <linux/types.h>
39 #include <linux/skbuff.h>
40 #include <linux/netdevice.h>
41 #include <linux/ioport.h>
42 #include <linux/delay.h>
43 #include <linux/malloc.h>
44 #include <linux/init.h>
45 #include <linux/rtnetlink.h>
46 #include <linux/serial_reg.h>
47
48 #include <asm/io.h>
49 #include <asm/dma.h>
50 #include <asm/byteorder.h>
51
52 #include <linux/pm.h>
53
54 #include <net/irda/wrapper.h>
55 #include <net/irda/irda.h>
56 #include <net/irda/irmod.h>
57 #include <net/irda/irlap_frame.h>
58 #include <net/irda/irda_device.h>
59
60 #include <net/irda/smc-ircc.h>
61 #include <net/irda/irport.h>
62
63 static char *driver_name = "smc-ircc";
64
65 #define CHIP_IO_EXTENT 8
66
67 static unsigned int io[] = { ~0, ~0 };
68 static unsigned int io2[] = { 0, 0 };
69
70 static struct ircc_cb *dev_self[] = { NULL, NULL};
71
72 /* Some prototypes */
73 static int ircc_open(int i, unsigned int iobase, unsigned int board_addr);
74 #ifdef MODULE
75 static int ircc_close(struct ircc_cb *self);
76 #endif /* MODULE */
77 static int ircc_probe(int iobase, int board_addr);
78 static int ircc_probe_58(smc_chip_t *chip, chipio_t *info);
79 static int ircc_probe_69(smc_chip_t *chip, chipio_t *info);
80 static int ircc_dma_receive(struct ircc_cb *self, int iobase);
81 static void ircc_dma_receive_complete(struct ircc_cb *self, int iobase);
82 static int ircc_hard_xmit(struct sk_buff *skb, struct net_device *dev);
83 static void ircc_dma_xmit(struct ircc_cb *self, int iobase, int bofs);
84 static void ircc_change_speed(void *priv, __u32 speed);
85 static void ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
86 #if 0 /* unused */
87 static int ircc_is_receiving(struct ircc_cb *self);
88 #endif /* unused */
89
90 static int ircc_net_open(struct net_device *dev);
91 static int ircc_net_close(struct net_device *dev);
92 static int ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
93
94 /* These are the currently known SMC chipsets */
95 static smc_chip_t chips[] =
96 {
97 { "FDC37C669", 0x55, 0x55, 0x0d, 0x04, ircc_probe_69 },
98 { "FDC37N769", 0x55, 0x55, 0x0d, 0x28, ircc_probe_69 },
99 { "FDC37N869", 0x55, 0x00, 0x0d, 0x29, ircc_probe_69 },
100 { "FDC37N958", 0x55, 0x55, 0x20, 0x09, ircc_probe_58 },
101 { NULL }
102 };
103
104 static int ircc_irq=255;
105 static int ircc_dma=255;
106
107 static inline void register_bank(int iobase, int bank)
108 {
109 outb(((inb(iobase+IRCC_MASTER) & 0xf0) | (bank & 0x07)),
110 iobase+IRCC_MASTER);
111 }
112
113 /*
114 * Function ircc_init ()
115 *
116 * Initialize chip. Just try to find out how many chips we are dealing with
117 * and where they are
118 */
119 int __init ircc_init(void)
120 {
121 static int smcreg[] = { 0x3f0, 0x370 };
122 smc_chip_t *chip;
123 chipio_t info;
124 int ret = -ENODEV;
125 int i;
126
127 IRDA_DEBUG(0, __FUNCTION__ "\n");
128
129 /* Probe for all the NSC chipsets we know about */
130 for (chip=chips; chip->name ; chip++,i++) {
131 for (i=0; i<2; i++) {
132 info.cfg_base = smcreg[i];
133
134 /*
135 * First we check if the user has supplied any
136 * parameters which we should use instead of probed
137 * values
138 */
139 if (io[i] < 2000) {
140 info.fir_base = io[i];
141 info.sir_base = io2[i];
142 } else if (chip->probe(chip, &info) < 0)
143 continue;
144 if (check_region(info.fir_base, CHIP_IO_EXTENT) < 0)
145 continue;
146 if (check_region(info.sir_base, CHIP_IO_EXTENT) < 0)
147 continue;
148 if (ircc_open(i, info.fir_base, info.sir_base) == 0)
149 ret = 0;
150 }
151 }
152 return ret;
153 }
154
155 /*
156 * Function ircc_cleanup ()
157 *
158 * Close all configured chips
159 *
160 */
161 #ifdef MODULE
162 static void ircc_cleanup(void)
163 {
164 int i;
165
166 IRDA_DEBUG(0, __FUNCTION__ "\n");
167
168 for (i=0; i < 2; i++) {
169 if (dev_self[i])
170 ircc_close(dev_self[i]);
171 }
172 }
173 #endif /* MODULE */
174
175 /*
176 * Function ircc_open (iobase, irq)
177 *
178 * Open driver instance
179 *
180 */
181 static int ircc_open(int i, unsigned int fir_base, unsigned int sir_base)
182 {
183 struct ircc_cb *self;
184 struct irport_cb *irport;
185 int config;
186 int ret;
187
188 IRDA_DEBUG(0, __FUNCTION__ "\n");
189
190 if ((config = ircc_probe(fir_base, sir_base)) == -1) {
191 IRDA_DEBUG(0, __FUNCTION__
192 "(), addr 0x%04x - no device found!\n", fir_base);
193 return -1;
194 }
195
196 /*
197 * Allocate new instance of the driver
198 */
199 self = kmalloc(sizeof(struct ircc_cb), GFP_KERNEL);
200 if (self == NULL) {
201 ERROR("%s, Can't allocate memory for control block!\n",
202 driver_name);
203 return -ENOMEM;
204 }
205 memset(self, 0, sizeof(struct ircc_cb));
206 spin_lock_init(&self->lock);
207
208 /* Need to store self somewhere */
209 dev_self[i] = self;
210
211 irport = irport_open(i, sir_base, config >> 4 & 0x0f);
212 if (!irport)
213 return -ENODEV;
214
215 /* Steal the network device from irport */
216 self->netdev = irport->netdev;
217 self->irport = irport;
218 irport->priv = self;
219
220 /* Initialize IO */
221 self->io.fir_base = fir_base;
222 self->io.sir_base = sir_base; /* Used by irport */
223 self->io.irq = config >> 4 & 0x0f;
224 if (ircc_irq < 255) {
225 MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n",
226 driver_name, self->io.irq, ircc_irq);
227 self->io.irq = ircc_irq;
228 }
229 self->io.fir_ext = CHIP_IO_EXTENT;
230 self->io.sir_ext = 8; /* Used by irport */
231 self->io.dma = config & 0x0f;
232 if (ircc_dma < 255) {
233 MESSAGE("%s, Overriding DMA - chip says %d, using %d\n",
234 driver_name, self->io.dma, ircc_dma);
235 self->io.dma = ircc_dma;
236 }
237
238 /* Lock the port that we need */
239 ret = check_region(self->io.fir_base, self->io.fir_ext);
240 if (ret < 0) {
241 IRDA_DEBUG(0, __FUNCTION__ ": can't get fir_base of 0x%03x\n",
242 self->io.fir_base);
243 kfree(self);
244 return -ENODEV;
245 }
246 request_region(self->io.fir_base, self->io.fir_ext, driver_name);
247
248 /* Initialize QoS for this device */
249 irda_init_max_qos_capabilies(&irport->qos);
250
251 /* The only value we must override it the baudrate */
252 irport->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
253 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
254
255 irport->qos.min_turn_time.bits = 0x07;
256 irport->qos.window_size.bits = 0x01;
257 irda_qos_bits_to_value(&irport->qos);
258
259 irport->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO;
260
261 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
262 self->rx_buff.truesize = 4000;
263 self->tx_buff.truesize = 4000;
264
265 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
266 GFP_KERNEL|GFP_DMA);
267 if (self->rx_buff.head == NULL)
268 return -ENOMEM;
269 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
270
271 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
272 GFP_KERNEL|GFP_DMA);
273 if (self->tx_buff.head == NULL) {
274 kfree(self->rx_buff.head);
275 return -ENOMEM;
276 }
277 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
278
279 self->rx_buff.in_frame = FALSE;
280 self->rx_buff.state = OUTSIDE_FRAME;
281 self->tx_buff.data = self->tx_buff.head;
282 self->rx_buff.data = self->rx_buff.head;
283
284 /* Override the speed change function, since we must control it now */
285 irport->change_speed = &ircc_change_speed;
286 irport->interrupt = &ircc_interrupt;
287 self->netdev->open = &ircc_net_open;
288 self->netdev->stop = &ircc_net_close;
289
290 irport_start(self->irport);
291
292 self->pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, ircc_pmproc);
293 if (self->pmdev)
294 self->pmdev->data = self;
295
296 return 0;
297 }
298
299 /*
300 * Function ircc_close (self)
301 *
302 * Close driver instance
303 *
304 */
305 #ifdef MODULE
306 static int ircc_close(struct ircc_cb *self)
307 {
308 int iobase;
309
310 IRDA_DEBUG(0, __FUNCTION__ "\n");
311
312 ASSERT(self != NULL, return -1;);
313
314 iobase = self->io.fir_base;
315
316 irport_close(self->irport);
317
318 /* Stop interrupts */
319 register_bank(iobase, 0);
320 outb(0, iobase+IRCC_IER);
321 outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER);
322 outb(0x00, iobase+IRCC_MASTER);
323 #if 0
324 /* Reset to SIR mode */
325 register_bank(iobase, 1);
326 outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase+IRCC_SCE_CFGA);
327 outb(IRCC_CFGB_IR, iobase+IRCC_SCE_CFGB);
328 #endif
329 /* Release the PORT that this driver is using */
330 IRDA_DEBUG(0, __FUNCTION__ "(), releasing 0x%03x\n",
331 self->io.fir_base);
332
333 release_region(self->io.fir_base, self->io.fir_ext);
334
335 if (self->tx_buff.head)
336 kfree(self->tx_buff.head);
337
338 if (self->rx_buff.head)
339 kfree(self->rx_buff.head);
340
341 kfree(self);
342
343 return 0;
344 }
345 #endif /* MODULE */
346
347 /*
348 * Function ircc_probe_69 (chip, info)
349 *
350 * Probes for the SMC FDC37C669 and FDC37N869
351 *
352 */
353 static int ircc_probe_69(smc_chip_t *chip, chipio_t *info)
354 {
355 int cfg_base = info->cfg_base;
356 __u8 devid, mode;
357 int ret = -ENODEV;
358 int fir_io;
359
360 IRDA_DEBUG(0, __FUNCTION__ "()\n");
361
362 /* Enter configuration */
363 outb(chip->entr1, cfg_base);
364 outb(chip->entr2, cfg_base);
365
366 outb(chip->cid_index, cfg_base);
367 devid = inb(cfg_base+1);
368 IRDA_DEBUG(0, __FUNCTION__ "(), devid=0x%02x\n",devid);
369
370 /* Check for expected device ID; are there others? */
371 if (devid == chip->cid_value) {
372 outb(0x0c, cfg_base);
373 mode = inb(cfg_base+1);
374 mode = (mode & 0x38) >> 3;
375
376 /* Value for IR port */
377 if (mode && mode < 4) {
378 /* SIR iobase */
379 outb(0x25, cfg_base);
380 info->sir_base = inb(cfg_base+1) << 2;
381
382 /* FIR iobase */
383 outb(0x2b, cfg_base);
384 fir_io = inb(cfg_base+1) << 3;
385 if (fir_io) {
386 ret = 0;
387 info->fir_base = fir_io;
388 }
389 }
390 }
391
392 /* Exit configuration */
393 outb(0xaa, cfg_base);
394
395 return ret;
396 }
397
398 /*
399 * Function ircc_probe_58 (chip, info)
400 *
401 * Probes for the SMC FDC37N958
402 *
403 */
404 static int ircc_probe_58(smc_chip_t *chip, chipio_t *info)
405 {
406 int cfg_base = info->cfg_base;
407 __u8 devid;
408 int ret = -ENODEV;
409 int fir_io;
410
411 IRDA_DEBUG(0, __FUNCTION__ "()\n");
412
413 /* Enter configuration */
414 outb(chip->entr1, cfg_base);
415 outb(chip->entr2, cfg_base);
416
417 outb(chip->cid_index, cfg_base);
418 devid = inb(cfg_base+1);
419 IRDA_DEBUG(0, __FUNCTION__ "(), devid=0x%02x\n",devid);
420
421 /* Check for expected device ID; are there others? */
422 if (devid == chip->cid_value) {
423 /* Select logical device (UART2) */
424 outb(0x07, cfg_base);
425 outb(0x05, cfg_base + 1);
426
427 /* SIR iobase */
428 outb(0x60, cfg_base);
429 info->sir_base = inb(cfg_base + 1) << 8;
430 outb(0x61, cfg_base);
431 info->sir_base |= inb(cfg_base + 1);
432
433 /* Read FIR base */
434 outb(0x62, cfg_base);
435 fir_io = inb(cfg_base + 1) << 8;
436 outb(0x63, cfg_base);
437 fir_io |= inb(cfg_base + 1);
438 outb(0x2b, cfg_base);
439 if (fir_io) {
440 ret = 0;
441 info->fir_base = fir_io;
442 }
443 }
444
445 /* Exit configuration */
446 outb(0xaa, cfg_base);
447
448 return ret;
449 }
450
451 /*
452 * Function ircc_probe (iobase, board_addr, irq, dma)
453 *
454 * Returns non-negative on success.
455 *
456 */
457 static int ircc_probe(int fir_base, int sir_base)
458 {
459 int low, high, chip, config, dma, irq;
460 int iobase = fir_base;
461 int version = 1;
462
463 IRDA_DEBUG(0, __FUNCTION__ "\n");
464
465 register_bank(iobase, 3);
466 high = inb(iobase+IRCC_ID_HIGH);
467 low = inb(iobase+IRCC_ID_LOW);
468 chip = inb(iobase+IRCC_CHIP_ID);
469 version = inb(iobase+IRCC_VERSION);
470 config = inb(iobase+IRCC_INTERFACE);
471 irq = config >> 4 & 0x0f;
472 dma = config & 0x0f;
473
474 if (high == 0x10 && low == 0xb8 && (chip == 0xf1 || chip == 0xf2)) {
475 MESSAGE("SMC IrDA Controller found; IrCC version %d.%d, "
476 "port 0x%03x, dma=%d, irq=%d\n",
477 chip & 0x0f, version, iobase, dma, irq);
478 } else
479 return -ENODEV;
480
481 /* Power on device */
482 outb(0x00, iobase+IRCC_MASTER);
483
484 return config;
485 }
486
487 /*
488 * Function ircc_change_speed (self, baud)
489 *
490 * Change the speed of the device
491 *
492 */
493 static void ircc_change_speed(void *priv, __u32 speed)
494 {
495 int iobase, ir_mode, ctrl, fast;
496 struct ircc_cb *self = (struct ircc_cb *) priv;
497 struct net_device *dev;
498
499 IRDA_DEBUG(0, __FUNCTION__ "\n");
500
501 ASSERT(self != NULL, return;);
502
503 dev = self->netdev;
504 iobase = self->io.fir_base;
505
506 /* Update accounting for new speed */
507 self->io.speed = speed;
508
509 outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER);
510 outb(0x00, iobase+IRCC_MASTER);
511
512 switch (speed) {
513 default:
514 IRDA_DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n",
515 speed);
516 /* FALLTHROUGH */
517 case 9600:
518 case 19200:
519 case 38400:
520 case 57600:
521 case 115200:
522 ir_mode = IRCC_CFGA_IRDA_SIR_A;
523 ctrl = 0;
524 fast = 0;
525 break;
526 case 576000:
527 ir_mode = IRCC_CFGA_IRDA_HDLC;
528 ctrl = IRCC_CRC;
529 fast = 0;
530 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
531 break;
532 case 1152000:
533 ir_mode = IRCC_CFGA_IRDA_HDLC;
534 ctrl = IRCC_1152 | IRCC_CRC;
535 fast = 0;
536 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
537 break;
538 case 4000000:
539 ir_mode = IRCC_CFGA_IRDA_4PPM;
540 ctrl = IRCC_CRC;
541 fast = IRCC_LCR_A_FAST;
542 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
543 break;
544 }
545
546 register_bank(iobase, 0);
547 outb(0, iobase+IRCC_IER);
548 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER);
549
550 /* Make special FIR init if necessary */
551 if (speed > 115200) {
552 irport_stop(self->irport);
553
554 /* Install FIR transmit handler */
555 dev->hard_start_xmit = &ircc_hard_xmit;
556
557 /*
558 * Don't know why we have to do this, but FIR interrupts
559 * stops working if we remove it.
560 */
561 /* outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR); */
562
563 /* Be ready for incomming frames */
564 ircc_dma_receive(self, iobase);
565 } else {
566 /* Install SIR transmit handler */
567 dev->hard_start_xmit = &irport_hard_xmit;
568 irport_start(self->irport);
569
570 IRDA_DEBUG(0, __FUNCTION__
571 "(), using irport to change speed to %d\n", speed);
572 irport_change_speed(self->irport, speed);
573 }
574
575 register_bank(iobase, 1);
576 outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode),
577 iobase+IRCC_SCE_CFGA);
578
579 #ifdef SMC_669 /* Uses pin 88/89 for Rx/Tx */
580 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM),
581 iobase+IRCC_SCE_CFGB);
582 #else
583 outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR),
584 iobase+IRCC_SCE_CFGB);
585 #endif
586 (void) inb(iobase+IRCC_FIFO_THRESHOLD);
587 outb(64, iobase+IRCC_FIFO_THRESHOLD);
588
589 register_bank(iobase, 4);
590 outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL);
591
592 register_bank(iobase, 0);
593 outb(fast, iobase+IRCC_LCR_A);
594
595 netif_start_queue(dev);
596 }
597
598 /*
599 * Function ircc_hard_xmit (skb, dev)
600 *
601 * Transmit the frame!
602 *
603 */
604 static int ircc_hard_xmit(struct sk_buff *skb, struct net_device *dev)
605 {
606 struct irport_cb *irport;
607 struct ircc_cb *self;
608 unsigned long flags;
609 __u32 speed;
610 int iobase;
611 int mtt;
612
613 irport = (struct irport_cb *) dev->priv;
614 self = (struct ircc_cb *) irport->priv;
615 ASSERT(self != NULL, return 0;);
616
617 iobase = self->io.fir_base;
618
619 netif_stop_queue(dev);
620
621 /* Check if we need to change the speed after this frame */
622 if ((speed = irda_get_speed(skb)) != self->io.speed) {
623 /* Check for empty frame */
624 if (!skb->len) {
625 ircc_change_speed(self, speed);
626 return 0;
627 } else
628 self->new_speed = speed;
629 }
630
631 spin_lock_irqsave(&self->lock, flags);
632
633 memcpy(self->tx_buff.head, skb->data, skb->len);
634
635 self->tx_buff.len = skb->len;
636 self->tx_buff.data = self->tx_buff.head;
637
638 mtt = irda_get_mtt(skb);
639 if (mtt) {
640 int bofs;
641
642 /*
643 * Compute how many BOFs (STA or PA's) we need to waste the
644 * min turn time given the speed of the link.
645 */
646 bofs = mtt * (self->io.speed / 1000) / 8000;
647 if (bofs > 4095)
648 bofs = 4095;
649
650 ircc_dma_xmit(self, iobase, bofs);
651 } else {
652 /* Transmit frame */
653 ircc_dma_xmit(self, iobase, 0);
654 }
655 spin_unlock_irqrestore(&self->lock, flags);
656 dev_kfree_skb(skb);
657
658 return 0;
659 }
660
661 /*
662 * Function ircc_dma_xmit (self, iobase)
663 *
664 * Transmit data using DMA
665 *
666 */
667 static void ircc_dma_xmit(struct ircc_cb *self, int iobase, int bofs)
668 {
669 __u8 ctrl;
670
671 IRDA_DEBUG(2, __FUNCTION__ "\n");
672 #if 0
673 /* Disable Rx */
674 register_bank(iobase, 0);
675 outb(0x00, iobase+IRCC_LCR_B);
676 #endif
677 register_bank(iobase, 1);
678 outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
679 iobase+IRCC_SCE_CFGB);
680
681 self->io.direction = IO_XMIT;
682
683 /* Set BOF additional count for generating the min turn time */
684 register_bank(iobase, 4);
685 outb(bofs & 0xff, iobase+IRCC_BOF_COUNT_LO);
686 ctrl = inb(iobase+IRCC_CONTROL) & 0xf0;
687 outb(ctrl | ((bofs >> 8) & 0x0f), iobase+IRCC_BOF_COUNT_HI);
688
689 /* Set max Tx frame size */
690 outb(self->tx_buff.len >> 8, iobase+IRCC_TX_SIZE_HI);
691 outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO);
692
693 /* Setup DMA controller (must be done after enabling chip DMA) */
694 setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
695 DMA_TX_MODE);
696
697 outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);
698 /* Enable burst mode chip Tx DMA */
699 register_bank(iobase, 1);
700 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
701 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB);
702
703 /* Enable interrupt */
704 outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER);
705 register_bank(iobase, 0);
706 outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER);
707
708 /* Enable transmit */
709 outb(IRCC_LCR_B_SCE_TRANSMIT|IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B);
710 }
711
712 /*
713 * Function ircc_dma_xmit_complete (self)
714 *
715 * The transfer of a frame in finished. This function will only be called
716 * by the interrupt handler
717 *
718 */
719 static void ircc_dma_xmit_complete(struct ircc_cb *self, int iobase)
720 {
721 IRDA_DEBUG(2, __FUNCTION__ "\n");
722 #if 0
723 /* Disable Tx */
724 register_bank(iobase, 0);
725 outb(0x00, iobase+IRCC_LCR_B);
726 #endif
727 register_bank(self->io.fir_base, 1);
728 outb(inb(self->io.fir_base+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
729 self->io.fir_base+IRCC_SCE_CFGB);
730
731 /* Check for underrrun! */
732 register_bank(iobase, 0);
733 if (inb(iobase+IRCC_LSR) & IRCC_LSR_UNDERRUN) {
734 self->irport->stats.tx_errors++;
735 self->irport->stats.tx_fifo_errors++;
736
737 /* Reset error condition */
738 register_bank(iobase, 0);
739 outb(IRCC_MASTER_ERROR_RESET, iobase+IRCC_MASTER);
740 outb(0x00, iobase+IRCC_MASTER);
741 } else {
742 self->irport->stats.tx_packets++;
743 self->irport->stats.tx_bytes += self->tx_buff.len;
744 }
745
746 /* Check if it's time to change the speed */
747 if (self->new_speed) {
748 ircc_change_speed(self, self->new_speed);
749 self->new_speed = 0;
750 }
751
752 netif_wake_queue(self->netdev);
753 }
754
755 /*
756 * Function ircc_dma_receive (self)
757 *
758 * Get ready for receiving a frame. The device will initiate a DMA
759 * if it starts to receive a frame.
760 *
761 */
762 static int ircc_dma_receive(struct ircc_cb *self, int iobase)
763 {
764 /* Turn off chip DMA */
765 //register_bank(iobase, 1);
766 //outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE,
767 // iobase+IRCC_SCE_CFGB);
768
769 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
770 DMA_RX_MODE);
771
772 /* Set max Rx frame size */
773 register_bank(iobase, 4);
774 outb((2050 >> 8) & 0x0f, iobase+IRCC_RX_SIZE_HI);
775 outb(2050 & 0xff, iobase+IRCC_RX_SIZE_LO);
776
777 self->io.direction = IO_RECV;
778 self->rx_buff.data = self->rx_buff.head;
779
780 /* Setup DMA controller */
781
782 /* Enable receiver */
783 register_bank(iobase, 0);
784 outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE,
785 iobase+IRCC_LCR_B);
786
787 /* Enable burst mode chip Rx DMA */
788 register_bank(iobase, 1);
789 outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE |
790 IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB);
791
792 return 0;
793 }
794
795 /*
796 * Function ircc_dma_receive_complete (self)
797 *
798 * Finished with receiving frames
799 *
800 */
801 static void ircc_dma_receive_complete(struct ircc_cb *self, int iobase)
802 {
803 struct sk_buff *skb;
804 int len, msgcnt;
805
806 IRDA_DEBUG(2, __FUNCTION__ "\n");
807 #if 0
808 /* Disable Rx */
809 register_bank(iobase, 0);
810 outb(0x00, iobase+IRCC_LCR_B);
811 #endif
812 register_bank(iobase, 0);
813 msgcnt = inb(iobase+IRCC_LCR_B) & 0x08;
814
815 IRDA_DEBUG(2, __FUNCTION__ ": dma count = %d\n",
816 get_dma_residue(self->io.dma));
817
818 len = self->rx_buff.truesize - get_dma_residue(self->io.dma);
819
820 /* Remove CRC */
821 if (self->io.speed < 4000000)
822 len -= 2;
823 else
824 len -= 4;
825
826 if ((len < 2) || (len > 2050)) {
827 WARNING(__FUNCTION__ "(), bogus len=%d\n", len);
828 return;
829 }
830 IRDA_DEBUG(2, __FUNCTION__ ": msgcnt = %d, len=%d\n", msgcnt, len);
831
832 skb = dev_alloc_skb(len+1);
833 if (!skb) {
834 WARNING(__FUNCTION__ "(), memory squeeze, dropping frame.\n");
835 return;
836 }
837 /* Make sure IP header gets aligned */
838 skb_reserve(skb, 1);
839
840 memcpy(skb_put(skb, len), self->rx_buff.data, len);
841 self->irport->stats.rx_packets++;
842 self->irport->stats.rx_bytes += len;
843
844 skb->dev = self->netdev;
845 skb->mac.raw = skb->data;
846 skb->protocol = htons(ETH_P_IRDA);
847 netif_rx(skb);
848 }
849
850 /*
851 * Function ircc_interrupt (irq, dev_id, regs)
852 *
853 * An interrupt from the chip has arrived. Time to do some work
854 *
855 */
856 static void ircc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
857 {
858 struct net_device *dev = (struct net_device *) dev_id;
859 struct irport_cb *irport;
860 struct ircc_cb *self;
861 int iobase, iir;
862
863 if (dev == NULL) {
864 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
865 driver_name, irq);
866 return;
867 }
868 irport = (struct irport_cb *) dev->priv;
869 ASSERT(irport != NULL, return;);
870 self = (struct ircc_cb *) irport->priv;
871 ASSERT(self != NULL, return;);
872
873 /* Check if we should use the SIR interrupt handler */
874 if (self->io.speed < 576000) {
875 irport_interrupt(irq, dev_id, regs);
876 return;
877 }
878 iobase = self->io.fir_base;
879
880 spin_lock(&self->lock);
881
882 register_bank(iobase, 0);
883 iir = inb(iobase+IRCC_IIR);
884
885 /* Disable interrupts */
886 outb(0, iobase+IRCC_IER);
887
888 IRDA_DEBUG(2, __FUNCTION__ "(), iir = 0x%02x\n", iir);
889
890 if (iir & IRCC_IIR_EOM) {
891 if (self->io.direction == IO_RECV)
892 ircc_dma_receive_complete(self, iobase);
893 else
894 ircc_dma_xmit_complete(self, iobase);
895
896 ircc_dma_receive(self, iobase);
897 }
898
899 /* Enable interrupts again */
900 register_bank(iobase, 0);
901 outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, iobase+IRCC_IER);
902
903 spin_unlock(&self->lock);
904 }
905
906 #if 0 /* unused */
907 /*
908 * Function ircc_is_receiving (self)
909 *
910 * Return TRUE is we are currently receiving a frame
911 *
912 */
913 static int ircc_is_receiving(struct ircc_cb *self)
914 {
915 int status = FALSE;
916 /* int iobase; */
917
918 IRDA_DEBUG(0, __FUNCTION__ "\n");
919
920 ASSERT(self != NULL, return FALSE;);
921
922 IRDA_DEBUG(0, __FUNCTION__ ": dma count = %d\n",
923 get_dma_residue(self->io.dma));
924
925 status = (self->rx_buff.state != OUTSIDE_FRAME);
926
927 return status;
928 }
929 #endif /* unused */
930
931 /*
932 * Function ircc_net_open (dev)
933 *
934 * Start the device
935 *
936 */
937 static int ircc_net_open(struct net_device *dev)
938 {
939 struct irport_cb *irport;
940 struct ircc_cb *self;
941 int iobase;
942
943 IRDA_DEBUG(0, __FUNCTION__ "\n");
944
945 ASSERT(dev != NULL, return -1;);
946 irport = (struct irport_cb *) dev->priv;
947 self = (struct ircc_cb *) irport->priv;
948
949 ASSERT(self != NULL, return 0;);
950
951 iobase = self->io.fir_base;
952
953 irport_net_open(dev); /* irport allocates the irq */
954
955 /*
956 * Always allocate the DMA channel after the IRQ,
957 * and clean up on failure.
958 */
959 if (request_dma(self->io.dma, dev->name)) {
960 irport_net_close(dev);
961
962 return -EAGAIN;
963 }
964
965 MOD_INC_USE_COUNT;
966
967 return 0;
968 }
969
970 /*
971 * Function ircc_net_close (dev)
972 *
973 * Stop the device
974 *
975 */
976 static int ircc_net_close(struct net_device *dev)
977 {
978 struct irport_cb *irport;
979 struct ircc_cb *self;
980 int iobase;
981
982 IRDA_DEBUG(0, __FUNCTION__ "\n");
983
984 ASSERT(dev != NULL, return -1;);
985 irport = (struct irport_cb *) dev->priv;
986 self = (struct ircc_cb *) irport->priv;
987
988 ASSERT(self != NULL, return 0;);
989
990 iobase = self->io.fir_base;
991
992 irport_net_close(dev);
993
994 disable_dma(self->io.dma);
995
996 free_dma(self->io.dma);
997
998 MOD_DEC_USE_COUNT;
999
1000 return 0;
1001 }
1002
1003 static void ircc_suspend(struct ircc_cb *self)
1004 {
1005 MESSAGE("%s, Suspending\n", driver_name);
1006
1007 if (self->io.suspended)
1008 return;
1009
1010 ircc_net_close(self->netdev);
1011
1012 self->io.suspended = 1;
1013 }
1014
1015 static void ircc_wakeup(struct ircc_cb *self)
1016 {
1017 unsigned long flags;
1018
1019 if (!self->io.suspended)
1020 return;
1021
1022 save_flags(flags);
1023 cli();
1024
1025 ircc_net_open(self->netdev);
1026
1027 restore_flags(flags);
1028 MESSAGE("%s, Waking up\n", driver_name);
1029 }
1030
1031 static int ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
1032 {
1033 struct ircc_cb *self = (struct ircc_cb*) dev->data;
1034 if (self) {
1035 switch (rqst) {
1036 case PM_SUSPEND:
1037 ircc_suspend(self);
1038 break;
1039 case PM_RESUME:
1040 ircc_wakeup(self);
1041 break;
1042 }
1043 }
1044 return 0;
1045 }
1046
1047 #ifdef MODULE
1048 MODULE_AUTHOR("Thomas Davis <tadavis@jps.net>");
1049 MODULE_DESCRIPTION("SMC IrCC controller driver");
1050 MODULE_PARM(ircc_dma, "1i");
1051 MODULE_PARM_DESC(ircc_dma, "DMA channel");
1052 MODULE_PARM(ircc_irq, "1i");
1053 MODULE_PARM_DESC(ircc_irq, "IRQ line");
1054
1055 int init_module(void)
1056 {
1057 return ircc_init();
1058 }
1059
1060 void cleanup_module(void)
1061 {
1062 ircc_cleanup();
1063 }
1064
1065 #endif /* MODULE */
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