arch/ppc/kernel/prep_setup.c

   1 /*
   2  *  linux/arch/ppc/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  */
   8
   9 /*
  10  * bootup setup stuff..
  11  */
  12
  13 #include <linux/config.h>
  14 #include <linux/module.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/mm.h>
  19 #include <linux/stddef.h>
  20 #include <linux/unistd.h>
  21 #include <linux/ptrace.h>
  22 #include <linux/malloc.h>
  23 #include <linux/user.h>
  24 #include <linux/a.out.h>
  25 #include <linux/tty.h>
  26 #include <linux/major.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/reboot.h>
  29 #include <linux/init.h>
  30 #include <linux/blk.h>
  31 #include <linux/ioport.h>
  32 #include <linux/console.h>
  33 #include <linux/timex.h>
  34 #include <linux/pci.h>
  35 #include <linux/openpic.h>
  36 #include <linux/ide.h>
  37
  38 #include <asm/init.h>
  39 #include <asm/mmu.h>
  40 #include <asm/processor.h>
  41 #include <asm/residual.h>
  42 #include <asm/io.h>
  43 #include <asm/pgtable.h>
  44 #include <asm/cache.h>
  45 #include <asm/dma.h>
  46 #include <asm/machdep.h>
  47 #include <asm/mk48t59.h>
  48 #include <asm/prep_nvram.h>
  49 #include <asm/raven.h>
  50 #include <asm/keyboard.h>
  51
  52 #include <asm/time.h>
  53 #include "local_irq.h"
  54 #include "i8259.h"
  55 #include "open_pic.h"
  56
  57 #if defined(CONFIG_SOUND) || defined(CONFIG_SOUND_MODULE)
  58 #include <../drivers/sound/sound_config.h>
  59 #include <../drivers/sound/dev_table.h>
  60 #endif
  61
  62 unsigned char ucSystemType;
  63 unsigned char ucBoardRev;
  64 unsigned char ucBoardRevMaj, ucBoardRevMin;
  65
  66 extern unsigned long mc146818_get_rtc_time(void);
  67 extern int mc146818_set_rtc_time(unsigned long nowtime);
  68 extern unsigned long mk48t59_get_rtc_time(void);
  69 extern int mk48t59_set_rtc_time(unsigned long nowtime);
  70
  71 extern unsigned char prep_nvram_read_val(int addr);
  72 extern void prep_nvram_write_val(int addr,
  73                                  unsigned char val);
  74 extern unsigned char rs_nvram_read_val(int addr);
  75 extern void rs_nvram_write_val(int addr,
  76                                  unsigned char val);
  77
  78 extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
  79 extern int pckbd_getkeycode(unsigned int scancode);
  80 extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
  81                            char raw_mode);
  82 extern char pckbd_unexpected_up(unsigned char keycode);
  83 extern void pckbd_leds(unsigned char leds);
  84 extern void pckbd_init_hw(void);
  85 extern unsigned char pckbd_sysrq_xlate[128];
  86
  87 extern void prep_setup_pci_ptrs(void);
  88 extern char saved_command_line[256];
  89
  90 int _prep_type;
  91
  92 #define cached_21       (((char *)(ppc_cached_irq_mask))[3])
  93 #define cached_A1       (((char *)(ppc_cached_irq_mask))[2])
  94
  95 /* for the mac fs */
  96 kdev_t boot_dev;
  97 /* used in nasty hack for sound - see prep_setup_arch() -- Cort */
  98 long ppc_cs4232_dma, ppc_cs4232_dma2;
  99 unsigned long empty_zero_page[1024];
 100
 101 extern PTE *Hash, *Hash_end;
 102 extern unsigned long Hash_size, Hash_mask;
 103 extern int probingmem;
 104 extern unsigned long loops_per_sec;
 105
 106 #ifdef CONFIG_BLK_DEV_RAM
 107 extern int rd_doload;           /* 1 = load ramdisk, 0 = don't load */
 108 extern int rd_prompt;           /* 1 = prompt for ramdisk, 0 = don't prompt */
 109 extern int rd_image_start;      /* starting block # of image */
 110 #endif
 111 #ifdef CONFIG_VGA_CONSOLE
 112 unsigned long vgacon_remap_base;
 113 #endif
 114
 115 int __prep
 116 prep_get_cpuinfo(char *buffer)
 117 {
 118         extern char *Motherboard_map_name;
 119         int len, i;
 120
 121 #ifdef CONFIG_SMP
 122 #define CD(X)           (cpu_data[n].X)
 123 #else
 124 #define CD(X) (X)
 125 #endif
 126
 127         len = sprintf(buffer,"machine\t\t: PReP %s\n",Motherboard_map_name);
 128
 129
 130         switch ( _prep_type )
 131         {
 132         case _PREP_IBM:
 133                 if ((*(unsigned char *)0x8000080c) & (1<<6))
 134                         len += sprintf(buffer+len,"Upgrade CPU\n");
 135                 len += sprintf(buffer+len,"L2\t\t: ");
 136                 if ((*(unsigned char *)0x8000080c) & (1<<7))
 137                 {
 138                         len += sprintf(buffer+len,"not present\n");
 139                         goto no_l2;
 140                 }
 141                 len += sprintf(buffer+len,"%sKb,",
 142                                (((*(unsigned char *)0x8000080d)>>2)&1)?"512":"256");
 143                 len += sprintf(buffer+len,"%sync\n",
 144                                ((*(unsigned char *)0x8000080d)>>7) ? "":"a");
 145                 break;
 146         case _PREP_Motorola:
 147                 len += sprintf(buffer+len,"L2\t\t: ");
 148                 switch(*((unsigned char *)CACHECRBA) & L2CACHE_MASK)
 149                 {
 150                 case L2CACHE_512KB:
 151                         len += sprintf(buffer+len,"512Kb");
 152                         break;
 153                 case L2CACHE_256KB:
 154                         len += sprintf(buffer+len,"256Kb");
 155                         break;
 156                 case L2CACHE_1MB:
 157                         len += sprintf(buffer+len,"1MB");
 158                         break;
 159                 case L2CACHE_NONE:
 160                         len += sprintf(buffer+len,"none\n");
 161                         goto no_l2;
 162                         break;
 163                 default:
 164                         len += sprintf(buffer+len, "%x\n",
 165                                        *((unsigned char *)CACHECRBA));
 166                 }
 167
 168                 len += sprintf(buffer+len,",parity %s",
 169                                (*((unsigned char *)CACHECRBA) & L2CACHE_PARITY) ?
 170                                "enabled" : "disabled");
 171
 172                 len += sprintf(buffer+len, " SRAM:");
 173
 174                 switch ( ((*((unsigned char *)CACHECRBA) & 0xf0) >> 4) & ~(0x3) )
 175                 {
 176                 case 1: len += sprintf(buffer+len,
 177                                        "synchronous,parity,flow-through\n");
 178                         break;
 179                 case 2: len += sprintf(buffer+len,"asynchronous,no parity\n");
 180                         break;
 181                 case 3: len += sprintf(buffer+len,"asynchronous,parity\n");
 182                         break;
 183                 default:len += sprintf(buffer+len,
 184                                        "synchronous,pipelined,no parity\n");
 185                         break;
 186                 }
 187                 break;
 188         default:
 189                 break;
 190         }
 191
 192
 193 no_l2:
 194         if ( res->ResidualLength == 0 )
 195                 return len;
 196
 197         /* print info about SIMMs */
 198         len += sprintf(buffer+len,"simms\t\t: ");
 199         for ( i = 0 ; (res->ActualNumMemories) && (i < MAX_MEMS) ; i++ )
 200         {
 201                 if ( res->Memories[i].SIMMSize != 0 )
 202                         len += sprintf(buffer+len,"%d:%ldM ",i,
 203                                        (res->Memories[i].SIMMSize > 1024) ?
 204                                        res->Memories[i].SIMMSize>>20 :
 205                                        res->Memories[i].SIMMSize);
 206         }
 207         len += sprintf(buffer+len,"\n");
 208
 209         return len;
 210 }
 211
 212 void __init
 213 prep_setup_arch(void)
 214 {
 215         extern char cmd_line[];
 216         unsigned char reg;
 217         unsigned char ucMothMemType;
 218         unsigned char ucEquipPres1;
 219
 220         /* init to some ~sane value until calibrate_delay() runs */
 221         loops_per_sec = 50000000;
 222
 223         /* Set up floppy in PS/2 mode */
 224         outb(0x09, SIO_CONFIG_RA);
 225         reg = inb(SIO_CONFIG_RD);
 226         reg = (reg & 0x3F) | 0x40;
 227         outb(reg, SIO_CONFIG_RD);
 228         outb(reg, SIO_CONFIG_RD);       /* Have to write twice to change! */
 229
 230         /*
 231          * We need to set up the NvRAM access routines early as prep_init
 232          * has yet to be called
 233          */
 234         ppc_md.nvram_read_val = prep_nvram_read_val;
 235         ppc_md.nvram_write_val = prep_nvram_write_val;
 236
 237         /* we should determine this according to what we find! -- Cort */
 238         switch ( _prep_type )
 239         {
 240         case _PREP_IBM:
 241                 /* Enable L2.  Assume we don't need to flush -- Cort*/
 242                 *(unsigned char *)(0x8000081c) |= 3;
 243                 ROOT_DEV = to_kdev_t(0x0301); /* hda1 */
 244                 break;
 245         case _PREP_Motorola:
 246                 /* Enable L2.  Assume we don't need to flush -- Cort*/
 247                 *(unsigned char *)(0x8000081c) |= 3;
 248                 ROOT_DEV = to_kdev_t(0x0802); /* sda2 */
 249                 break;
 250         case _PREP_Radstone:
 251                 ROOT_DEV = to_kdev_t(0x0801); /* sda1 */
 252
 253                 /*
 254                  * Determine system type
 255                  */
 256                 ucMothMemType=inb(0x866);
 257                 ucEquipPres1=inb(0x80c);
 258
 259                 ucSystemType=((ucMothMemType&0x03)<<1) |
 260                              ((ucEquipPres1&0x80)>>7);
 261                 ucSystemType^=7;
 262
 263                 /*
 264                  * Determine board revision for use by
 265                  * rev. specific code
 266                  */
 267                 ucBoardRev=inb(0x854);
 268                 ucBoardRevMaj=ucBoardRev>>5;
 269                 ucBoardRevMin=ucBoardRev&0x1f;
 270
 271                 /*
 272                  * Most Radstone boards have memory mapped NvRAM
 273                  */
 274                 if((ucSystemType==RS_SYS_TYPE_PPC1) && (ucBoardRevMaj<5))
 275                 {
 276                         ppc_md.nvram_read_val = prep_nvram_read_val;
 277                         ppc_md.nvram_write_val = prep_nvram_write_val;
 278                 }
 279                 else
 280                 {
 281                         ppc_md.nvram_read_val = rs_nvram_read_val;
 282                         ppc_md.nvram_write_val = rs_nvram_write_val;
 283                 }
 284                 break;
 285         }
 286
 287       /* Read in NVRAM data */
 288       init_prep_nvram();
 289
 290       /* if no bootargs, look in NVRAM */
 291       if ( cmd_line[0] == '\0' ) {
 292               char *bootargs;
 293               bootargs = prep_nvram_get_var("bootargs");
 294               if (bootargs != NULL) {
 295                       strcpy(cmd_line, bootargs);
 296
 297                       /* again.. */
 298                       strcpy(saved_command_line, cmd_line);
 299               }
 300       }
 301
 302         printk("Boot arguments: %s\n", cmd_line);
 303
 304 #ifdef CONFIG_SOUND_CS4232
 305         /*
 306          * setup proper values for the cs4232 driver so we don't have
 307          * to recompile for the motorola or ibm workstations sound systems.
 308          * This is a really nasty hack, but unless we change the driver
 309          * it's the only way to support both addrs from one binary.
 310          * -- Cort
 311          */
 312         if ( _machine == _MACH_prep )
 313         {
 314                 extern struct card_info snd_installed_cards[];
 315                 struct card_info  *snd_ptr;
 316
 317                 for ( snd_ptr = snd_installed_cards;
 318                       snd_ptr < &snd_installed_cards[num_sound_cards];
 319                       snd_ptr++ )
 320                 {
 321                         if ( snd_ptr->card_type == SNDCARD_CS4232 )
 322                         {
 323                                 if ( _prep_type == _PREP_Motorola )
 324                                 {
 325                                         snd_ptr->config.io_base = 0x830;
 326                                         snd_ptr->config.irq = 10;
 327                                         snd_ptr->config.dma = ppc_cs4232_dma = 6;
 328                                         snd_ptr->config.dma2 = ppc_cs4232_dma2 = 7;
 329                                 }
 330                                 if ( _prep_type == _PREP_IBM )
 331                                 {
 332                                         snd_ptr->config.io_base = 0x530;
 333                                         snd_ptr->config.irq =  5;
 334                                         snd_ptr->config.dma = ppc_cs4232_dma = 1;
 335                                         /* this is wrong - but leave it for now */
 336                                         snd_ptr->config.dma2 = ppc_cs4232_dma2 = 7;
 337                                 }
 338                         }
 339                 }
 340         }
 341 #endif /* CONFIG_SOUND_CS4232 */
 342
 343         /*print_residual_device_info();*/
 344         request_region(0x20,0x20,"pic1");
 345         request_region(0xa0,0x20,"pic2");
 346         request_region(0x00,0x20,"dma1");
 347         request_region(0x40,0x20,"timer");
 348         request_region(0x80,0x10,"dma page reg");
 349         request_region(0xc0,0x20,"dma2");
 350
 351         raven_init();
 352
 353 #ifdef CONFIG_VGA_CONSOLE
 354         /* remap the VGA memory */
 355         vgacon_remap_base = 0xf0000000;
 356         /*vgacon_remap_base = ioremap(0xc0000000, 0xba000);*/
 357         conswitchp = &vga_con;
 358 #endif
 359 }
 360
 361 /*
 362  * Determine the decrementer frequency from the residual data
 363  * This allows for a faster boot as we do not need to calibrate the
 364  * decrementer against another clock. This is important for embedded systems.
 365  */
 366 void __init prep_res_calibrate_decr(void)
 367 {
 368         unsigned long freq, divisor=4;
 369
 370         freq = res->VitalProductData.ProcessorBusHz;
 371         printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
 372                (freq/divisor)/1000000, (freq/divisor)%1000000);
 373         tb_ticks_per_jiffy = freq / HZ / divisor;
 374         tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
 375 }
 376
 377 /*
 378  * Uses the on-board timer to calibrate the on-chip decrementer register
 379  * for prep systems.  On the pmac the OF tells us what the frequency is
 380  * but on prep we have to figure it out.
 381  * -- Cort
 382  */
 383 /* Done with 3 interrupts: the first one primes the cache and the
 384  * 2 following ones measure the interval. The precision of the method
 385  * is still doubtful due to the short interval sampled.
 386  */
 387 static volatile int calibrate_steps __initdata = 3;
 388 static unsigned tbstamp __initdata = 0;
 389
 390 void __init
 391 prep_calibrate_decr_handler(int            irq,
 392                             void           *dev,
 393                             struct pt_regs *regs)
 394 {
 395         unsigned long t, freq;
 396         int step=--calibrate_steps;
 397
 398         t = get_tbl();
 399         if (step > 0) {
 400                 tbstamp = t;
 401         } else {
 402                 freq = (t - tbstamp)*HZ;
 403                 printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
 404                        freq/1000000, freq%1000000);
 405                 tb_ticks_per_jiffy = freq / HZ;
 406                 tb_to_us = mulhwu_scale_factor(freq, 1000000);
 407         }
 408 }
 409
 410 void __init prep_calibrate_decr(void)
 411 {
 412         unsigned long flags;
 413
 414
 415         save_flags(flags);
 416
 417 #define TIMER0_COUNT 0x40
 418 #define TIMER_CONTROL 0x43
 419         /* set timer to periodic mode */
 420         outb_p(0x34,TIMER_CONTROL);/* binary, mode 2, LSB/MSB, ch 0 */
 421         /* set the clock to ~100 Hz */
 422         outb_p(LATCH & 0xff , TIMER0_COUNT);    /* LSB */
 423         outb(LATCH >> 8 , TIMER0_COUNT);        /* MSB */
 424
 425         if (request_irq(0, prep_calibrate_decr_handler, 0, "timer", NULL) != 0)
 426                 panic("Could not allocate timer IRQ!");
 427         __sti();
 428         while ( calibrate_steps ) /* nothing */; /* wait for calibrate */
 429         restore_flags(flags);
 430         free_irq( 0, NULL);
 431 }
 432
 433
 434 static long __init mk48t59_init(void) {
 435         unsigned char tmp;
 436
 437         tmp = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLB);
 438         if (tmp & MK48T59_RTC_CB_STOP) {
 439                 printk("Warning: RTC was stopped, date will be wrong.\n");
 440                 ppc_md.nvram_write_val(MK48T59_RTC_CONTROLB,
 441                                        tmp & ~MK48T59_RTC_CB_STOP);
 442                 /* Low frequency crystal oscillators may take a very long
 443                  * time to startup and stabilize. For now just ignore the
 444                  * the issue, but attempting to calibrate the decrementer
 445                  * from the RTC just after this wakeup is likely to be very
 446                  * inaccurate. Firmware should not allow to load
 447                  * the OS with the clock stopped anyway...
 448                  */
 449         }
 450         /* Ensure that the clock registers are updated */
 451         tmp = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
 452         tmp &= ~(MK48T59_RTC_CA_READ | MK48T59_RTC_CA_WRITE);
 453         ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, tmp);
 454         return 0;
 455 }
 456
 457 /* We use the NVRAM RTC to time a second to calibrate the decrementer,
 458  * the RTC registers have just been set up in the right state by the
 459  * preceding routine.
 460  */
 461 void __init mk48t59_calibrate_decr(void)
 462 {
 463         unsigned long freq;
 464         unsigned long t1;
 465         unsigned char save_control;
 466         long i;
 467         unsigned char sec;
 468
 469
 470         /* Make sure the time is not stopped. */
 471         save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLB);
 472
 473         ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA,
 474                              (save_control & (~MK48T59_RTC_CB_STOP)));
 475
 476         /* Now make sure the read bit is off so the value will change. */
 477         save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
 478         save_control &= ~MK48T59_RTC_CA_READ;
 479         ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, save_control);
 480
 481
 482         /* Read the seconds value to see when it changes. */
 483         sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
 484         /* Actually this is bad for precision, we should have a loop in
 485          * which we only read the seconds counter. nvram_read_val writes
 486          * the address bytes on every call and this takes a lot of time.
 487          * Perhaps an nvram_wait_change method returning a time
 488          * stamp with a loop count as parameter would be the  solution.
 489          */
 490         for (i = 0 ; i < 1000000 ; i++) { /* may take up to 1 second... */
 491            t1 = get_tbl();
 492            if (ppc_md.nvram_read_val(MK48T59_RTC_SECONDS) != sec) {
 493               break;
 494            }
 495         }
 496
 497         sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
 498         for (i = 0 ; i < 1000000 ; i++) { /* Should take up 1 second... */
 499            freq = get_tbl()-t1;
 500            if (ppc_md.nvram_read_val(MK48T59_RTC_SECONDS) != sec) {
 501               break;
 502            }
 503         }
 504
 505         printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
 506                freq/1000000, freq%1000000);
 507         tb_ticks_per_jiffy = freq / HZ;
 508         tb_to_us = mulhwu_scale_factor(freq, 1000000);
 509 }
 510
 511 void __prep
 512 prep_restart(char *cmd)
 513 {
 514         unsigned long i = 10000;
 515
 516
 517         __cli();
 518
 519         /* set exception prefix high - to the prom */
 520         _nmask_and_or_msr(0, MSR_IP);
 521
 522         /* make sure bit 0 (reset) is a 0 */
 523         outb( inb(0x92) & ~1L , 0x92 );
 524         /* signal a reset to system control port A - soft reset */
 525         outb( inb(0x92) | 1 , 0x92 );
 526
 527         while ( i != 0 ) i++;
 528         panic("restart failed\n");
 529 }
 530
 531 /*
 532  * This function will restart a board regardless of port 92 functionality
 533  */
 534 void __prep
 535 prep_direct_restart(char *cmd)
 536 {
 537         u32 jumpaddr=0xfff00100;
 538         u32 defaultmsr=MSR_IP;
 539
 540         /*
 541          * This will ALWAYS work regardless of port 92
 542          * functionality
 543          */
 544         __cli();
 545
 546         __asm__ __volatile__("\n\
 547         mtspr   26, %1  /* SRR0 */
 548         mtspr   27, %0  /* SRR1 */
 549         rfi"
 550         :
 551         : "r" (defaultmsr), "r" (jumpaddr));
 552         /*
 553          * Not reached
 554          */
 555 }
 556
 557 void __prep
 558 prep_halt(void)
 559 {
 560         unsigned long flags;
 561         __cli();
 562         /* set exception prefix high - to the prom */
 563         save_flags( flags );
 564         restore_flags( flags|MSR_IP );
 565
 566         /* make sure bit 0 (reset) is a 0 */
 567         outb( inb(0x92) & ~1L , 0x92 );
 568         /* signal a reset to system control port A - soft reset */
 569         outb( inb(0x92) | 1 , 0x92 );
 570
 571         while ( 1 ) ;
 572         /*
 573          * Not reached
 574          */
 575 }
 576
 577 void __prep
 578 prep_power_off(void)
 579 {
 580         prep_halt();
 581 }
 582
 583 int __prep
 584 prep_setup_residual(char *buffer)
 585 {
 586         int len = 0;
 587
 588
 589         /* PREP's without residual data will give incorrect values here */
 590         len += sprintf(len+buffer, "clock\t\t: ");
 591         if ( res->ResidualLength )
 592                 len += sprintf(len+buffer, "%ldMHz\n",
 593                        (res->VitalProductData.ProcessorHz > 1024) ?
 594                        res->VitalProductData.ProcessorHz>>20 :
 595                        res->VitalProductData.ProcessorHz);
 596         else
 597                 len += sprintf(len+buffer, "???\n");
 598
 599         return len;
 600 }
 601
 602 u_int __prep
 603 prep_irq_cannonicalize(u_int irq)
 604 {
 605         if (irq == 2)
 606         {
 607                 return 9;
 608         }
 609         else
 610         {
 611                 return irq;
 612         }
 613 }
 614
 615 #if 0
 616 void __prep
 617 prep_do_IRQ(struct pt_regs *regs, int cpu, int isfake)
 618 {
 619         int irq;
 620
 621         if ( (irq = i8259_irq(0)) < 0 )
 622         {
 623                 printk(KERN_DEBUG "Bogus interrupt from PC = %lx\n",
 624                        regs->nip);
 625                 ppc_spurious_interrupts++;
 626                 return;
 627         }
 628         ppc_irq_dispatch_handler( regs, irq );
 629 }
 630 #endif
 631
 632 int __prep
 633 prep_get_irq(struct pt_regs *regs)
 634 {
 635         return i8259_irq(smp_processor_id());
 636 }
 637
 638 void __init
 639 prep_init_IRQ(void)
 640 {
 641         int i;
 642
 643         if (OpenPIC != NULL) {
 644                 for ( i = 16 ; i < 36 ; i++ )
 645                         irq_desc[i].handler = &open_pic;
 646                 openpic_init(1);
 647         }
 648
 649         for ( i = 0 ; i < 16  ; i++ )
 650                 irq_desc[i].handler = &i8259_pic;
 651         i8259_init();
 652 #ifdef CONFIG_SMP
 653         request_irq(openpic_to_irq(OPENPIC_VEC_SPURIOUS), openpic_ipi_action,
 654                     0, "IPI0", 0);
 655 #endif /* CONFIG_SMP */
 656 }
 657
 658 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 659 /*
 660  * IDE stuff.
 661  */
 662 void __prep
 663 prep_ide_insw(ide_ioreg_t port, void *buf, int ns)
 664 {
 665         _insw((unsigned short *)((port)+_IO_BASE), buf, ns);
 666 }
 667
 668 void __prep
 669 prep_ide_outsw(ide_ioreg_t port, void *buf, int ns)
 670 {
 671         _outsw((unsigned short *)((port)+_IO_BASE), buf, ns);
 672 }
 673
 674 int __prep
 675 prep_ide_default_irq(ide_ioreg_t base)
 676 {
 677         switch (base) {
 678                 case 0x1f0: return 13;
 679                 case 0x170: return 13;
 680                 case 0x1e8: return 11;
 681                 case 0x168: return 10;
 682                 default:
 683                         return 0;
 684         }
 685 }
 686
 687 ide_ioreg_t __prep
 688 prep_ide_default_io_base(int index)
 689 {
 690         switch (index) {
 691                 case 0: return 0x1f0;
 692                 case 1: return 0x170;
 693                 case 2: return 0x1e8;
 694                 case 3: return 0x168;
 695                 default:
 696                         return 0;
 697         }
 698 }
 699
 700 int __prep
 701 prep_ide_check_region(ide_ioreg_t from, unsigned int extent)
 702 {
 703         return check_region(from, extent);
 704 }
 705
 706 void __prep
 707 prep_ide_request_region(ide_ioreg_t from,
 708                         unsigned int extent,
 709                         const char *name)
 710 {
 711         request_region(from, extent, name);
 712 }
 713
 714 void __prep
 715 prep_ide_release_region(ide_ioreg_t from,
 716                         unsigned int extent)
 717 {
 718         release_region(from, extent);
 719 }
 720
 721 void __prep
 722 prep_ide_fix_driveid(struct hd_driveid *id)
 723 {
 724 }
 725
 726 void __init
 727 prep_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
 728 {
 729         ide_ioreg_t reg = data_port;
 730         int i;
 731
 732         for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
 733                 hw->io_ports[i] = reg;
 734                 reg += 1;
 735         }
 736         if (ctrl_port) {
 737                 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
 738         } else {
 739                 hw->io_ports[IDE_CONTROL_OFFSET] =  hw->io_ports[IDE_DATA_OFFSET] + 0x206;
 740         }
 741         if (irq != NULL)
 742                 *irq = 0;
 743 }
 744 #endif
 745
 746 void __init
 747 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
 748           unsigned long r6, unsigned long r7)
 749 {
 750         /* make a copy of residual data */
 751         if ( r3 )
 752         {
 753                 memcpy((void *)res,(void *)(r3+KERNELBASE),
 754                        sizeof(RESIDUAL));
 755         }
 756
 757         isa_io_base = PREP_ISA_IO_BASE;
 758         isa_mem_base = PREP_ISA_MEM_BASE;
 759         pci_dram_offset = PREP_PCI_DRAM_OFFSET;
 760         ISA_DMA_THRESHOLD = 0x00ffffff;
 761         DMA_MODE_READ = 0x44;
 762         DMA_MODE_WRITE = 0x48;
 763
 764         /* figure out what kind of prep workstation we are */
 765         if ( res->ResidualLength != 0 )
 766         {
 767                 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
 768                         _prep_type = _PREP_IBM;
 769                 else if (!strncmp(res->VitalProductData.PrintableModel,
 770                                   "Radstone",8))
 771                 {
 772                         extern char *Motherboard_map_name;
 773
 774                         _prep_type = _PREP_Radstone;
 775                         Motherboard_map_name=
 776                                 res->VitalProductData.PrintableModel;
 777                 }
 778                 else
 779                         _prep_type = _PREP_Motorola;
 780         }
 781         else /* assume motorola if no residual (netboot?) */
 782         {
 783                 _prep_type = _PREP_Motorola;
 784         }
 785
 786         prep_setup_pci_ptrs();
 787
 788         ppc_md.setup_arch     = prep_setup_arch;
 789         ppc_md.setup_residual = prep_setup_residual;
 790         ppc_md.get_cpuinfo    = prep_get_cpuinfo;
 791         ppc_md.irq_cannonicalize = prep_irq_cannonicalize;
 792         ppc_md.init_IRQ       = prep_init_IRQ;
 793         /* this gets changed later on if we have an OpenPIC -- Cort */
 794         ppc_md.get_irq        = prep_get_irq;
 795         ppc_md.init           = NULL;
 796
 797         ppc_md.restart        = prep_restart;
 798         ppc_md.power_off      = prep_power_off;
 799         ppc_md.halt           = prep_halt;
 800
 801         ppc_md.time_init      = NULL;
 802         if (_prep_type == _PREP_Radstone) {
 803                 /*
 804                  * We require a direct restart as port 92 does not work on
 805                  * all Radstone boards
 806                  */
 807                 ppc_md.restart        = prep_direct_restart;
 808                 /*
 809                  * The RTC device used varies according to board type
 810                  */
 811                 if(((ucSystemType==RS_SYS_TYPE_PPC1) && (ucBoardRevMaj>=5)) ||
 812                    (ucSystemType==RS_SYS_TYPE_PPC1a))
 813                 {
 814                         ppc_md.set_rtc_time   = mk48t59_set_rtc_time;
 815                         ppc_md.get_rtc_time   = mk48t59_get_rtc_time;
 816                         ppc_md.time_init      = mk48t59_init;
 817                 }
 818                 else
 819                 {
 820                         ppc_md.set_rtc_time   = mc146818_set_rtc_time;
 821                         ppc_md.get_rtc_time   = mc146818_get_rtc_time;
 822                 }
 823                 /*
 824                  * Determine the decrementer rate from the residual data
 825                  */
 826                 ppc_md.calibrate_decr = prep_res_calibrate_decr;
 827         }
 828         else if (_prep_type == _PREP_IBM) {
 829                 ppc_md.set_rtc_time   = mc146818_set_rtc_time;
 830                 ppc_md.get_rtc_time   = mc146818_get_rtc_time;
 831                 ppc_md.calibrate_decr = prep_calibrate_decr;
 832         }
 833         else {
 834                 ppc_md.set_rtc_time   = mk48t59_set_rtc_time;
 835                 ppc_md.get_rtc_time   = mk48t59_get_rtc_time;
 836                 ppc_md.calibrate_decr = mk48t59_calibrate_decr;
 837                 ppc_md.time_init      = mk48t59_init;
 838         }
 839
 840 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 841         ppc_ide_md.insw = prep_ide_insw;
 842         ppc_ide_md.outsw = prep_ide_outsw;
 843         ppc_ide_md.default_irq = prep_ide_default_irq;
 844         ppc_ide_md.default_io_base = prep_ide_default_io_base;
 845         ppc_ide_md.ide_check_region = prep_ide_check_region;
 846         ppc_ide_md.ide_request_region = prep_ide_request_region;
 847         ppc_ide_md.ide_release_region = prep_ide_release_region;
 848         ppc_ide_md.fix_driveid = prep_ide_fix_driveid;
 849         ppc_ide_md.ide_init_hwif = prep_ide_init_hwif_ports;
 850 #endif
 851         ppc_ide_md.io_base = _IO_BASE;
 852
 853 #ifdef CONFIG_VT
 854         ppc_md.kbd_setkeycode    = pckbd_setkeycode;
 855         ppc_md.kbd_getkeycode    = pckbd_getkeycode;
 856         ppc_md.kbd_translate     = pckbd_translate;
 857         ppc_md.kbd_unexpected_up = pckbd_unexpected_up;
 858         ppc_md.kbd_leds          = pckbd_leds;
 859         ppc_md.kbd_init_hw       = pckbd_init_hw;
 860 #ifdef CONFIG_MAGIC_SYSRQ
 861         ppc_md.ppc_kbd_sysrq_xlate       = pckbd_sysrq_xlate;
 862         SYSRQ_KEY = 0x54;
 863 #endif
 864 #endif
 865 }
 866
 867 #ifdef CONFIG_SOUND_MODULE
 868 EXPORT_SYMBOL(ppc_cs4232_dma);
 869 EXPORT_SYMBOL(ppc_cs4232_dma2);
 870 #endif