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[davej-history.git] / include / asm-arm / proc-armv / system.h
blobcd0730d3bd07d341e3594841b423964ad48bba1a
1 /*
2 * linux/include/asm-arm/proc-armv/system.h
4 * Copyright (C) 1996 Russell King
5 */
7 #ifndef __ASM_PROC_SYSTEM_H
8 #define __ASM_PROC_SYSTEM_H
10 extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
12 extern void __bad_xchg(volatile void *, int);
14 switch (size) {
15 case 1: __asm__ __volatile__ ("swpb %0, %1, [%2]" : "=r" (x) : "r" (x), "r" (ptr) : "memory");
16 break;
17 case 4: __asm__ __volatile__ ("swp %0, %1, [%2]" : "=r" (x) : "r" (x), "r" (ptr) : "memory");
18 break;
19 default: __bad_xchg(ptr, size);
21 return x;
24 #define set_cr(x) \
25 __asm__ __volatile__( \
26 "mcr p15, 0, %0, c1, c0 @ set CR" \
27 : : "r" (x))
29 extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
30 extern unsigned long cr_alignment; /* defined in entry-armv.S */
33 * A couple of speedups for the ARM
37 * Save the current interrupt enable state & disable IRQs
39 #define __save_flags_cli(x) \
40 ({ \
41 unsigned long temp; \
42 __asm__ __volatile__( \
43 "mrs %0, cpsr @ save_flags_cli\n" \
44 " orr %1, %0, #128\n" \
45 " msr cpsr_c, %1" \
46 : "=r" (x), "=r" (temp) \
47 : \
48 : "memory"); \
52 * Enable IRQs
54 #define __sti() \
55 ({ \
56 unsigned long temp; \
57 __asm__ __volatile__( \
58 "mrs %0, cpsr @ sti\n" \
59 " bic %0, %0, #128\n" \
60 " msr cpsr_c, %0" \
61 : "=r" (temp) \
62 : \
63 : "memory"); \
67 * Disable IRQs
69 #define __cli() \
70 ({ \
71 unsigned long temp; \
72 __asm__ __volatile__( \
73 "mrs %0, cpsr @ cli\n" \
74 " orr %0, %0, #128\n" \
75 " msr cpsr_c, %0" \
76 : "=r" (temp) \
77 : \
78 : "memory"); \
82 * Enable FIQs
84 #define __stf() \
85 ({ \
86 unsigned long temp; \
87 __asm__ __volatile__( \
88 "mrs %0, cpsr @ stf\n" \
89 " bic %0, %0, #64\n" \
90 " msr cpsr_c, %0" \
91 : "=r" (temp) \
92 : \
93 : "memory"); \
97 * Disable FIQs
99 #define __clf() \
100 ({ \
101 unsigned long temp; \
102 __asm__ __volatile__( \
103 "mrs %0, cpsr @ clf\n" \
104 " orr %0, %0, #64\n" \
105 " msr cpsr_c, %0" \
106 : "=r" (temp) \
108 : "memory"); \
112 * Enable FIQs
114 #define __stf() \
115 ({ \
116 unsigned long temp; \
117 __asm__ __volatile__( \
118 "mrs %0, cpsr @ stf\n" \
119 " bic %0, %0, #64\n" \
120 " msr cpsr_c, %0" \
121 : "=r" (temp) \
123 : "memory"); \
127 * Disable FIQs
129 #define __clf() \
130 ({ \
131 unsigned long temp; \
132 __asm__ __volatile__( \
133 "mrs %0, cpsr @ clf\n" \
134 " orr %0, %0, #64\n" \
135 " msr cpsr_c, %0" \
136 : "=r" (temp) \
138 : "memory"); \
142 * save current IRQ & FIQ state
144 #define __save_flags(x) \
145 __asm__ __volatile__( \
146 "mrs %0, cpsr @ save_flags\n" \
147 : "=r" (x) \
149 : "memory")
152 * restore saved IRQ & FIQ state
154 #define __restore_flags(x) \
155 __asm__ __volatile__( \
156 "msr cpsr_c, %0 @ restore_flags\n" \
158 : "r" (x) \
159 : "memory")
161 #endif