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[davej-history.git] / include / asm-arm / proc-armv / assembler.h
blob6dcd0c3071ddd76b9a12a7ad655df37c78a1c2d9
1 /*
2 * linux/asm-arm/proc-armv/assembler.h
4 * Copyright (C) 1996-2000 Russell King
6 * This file contains ARM processor specifics for
7 * the ARM6 and better processors.
8 */
9 #define MODE_USR USR_MODE
10 #define MODE_FIQ FIQ_MODE
11 #define MODE_IRQ IRQ_MODE
12 #define MODE_SVC SVC_MODE
14 #define DEFAULT_FIQ MODE_FIQ
17 * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
19 #ifdef __STDC__
20 #define LOADREGS(cond, base, reglist...)\
21 ldm##cond base,reglist
22 #else
23 #define LOADREGS(cond, base, reglist...)\
24 ldm/**/cond base,reglist
25 #endif
28 * Build a return instruction for this processor type.
30 #define RETINSTR(instr, regs...)\
31 instr regs
34 * Save the current IRQ state and disable IRQs. Note that this macro
35 * assumes FIQs are enabled, and that the processor is in SVC mode.
37 .macro save_and_disable_irqs, oldcpsr, temp
38 mrs \oldcpsr, cpsr
39 mov \temp, #I_BIT | MODE_SVC
40 msr cpsr_c, \temp
41 .endm
44 * Restore interrupt state previously stored in a register. We don't
45 * guarantee that this will preserve the flags.
47 .macro restore_irqs, oldcpsr
48 msr cpsr_c, \oldcpsr
49 .endm
52 * These two are used to save LR/restore PC over a user-based access.
53 * The old 26-bit architecture requires that we do. On 32-bit
54 * architecture, we can safely ignore this requirement.
56 .macro save_lr
57 .endm
59 .macro restore_pc
60 mov pc, lr
61 .endm
63 #define USER(x...) \
64 9999: x; \
65 .section __ex_table,"a"; \
66 .align 3; \
67 .long 9999b,9001f; \
68 .previous