- pre3:
[davej-history.git] / include / asm-arm / dma.h
blob04dacb2b419b7a71456c2ac3573e66aee7f1a875
1 #ifndef __ASM_ARM_DMA_H
2 #define __ASM_ARM_DMA_H
4 typedef unsigned int dmach_t;
6 #include <linux/config.h>
7 #include <linux/spinlock.h>
8 #include <asm/system.h>
9 #include <asm/memory.h>
10 #include <asm/scatterlist.h>
11 #include <asm/arch/dma.h>
14 * DMA modes
16 typedef unsigned int dmamode_t;
18 #define DMA_MODE_MASK 3
20 #define DMA_MODE_READ 0
21 #define DMA_MODE_WRITE 1
22 #define DMA_MODE_CASCADE 2
23 #define DMA_AUTOINIT 4
25 typedef struct {
26 unsigned long address;
27 unsigned long length;
28 } dmasg_t;
30 extern spinlock_t dma_spin_lock;
32 extern __inline__ unsigned long claim_dma_lock(void)
34 unsigned long flags;
35 spin_lock_irqsave(&dma_spin_lock, flags);
36 return flags;
39 extern __inline__ void release_dma_lock(unsigned long flags)
41 spin_unlock_irqrestore(&dma_spin_lock, flags);
44 /* Clear the 'DMA Pointer Flip Flop'.
45 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
47 #define clear_dma_ff(channel)
49 /* Set only the page register bits of the transfer address.
51 * NOTE: This is an architecture specific function, and should
52 * be hidden from the drivers
54 extern void set_dma_page(dmach_t channel, char pagenr);
56 /* Request a DMA channel
58 * Some architectures may need to do allocate an interrupt
60 extern int request_dma(dmach_t channel, const char * device_id);
62 /* Free a DMA channel
64 * Some architectures may need to do free an interrupt
66 extern void free_dma(dmach_t channel);
68 /* Enable DMA for this channel
70 * On some architectures, this may have other side effects like
71 * enabling an interrupt and setting the DMA registers.
73 extern void enable_dma(dmach_t channel);
75 /* Disable DMA for this channel
77 * On some architectures, this may have other side effects like
78 * disabling an interrupt or whatever.
80 extern void disable_dma(dmach_t channel);
82 /* Set the DMA scatter gather list for this channel
84 * This should not be called if a DMA channel is enabled,
85 * especially since some DMA architectures don't update the
86 * DMA address immediately, but defer it to the enable_dma().
88 extern void set_dma_sg(dmach_t channel, dmasg_t *sg, int nr_sg);
90 /* Set the DMA address for this channel
92 * This should not be called if a DMA channel is enabled,
93 * especially since some DMA architectures don't update the
94 * DMA address immediately, but defer it to the enable_dma().
96 extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
98 /* Set the DMA byte count for this channel
100 * This should not be called if a DMA channel is enabled,
101 * especially since some DMA architectures don't update the
102 * DMA count immediately, but defer it to the enable_dma().
104 extern void set_dma_count(dmach_t channel, unsigned long count);
106 /* Set the transfer direction for this channel
108 * This should not be called if a DMA channel is enabled,
109 * especially since some DMA architectures don't update the
110 * DMA transfer direction immediately, but defer it to the
111 * enable_dma().
113 extern void set_dma_mode(dmach_t channel, dmamode_t mode);
115 /* Set the transfer speed for this channel
117 extern void set_dma_speed(dmach_t channel, int cycle_ns);
119 /* Get DMA residue count. After a DMA transfer, this
120 * should return zero. Reading this while a DMA transfer is
121 * still in progress will return unpredictable results.
122 * If called before the channel has been used, it may return 1.
123 * Otherwise, it returns the number of _bytes_ left to transfer.
125 extern int get_dma_residue(dmach_t channel);
127 #ifndef NO_DMA
128 #define NO_DMA 255
129 #endif
131 #ifdef CONFIG_PCI
132 extern int isa_dma_bridge_buggy;
133 #else
134 #define isa_dma_bridge_buggy (0)
135 #endif
137 #endif /* _ARM_DMA_H */