include/asm-arm/arch-arc/irq.h

   1 /*
   2  * include/asm-arm/arch-arc/irq.h
   3  *
   4  * Copyright (C) 1996 Russell King
   5  *
   6  * Changelog:
   7  *   24-09-1996 RMK     Created
   8  *   10-10-1996 RMK     Brought up to date with arch-sa110eval
   9  *   22-10-1996 RMK     Changed interrupt numbers & uses new inb/outb macros
  10  *   11-01-1998 RMK     Added mask_and_ack_irq
  11  *   22-08-1998 RMK     Restructured IRQ routines
  12  */
  13 #include <linux/config.h>
  14 #include <asm/ioc.h>
  15
  16 #ifdef CONFIG_ARCH_ARC
  17 #define a_clf() clf()
  18 #define a_stf() stf()
  19 #else
  20 #define a_clf() do { } while (0)
  21 #define a_stf() do { } while (0)
  22 #endif
  23
  24 #define fixup_irq(x) (x)
  25
  26 static void arc_mask_irq_ack_a(unsigned int irq)
  27 {
  28         unsigned int temp;
  29
  30         a_clf();
  31         __asm__ __volatile__(
  32         "ldrb   %0, [%2]\n"
  33 "       bic     %0, %0, %1\n"
  34 "       strb    %0, [%2]\n"
  35 "       strb    %1, [%3]"
  36         : "=&r" (temp)
  37         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_IRQMASKA)),
  38           "r" (ioaddr(IOC_IRQCLRA)));
  39         a_stf();
  40 }
  41
  42 static void arc_mask_irq_a(unsigned int irq)
  43 {
  44         unsigned int temp;
  45
  46         a_clf();
  47         __asm__ __volatile__(
  48         "ldrb   %0, [%2]\n"
  49 "       bic     %0, %0, %1\n"
  50 "       strb    %0, [%2]"
  51         : "=&r" (temp)
  52         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_IRQMASKA)));
  53         a_stf();
  54 }
  55
  56 static void arc_unmask_irq_a(unsigned int irq)
  57 {
  58         unsigned int temp;
  59
  60         a_clf();
  61         __asm__ __volatile__(
  62         "ldrb   %0, [%2]\n"
  63 "       orr     %0, %0, %1\n"
  64 "       strb    %0, [%2]"
  65         : "=&r" (temp)
  66         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_IRQMASKA)));
  67         a_stf();
  68 }
  69
  70 static void arc_mask_irq_b(unsigned int irq)
  71 {
  72         unsigned int temp;
  73
  74         __asm__ __volatile__(
  75         "ldrb   %0, [%2]\n"
  76 "       bic     %0, %0, %1\n"
  77 "       strb    %0, [%2]"
  78         : "=&r" (temp)
  79         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_IRQMASKB)));
  80 }
  81
  82 static void arc_unmask_irq_b(unsigned int irq)
  83 {
  84         unsigned int temp;
  85
  86         __asm__ __volatile__(
  87         "ldrb   %0, [%2]\n"
  88 "       orr     %0, %0, %1\n"
  89 "       strb    %0, [%2]"
  90         : "=&r" (temp)
  91         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_IRQMASKB)));
  92 }
  93
  94 static void arc_mask_irq_fiq(unsigned int irq)
  95 {
  96         unsigned int temp;
  97
  98         __asm__ __volatile__(
  99         "ldrb   %0, [%2]\n"
 100 "       bic     %0, %0, %1\n"
 101 "       strb    %0, [%2]"
 102         : "=&r" (temp)
 103         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_FIQMASK)));
 104 }
 105
 106 static void arc_unmask_irq_fiq(unsigned int irq)
 107 {
 108         unsigned int temp;
 109
 110         __asm__ __volatile__(
 111         "ldrb   %0, [%2]\n"
 112 "       orr     %0, %0, %1\n"
 113 "       strb    %0, [%2]"
 114         : "=&r" (temp)
 115         : "r" (1 << (irq & 7)), "r" (ioaddr(IOC_FIQMASK)));
 116 }
 117
 118 static __inline__ void irq_init_irq(void)
 119 {
 120         extern void ecard_disableirq(unsigned int irq);
 121         extern void ecard_enableirq(unsigned int irq);
 122         int irq;
 123
 124         outb(0, IOC_IRQMASKA);
 125         outb(0, IOC_IRQMASKB);
 126         outb(0, IOC_FIQMASK);
 127
 128         for (irq = 0; irq < NR_IRQS; irq++) {
 129                 switch (irq) {
 130                 case 0 ... 6:
 131                         irq_desc[irq].probe_ok = 1;
 132                         irq_desc[irq].valid    = 1;
 133                         irq_desc[irq].mask_ack = arc_mask_irq_ack_a;
 134                         irq_desc[irq].mask     = arc_mask_irq_a;
 135                         irq_desc[irq].unmask   = arc_unmask_irq_a;
 136                         break;
 137
 138                 case 7:
 139                         irq_desc[irq].noautoenable = 1;
 140                         irq_desc[irq].valid    = 1;
 141                         irq_desc[irq].mask_ack = arc_mask_irq_ack_a;
 142                         irq_desc[irq].mask     = arc_mask_irq_a;
 143                         irq_desc[irq].unmask   = arc_unmask_irq_a;
 144                         break;
 145
 146                 case 9 ... 15:
 147                         irq_desc[irq].probe_ok = 1;
 148                 case 8:
 149                         irq_desc[irq].valid    = 1;
 150                         irq_desc[irq].mask_ack = arc_mask_irq_b;
 151                         irq_desc[irq].mask     = arc_mask_irq_b;
 152                         irq_desc[irq].unmask   = arc_unmask_irq_b;
 153                         break;
 154
 155                 case 32 ... 40:
 156                         irq_desc[irq].valid    = 1;
 157                         irq_desc[irq].mask_ack = ecard_disableirq;
 158                         irq_desc[irq].mask     = ecard_disableirq;
 159                         irq_desc[irq].unmask   = ecard_enableirq;
 160                         break;
 161
 162                 case 64 ... 72:
 163                         irq_desc[irq].valid    = 1;
 164                         irq_desc[irq].mask_ack = arc_mask_irq_fiq;
 165                         irq_desc[irq].mask     = arc_mask_irq_fiq;
 166                         irq_desc[irq].unmask   = arc_unmask_irq_fiq;
 167                         break;
 168                 }
 169         }
 170
 171         irq_mask[IRQ_KEYBOARDTX].noautoenable = 1;
 172
 173         init_FIQ();
 174 }