arch/i386/kernel/traps.c

   1 /*
   2  *  linux/arch/i386/traps.c
   3  *
   4  *  Copyright (C) 1991, 1992  Linus Torvalds
   5  */
   6
   7 /*
   8  * 'Traps.c' handles hardware traps and faults after we have saved some
   9  * state in 'asm.s'.
  10  */
  11 #include <linux/config.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/string.h>
  15 #include <linux/errno.h>
  16 #include <linux/ptrace.h>
  17 #include <linux/timer.h>
  18 #include <linux/mm.h>
  19 #include <linux/smp.h>
  20 #include <linux/smp_lock.h>
  21 #include <linux/init.h>
  22 #include <linux/delay.h>
  23
  24 #ifdef CONFIG_MCA
  25 #include <linux/mca.h>
  26 #include <asm/processor.h>
  27 #endif
  28
  29 #include <asm/system.h>
  30 #include <asm/uaccess.h>
  31 #include <asm/io.h>
  32 #include <asm/spinlock.h>
  33 #include <asm/atomic.h>
  34 #include <asm/debugreg.h>
  35 #include <asm/desc.h>
  36
  37 #include <asm/smp.h>
  38
  39 #ifdef CONFIG_X86_VISWS_APIC
  40 #include <asm/fixmap.h>
  41 #include <asm/cobalt.h>
  42 #include <asm/lithium.h>
  43 #endif
  44
  45 #include "irq.h"
  46
  47 asmlinkage int system_call(void);
  48 asmlinkage void lcall7(void);
  49
  50 struct desc_struct default_ldt = { 0, 0 };
  51
  52 /*
  53  * The IDT has to be page-aligned to simplify the Pentium
  54  * F0 0F bug workaround.. We have a special link segment
  55  * for this.
  56  */
  57 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
  58
  59 static inline void console_verbose(void)
  60 {
  61         extern int console_loglevel;
  62         console_loglevel = 15;
  63 }
  64
  65 #define DO_ERROR(trapnr, signr, str, name, tsk) \
  66 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
  67 { \
  68         tsk->tss.error_code = error_code; \
  69         tsk->tss.trap_no = trapnr; \
  70         force_sig(signr, tsk); \
  71         die_if_no_fixup(str,regs,error_code); \
  72 }
  73
  74 #define DO_VM86_ERROR(trapnr, signr, str, name, tsk) \
  75 asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
  76 { \
  77         lock_kernel(); \
  78         if (regs->eflags & VM_MASK) { \
  79                 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr)) \
  80                         goto out; \
  81                 /* else fall through */ \
  82         } \
  83         tsk->tss.error_code = error_code; \
  84         tsk->tss.trap_no = trapnr; \
  85         force_sig(signr, tsk); \
  86         die_if_kernel(str,regs,error_code); \
  87 out: \
  88         unlock_kernel(); \
  89 }
  90
  91 void page_exception(void);
  92
  93 asmlinkage void divide_error(void);
  94 asmlinkage void debug(void);
  95 asmlinkage void nmi(void);
  96 asmlinkage void int3(void);
  97 asmlinkage void overflow(void);
  98 asmlinkage void bounds(void);
  99 asmlinkage void invalid_op(void);
 100 asmlinkage void device_not_available(void);
 101 asmlinkage void double_fault(void);
 102 asmlinkage void coprocessor_segment_overrun(void);
 103 asmlinkage void invalid_TSS(void);
 104 asmlinkage void segment_not_present(void);
 105 asmlinkage void stack_segment(void);
 106 asmlinkage void general_protection(void);
 107 asmlinkage void page_fault(void);
 108 asmlinkage void coprocessor_error(void);
 109 asmlinkage void reserved(void);
 110 asmlinkage void alignment_check(void);
 111 asmlinkage void spurious_interrupt_bug(void);
 112
 113 int kstack_depth_to_print = 24;
 114
 115 /*
 116  * These constants are for searching for possible module text
 117  * segments.  VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
 118  * a guess of how much space is likely to be vmalloced.
 119  */
 120 #define VMALLOC_OFFSET (8*1024*1024)
 121 #define MODULE_RANGE (8*1024*1024)
 122
 123 static void show_registers(struct pt_regs *regs)
 124 {
 125         int i;
 126         int in_kernel = 1;
 127         unsigned long esp;
 128         unsigned short ss;
 129         unsigned long *stack, addr, module_start, module_end;
 130
 131         esp = (unsigned long) (1+regs);
 132         ss = __KERNEL_DS;
 133         if (regs->xcs & 3) {
 134                 in_kernel = 0;
 135                 esp = regs->esp;
 136                 ss = regs->xss & 0xffff;
 137         }
 138         printk("CPU:    %d\nEIP:    %04x:[<%08lx>]\nEFLAGS: %08lx\n",
 139                 smp_processor_id(), 0xffff & regs->xcs, regs->eip, regs->eflags);
 140         printk("eax: %08lx   ebx: %08lx   ecx: %08lx   edx: %08lx\n",
 141                 regs->eax, regs->ebx, regs->ecx, regs->edx);
 142         printk("esi: %08lx   edi: %08lx   ebp: %08lx   esp: %08lx\n",
 143                 regs->esi, regs->edi, regs->ebp, esp);
 144         printk("ds: %04x   es: %04x   ss: %04x\n",
 145                 regs->xds & 0xffff, regs->xes & 0xffff, ss);
 146         store_TR(i);
 147         printk("Process %s (pid: %d, process nr: %d, stackpage=%08lx)",
 148                 current->comm, current->pid, 0xffff & i, 4096+(unsigned long)current);
 149
 150         /*
 151          * When in-kernel, we also print out the stack and code at the
 152          * time of the fault..
 153          */
 154         if (in_kernel) {
 155                 printk("\nStack: ");
 156                 stack = (unsigned long *) esp;
 157                 for(i=0; i < kstack_depth_to_print; i++) {
 158                         if (((long) stack & 4095) == 0)
 159                                 break;
 160                         if (i && ((i % 8) == 0))
 161                                 printk("\n       ");
 162                         printk("%08lx ", *stack++);
 163                 }
 164                 printk("\nCall Trace: ");
 165                 stack = (unsigned long *) esp;
 166                 i = 1;
 167                 module_start = PAGE_OFFSET + (max_mapnr << PAGE_SHIFT);
 168                 module_start = ((module_start + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1));
 169                 module_end = module_start + MODULE_RANGE;
 170                 while (((long) stack & 4095) != 0) {
 171                         addr = *stack++;
 172                         /*
 173                          * If the address is either in the text segment of the
 174                          * kernel, or in the region which contains vmalloc'ed
 175                          * memory, it *may* be the address of a calling
 176                          * routine; if so, print it so that someone tracing
 177                          * down the cause of the crash will be able to figure
 178                          * out the call path that was taken.
 179                          */
 180                         if (((addr >= (unsigned long) &_stext) &&
 181                              (addr <= (unsigned long) &_etext)) ||
 182                             ((addr >= module_start) && (addr <= module_end))) {
 183                                 if (i && ((i % 8) == 0))
 184                                         printk("\n       ");
 185                                 printk("[<%08lx>] ", addr);
 186                                 i++;
 187                         }
 188                 }
 189                 printk("\nCode: ");
 190                 for(i=0;i<20;i++)
 191                         printk("%02x ", ((unsigned char *)regs->eip)[i]);
 192         }
 193         printk("\n");
 194 }
 195
 196 spinlock_t die_lock;
 197
 198 void die(const char * str, struct pt_regs * regs, long err)
 199 {
 200         console_verbose();
 201         spin_lock_irq(&die_lock);
 202         printk("%s: %04lx\n", str, err & 0xffff);
 203         show_registers(regs);
 204         spin_unlock_irq(&die_lock);
 205         do_exit(SIGSEGV);
 206 }
 207
 208 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
 209 {
 210         if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
 211                 die(str, regs, err);
 212 }
 213
 214 static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
 215 {
 216         if (!(regs->eflags & VM_MASK) && !(3 & regs->xcs))
 217         {
 218                 unsigned long fixup;
 219                 fixup = search_exception_table(regs->eip);
 220                 if (fixup) {
 221                         regs->eip = fixup;
 222                         return;
 223                 }
 224                 die(str, regs, err);
 225         }
 226 }
 227
 228 DO_VM86_ERROR( 0, SIGFPE,  "divide error", divide_error, current)
 229 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3, current)
 230 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow, current)
 231 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds, current)
 232 DO_ERROR( 6, SIGILL,  "invalid operand", invalid_op, current)
 233 DO_VM86_ERROR( 7, SIGSEGV, "device not available", device_not_available, current)
 234 DO_ERROR( 8, SIGSEGV, "double fault", double_fault, current)
 235 DO_ERROR( 9, SIGFPE,  "coprocessor segment overrun", coprocessor_segment_overrun, current)
 236 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS, current)
 237 DO_ERROR(11, SIGBUS,  "segment not present", segment_not_present, current)
 238 DO_ERROR(12, SIGBUS,  "stack segment", stack_segment, current)
 239 DO_ERROR(17, SIGSEGV, "alignment check", alignment_check, current)
 240 DO_ERROR(18, SIGSEGV, "reserved", reserved, current)
 241 /* I don't have documents for this but it does seem to cover the cache
 242    flush from user space exception some people get. */
 243 DO_ERROR(19, SIGSEGV, "cache flush denied", cache_flush_denied, current)
 244
 245 asmlinkage void cache_flush_denied(struct pt_regs * regs, long error_code)
 246 {
 247         if (regs->eflags & VM_MASK) {
 248                 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
 249                 return;
 250         }
 251         die_if_kernel("cache flush denied",regs,error_code);
 252         current->tss.error_code = error_code;
 253         current->tss.trap_no = 19;
 254         force_sig(SIGSEGV, current);
 255 }
 256
 257 asmlinkage void do_general_protection(struct pt_regs * regs, long error_code)
 258 {
 259         if (regs->eflags & VM_MASK)
 260                 goto gp_in_vm86;
 261
 262         if (!(regs->xcs & 3))
 263                 goto gp_in_kernel;
 264
 265         current->tss.error_code = error_code;
 266         current->tss.trap_no = 13;
 267         force_sig(SIGSEGV, current);
 268         return;
 269
 270 gp_in_vm86:
 271         lock_kernel();
 272         handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
 273         unlock_kernel();
 274         return;
 275
 276 gp_in_kernel:
 277         {
 278                 unsigned long fixup;
 279                 fixup = search_exception_table(regs->eip);
 280                 if (fixup) {
 281                         regs->eip = fixup;
 282                         return;
 283                 }
 284                 die("general protection fault", regs, error_code);
 285         }
 286 }
 287
 288 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
 289 {
 290         printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
 291         printk("You probably have a hardware problem with your RAM chips\n");
 292 }
 293
 294 static void io_check_error(unsigned char reason, struct pt_regs * regs)
 295 {
 296         unsigned long i;
 297
 298         printk("NMI: IOCK error (debug interrupt?)\n");
 299         show_registers(regs);
 300
 301         /* Re-enable the IOCK line, wait for a few seconds */
 302         reason |= 8;
 303         outb(reason, 0x61);
 304         i = 2000;
 305         while (--i) udelay(1000);
 306         reason &= ~8;
 307         outb(reason, 0x61);
 308 }
 309
 310 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
 311 {
 312 #ifdef CONFIG_MCA
 313         /* Might actually be able to figure out what the guilty party
 314         * is. */
 315         if( MCA_bus ) {
 316                 mca_handle_nmi();
 317                 return;
 318         }
 319 #endif
 320         printk("Uhhuh. NMI received for unknown reason %02x.\n", reason);
 321         printk("Dazed and confused, but trying to continue\n");
 322         printk("Do you have a strange power saving mode enabled?\n");
 323 }
 324
 325 asmlinkage void do_nmi(struct pt_regs * regs, long error_code)
 326 {
 327         unsigned char reason = inb(0x61);
 328         extern atomic_t nmi_counter;
 329
 330         atomic_inc(&nmi_counter);
 331         if (reason & 0x80)
 332                 mem_parity_error(reason, regs);
 333         if (reason & 0x40)
 334                 io_check_error(reason, regs);
 335         if (!(reason & 0xc0))
 336                 unknown_nmi_error(reason, regs);
 337 }
 338
 339 /*
 340  * Careful - we must not do a lock-kernel until we have checked that the
 341  * debug fault happened in user mode. Getting debug exceptions while
 342  * in the kernel has to be handled without locking, to avoid deadlocks..
 343  *
 344  * Being careful here means that we don't have to be as careful in a
 345  * lot of more complicated places (task switching can be a bit lazy
 346  * about restoring all the debug state, and ptrace doesn't have to
 347  * find every occurrence of the TF bit that could be saved away even
 348  * by user code - and we don't have to be careful about what values
 349  * can be written to the debug registers because there are no really
 350  * bad cases).
 351  */
 352 asmlinkage void do_debug(struct pt_regs * regs, long error_code)
 353 {
 354         unsigned int condition;
 355         struct task_struct *tsk = current;
 356
 357         if (regs->eflags & VM_MASK)
 358                 goto debug_vm86;
 359
 360         __asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
 361
 362         /* Mask out spurious TF errors due to lazy TF clearing */
 363         if (condition & DR_STEP) {
 364                 /*
 365                  * The TF error should be masked out only if the current
 366                  * process is not traced and if the TRAP flag has been set
 367                  * previously by a tracing process (condition detected by
 368                  * the PF_DTRACE flag); remember that the i386 TRAP flag
 369                  * can be modified by the process itself in user mode,
 370                  * allowing programs to debug themselves without the ptrace()
 371                  * interface.
 372                  */
 373                 if ((tsk->flags & (PF_DTRACE|PF_PTRACED)) == PF_DTRACE)
 374                         goto clear_TF;
 375         }
 376
 377         /* Mast out spurious debug traps due to lazy DR7 setting */
 378         if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
 379                 if (!tsk->tss.debugreg[7])
 380                         goto clear_dr7;
 381         }
 382
 383         /* If this is a kernel mode trap, we need to reset db7 to allow us to continue sanely */
 384         if ((regs->xcs & 3) == 0)
 385                 goto clear_dr7;
 386
 387         /* Ok, finally something we can handle */
 388         tsk->tss.trap_no = 1;
 389         tsk->tss.error_code = error_code;
 390         force_sig(SIGTRAP, tsk);
 391         return;
 392
 393 debug_vm86:
 394         lock_kernel();
 395         handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
 396         unlock_kernel();
 397         return;
 398
 399 clear_dr7:
 400         __asm__("movl %0,%%db7"
 401                 : /* no output */
 402                 : "r" (0));
 403         return;
 404
 405 clear_TF:
 406         regs->eflags &= ~TF_MASK;
 407         return;
 408 }
 409
 410 /*
 411  * Note that we play around with the 'TS' bit in an attempt to get
 412  * the correct behaviour even in the presence of the asynchronous
 413  * IRQ13 behaviour
 414  */
 415 void math_error(void)
 416 {
 417         struct task_struct * task;
 418
 419         /*
 420          * Save the info for the exception handler
 421          * (this will also clear the error)
 422          */
 423         task = current;
 424         save_fpu(task);
 425         task->tss.trap_no = 16;
 426         task->tss.error_code = 0;
 427         force_sig(SIGFPE, task);
 428 }
 429
 430 asmlinkage void do_coprocessor_error(struct pt_regs * regs, long error_code)
 431 {
 432         ignore_irq13 = 1;
 433         math_error();
 434 }
 435
 436 asmlinkage void do_spurious_interrupt_bug(struct pt_regs * regs,
 437                                           long error_code)
 438 {
 439 #if 0
 440         /* No need to warn about this any longer. */
 441         printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
 442 #endif
 443 }
 444
 445 /*
 446  *  'math_state_restore()' saves the current math information in the
 447  * old math state array, and gets the new ones from the current task
 448  *
 449  * Careful.. There are problems with IBM-designed IRQ13 behaviour.
 450  * Don't touch unless you *really* know how it works.
 451  */
 452 asmlinkage void math_state_restore(struct pt_regs regs)
 453 {
 454         __asm__ __volatile__("clts");           /* Allow maths ops (or we recurse) */
 455         if(current->used_math)
 456                 __asm__("frstor %0": :"m" (current->tss.i387));
 457         else
 458         {
 459                 /*
 460                  *      Our first FPU usage, clean the chip.
 461                  */
 462                 __asm__("fninit");
 463                 current->used_math = 1;
 464         }
 465         current->flags|=PF_USEDFPU;             /* So we fnsave on switch_to() */
 466 }
 467
 468 #ifndef CONFIG_MATH_EMULATION
 469
 470 asmlinkage void math_emulate(long arg)
 471 {
 472         lock_kernel();
 473         printk("math-emulation not enabled and no coprocessor found.\n");
 474         printk("killing %s.\n",current->comm);
 475         force_sig(SIGFPE,current);
 476         schedule();
 477         unlock_kernel();
 478 }
 479
 480 #endif /* CONFIG_MATH_EMULATION */
 481
 482 __initfunc(void trap_init_f00f_bug(void))
 483 {
 484         unsigned long page;
 485         pgd_t * pgd;
 486         pmd_t * pmd;
 487         pte_t * pte;
 488
 489         /*
 490          * Allocate a new page in virtual address space,
 491          * move the IDT into it and write protect this page.
 492          */
 493         page = (unsigned long) vmalloc(PAGE_SIZE);
 494         pgd = pgd_offset(&init_mm, page);
 495         pmd = pmd_offset(pgd, page);
 496         pte = pte_offset(pmd, page);
 497         free_page(pte_page(*pte));
 498         *pte = mk_pte(&idt_table, PAGE_KERNEL_RO);
 499         local_flush_tlb();
 500
 501         /*
 502          * "idt" is magic - it overlaps the idt_descr
 503          * variable so that updating idt will automatically
 504          * update the idt descriptor..
 505          */
 506         idt = (struct desc_struct *)page;
 507         __asm__ __volatile__("lidt %0": "=m" (idt_descr));
 508 }
 509
 510 #define _set_gate(gate_addr,type,dpl,addr) \
 511 do { \
 512   int __d0, __d1; \
 513   __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
 514         "movw %4,%%dx\n\t" \
 515         "movl %%eax,%0\n\t" \
 516         "movl %%edx,%1" \
 517         :"=m" (*((long *) (gate_addr))), \
 518          "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
 519         :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
 520          "3" ((char *) (addr)),"2" (__KERNEL_CS << 16)); \
 521 } while (0)
 522
 523
 524 /*
 525  * This needs to use 'idt_table' rather than 'idt', and
 526  * thus use the _nonmapped_ version of the IDT, as the
 527  * Pentium F0 0F bugfix can have resulted in the mapped
 528  * IDT being write-protected.
 529  */
 530 void set_intr_gate(unsigned int n, void *addr)
 531 {
 532         _set_gate(idt_table+n,14,0,addr);
 533 }
 534
 535 static void __init set_trap_gate(unsigned int n, void *addr)
 536 {
 537         _set_gate(idt_table+n,15,0,addr);
 538 }
 539
 540 static void __init set_system_gate(unsigned int n, void *addr)
 541 {
 542         _set_gate(idt_table+n,15,3,addr);
 543 }
 544
 545 static void __init set_call_gate(void *a, void *addr)
 546 {
 547         _set_gate(a,12,3,addr);
 548 }
 549
 550 #define _set_seg_desc(gate_addr,type,dpl,base,limit) {\
 551         *((gate_addr)+1) = ((base) & 0xff000000) | \
 552                 (((base) & 0x00ff0000)>>16) | \
 553                 ((limit) & 0xf0000) | \
 554                 ((dpl)<<13) | \
 555                 (0x00408000) | \
 556                 ((type)<<8); \
 557         *(gate_addr) = (((base) & 0x0000ffff)<<16) | \
 558                 ((limit) & 0x0ffff); }
 559
 560 #define _set_tssldt_desc(n,addr,limit,type) \
 561 __asm__ __volatile__ ("movw %3,0(%2)\n\t" \
 562         "movw %%ax,2(%2)\n\t" \
 563         "rorl $16,%%eax\n\t" \
 564         "movb %%al,4(%2)\n\t" \
 565         "movb %4,5(%2)\n\t" \
 566         "movb $0,6(%2)\n\t" \
 567         "movb %%ah,7(%2)\n\t" \
 568         "rorl $16,%%eax" \
 569         : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type))
 570
 571 void set_tss_desc(unsigned int n, void *addr)
 572 {
 573         _set_tssldt_desc(gdt_table+FIRST_TSS_ENTRY+(n<<1), (int)addr, 235, 0x89);
 574 }
 575
 576 void set_ldt_desc(unsigned int n, void *addr, unsigned int size)
 577 {
 578         _set_tssldt_desc(gdt_table+FIRST_LDT_ENTRY+(n<<1), (int)addr, ((size << 3) - 1), 0x82);
 579 }
 580
 581 #ifdef CONFIG_X86_VISWS_APIC
 582
 583 /*
 584  * On Rev 005 motherboards legacy device interrupt lines are wired directly
 585  * to Lithium from the 307.  But the PROM leaves the interrupt type of each
 586  * 307 logical device set appropriate for the 8259.  Later we'll actually use
 587  * the 8259, but for now we have to flip the interrupt types to
 588  * level triggered, active lo as required by Lithium.
 589  */
 590
 591 #define REG     0x2e    /* The register to read/write */
 592 #define DEV     0x07    /* Register: Logical device select */
 593 #define VAL     0x2f    /* The value to read/write */
 594
 595 static void
 596 superio_outb(int dev, int reg, int val)
 597 {
 598         outb(DEV, REG);
 599         outb(dev, VAL);
 600         outb(reg, REG);
 601         outb(val, VAL);
 602 }
 603
 604 static int __attribute__ ((unused))
 605 superio_inb(int dev, int reg)
 606 {
 607         outb(DEV, REG);
 608         outb(dev, VAL);
 609         outb(reg, REG);
 610         return inb(VAL);
 611 }
 612
 613 #define FLOP    3       /* floppy logical device */
 614 #define PPORT   4       /* parallel logical device */
 615 #define UART5   5       /* uart2 logical device (not wired up) */
 616 #define UART6   6       /* uart1 logical device (THIS is the serial port!) */
 617 #define IDEST   0x70    /* int. destination (which 307 IRQ line) reg. */
 618 #define ITYPE   0x71    /* interrupt type register */
 619
 620 /* interrupt type bits */
 621 #define LEVEL   0x01    /* bit 0, 0 == edge triggered */
 622 #define ACTHI   0x02    /* bit 1, 0 == active lo */
 623
 624 static void
 625 superio_init(void)
 626 {
 627         if (visws_board_type == VISWS_320 && visws_board_rev == 5) {
 628                 superio_outb(UART6, IDEST, 0);  /* 0 means no intr propagated */
 629                 printk("SGI 320 rev 5: disabling 307 uart1 interrupt\n");
 630         }
 631 }
 632
 633 static void
 634 lithium_init(void)
 635 {
 636         set_fixmap(FIX_LI_PCIA, LI_PCI_A_PHYS);
 637         printk("Lithium PCI Bridge A, Bus Number: %d\n",
 638                                 li_pcia_read16(LI_PCI_BUSNUM) & 0xff);
 639         set_fixmap(FIX_LI_PCIB, LI_PCI_B_PHYS);
 640         printk("Lithium PCI Bridge B (PIIX4), Bus Number: %d\n",
 641                                 li_pcib_read16(LI_PCI_BUSNUM) & 0xff);
 642
 643         /* XXX blindly enables all interrupts */
 644         li_pcia_write16(LI_PCI_INTEN, 0xffff);
 645         li_pcib_write16(LI_PCI_INTEN, 0xffff);
 646 }
 647
 648 static void
 649 cobalt_init(void)
 650 {
 651         /*
 652          * On normal SMP PC this is used only with SMP, but we have to
 653          * use it and set it up here to start the Cobalt clock
 654          */
 655         set_fixmap(FIX_APIC_BASE, APIC_PHYS_BASE);
 656         printk("Local APIC ID %lx\n", apic_read(APIC_ID));
 657         printk("Local APIC Version %lx\n", apic_read(APIC_VERSION));
 658
 659         set_fixmap(FIX_CO_CPU, CO_CPU_PHYS);
 660         printk("Cobalt Revision %lx\n", co_cpu_read(CO_CPU_REV));
 661
 662         set_fixmap(FIX_CO_APIC, CO_APIC_PHYS);
 663         printk("Cobalt APIC ID %lx\n", co_apic_read(CO_APIC_ID));
 664
 665         /* Enable Cobalt APIC being careful to NOT change the ID! */
 666         co_apic_write(CO_APIC_ID, co_apic_read(CO_APIC_ID)|CO_APIC_ENABLE);
 667
 668         printk("Cobalt APIC enabled: ID reg %lx\n", co_apic_read(CO_APIC_ID));
 669 }
 670 #endif
 671 void __init trap_init(void)
 672 {
 673         if (readl(0x0FFFD9) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
 674                 EISA_bus = 1;
 675         set_call_gate(&default_ldt,lcall7);
 676         set_trap_gate(0,&divide_error);
 677         set_trap_gate(1,&debug);
 678         set_trap_gate(2,&nmi);
 679         set_system_gate(3,&int3);       /* int3-5 can be called from all */
 680         set_system_gate(4,&overflow);
 681         set_system_gate(5,&bounds);
 682         set_trap_gate(6,&invalid_op);
 683         set_trap_gate(7,&device_not_available);
 684         set_trap_gate(8,&double_fault);
 685         set_trap_gate(9,&coprocessor_segment_overrun);
 686         set_trap_gate(10,&invalid_TSS);
 687         set_trap_gate(11,&segment_not_present);
 688         set_trap_gate(12,&stack_segment);
 689         set_trap_gate(13,&general_protection);
 690         set_trap_gate(14,&page_fault);
 691         set_trap_gate(15,&spurious_interrupt_bug);
 692         set_trap_gate(16,&coprocessor_error);
 693         set_trap_gate(17,&alignment_check);
 694         set_system_gate(SYSCALL_VECTOR,&system_call);
 695
 696         /* set up GDT task & ldt entries */
 697         set_tss_desc(0, &init_task.tss);
 698         set_ldt_desc(0, &default_ldt, 1);
 699
 700         /* Clear NT, so that we won't have troubles with that later on */
 701         __asm__("pushfl ; andl $0xffffbfff,(%esp) ; popfl");
 702         load_TR(0);
 703         load_ldt(0);
 704 #ifdef CONFIG_X86_VISWS_APIC
 705         superio_init();
 706         lithium_init();
 707         cobalt_init();
 708 #endif
 709 }