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Import 2.3.99pre4-2
[davej-history.git] / drivers / usb / usb-ohci.c
blob1e07014f2b46e3164d8a33b4d139e7135ab10e0a
1 /*
2 * URB OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 *
6 * [ Initialisation is based on Linus' ]
7 * [ uhci code and gregs ohci fragments ]
8 * [ (C) Copyright 1999 Linus Torvalds ]
9 * [ (C) Copyright 1999 Gregory P. Smith]
10 *
11 *
12 * History:
13 *
14 * v5.2 1999/12/07 URB 3rd preview,
15 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
16 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
17 * i386: HUB, Keyboard, Mouse, Printer
18 *
19 * v4.3 1999/10/27 multiple HCs, bulk_request
20 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
21 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
22 * v4.0 1999/08/18
23 * v3.0 1999/06/25
24 * v2.1 1999/05/09 code clean up
25 * v2.0 1999/05/04
26 * v1.0 1999/04/27 initial release
27 *
28
29 */
30
31 #include <linux/config.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/kernel.h>
35 #include <linux/delay.h>
36 #include <linux/ioport.h>
37 #include <linux/sched.h>
38 #include <linux/malloc.h>
39 #include <linux/smp_lock.h>
40 #include <linux/errno.h>
41 #include <linux/timer.h>
42 #include <linux/list.h>
43 #include <linux/interrupt.h> /* for in_interrupt() */
44 #undef DEBUG
45 #include <linux/usb.h>
46
47 #include <asm/io.h>
48 #include <asm/irq.h>
49 #include <asm/system.h>
50 #include <asm/unaligned.h>
51
52 #define OHCI_USE_NPS
53
54 #include "usb-ohci.h"
55
56 #include <linux/pm.h>
57 static int handle_pm_event (struct pm_dev *dev, pm_request_t rqst, void *data);
58
59 #ifdef CONFIG_PMAC_PBOOK
60 #include <linux/adb.h>
61 #include <linux/pmu.h>
62 #endif
63
64 static DECLARE_WAIT_QUEUE_HEAD (op_wakeup);
65 static LIST_HEAD (ohci_hcd_list);
66 static spinlock_t usb_ed_lock = SPIN_LOCK_UNLOCKED;
67
68 /*-------------------------------------------------------------------------*
69 * URB support functions
70 *-------------------------------------------------------------------------*/
71
72 /* free the private part of an URB */
73
74 static void urb_rm_priv (urb_t * urb)
75 {
76 urb_priv_t * urb_priv = urb->hcpriv;
77 int i;
78 void * wait;
79
80 if (!urb_priv) return;
81
82 wait = urb_priv->wait;
83
84 for (i = 0; i < urb_priv->length; i++) {
85 if (urb_priv->td [i]) {
86 OHCI_FREE (urb_priv->td [i]);
87 }
88 }
89 kfree (urb->hcpriv);
90 urb->hcpriv = NULL;
91
92 if (wait) {
93 add_wait_queue (&op_wakeup, wait);
94 wake_up (&op_wakeup);
95 }
96 }
97
98 /*-------------------------------------------------------------------------*/
99
100 #ifdef DEBUG
101 static int sohci_get_current_frame_number (struct usb_device * dev);
102
103 /* debug| print the main components of an URB
104 * small: 0) header + data packets 1) just header */
105
106 static void urb_print (urb_t * urb, char * str, int small)
107 {
108 unsigned int pipe= urb->pipe;
109 int i, len;
110
111 if (!urb->dev || !urb->dev->bus) {
112 dbg("%s URB: no dev", str);
113 return;
114 }
115
116 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,flags:%4x,len:%d/%d,stat:%d(%x)",
117 str,
118 sohci_get_current_frame_number (urb->dev),
119 usb_pipedevice (pipe),
120 usb_pipeendpoint (pipe),
121 usb_pipeout (pipe)? 'O': 'I',
122 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
123 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
124 urb->transfer_flags,
125 urb->actual_length,
126 urb->transfer_buffer_length,
127 urb->status, urb->status);
128 if (!small) {
129 if (usb_pipecontrol (pipe)) {
130 printk (KERN_DEBUG __FILE__ ": cmd(8):");
131 for (i = 0; i < 8 ; i++)
132 printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
133 printk ("\n");
134 }
135 if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
136 printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
137 urb->actual_length,
138 urb->transfer_buffer_length);
139 len = usb_pipeout (pipe)?
140 urb->transfer_buffer_length: urb->actual_length;
141 for (i = 0; i < 16 && i < len; i++)
142 printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
143 printk ("%s stat:%d\n", i < len? "...": "", urb->status);
144 }
145 }
146
147 }
148 /* just for debugging; prints all 32 branches of the int ed tree inclusive iso eds*/
149 void ep_print_int_eds (ohci_t * ohci, char * str) {
150 int i, j;
151 __u32 * ed_p;
152 for (i= 0; i < 32; i++) {
153 j = 5;
154 printk (KERN_DEBUG __FILE__ " %s branch int %2d(%2x):", str, i, i);
155 ed_p = &(ohci->hcca.int_table [i]);
156 while (*ed_p != 0 && j--) {
157 ed_t *ed = (ed_t *) bus_to_virt(le32_to_cpup(ed_p));
158 printk (" ed: %4x;", ed->hwINFO);
159 ed_p = &ed->hwNextED;
160 }
161 printk ("\n");
162 }
163 }
164
165
166 #endif
167
168 /*-------------------------------------------------------------------------*
169 * Interface functions (URB)
170 *-------------------------------------------------------------------------*/
171
172 /* return a request to the completion handler */
173
174 static int sohci_return_urb (urb_t * urb)
175 {
176 urb_priv_t * urb_priv = urb->hcpriv;
177 urb_t * urbt;
178 unsigned long flags;
179 int i;
180
181 /* just to be sure */
182 if (!urb->complete) {
183 urb_rm_priv (urb);
184 usb_dec_dev_use (urb->dev);
185 return -1;
186 }
187
188 if (!urb_priv) return -1; /* urb already unlinked */
189
190 #ifdef DEBUG
191 urb_print (urb, "RET", usb_pipeout (urb->pipe));
192 #endif
193
194 switch (usb_pipetype (urb->pipe)) {
195 case PIPE_INTERRUPT:
196 urb->complete (urb); /* call complete and requeue URB */
197 urb->actual_length = 0;
198 urb->status = USB_ST_URB_PENDING;
199 if (urb_priv->state != URB_DEL)
200 td_submit_urb (urb);
201 break;
202
203 case PIPE_ISOCHRONOUS:
204 for (urbt = urb->next; urbt && (urbt != urb); urbt = urbt->next);
205 if (urbt) { /* send the reply and requeue URB */
206 urb->complete (urb);
207
208 spin_lock_irqsave (&usb_ed_lock, flags);
209 urb->actual_length = 0;
210 urb->status = USB_ST_URB_PENDING;
211 urb->start_frame = urb_priv->ed->last_iso + 1;
212 if (urb_priv->state != URB_DEL) {
213 for (i = 0; i < urb->number_of_packets; i++) {
214 urb->iso_frame_desc[i].actual_length = 0;
215 urb->iso_frame_desc[i].status = -EXDEV;
216 }
217 td_submit_urb (urb);
218 }
219 spin_unlock_irqrestore (&usb_ed_lock, flags);
220
221 } else { /* unlink URB, call complete */
222 urb_rm_priv (urb);
223 usb_dec_dev_use (urb->dev);
224 urb->complete (urb);
225 }
226 break;
227
228 case PIPE_BULK:
229 case PIPE_CONTROL: /* unlink URB, call complete */
230 urb_rm_priv (urb);
231 usb_dec_dev_use (urb->dev);
232 urb->complete (urb);
233 break;
234 }
235 return 0;
236 }
237
238 /*-------------------------------------------------------------------------*/
239
240 /* get a transfer request */
241
242 static int sohci_submit_urb (urb_t * urb)
243 {
244 ohci_t * ohci;
245 ed_t * ed;
246 urb_priv_t * urb_priv;
247 unsigned int pipe = urb->pipe;
248 int i, size = 0;
249 unsigned long flags;
250
251 if (!urb->dev || !urb->dev->bus) return -EINVAL;
252
253 if (urb->hcpriv) return -EINVAL; /* urb already in use */
254
255 // if(usb_endpoint_halted (urb->dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)))
256 // return -EPIPE;
257
258 usb_inc_dev_use (urb->dev);
259 ohci = (ohci_t *) urb->dev->bus->hcpriv;
260
261 #ifdef DEBUG
262 urb_print (urb, "SUB", usb_pipein (pipe));
263 #endif
264
265 /* a request to the virtual root hub */
266 if (usb_pipedevice (pipe) == ohci->rh.devnum)
267 return rh_submit_urb (urb);
268
269 /* when controller's hung, permit only hub cleanup attempts
270 * such as powering down ports */
271 if (ohci->disabled)
272 return -ESHUTDOWN;
273
274 /* every endpoint has a ed, locate and fill it */
275 if (!(ed = ep_add_ed (urb->dev, pipe, urb->interval, 1))) {
276 usb_dec_dev_use (urb->dev);
277 return -ENOMEM;
278 }
279
280 /* for the private part of the URB we need the number of TDs (size) */
281 switch (usb_pipetype (pipe)) {
282 case PIPE_BULK: /* one TD for every 4096 Byte */
283 size = (urb->transfer_buffer_length - 1) / 4096 + 1;
284 break;
285 case PIPE_ISOCHRONOUS: /* number of packets from URB */
286 size = urb->number_of_packets;
287 for (i = 0; i < urb->number_of_packets; i++) {
288 urb->iso_frame_desc[i].actual_length = 0;
289 urb->iso_frame_desc[i].status = -EXDEV;
290 }
291 break;
292 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
293 size = (urb->transfer_buffer_length == 0)? 2:
294 (urb->transfer_buffer_length - 1) / 4096 + 3;
295 break;
296 case PIPE_INTERRUPT: /* one TD */
297 size = 1;
298
299 break;
300 }
301
302 /* allocate the private part or the URB */
303 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (td_t *),
304 in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
305 if (!urb_priv) {
306 usb_dec_dev_use (urb->dev);
307 return -ENOMEM;
308 }
309 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (td_t *));
310
311 /* fill the private part of the URB */
312 urb->hcpriv = urb_priv;
313 urb_priv->length = size;
314 urb_priv->td_cnt = 0;
315 urb_priv->state = 0;
316 urb_priv->ed = ed;
317 urb_priv->wait = NULL;
318
319 /* allocate the TDs */
320 for (i = 0; i < size; i++) {
321 OHCI_ALLOC (urb_priv->td[i], sizeof (td_t));
322 if (!urb_priv->td[i]) {
323 usb_dec_dev_use (urb->dev);
324 urb_rm_priv (urb);
325 return -ENOMEM;
326 }
327 }
328 spin_lock_irqsave (&usb_ed_lock, flags);
329 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
330 urb_rm_priv(urb);
331 usb_dec_dev_use (urb->dev);
332 spin_unlock_irqrestore(&usb_ed_lock, flags);
333 return -EINVAL;
334 }
335
336 /* for ISOC transfers calculate start frame index */
337 if (urb->transfer_flags & USB_ISO_ASAP) {
338 urb->start_frame = ((ed->state == ED_OPER)? (ed->last_iso + 1):
339 (le16_to_cpu (ohci->hcca.frame_no) + 10)) & 0xffff;
340 }
341
342 if (ed->state != ED_OPER) /* link the ed into a chain if is not already */
343 ep_link (ohci, ed);
344
345 td_submit_urb (urb); /* fill the TDs and link it to the ed */
346
347 spin_unlock_irqrestore (&usb_ed_lock, flags);
348
349 urb->status = USB_ST_URB_PENDING;
350 // queue_urb(s, &urb->urb_list);
351
352 return 0;
353 }
354
355 /*-------------------------------------------------------------------------*/
356
357 /* deactivate all TDs and remove the private part of the URB */
358
359 static int sohci_unlink_urb (urb_t * urb)
360 {
361 unsigned long flags;
362 ohci_t * ohci;
363 DECLARE_WAITQUEUE (wait, current);
364
365 if (!urb) /* just to be sure */
366 return -EINVAL;
367
368 #ifdef DEBUG
369 urb_print (urb, "UNLINK", 1);
370 #endif
371
372 ohci = (ohci_t *) urb->dev->bus->hcpriv;
373
374 if (usb_pipedevice (urb->pipe) == ohci->rh.devnum)
375 return rh_unlink_urb (urb); /* a request to the virtual root hub */
376
377 if (urb->hcpriv) {
378 if (urb->status == USB_ST_URB_PENDING) { /* URB active? */
379 urb_priv_t * urb_priv = urb->hcpriv;
380 urb_priv->state = URB_DEL;
381 /* we want to delete the TDs of an URB from an ed
382 * request the deletion, it will be handled at the next USB-frame */
383 urb_priv->wait = &wait;
384
385 spin_lock_irqsave (&usb_ed_lock, flags);
386 ep_rm_ed (urb->dev, urb_priv->ed);
387 urb_priv->ed->state |= ED_URB_DEL;
388 spin_unlock_irqrestore (&usb_ed_lock, flags);
389
390 current->state = TASK_UNINTERRUPTIBLE;
391 if(schedule_timeout (HZ / 10)) /* wait until all TDs are deleted */
392 remove_wait_queue (&op_wakeup, &wait);
393 else
394 err("unlink URB timeout!");
395 } else
396 urb_rm_priv (urb);
397 usb_dec_dev_use (urb->dev);
398 }
399 return 0;
400 }
401
402 /*-------------------------------------------------------------------------*/
403
404 /* allocate private data space for a usb device */
405
406 static int sohci_alloc_dev (struct usb_device *usb_dev)
407 {
408 struct ohci_device * dev;
409
410 dev = kmalloc (sizeof (*dev), GFP_KERNEL);
411 if (!dev)
412 return -ENOMEM;
413
414 memset (dev, 0, sizeof (*dev));
415
416 usb_dev->hcpriv = dev;
417
418 return 0;
419 }
420
421 /*-------------------------------------------------------------------------*/
422
423 /* free private data space of usb device */
424
425 static int sohci_free_dev (struct usb_device * usb_dev)
426 {
427 unsigned long flags;
428 int i, cnt = 0;
429 ed_t * ed;
430 DECLARE_WAITQUEUE (wait, current);
431 struct ohci_device * dev = usb_to_ohci (usb_dev);
432 ohci_t * ohci = usb_dev->bus->hcpriv;
433
434 if (!dev) return 0;
435
436 if (usb_dev->devnum >= 0) {
437
438 /* delete all TDs of all EDs */
439 spin_lock_irqsave (&usb_ed_lock, flags);
440 for(i = 0; i < NUM_EDS; i++) {
441 ed = &(dev->ed[i]);
442 if (ed->state != ED_NEW) {
443 if (ed->state == ED_OPER) ep_unlink (ohci, ed);
444 ep_rm_ed (usb_dev, ed);
445 ed->state = ED_DEL;
446 cnt++;
447 }
448 }
449 spin_unlock_irqrestore (&usb_ed_lock, flags);
450
451 if (cnt > 0) {
452 dev->wait = &wait;
453 current->state = TASK_UNINTERRUPTIBLE;
454 schedule_timeout (HZ / 10);
455 remove_wait_queue (&op_wakeup, &wait);
456 }
457 }
458 kfree (dev);
459
460 return 0;
461 }
462
463 /*-------------------------------------------------------------------------*/
464
465 /* tell us the current USB frame number */
466
467 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
468 {
469 ohci_t * ohci = usb_dev->bus->hcpriv;
470
471 return le16_to_cpu (ohci->hcca.frame_no);
472 }
473
474 /*-------------------------------------------------------------------------*/
475
476 struct usb_operations sohci_device_operations = {
477 sohci_alloc_dev,
478 sohci_free_dev,
479 sohci_get_current_frame_number,
480 sohci_submit_urb,
481 sohci_unlink_urb
482 };
483
484 /*-------------------------------------------------------------------------*
485 * ED handling functions
486 *-------------------------------------------------------------------------*/
487
488 /* search for the right branch to insert an interrupt ed into the int tree
489 * do some load ballancing;
490 * returns the branch and
491 * sets the interval to interval = 2^integer (ld (interval)) */
492
493 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
494 {
495 int i, branch = 0;
496
497 /* search for the least loaded interrupt endpoint branch of all 32 branches */
498 for (i = 0; i < 32; i++)
499 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i]) branch = i;
500
501 branch = branch % interval;
502 for (i = branch; i < 32; i += interval) ohci->ohci_int_load [i] += load;
503
504 return branch;
505 }
506
507 /*-------------------------------------------------------------------------*/
508
509 /* 2^int( ld (inter)) */
510
511 static int ep_2_n_interval (int inter)
512 {
513 int i;
514 for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
515 return 1 << i;
516 }
517
518 /*-------------------------------------------------------------------------*/
519
520 /* the int tree is a binary tree
521 * in order to process it sequentially the indexes of the branches have to be mapped
522 * the mapping reverses the bits of a word of num_bits length */
523
524 static int ep_rev (int num_bits, int word)
525 {
526 int i, wout = 0;
527
528 for (i = 0; i < num_bits; i++) wout |= (((word >> i) & 1) << (num_bits - i - 1));
529 return wout;
530 }
531
532 /*-------------------------------------------------------------------------*/
533
534 /* link an ed into one of the HC chains */
535
536 static int ep_link (ohci_t * ohci, ed_t * edi)
537 {
538 int int_branch;
539 int i;
540 int inter;
541 int interval;
542 int load;
543 __u32 * ed_p;
544 volatile ed_t * ed = edi;
545
546 ed->state = ED_OPER;
547
548 switch (ed->type) {
549 case CTRL:
550 ed->hwNextED = 0;
551 if (ohci->ed_controltail == NULL) {
552 writel (virt_to_bus (ed), &ohci->regs->ed_controlhead);
553 } else {
554 ohci->ed_controltail->hwNextED = cpu_to_le32 (virt_to_bus (ed));
555 }
556 ed->ed_prev = ohci->ed_controltail;
557 ohci->ed_controltail = edi;
558 break;
559
560 case BULK:
561 ed->hwNextED = 0;
562 if (ohci->ed_bulktail == NULL) {
563 writel (virt_to_bus (ed), &ohci->regs->ed_bulkhead);
564 } else {
565 ohci->ed_bulktail->hwNextED = cpu_to_le32 (virt_to_bus (ed));
566 }
567 ed->ed_prev = ohci->ed_bulktail;
568 ohci->ed_bulktail = edi;
569 break;
570
571 case INT:
572 load = ed->int_load;
573 interval = ep_2_n_interval (ed->int_period);
574 ed->int_interval = interval;
575 int_branch = ep_int_ballance (ohci, interval, load);
576 ed->int_branch = int_branch;
577
578 for (i = 0; i < ep_rev (6, interval); i += inter) {
579 inter = 1;
580 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i) + int_branch]);
581 (*ed_p != 0) && (((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval >= interval);
582 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED))
583 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval);
584 ed->hwNextED = *ed_p;
585 *ed_p = cpu_to_le32 (virt_to_bus (ed));
586 }
587 #ifdef DEBUG
588 ep_print_int_eds (ohci, "LINK_INT");
589 #endif
590 break;
591
592 case ISO:
593 ed->hwNextED = 0;
594 ed->int_interval = 1;
595 if (ohci->ed_isotail != NULL) {
596 ohci->ed_isotail->hwNextED = cpu_to_le32 (virt_to_bus (ed));
597 ed->ed_prev = ohci->ed_isotail;
598 } else {
599 for ( i = 0; i < 32; i += inter) {
600 inter = 1;
601 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i)]);
602 *ed_p != 0;
603 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED))
604 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval);
605 *ed_p = cpu_to_le32 (virt_to_bus (ed));
606 }
607 ed->ed_prev = NULL;
608 }
609 ohci->ed_isotail = edi;
610 #ifdef DEBUG
611 ep_print_int_eds (ohci, "LINK_ISO");
612 #endif
613 break;
614 }
615 return 0;
616 }
617
618 /*-------------------------------------------------------------------------*/
619
620 /* unlink an ed from one of the HC chains.
621 * just the link to the ed is unlinked.
622 * the link from the ed still points to another operational ed or 0
623 * so the HC can eventually finish the processing of the unlinked ed */
624
625 static int ep_unlink (ohci_t * ohci, ed_t * ed)
626 {
627 int int_branch;
628 int i;
629 int inter;
630 int interval;
631 __u32 * ed_p;
632
633
634 switch (ed->type) {
635 case CTRL:
636 if (ed->ed_prev == NULL) {
637 writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_controlhead);
638 } else {
639 ed->ed_prev->hwNextED = ed->hwNextED;
640 }
641 if(ohci->ed_controltail == ed) {
642 ohci->ed_controltail = ed->ed_prev;
643 } else {
644 ((ed_t *) bus_to_virt (le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
645 }
646 break;
647
648 case BULK:
649 if (ed->ed_prev == NULL) {
650 writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_bulkhead);
651 } else {
652 ed->ed_prev->hwNextED = ed->hwNextED;
653 }
654 if (ohci->ed_bulktail == ed) {
655 ohci->ed_bulktail = ed->ed_prev;
656 } else {
657 ((ed_t *) bus_to_virt (le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
658 }
659 break;
660
661 case INT:
662 int_branch = ed->int_branch;
663 interval = ed->int_interval;
664
665 for (i = 0; i < ep_rev (6, interval); i += inter) {
666 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i) + int_branch]), inter = 1;
667 (*ed_p != 0) && (*ed_p != ed->hwNextED);
668 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED),
669 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval)) {
670 if(((ed_t *) bus_to_virt (le32_to_cpup (ed_p))) == ed) {
671 *ed_p = ed->hwNextED;
672 break;
673 }
674 }
675 }
676 for (i = int_branch; i < 32; i += interval) ohci->ohci_int_load[i] -= ed->int_load;
677 #ifdef DEBUG
678 ep_print_int_eds (ohci, "UNLINK_INT");
679 #endif break;
680
681 case ISO:
682 if (ohci->ed_isotail == ed)
683 ohci->ed_isotail = ed->ed_prev;
684 if (ed->hwNextED != 0)
685 ((ed_t *) bus_to_virt (le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
686
687 if (ed->ed_prev != NULL) {
688 ed->ed_prev->hwNextED = ed->hwNextED;
689 } else {
690 for (i = 0; i < 32; i += inter) {
691 inter = 1;
692 for (ed_p = &(ohci->hcca.int_table[ep_rev (5, i)]);
693 *ed_p != 0;
694 ed_p = &(((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->hwNextED)) {
695 inter = ep_rev (6, ((ed_t *) bus_to_virt (le32_to_cpup (ed_p)))->int_interval);
696 if(((ed_t *) bus_to_virt (le32_to_cpup (ed_p))) == ed) {
697 *ed_p = ed->hwNextED;
698 break;
699 }
700 }
701 }
702 }
703 #ifdef DEBUG
704 ep_print_int_eds (ohci, "UNLINK_ISO");
705 #endif
706 break;
707 }
708 ed->state = ED_UNLINK;
709 return 0;
710 }
711
712
713 /*-------------------------------------------------------------------------*/
714
715 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
716 * but the USB stack is a little bit stateless so we do it at every transaction
717 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
718 * in all other cases the state is left unchanged
719 * the ed info fields are setted anyway even though most of them should not change */
720
721 static ed_t * ep_add_ed (struct usb_device * usb_dev, unsigned int pipe, int interval, int load)
722 {
723 ohci_t * ohci = usb_dev->bus->hcpriv;
724 td_t * td;
725 ed_t * ed_ret;
726 volatile ed_t * ed;
727
728
729 spin_lock (&usb_ed_lock);
730
731 ed = ed_ret = &(usb_to_ohci (usb_dev)->ed[(usb_pipeendpoint (pipe) << 1) |
732 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))]);
733
734 if((ed->state & ED_DEL) || (ed->state & ED_URB_DEL))
735 return NULL; /* pending delete request */
736
737 if (ed->state == ED_NEW) {
738 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
739 OHCI_ALLOC (td, sizeof (*td)); /* dummy td; end of td list for ed */
740 if(!td) return NULL; /* out of memory */
741 ed->hwTailP = cpu_to_le32 (virt_to_bus (td));
742 ed->hwHeadP = ed->hwTailP;
743 ed->state = ED_UNLINK;
744 ed->type = usb_pipetype (pipe);
745 usb_to_ohci (usb_dev)->ed_cnt++;
746 }
747
748 ohci->dev[usb_pipedevice (pipe)] = usb_dev;
749
750 ed->hwINFO = cpu_to_le32 (usb_pipedevice (pipe)
751 | usb_pipeendpoint (pipe) << 7
752 | (usb_pipeisoc (pipe)? 0x8000: 0)
753 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
754 | usb_pipeslow (pipe) << 13
755 | usb_maxpacket (usb_dev, pipe, usb_pipeout (pipe)) << 16);
756
757 if (ed->type == INT && ed->state == ED_UNLINK) {
758 ed->int_period = interval;
759 ed->int_load = load;
760 }
761
762 spin_unlock(&usb_ed_lock);
763 return ed_ret;
764 }
765
766 /*-------------------------------------------------------------------------*/
767
768 /* request the removal of an endpoint
769 * put the ep on the rm_list and request a stop of the bulk or ctrl list
770 * real removal is done at the next start of frame (SOF) hardware interrupt */
771
772 static void ep_rm_ed (struct usb_device * usb_dev, ed_t * ed)
773 {
774 unsigned int frame;
775 ohci_t * ohci = usb_dev->bus->hcpriv;
776
777 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) return;
778
779 ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP);
780
781 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
782 writel (OHCI_INTR_SF, &ohci->regs->intrenable); /* enable sof interrupt */
783
784 frame = le16_to_cpu (ohci->hcca.frame_no) & 0x1;
785 ed->ed_rm_list = ohci->ed_rm_list[frame];
786 ohci->ed_rm_list[frame] = ed;
787
788 switch (ed->type) {
789 case CTRL: /* stop CTRL list */
790 writel (ohci->hc_control &= ~(0x01 << 4), &ohci->regs->control);
791 break;
792 case BULK: /* stop BULK list */
793 writel (ohci->hc_control &= ~(0x01 << 5), &ohci->regs->control);
794 break;
795 }
796 }
797
798 /*-------------------------------------------------------------------------*
799 * TD handling functions
800 *-------------------------------------------------------------------------*/
801
802 /* prepare a TD */
803
804 static void td_fill (unsigned int info, void * data, int len, urb_t * urb, int type, int index)
805 {
806 volatile td_t * td, * td_pt;
807 urb_priv_t * urb_priv = urb->hcpriv;
808
809 if (index >= urb_priv->length) {
810 err("internal OHCI error: TD index > length");
811 return;
812 }
813
814 td_pt = urb_priv->td [index];
815 /* fill the old dummy TD */
816 td = urb_priv->td [index] = (td_t *) bus_to_virt (le32_to_cpup (&urb_priv->ed->hwTailP) & 0xfffffff0);
817 td->ed = urb_priv->ed;
818 td->index = index;
819 td->urb = urb;
820 td->hwINFO = cpu_to_le32 (info);
821 td->type = type;
822 if ((td->ed->type & 3) == PIPE_ISOCHRONOUS) {
823 td->hwCBP = cpu_to_le32 (((!data || !len)?
824 0 : virt_to_bus (data)) & 0xFFFFF000);
825 td->ed->last_iso = info & 0xffff;
826 } else {
827 td->hwCBP = cpu_to_le32 (((!data || !len)? 0 : virt_to_bus (data)));
828 }
829 td->hwBE = cpu_to_le32 ((!data || !len )? 0: virt_to_bus (data + len - 1));
830 td->hwNextTD = cpu_to_le32 (virt_to_bus (td_pt));
831 td->hwPSW [0] = cpu_to_le16 ((virt_to_bus (data) & 0x0FFF) | 0xE000);
832 td_pt->hwNextTD = 0;
833 td->ed->hwTailP = td->hwNextTD;
834
835 td->next_dl_td = NULL; //td_pt;
836 }
837
838 /*-------------------------------------------------------------------------*/
839
840 /* prepare all TDs of a transfer */
841
842 static void td_submit_urb (urb_t * urb)
843 {
844 urb_priv_t * urb_priv = urb->hcpriv;
845 ohci_t * ohci = (ohci_t *) urb->dev->bus->hcpriv;
846 void * ctrl = urb->setup_packet;
847 void * data = urb->transfer_buffer;
848 int data_len = urb->transfer_buffer_length;
849 int cnt = 0;
850 __u32 info = 0;
851 unsigned int toggle = 0;
852
853 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
854 if(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe))) {
855 toggle = TD_T_TOGGLE;
856 } else {
857 toggle = TD_T_DATA0;
858 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), 1);
859 }
860
861 urb_priv->td_cnt = 0;
862
863 switch (usb_pipetype (urb->pipe)) {
864 case PIPE_BULK:
865 info = usb_pipeout (urb->pipe)?
866 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
867 while(data_len > 4096) {
868 td_fill (info | (cnt? TD_T_TOGGLE:toggle), data, 4096, urb, (cnt? 0: ST_ADDR) | ADD_LEN, cnt);
869 data += 4096; data_len -= 4096; cnt++;
870 }
871 info = usb_pipeout (urb->pipe)?
872 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
873 td_fill (info | (cnt? TD_T_TOGGLE:toggle), data, data_len, urb, (cnt? 0: ST_ADDR) | ADD_LEN, cnt);
874 cnt++;
875 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
876 break;
877
878 case PIPE_INTERRUPT:
879 info = usb_pipeout (urb->pipe)?
880 TD_CC | TD_DP_OUT | toggle: TD_CC | TD_R | TD_DP_IN | toggle;
881 td_fill (info, data, data_len, urb, ST_ADDR | ADD_LEN, cnt++);
882 break;
883
884 case PIPE_CONTROL:
885 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
886 td_fill (info, ctrl, 8, urb, ST_ADDR, cnt++);
887 if (data_len > 0) {
888 info = usb_pipeout (urb->pipe)?
889 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
890 td_fill (info, data, data_len, urb, ADD_LEN, cnt++);
891 }
892 info = usb_pipeout (urb->pipe)?
893 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
894 td_fill (info, NULL, 0, urb, 0, cnt++);
895 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
896 break;
897
898 case PIPE_ISOCHRONOUS:
899 for (cnt = 0; cnt < urb->number_of_packets; cnt++) {
900 td_fill (TD_CC|TD_ISO | ((urb->start_frame + cnt) & 0xffff),
901 (__u8 *) data + urb->iso_frame_desc[cnt].offset,
902 urb->iso_frame_desc[cnt].length, urb, (cnt? 0: ST_ADDR) | ADD_LEN, cnt);
903 }
904 break;
905 }
906 if (urb_priv->length != cnt)
907 dbg("TD LENGTH %d != CNT %d", urb_priv->length, cnt);
908 }
909
910 /*-------------------------------------------------------------------------*
911 * Done List handling functions
912 *-------------------------------------------------------------------------*/
913
914 /* replies to the request have to be on a FIFO basis so
915 * we reverse the reversed done-list */
916
917 static td_t * dl_reverse_done_list (ohci_t * ohci)
918 {
919 __u32 td_list_hc;
920 td_t * td_rev = NULL;
921 td_t * td_list = NULL;
922 urb_priv_t * urb_priv = NULL;
923 unsigned long flags;
924
925 spin_lock_irqsave (&usb_ed_lock, flags);
926
927 td_list_hc = le32_to_cpup (&ohci->hcca.done_head) & 0xfffffff0;
928 ohci->hcca.done_head = 0;
929
930 while (td_list_hc) {
931 td_list = (td_t *) bus_to_virt (td_list_hc);
932
933 if (TD_CC_GET (le32_to_cpup (&td_list->hwINFO))) {
934 urb_priv = (urb_priv_t *) td_list->urb->hcpriv;
935 dbg(" USB-error/status: %x : %p",
936 TD_CC_GET (le32_to_cpup (&td_list->hwINFO)), td_list);
937 if (td_list->ed->hwHeadP & cpu_to_le32 (0x1)) {
938 if (urb_priv && ((td_list->index + 1) < urb_priv->length)) {
939 td_list->ed->hwHeadP =
940 (urb_priv->td[urb_priv->length - 1]->hwNextTD & cpu_to_le32 (0xfffffff0)) |
941 (td_list->ed->hwHeadP & cpu_to_le32 (0x2));
942 urb_priv->td_cnt += urb_priv->length - td_list->index - 1;
943 } else
944 td_list->ed->hwHeadP &= cpu_to_le32 (0xfffffff2);
945 }
946 }
947
948 td_list->next_dl_td = td_rev;
949 td_rev = td_list;
950 td_list_hc = le32_to_cpup (&td_list->hwNextTD) & 0xfffffff0;
951 }
952 spin_unlock_irqrestore (&usb_ed_lock, flags);
953 return td_list;
954 }
955
956 /*-------------------------------------------------------------------------*/
957
958 /* there are some pending requests to remove
959 * - some of the eds (if ed->state & ED_DEL (set by sohci_free_dev)
960 * - some URBs/TDs if urb_priv->state == URB_DEL */
961
962 static void dl_del_list (ohci_t * ohci, unsigned int frame)
963 {
964 unsigned long flags;
965 ed_t * ed;
966 __u32 edINFO;
967 td_t * td = NULL, * td_next = NULL, * tdHeadP = NULL, * tdTailP;
968 __u32 * td_p;
969 int ctrl = 0, bulk = 0;
970
971 spin_lock_irqsave (&usb_ed_lock, flags);
972 for (ed = ohci->ed_rm_list[frame]; ed != NULL; ed = ed->ed_rm_list) {
973
974 tdTailP = bus_to_virt (le32_to_cpup (&ed->hwTailP) & 0xfffffff0);
975 tdHeadP = bus_to_virt (le32_to_cpup (&ed->hwHeadP) & 0xfffffff0);
976 edINFO = le32_to_cpup (&ed->hwINFO);
977 td_p = &ed->hwHeadP;
978
979 for (td = tdHeadP; td != tdTailP; td = td_next) {
980 urb_t * urb = td->urb;
981 urb_priv_t * urb_priv = td->urb->hcpriv;
982
983 td_next = bus_to_virt (le32_to_cpup (&td->hwNextTD) & 0xfffffff0);
984 if ((urb_priv->state == URB_DEL) || (ed->state & ED_DEL)) {
985 *td_p = td->hwNextTD | (*td_p & cpu_to_le32 (0x3));
986 if(++ (urb_priv->td_cnt) == urb_priv->length)
987 urb_rm_priv (urb);
988 } else {
989 td_p = &td->hwNextTD;
990 }
991
992 }
993 if (ed->state & ED_DEL) { /* set by sohci_free_dev */
994 struct ohci_device * dev = usb_to_ohci (ohci->dev[edINFO & 0x7F]);
995 OHCI_FREE (tdTailP); /* free dummy td */
996 ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP);
997 ed->state = ED_NEW;
998 /* if all eds are removed wake up sohci_free_dev */
999 if ((! --dev->ed_cnt) && dev->wait) {
1000 add_wait_queue (&op_wakeup, dev->wait);
1001 wake_up (&op_wakeup);
1002 }
1003 }
1004 else {
1005 ed->state &= ~ED_URB_DEL;
1006 ed->hwINFO &= ~cpu_to_le32 (OHCI_ED_SKIP);
1007 }
1008
1009 if ((ed->type & 3) == CTRL) ctrl |= 1;
1010 if ((ed->type & 3) == BULK) bulk |= 1;
1011 }
1012
1013 if (ctrl) writel (0, &ohci->regs->ed_controlcurrent); /* reset CTRL list */
1014 if (bulk) writel (0, &ohci->regs->ed_bulkcurrent); /* reset BULK list */
1015 if (!ohci->ed_rm_list[!frame]) /* start CTRL u. BULK list */
1016 writel (ohci->hc_control |= (0x03<<4), &ohci->regs->control);
1017 ohci->ed_rm_list[frame] = NULL;
1018
1019 spin_unlock_irqrestore (&usb_ed_lock, flags);
1020 }
1021
1022 /*-------------------------------------------------------------------------*/
1023
1024 /* td done list */
1025
1026 static void dl_done_list (ohci_t * ohci, td_t * td_list)
1027 {
1028 td_t * td_list_next = NULL;
1029 ed_t * ed;
1030 int dlen = 0;
1031 int cc = 0;
1032 urb_t * urb;
1033 urb_priv_t * urb_priv;
1034 __u32 tdINFO, tdBE, tdCBP, edHeadP, edTailP;
1035 __u16 tdPSW;
1036 unsigned long flags;
1037
1038 while (td_list) {
1039 td_list_next = td_list->next_dl_td;
1040
1041 urb = td_list->urb;
1042 urb_priv = urb->hcpriv;
1043 tdINFO = le32_to_cpup (&td_list->hwINFO);
1044 tdBE = le32_to_cpup (&td_list->hwBE);
1045 tdCBP = le32_to_cpup (&td_list->hwCBP);
1046
1047 ed = td_list->ed;
1048
1049 if (td_list->type & ST_ADDR)
1050 urb->actual_length = 0;
1051
1052 if (td_list->type & ADD_LEN) { /* accumulate length of multi td transfers */
1053 if (tdINFO & TD_ISO) {
1054 tdPSW = le16_to_cpu (td_list->hwPSW[0]);
1055 cc = (tdPSW >> 12) & 0xF;
1056 if (cc < 0xE) {
1057 if (usb_pipeout(urb->pipe)) {
1058 dlen = urb->iso_frame_desc[td_list->index].length;
1059 } else {
1060 dlen = tdPSW & 0x3ff;
1061 }
1062 urb->actual_length += dlen;
1063 urb->iso_frame_desc[td_list->index].actual_length = dlen;
1064 if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1065 cc = TD_CC_NOERROR;
1066
1067 urb->iso_frame_desc[td_list->index].status = cc_to_error[cc];
1068 }
1069 } else {
1070 if (tdBE != 0) {
1071 if (td_list->hwCBP == 0)
1072 urb->actual_length = bus_to_virt (tdBE) - urb->transfer_buffer + 1;
1073 else
1074 urb->actual_length = bus_to_virt (tdCBP) - urb->transfer_buffer;
1075 }
1076 }
1077 }
1078 /* error code of transfer */
1079 cc = TD_CC_GET (tdINFO);
1080 if( cc == TD_CC_STALL) usb_endpoint_halt(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
1081
1082 if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1083 cc = TD_CC_NOERROR;
1084 if (++(urb_priv->td_cnt) == urb_priv->length) {
1085 if (urb_priv->state != URB_DEL && !(ed->state & ED_DEL) && ed->state != ED_NEW) {
1086 urb->status = cc_to_error[cc];
1087 sohci_return_urb (urb);
1088 } else {
1089 urb_rm_priv (urb);
1090 }
1091 }
1092
1093 spin_lock_irqsave (&usb_ed_lock, flags);
1094 if (ed->state != ED_NEW) {
1095 edHeadP = le32_to_cpup (&ed->hwHeadP) & 0xfffffff0;
1096 edTailP = le32_to_cpup (&ed->hwTailP);
1097
1098 if((edHeadP == edTailP) && (ed->state == ED_OPER))
1099 ep_unlink (ohci, ed); /* unlink eds if they are not busy */
1100
1101 }
1102 spin_unlock_irqrestore (&usb_ed_lock, flags);
1103
1104 td_list = td_list_next;
1105 }
1106 }
1107
1108
1109
1110
1111 /*-------------------------------------------------------------------------*
1112 * Virtual Root Hub
1113 *-------------------------------------------------------------------------*/
1114
1115 static __u8 root_hub_dev_des[] =
1116 {
1117 0x12, /* __u8 bLength; */
1118 0x01, /* __u8 bDescriptorType; Device */
1119 0x00, /* __u16 bcdUSB; v1.0 */
1120 0x01,
1121 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
1122 0x00, /* __u8 bDeviceSubClass; */
1123 0x00, /* __u8 bDeviceProtocol; */
1124 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
1125 0x00, /* __u16 idVendor; */
1126 0x00,
1127 0x00, /* __u16 idProduct; */
1128 0x00,
1129 0x00, /* __u16 bcdDevice; */
1130 0x00,
1131 0x00, /* __u8 iManufacturer; */
1132 0x02, /* __u8 iProduct; */
1133 0x01, /* __u8 iSerialNumber; */
1134 0x01 /* __u8 bNumConfigurations; */
1135 };
1136
1137
1138 /* Configuration descriptor */
1139 static __u8 root_hub_config_des[] =
1140 {
1141 0x09, /* __u8 bLength; */
1142 0x02, /* __u8 bDescriptorType; Configuration */
1143 0x19, /* __u16 wTotalLength; */
1144 0x00,
1145 0x01, /* __u8 bNumInterfaces; */
1146 0x01, /* __u8 bConfigurationValue; */
1147 0x00, /* __u8 iConfiguration; */
1148 0x40, /* __u8 bmAttributes;
1149 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1150 0x00, /* __u8 MaxPower; */
1151
1152 /* interface */
1153 0x09, /* __u8 if_bLength; */
1154 0x04, /* __u8 if_bDescriptorType; Interface */
1155 0x00, /* __u8 if_bInterfaceNumber; */
1156 0x00, /* __u8 if_bAlternateSetting; */
1157 0x01, /* __u8 if_bNumEndpoints; */
1158 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
1159 0x00, /* __u8 if_bInterfaceSubClass; */
1160 0x00, /* __u8 if_bInterfaceProtocol; */
1161 0x00, /* __u8 if_iInterface; */
1162
1163 /* endpoint */
1164 0x07, /* __u8 ep_bLength; */
1165 0x05, /* __u8 ep_bDescriptorType; Endpoint */
1166 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
1167 0x03, /* __u8 ep_bmAttributes; Interrupt */
1168 0x08, /* __u16 ep_wMaxPacketSize; 8 Bytes */
1169 0x00,
1170 0xff /* __u8 ep_bInterval; 255 ms */
1171 };
1172
1173 /*
1174 For OHCI we need just the 2nd Byte, so we
1175 don't need this constant byte-array
1176
1177 static __u8 root_hub_hub_des[] =
1178 {
1179 0x00, * __u8 bLength; *
1180 0x29, * __u8 bDescriptorType; Hub-descriptor *
1181 0x02, * __u8 bNbrPorts; *
1182 0x00, * __u16 wHubCharacteristics; *
1183 0x00,
1184 0x01, * __u8 bPwrOn2pwrGood; 2ms *
1185 0x00, * __u8 bHubContrCurrent; 0 mA *
1186 0x00, * __u8 DeviceRemovable; *** 8 Ports max *** *
1187 0xff * __u8 PortPwrCtrlMask; *** 8 ports max *** *
1188 };
1189 */
1190
1191 /*-------------------------------------------------------------------------*/
1192
1193 /* prepare Interrupt pipe data; HUB INTERRUPT ENDPOINT */
1194
1195 static int rh_send_irq (ohci_t * ohci, void * rh_data, int rh_len)
1196 {
1197 int num_ports;
1198 int i;
1199 int ret;
1200 int len;
1201
1202 __u8 data[8];
1203
1204 num_ports = readl (&ohci->regs->roothub.a) & 0xff;
1205 *(__u8 *) data = (readl (&ohci->regs->roothub.status) & 0x00030000) > 0? 1: 0;
1206 ret = *(__u8 *) data;
1207
1208 for ( i = 0; i < num_ports; i++) {
1209 *(__u8 *) (data + (i + 1) / 8) |=
1210 ((readl (&ohci->regs->roothub.portstatus[i]) & 0x001f0000) > 0? 1: 0) << ((i + 1) % 8);
1211 ret += *(__u8 *) (data + (i + 1) / 8);
1212 }
1213 len = i/8 + 1;
1214
1215 if (ret > 0) {
1216 memcpy (rh_data, data, min (len, min (rh_len, sizeof(data))));
1217 return len;
1218 }
1219 return 0;
1220 }
1221
1222 /*-------------------------------------------------------------------------*/
1223
1224 /* Virtual Root Hub INTs are polled by this timer every "intervall" ms */
1225
1226 static void rh_int_timer_do (unsigned long ptr)
1227 {
1228 int len;
1229
1230 urb_t * urb = (urb_t *) ptr;
1231 ohci_t * ohci = urb->dev->bus->hcpriv;
1232
1233 if (ohci->disabled)
1234 return;
1235
1236 if(ohci->rh.send) {
1237 len = rh_send_irq (ohci, urb->transfer_buffer, urb->transfer_buffer_length);
1238 if (len > 0) {
1239 urb->actual_length = len;
1240 #ifdef DEBUG
1241 urb_print (urb, "RET-t(rh)", usb_pipeout (urb->pipe));
1242 #endif
1243 if (urb->complete) urb->complete (urb);
1244 }
1245 }
1246 rh_init_int_timer (urb);
1247 }
1248
1249 /*-------------------------------------------------------------------------*/
1250
1251 /* Root Hub INTs are polled by this timer */
1252
1253 static int rh_init_int_timer (urb_t * urb)
1254 {
1255 ohci_t * ohci = urb->dev->bus->hcpriv;
1256
1257 ohci->rh.interval = urb->interval;
1258 init_timer (&ohci->rh.rh_int_timer);
1259 ohci->rh.rh_int_timer.function = rh_int_timer_do;
1260 ohci->rh.rh_int_timer.data = (unsigned long) urb;
1261 ohci->rh.rh_int_timer.expires =
1262 jiffies + (HZ * (urb->interval < 30? 30: urb->interval)) / 1000;
1263 add_timer (&ohci->rh.rh_int_timer);
1264
1265 return 0;
1266 }
1267
1268 /*-------------------------------------------------------------------------*/
1269
1270 #define OK(x) len = (x); break
1271 #define WR_RH_STAT(x) writel((x), &ohci->regs->roothub.status)
1272 #define WR_RH_PORTSTAT(x) writel((x), &ohci->regs->roothub.portstatus[wIndex-1])
1273 #define RD_RH_STAT readl(&ohci->regs->roothub.status)
1274 #define RD_RH_PORTSTAT readl(&ohci->regs->roothub.portstatus[wIndex-1])
1275
1276 /* request to virtual root hub */
1277
1278 static int rh_submit_urb (urb_t * urb)
1279 {
1280 struct usb_device * usb_dev = urb->dev;
1281 ohci_t * ohci = usb_dev->bus->hcpriv;
1282 unsigned int pipe = urb->pipe;
1283 devrequest * cmd = (devrequest *) urb->setup_packet;
1284 void * data = urb->transfer_buffer;
1285 int leni = urb->transfer_buffer_length;
1286 int len = 0;
1287 int status = TD_CC_NOERROR;
1288
1289 __u32 datab[4];
1290 __u8 * data_buf = (__u8 *) datab;
1291
1292 __u16 bmRType_bReq;
1293 __u16 wValue;
1294 __u16 wIndex;
1295 __u16 wLength;
1296
1297 if (usb_pipeint(pipe)) {
1298
1299 ohci->rh.urb = urb;
1300 ohci->rh.send = 1;
1301 ohci->rh.interval = urb->interval;
1302 rh_init_int_timer(urb);
1303 urb->status = cc_to_error [TD_CC_NOERROR];
1304
1305 return 0;
1306 }
1307
1308 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1309 wValue = le16_to_cpu (cmd->value);
1310 wIndex = le16_to_cpu (cmd->index);
1311 wLength = le16_to_cpu (cmd->length);
1312 switch (bmRType_bReq) {
1313 /* Request Destination:
1314 without flags: Device,
1315 RH_INTERFACE: interface,
1316 RH_ENDPOINT: endpoint,
1317 RH_CLASS means HUB here,
1318 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1319 */
1320
1321 case RH_GET_STATUS:
1322 *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1323 case RH_GET_STATUS | RH_INTERFACE:
1324 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1325 case RH_GET_STATUS | RH_ENDPOINT:
1326 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1327 case RH_GET_STATUS | RH_CLASS:
1328 *(__u32 *) data_buf = cpu_to_le32 (RD_RH_STAT & 0x7fff7fff); OK (4);
1329 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1330 *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1331
1332 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1333 switch (wValue) {
1334 case (RH_ENDPOINT_STALL): OK (0);
1335 }
1336 break;
1337
1338 case RH_CLEAR_FEATURE | RH_CLASS:
1339 switch (wValue) {
1340 case RH_C_HUB_LOCAL_POWER:
1341 OK(0);
1342 case (RH_C_HUB_OVER_CURRENT):
1343 WR_RH_STAT(RH_HS_OCIC); OK (0);
1344 }
1345 break;
1346
1347 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1348 switch (wValue) {
1349 case (RH_PORT_ENABLE):
1350 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1351 case (RH_PORT_SUSPEND):
1352 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1353 case (RH_PORT_POWER):
1354 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1355 case (RH_C_PORT_CONNECTION):
1356 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1357 case (RH_C_PORT_ENABLE):
1358 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1359 case (RH_C_PORT_SUSPEND):
1360 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1361 case (RH_C_PORT_OVER_CURRENT):
1362 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1363 case (RH_C_PORT_RESET):
1364 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1365 }
1366 break;
1367
1368 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1369 switch (wValue) {
1370 case (RH_PORT_SUSPEND):
1371 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1372 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1373 if((RD_RH_PORTSTAT &1) != 0) WR_RH_PORTSTAT (RH_PS_PRS ); OK (0);
1374 case (RH_PORT_POWER):
1375 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1376 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1377 if((RD_RH_PORTSTAT &1) != 0) WR_RH_PORTSTAT (RH_PS_PES ); OK (0);
1378 }
1379 break;
1380
1381 case RH_SET_ADDRESS: ohci->rh.devnum = wValue; OK(0);
1382
1383 case RH_GET_DESCRIPTOR:
1384 switch ((wValue & 0xff00) >> 8) {
1385 case (0x01): /* device descriptor */
1386 len = min (leni, min (sizeof (root_hub_dev_des), wLength));
1387 data_buf = root_hub_dev_des; OK(len);
1388 case (0x02): /* configuration descriptor */
1389 len = min (leni, min (sizeof (root_hub_config_des), wLength));
1390 data_buf = root_hub_config_des; OK(len);
1391 case (0x03): /* string descriptors */
1392 len = usb_root_hub_string (wValue & 0xff,
1393 (int) ohci->regs, "OHCI",
1394 data, wLength);
1395 if (len > 0) {
1396 data_buf = data;
1397 OK (min (leni, len));
1398 }
1399 // else fallthrough
1400 default:
1401 status = TD_CC_STALL;
1402 }
1403 break;
1404
1405 case RH_GET_DESCRIPTOR | RH_CLASS:
1406 {
1407 __u32 temp = readl (&ohci->regs->roothub.a);
1408
1409 data_buf [0] = 9; // min length;
1410 data_buf [1] = 0x29;
1411 data_buf [2] = temp & RH_A_NDP;
1412 data_buf [3] = 0;
1413 if (temp & RH_A_PSM) /* per-port power switching? */
1414 data_buf [3] |= 0x1;
1415 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1416 data_buf [3] |= 0x10;
1417 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1418 data_buf [3] |= 0x8;
1419
1420 datab [1] = 0;
1421 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1422 temp = readl (&ohci->regs->roothub.b);
1423 data_buf [7] = temp & RH_B_DR;
1424 if (data_buf [2] < 7) {
1425 data_buf [8] = 0xff;
1426 } else {
1427 data_buf [0] += 2;
1428 data_buf [8] = (temp & RH_B_DR) >> 8;
1429 data_buf [10] = data_buf [9] = 0xff;
1430 }
1431
1432 len = min (leni, min (data_buf [0], wLength));
1433 OK (len);
1434 }
1435
1436 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1437
1438 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1439
1440 default:
1441 status = TD_CC_STALL;
1442 }
1443
1444 dbg("USB HC roothubstat1: %x", readl ( &(ohci->regs->roothub.portstatus[0]) ));
1445 dbg("USB HC roothubstat2: %x", readl ( &(ohci->regs->roothub.portstatus[1]) ));
1446
1447 len = min(len, leni);
1448 if (data != data_buf)
1449 memcpy (data, data_buf, len);
1450 urb->actual_length = len;
1451 urb->status = cc_to_error [status];
1452
1453 #ifdef DEBUG
1454 urb_print (urb, "RET(rh)", usb_pipeout (urb->pipe));
1455 #endif
1456
1457 if (urb->complete) urb->complete (urb);
1458 return 0;
1459 }
1460
1461 /*-------------------------------------------------------------------------*/
1462
1463 static int rh_unlink_urb (urb_t * urb)
1464 {
1465 ohci_t * ohci = urb->dev->bus->hcpriv;
1466
1467 ohci->rh.send = 0;
1468 del_timer (&ohci->rh.rh_int_timer);
1469 return 0;
1470 }
1471
1472 /*-------------------------------------------------------------------------*
1473 * HC functions
1474 *-------------------------------------------------------------------------*/
1475
1476 /* reset the HC not the BUS */
1477
1478 static int hc_reset (ohci_t * ohci)
1479 {
1480 int timeout = 30;
1481 int smm_timeout = 50; /* 0,5 sec */
1482
1483 if (readl (&ohci->regs->control) & 0x100) { /* SMM owns the HC */
1484 writel (0x08, &ohci->regs->cmdstatus); /* request ownership */
1485 dbg("USB HC TakeOver from SMM");
1486 while (readl (&ohci->regs->control) & 0x100) {
1487 wait_ms (10);
1488 if (--smm_timeout == 0) {
1489 err("USB HC TakeOver failed!");
1490 return -1;
1491 }
1492 }
1493 }
1494
1495 writel ((1 << 31), &ohci->regs->intrdisable); /* Disable HC interrupts */
1496 dbg("USB HC reset_hc: %x ;", readl (&ohci->regs->control));
1497 /* this seems to be needed for the lucent controller on powerbooks.. */
1498 writel (0, &ohci->regs->control); /* Move USB to reset state */
1499
1500 writel (1, &ohci->regs->cmdstatus); /* HC Reset */
1501 while ((readl (&ohci->regs->cmdstatus) & 0x01) != 0) { /* 10us Reset */
1502 if (--timeout == 0) {
1503 err("USB HC reset timed out!");
1504 return -1;
1505 }
1506 udelay (1);
1507 }
1508 ohci->disabled = 0;
1509 return 0;
1510 }
1511
1512 /*-------------------------------------------------------------------------*/
1513
1514 /* Start an OHCI controller, set the BUS operational
1515 * enable interrupts
1516 * connect the virtual root hub */
1517
1518 static int hc_start (ohci_t * ohci)
1519 {
1520 unsigned int mask;
1521 unsigned int fminterval;
1522 struct usb_device * usb_dev;
1523 struct ohci_device * dev;
1524
1525 /* Tell the controller where the control and bulk lists are
1526 * The lists are empty now. */
1527
1528 writel (0, &ohci->regs->ed_controlhead);
1529 writel (0, &ohci->regs->ed_bulkhead);
1530
1531 writel (virt_to_bus (&ohci->hcca), &ohci->regs->hcca); /* a reset clears this */
1532
1533 fminterval = 0x2edf;
1534 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1535 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1536 writel (fminterval, &ohci->regs->fminterval);
1537 writel (0x628, &ohci->regs->lsthresh);
1538
1539 /* Choose the interrupts we care about now, others later on demand */
1540 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1541
1542 writel (ohci->hc_control = 0xBF, &ohci->regs->control); /* USB Operational */
1543 writel (mask, &ohci->regs->intrenable);
1544 writel (mask, &ohci->regs->intrstatus);
1545
1546 #ifdef OHCI_USE_NPS
1547 writel ((readl(&ohci->regs->roothub.a) | 0x200) & ~0x100,
1548 &ohci->regs->roothub.a);
1549 writel (0x10000, &ohci->regs->roothub.status);
1550 mdelay ((readl(&ohci->regs->roothub.a) >> 23) & 0x1fe);
1551 #endif /* OHCI_USE_NPS */
1552
1553 /* connect the virtual root hub */
1554
1555 usb_dev = usb_alloc_dev (NULL, ohci->bus);
1556 if (!usb_dev) return -1;
1557
1558 dev = usb_to_ohci (usb_dev);
1559 ohci->bus->root_hub = usb_dev;
1560 usb_connect (usb_dev);
1561 if (usb_new_device (usb_dev) != 0) {
1562 usb_free_dev (usb_dev);
1563 return -1;
1564 }
1565
1566 return 0;
1567 }
1568
1569 /*-------------------------------------------------------------------------*/
1570
1571 /* an interrupt happens */
1572
1573 static void hc_interrupt (int irq, void * __ohci, struct pt_regs * r)
1574 {
1575 ohci_t * ohci = __ohci;
1576 struct ohci_regs * regs = ohci->regs;
1577 int ints;
1578
1579 if ((ohci->hcca.done_head != 0) && !(le32_to_cpup (&ohci->hcca.done_head) & 0x01)) {
1580 ints = OHCI_INTR_WDH;
1581 } else {
1582 if ((ints = (readl (&regs->intrstatus) & readl (&regs->intrenable))) == 0)
1583 return;
1584 }
1585
1586 dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca.frame_no));
1587
1588 if (ints & OHCI_INTR_UE) {
1589 ohci->disabled++;
1590 err ("OHCI Unrecoverable Error, controller disabled");
1591 }
1592
1593 if (ints & OHCI_INTR_WDH) {
1594 writel (OHCI_INTR_WDH, &regs->intrdisable);
1595 dl_done_list (ohci, dl_reverse_done_list (ohci));
1596 writel (OHCI_INTR_WDH, &regs->intrenable);
1597 }
1598
1599 if (ints & OHCI_INTR_SO) {
1600 dbg("USB Schedule overrun");
1601 writel (OHCI_INTR_SO, &regs->intrenable);
1602 }
1603
1604 if (ints & OHCI_INTR_SF) {
1605 unsigned int frame = le16_to_cpu (ohci->hcca.frame_no) & 1;
1606 writel (OHCI_INTR_SF, &regs->intrdisable);
1607 if (ohci->ed_rm_list[!frame] != NULL) {
1608 dl_del_list (ohci, !frame);
1609 }
1610 if (ohci->ed_rm_list[frame] != NULL) writel (OHCI_INTR_SF, &regs->intrenable);
1611 }
1612 writel (ints, &regs->intrstatus);
1613 writel (OHCI_INTR_MIE, &regs->intrenable);
1614 }
1615
1616 /*-------------------------------------------------------------------------*/
1617
1618 /* allocate OHCI */
1619
1620 static ohci_t * hc_alloc_ohci (void * mem_base)
1621 {
1622 int i;
1623 ohci_t * ohci;
1624 struct usb_bus * bus;
1625
1626 ohci = (ohci_t *) __get_free_pages (GFP_KERNEL, 1);
1627 if (!ohci)
1628 return NULL;
1629
1630 memset (ohci, 0, sizeof (ohci_t));
1631
1632 ohci->irq = -1;
1633 ohci->regs = mem_base;
1634
1635 /* for load ballancing of the interrupt branches */
1636 for (i = 0; i < NUM_INTS; i++) ohci->ohci_int_load[i] = 0;
1637 for (i = 0; i < NUM_INTS; i++) ohci->hcca.int_table[i] = 0;
1638
1639 /* end of control and bulk lists */
1640 ohci->ed_isotail = NULL;
1641 ohci->ed_controltail = NULL;
1642 ohci->ed_bulktail = NULL;
1643
1644 bus = usb_alloc_bus (&sohci_device_operations);
1645 if (!bus) {
1646 free_pages ((unsigned long) ohci, 1);
1647 return NULL;
1648 }
1649
1650 ohci->bus = bus;
1651 bus->hcpriv = (void *) ohci;
1652
1653 return ohci;
1654 }
1655
1656 /*-------------------------------------------------------------------------*/
1657
1658 /* De-allocate all resources.. */
1659
1660 static void hc_release_ohci (ohci_t * ohci)
1661 {
1662 dbg("USB HC release ohci");
1663
1664 /* disconnect all devices */
1665 if (ohci->bus->root_hub) usb_disconnect (&ohci->bus->root_hub);
1666
1667 hc_reset (ohci);
1668 writel (OHCI_USB_RESET, &ohci->regs->control);
1669 wait_ms (10);
1670
1671 if (ohci->irq >= 0) {
1672 free_irq (ohci->irq, ohci);
1673 ohci->irq = -1;
1674 }
1675
1676 usb_deregister_bus (ohci->bus);
1677 usb_free_bus (ohci->bus);
1678
1679 /* unmap the IO address space */
1680 iounmap (ohci->regs);
1681
1682 free_pages ((unsigned long) ohci, 1);
1683 }
1684
1685 /*-------------------------------------------------------------------------*/
1686
1687 /* Increment the module usage count, start the control thread and
1688 * return success. */
1689
1690 static int hc_found_ohci (struct pci_dev *dev, int irq, void * mem_base)
1691 {
1692 ohci_t * ohci;
1693 char buf[8], *bufp = buf;
1694
1695 #ifndef __sparc__
1696 sprintf(buf, "%d", irq);
1697 #else
1698 bufp = __irq_itoa(irq);
1699 #endif
1700 printk(KERN_INFO __FILE__ ": USB OHCI at membase 0x%lx, IRQ %s\n",
1701 (unsigned long) mem_base, bufp);
1702
1703 ohci = hc_alloc_ohci (mem_base);
1704 if (!ohci) {
1705 return -ENOMEM;
1706 }
1707
1708 INIT_LIST_HEAD (&ohci->ohci_hcd_list);
1709 list_add (&ohci->ohci_hcd_list, &ohci_hcd_list);
1710
1711 if (hc_reset (ohci) < 0) {
1712 hc_release_ohci (ohci);
1713 return -ENODEV;
1714 }
1715
1716 writel (ohci->hc_control = OHCI_USB_RESET, &ohci->regs->control);
1717 wait_ms (10);
1718 usb_register_bus (ohci->bus);
1719
1720 if (request_irq (irq, hc_interrupt, SA_SHIRQ, "ohci-usb", ohci) == 0) {
1721 struct pm_dev *pmdev;
1722
1723 ohci->irq = irq;
1724 hc_start (ohci);
1725
1726 pmdev = pm_register (PM_PCI_DEV,
1727 PM_PCI_ID(dev),
1728 handle_pm_event);
1729 if (pmdev)
1730 pmdev->data = ohci;
1731
1732 return 0;
1733 }
1734 err("request interrupt %d failed", irq);
1735 hc_release_ohci (ohci);
1736 return -EBUSY;
1737 }
1738
1739 /*-------------------------------------------------------------------------*/
1740
1741 static int hc_start_ohci (struct pci_dev * dev)
1742 {
1743 unsigned long mem_base;
1744
1745 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,0)
1746 mem_base = dev->resource[0].start;
1747 if (pci_enable_device(dev) < 0)
1748 return -ENODEV;
1749 #else
1750 u16 cmd;
1751
1752 mem_base = dev->base_address[0];
1753 if (mem_base & PCI_BASE_ADDRESS_SPACE_IO) return -ENODEV;
1754 mem_base &= PCI_BASE_ADDRESS_MEM_MASK;
1755
1756 /* Some Mac firmware will switch memory response off */
1757 pci_read_config_word(dev, PCI_COMMAND, &cmd);
1758 pci_write_config_word(dev, PCI_COMMAND, cmd | PCI_COMMAND_MEMORY);
1759 #endif
1760
1761 pci_set_master (dev);
1762 mem_base = (unsigned long) ioremap_nocache (mem_base, 4096);
1763
1764 if (!mem_base) {
1765 err("Error mapping OHCI memory");
1766 return -EFAULT;
1767 }
1768 return hc_found_ohci (dev, dev->irq, (void *) mem_base);
1769 }
1770
1771 /*-------------------------------------------------------------------------*/
1772
1773 #ifdef CONFIG_PMAC_PBOOK
1774
1775 /* On Powerbooks, put the controller into suspend mode when going
1776 * to sleep, and do a resume when waking up. */
1777
1778 static int ohci_sleep_notify (struct pmu_sleep_notifier * self, int when)
1779 {
1780 struct list_head * ohci_l;
1781 ohci_t * ohci;
1782
1783 for (ohci_l = ohci_hcd_list.next; ohci_l != &ohci_hcd_list; ohci_l = ohci_l->next) {
1784 ohci = list_entry (ohci_l, ohci_t, ohci_hcd_list);
1785
1786 switch (when) {
1787 case PBOOK_SLEEP_NOW:
1788 disable_irq (ohci->irq);
1789 writel (ohci->hc_control = OHCI_USB_SUSPEND, &ohci->regs->control);
1790 wait_ms (10);
1791 break;
1792 case PBOOK_WAKE:
1793 writel (ohci->hc_control = OHCI_USB_RESUME, &ohci->regs->control);
1794 wait_ms (20);
1795 writel (ohci->hc_control = 0xBF, &ohci->regs->control);
1796 enable_irq (ohci->irq);
1797 break;
1798 }
1799 }
1800 return PBOOK_SLEEP_OK;
1801 }
1802
1803 static struct pmu_sleep_notifier ohci_sleep_notifier = {
1804 ohci_sleep_notify, SLEEP_LEVEL_MISC,
1805 };
1806 #endif /* CONFIG_PMAC_PBOOK */
1807
1808 /*-------------------------------------------------------------------------*/
1809
1810 static int handle_pm_event (struct pm_dev *dev, pm_request_t rqst, void *data)
1811 {
1812 ohci_t * ohci = (ohci_t*) dev->data;
1813 if (ohci) {
1814 switch (rqst) {
1815 case PM_SUSPEND:
1816 dbg("USB-Bus suspend: %p", ohci);
1817 writel (ohci->hc_control = 0xFF, &ohci->regs->control);
1818 wait_ms (10);
1819 break;
1820 case PM_RESUME:
1821 dbg("USB-Bus resume: %p", ohci);
1822 writel (ohci->hc_control = 0x7F, &ohci->regs->control);
1823 wait_ms (20);
1824 writel (ohci->hc_control = 0xBF, &ohci->regs->control);
1825 break;
1826 }
1827 }
1828 return 0;
1829 }
1830
1831 /*-------------------------------------------------------------------------*/
1832
1833 #define PCI_CLASS_SERIAL_USB_OHCI 0x0C0310
1834
1835 int ohci_hcd_init (void)
1836 {
1837 int ret = -ENODEV;
1838 struct pci_dev * dev = NULL;
1839
1840 while ((dev = pci_find_class (PCI_CLASS_SERIAL_USB_OHCI, dev))) {
1841 if (hc_start_ohci(dev) >= 0) ret = 0;
1842 }
1843
1844 #ifdef CONFIG_PMAC_PBOOK
1845 pmu_register_sleep_notifier (&ohci_sleep_notifier);
1846 #endif
1847 return ret;
1848 }
1849
1850 /*-------------------------------------------------------------------------*/
1851
1852 #ifdef MODULE
1853 int init_module (void)
1854 {
1855 return ohci_hcd_init ();
1856 }
1857
1858 /*-------------------------------------------------------------------------*/
1859
1860 void cleanup_module (void)
1861 {
1862 ohci_t * ohci;
1863
1864 pm_unregister_all (handle_pm_event);
1865
1866 #ifdef CONFIG_PMAC_PBOOK
1867 pmu_unregister_sleep_notifier (&ohci_sleep_notifier);
1868 #endif
1869
1870 while (!list_empty (&ohci_hcd_list)) {
1871 ohci = list_entry (ohci_hcd_list.next, ohci_t, ohci_hcd_list);
1872 list_del (&ohci->ohci_hcd_list);
1873 INIT_LIST_HEAD (&ohci->ohci_hcd_list);
1874 hc_release_ohci (ohci);
1875 }
1876 }
1877 #endif //MODULE
1878
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