2 * $Id: via82cxxx.c,v 2.1e 2000/10/03 10:01:00 vojtech Exp $
4 * Copyright (c) 2000 Vojtech Pavlik
6 * Based on the work of:
15 * VIA vt82c586 IDE driver for Linux. Supports
17 * vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b, vt82c686a, vt8231
19 * southbridges, which can be found in
21 * VIA Apollo VP, VPX, VPX/97, VP2, VP2/97, VP3, MVP3, MVP4
22 * VIA Apollo Pro, Pro Plus, Pro 133, Pro 133A, ProMedia 601, ProSavage 605
23 * VIA Apollo KX133, KT133
24 * AMD-640, AMD-750 IronGate
26 * chipsets. Supports PIO 0-5, MWDMA 0-2, SWDMA 0-2 and
27 * UDMA 0-5 (includes UDMA33, 66 and 100) modes. UDMA100 isn't possible
28 * on any of the supported chipsets yet.
30 * UDMA66 and higher modes are autodetected only in case the BIOS has enabled them.
31 * To force UDMA66, use 'ide0=ata66' or 'ide1=ata66' on the kernel command line.
35 * This program is free software; you can redistribute it and/or modify
36 * it under the terms of the GNU General Public License as published by
37 * the Free Software Foundation; either version 2 of the License, or
38 * (at your option) any later version.
40 * This program is distributed in the hope that it will be useful,
41 * but WITHOUT ANY WARRANTY; without even the implied warranty of
42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
43 * GNU General Public License for more details.
45 * You should have received a copy of the GNU General Public License
46 * along with this program; if not, write to the Free Software
47 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
49 * Should you need to contact me, the author, you can do so either by
50 * e-mail - mail your message to <vojtech@suse.cz>, or by paper mail:
51 * Vojtech Pavlik, Ucitelska 1576, Prague 8, 182 00 Czech Republic
54 #include <linux/config.h>
55 #include <linux/types.h>
56 #include <linux/kernel.h>
57 #include <linux/timer.h>
59 #include <linux/ioport.h>
60 #include <linux/interrupt.h>
61 #include <linux/blkdev.h>
62 #include <linux/hdreg.h>
63 #include <linux/pci.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
66 #include <linux/ide.h>
69 #include "ide_modes.h"
71 #define VIA_BM_BASE 0x20
72 #define VIA_IDE_ENABLE 0x40
73 #define VIA_IDE_CONFIG 0x41
74 #define VIA_FIFO_CONFIG 0x43
75 #define VIA_MISC_1 0x44
76 #define VIA_MISC_2 0x45
77 #define VIA_MISC_3 0x46
78 #define VIA_DRIVE_TIMING 0x48
79 #define VIA_ADDRESS_SETUP 0x4c
80 #define VIA_UDMA_TIMING 0x50
81 #define VIA_PRI_SECTOR_SIZE 0x60
82 #define VIA_SEC_SECTOR_SIZE 0x68
85 * VIA SouthBridge chips.
92 } via_isa_bridges
[] = {
93 { "vt8231", PCI_DEVICE_ID_VIA_8231
, XFER_UDMA_4
},
94 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686
, XFER_UDMA_4
},
95 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596
, XFER_UDMA_4
},
96 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596
, XFER_UDMA_2
},
97 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, XFER_UDMA_2
},
98 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0
, XFER_UDMA_2
},
99 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0
, XFER_MW_DMA_2
},
100 { "Unknown SouthBridge", 0, XFER_UDMA_2
},
103 static unsigned char via_config
;
104 static unsigned char via_enabled
;
105 static unsigned int via_ata66
;
108 * PIO 0-5, MWDMA 0-2 and UDMA 0-5 timings (in nanoseconds).
109 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
110 * for PIO 5, which is a nonstandard extension.
112 * Dilemma: 8-bit (register) PIO accesses need more relaxed timing.
113 * Hopefully the chipset is taking care of that. If it doesn't
114 * do so, define VIA_USE_8_BIT_TIMING to see if it helps.
118 #define XFER_PIO_5 0x0d
121 static const struct {
124 short setup
; /* t1 */
125 short active
; /* t2 or tD */
126 short recover
; /* t2i or tK */
127 short cycle
; /* t0 */
128 short udma
; /* t2CYCTYP/2 */
130 { XFER_UDMA_5
, "UDMA5", 25, 70, 25, 120, 20 },
131 { XFER_UDMA_4
, "UDMA4", 25, 70, 25, 120, 30 },
132 { XFER_UDMA_3
, "UDMA3", 25, 70, 25, 120, 45 },
134 { XFER_UDMA_2
, "UDMA2", 25, 70, 25, 120, 60 },
135 { XFER_UDMA_1
, "UDMA1", 25, 70, 25, 120, 80 },
136 { XFER_UDMA_0
, "UDMA0", 25, 70, 25, 120, 120 },
138 { XFER_MW_DMA_2
, "MDMA2", 25, 70, 25, 120, 0 },
139 { XFER_MW_DMA_1
, "MDMA1", 45, 80, 50, 150, 0 },
140 { XFER_MW_DMA_0
, "MDMA0", 60, 215, 215, 480, 0 },
142 { XFER_SW_DMA_2
, "SDMA2", 60, 120, 120, 240, 0 },
143 { XFER_SW_DMA_1
, "SDMA1", 90, 240, 240, 480, 0 },
144 { XFER_SW_DMA_0
, "SDMA0",120, 480, 480, 960, 0 },
146 { XFER_PIO_5
, "PIO5", 20, 50, 30, 100, 0 },
147 { XFER_PIO_4
, "PIO4", 25, 70, 25, 120, 0 },
148 { XFER_PIO_3
, "PIO3", 30, 80, 70, 180, 0 },
150 #ifdef VIA_USE_8_BIT_TIMING
151 { XFER_PIO_2
, "PIO2", 30, 290, 60, 330, 0 },
152 { XFER_PIO_1
, "PIO1", 50, 290, 100, 383, 0 },
153 { XFER_PIO_0
, "PIO0", 70, 290, 300, 600, 0 },
155 { XFER_PIO_2
, "PIO2", 30, 100, 90, 240, 0 },
156 { XFER_PIO_1
, "PIO1", 50, 125, 100, 383, 0 },
157 { XFER_PIO_0
, "PIO0", 70, 165, 150, 600, 0 },
160 { XFER_PIO_SLOW
, "SLOW", 120, 290, 240, 960, 0 },
168 #ifdef CONFIG_PROC_FS
170 #include <linux/stat.h>
171 #include <linux/proc_fs.h>
174 static struct pci_dev
*bmide_dev
, *isa_dev
;
175 extern int (*via_display_info
)(char *, char **, off_t
, int); /* ide-proc.c */
177 static char *via_fifo
[] = { " 1 ", "3/4", "1/2", "1/4" };
178 static char *via_control3
[] = { "No limit", "64", "128", "192" };
180 #define via_print(format, arg...) p += sprintf(p, format "\n" , ## arg)
181 #define via_print_drive(name, format, arg...)\
182 p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n");
184 static int via_get_info(char *buffer
, char **addr
, off_t offset
, int count
)
186 short pci_clock
, speed
[4], cycle
[4], setup
[4], active
[4], recover
[4], umul
[4], uen
[4], udma
[4];
187 struct pci_dev
*dev
= bmide_dev
;
188 unsigned int v
, u
, i
, base
;
189 unsigned short c
, size0
, size1
;
190 unsigned char t
, c0
, c1
;
193 via_print("----------VIA BusMastering IDE Configuration----------------");
195 via_print("Driver Version: 2.1e");
197 pci_read_config_byte(isa_dev
, PCI_REVISION_ID
, &t
);
198 via_print("South Bridge: VIA %s rev %#x", via_isa_bridges
[via_config
].name
, t
);
200 pci_read_config_word(dev
, PCI_COMMAND
, &c
);
201 via_print("Command register: %#x", c
);
203 pci_read_config_byte(dev
, PCI_LATENCY_TIMER
, &t
);
204 via_print("Latency timer: %d", t
);
206 pci_clock
= system_bus_clock();
207 via_print("PCI clock: %dMHz", pci_clock
);
209 pci_read_config_byte(dev
, VIA_MISC_1
, &t
);
210 via_print("Master Read Cycle IRDY: %dws", (t
& 64) >>6 );
211 via_print("Master Write Cycle IRDY: %dws", (t
& 32) >> 5 );
212 via_print("FIFO Output Data 1/2 Clock Advance: %s", (t
& 16) ? "on" : "off" );
213 via_print("BM IDE Status Register Read Retry: %s", (t
& 8) ? "on" : "off" );
215 pci_read_config_byte(dev
, VIA_MISC_3
, &t
);
216 via_print("Max DRDY Pulse Width: %s%s", via_control3
[(t
& 0x03)], (t
& 0x03) ? "PCI clocks" : "");
218 via_print("-----------------------Primary IDE-------Secondary IDE------");
219 via_print("Read DMA FIFO flush: %10s%20s", (t
& 0x80) ? "on" : "off", (t
& 0x40) ? "on" : "off" );
220 via_print("End Sect. FIFO flush: %10s%20s", (t
& 0x20) ? "on" : "off", (t
& 0x10) ? "on" : "off" );
222 pci_read_config_byte(dev
, VIA_IDE_CONFIG
, &t
);
223 via_print("Prefetch Buffer: %10s%20s", (t
& 0x80) ? "on" : "off", (t
& 0x20) ? "on" : "off" );
224 via_print("Post Write Buffer: %10s%20s", (t
& 0x40) ? "on" : "off", (t
& 0x10) ? "on" : "off" );
226 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &t
);
227 via_print("FIFO size: %10d%20d", 16 - (((t
>> 5) & 1) + ((t
>> 6) & 1)) * 8,
228 (((t
>> 5) & 1) + ((t
>> 6) & 1)) * 8);
229 via_print("Threshold Prim.: %10s%20s", via_fifo
[(t
>> 2) & 3], via_fifo
[t
& 3]);
231 pci_read_config_word(dev
, VIA_PRI_SECTOR_SIZE
, &size0
);
232 pci_read_config_word(dev
, VIA_SEC_SECTOR_SIZE
, &size1
);
233 via_print("Bytes Per Sector: %10d%20d", size0
& 0xfff, size1
& 0xfff);
235 pci_read_config_dword(dev
, VIA_BM_BASE
, &base
);
236 base
= (base
& 0xfff0) ;
238 c0
= inb((unsigned short)base
+ 0x02);
239 c1
= inb((unsigned short)base
+ 0x0a);
241 via_print("Both channels togth: %10s%20s", (c0
& 0x80) ? "no" : "yes", (c1
& 0x80) ? "no" : "yes" );
243 via_print("-------------------drive0----drive1----drive2----drive3-----");
245 via_print("BMDMA enabled: %10s%10s%10s%10s", (c0
& 0x20) ? "yes" : "no", (c0
& 0x40) ? "yes" : "no",
246 (c1
& 0x20) ? "yes" : "no", (c1
& 0x40) ? "yes" : "no" );
248 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
249 pci_read_config_dword(dev
, VIA_DRIVE_TIMING
, &v
);
250 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
252 for (i
= 0; i
< 4; i
++) {
253 setup
[i
] = ((t
>> ((3 - i
) << 1) ) & 0x3) + 1;
254 active
[i
] = ((v
>> (((3 - i
) << 3) + 4)) & 0xf) + 1;
255 recover
[i
] = ((v
>> ((3 - i
) << 3) ) & 0xf) + 1;
256 udma
[i
] = ((u
>> ((3 - i
) << 3) ) & 0x7) + 2;
257 umul
[i
] = ((u
>> (((3 - i
) & 2) << 3)) & 0x8) ? 2 : 1;
258 uen
[i
] = ((u
>> ((3 - i
) << 3)) & 0x20) ? 1 : 0;
259 speed
[i
] = uen
[i
] ? 20 * pci_clock
* umul
[i
] / udma
[i
] :
260 20 * pci_clock
/ (active
[i
] + recover
[i
]);
261 cycle
[i
] = uen
[i
] ? 1000 / (pci_clock
* umul
[i
]) * udma
[i
] :
262 1000 / pci_clock
* (active
[i
] + recover
[i
]);
265 via_print_drive("Transfer Mode: ", "%10s", uen
[i
] ? "UDMA" : "DMA/PIO");
266 via_print_drive("Address Setup: ", "%8dns", (1000 / pci_clock
) * setup
[i
]);
267 via_print_drive("Active Pulse: ", "%8dns", (1000 / pci_clock
) * active
[i
]);
268 via_print_drive("Recovery Time: ", "%8dns", (1000 / pci_clock
) * recover
[i
]);
269 via_print_drive("Cycle Time: ", "%8dns", cycle
[i
]);
270 via_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed
[i
] / 10, speed
[i
] % 10);
272 return p
- buffer
; /* hoping it is less than 4K... */
277 #define FIT(v,min,max) ((v)>(max)?(max):((v)<(min)?(min):(v)))
278 #define ENOUGH(v,un) (((v)-1)/(un)+1)
281 #define via_write_config_byte(dev,number,value) do {\
282 printk(KERN_DEBUG "VP_IDE: Setting register %#x to %#x\n", number, value);\
283 pci_write_config_byte(dev,number,value); } while (0)
285 #define via_write_config_byte pci_write_config_byte
288 static int via_set_speed(ide_drive_t
*drive
, byte speed
)
290 struct pci_dev
*dev
= HWIF(drive
)->pci_dev
;
292 unsigned char t
, setup
, active
, recover
, cycle
;
294 if (drive
->dn
> 3) return -1;
296 T
= 1000 / system_bus_clock();
298 if (speed
> via_isa_bridges
[via_config
].speed
)
299 speed
= via_isa_bridges
[via_config
].speed
;
301 for (i
= 0; via_timing
[i
].mode
&& via_timing
[i
].mode
!= speed
; i
++);
304 printk(KERN_DEBUG
"VP_IDE: Setting drive %d to %s\n", drive
->dn
, via_timing
[i
].name
);
307 setup
= ENOUGH(via_timing
[i
].setup
, T
);
308 active
= ENOUGH(via_timing
[i
].active
, T
);
309 recover
= ENOUGH(via_timing
[i
].recover
, T
);
310 cycle
= ENOUGH(via_timing
[i
].cycle
, T
);
312 if (active
+ recover
< cycle
) {
313 active
+= (cycle
- (active
+ recover
)) / 2;
314 recover
= cycle
- active
;
321 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
322 t
= (t
& ~(3 << ((3 - drive
->dn
) << 1))) | (FIT(setup
- 1, 0, 3) << ((3 - drive
->dn
) << 1));
323 via_write_config_byte(dev
, VIA_ADDRESS_SETUP
, t
);
326 * PIO active & recover
329 via_write_config_byte(dev
, VIA_DRIVE_TIMING
+ (3 - drive
->dn
),
330 (FIT(active
- 1, 0, 0xf) << 4) | FIT(recover
- 1, 0, 0xf));
336 switch(via_isa_bridges
[via_config
].speed
) {
337 case XFER_UDMA_2
: t
= via_timing
[i
].udma
? (0xe0 | (FIT(ENOUGH(via_timing
[i
].udma
, T
), 2, 5) - 2)) : 0x03; break;
338 case XFER_UDMA_4
: t
= via_timing
[i
].udma
? (0xe8 | (FIT(ENOUGH(via_timing
[i
].udma
, T
/2), 2, 9) - 2)) : 0x0f; break;
341 if (via_isa_bridges
[via_config
].speed
!= XFER_MW_DMA_2
)
342 via_write_config_byte(dev
, VIA_UDMA_TIMING
+ (3 - drive
->dn
), t
);
348 if (!drive
->init_speed
) drive
->init_speed
= speed
;
349 if ((err
= ide_config_drive_speed(drive
, speed
)))
351 drive
->current_speed
= speed
;
356 static void config_chipset_for_pio(ide_drive_t
*drive
)
358 short eide_pio_timing
[] = {600, 383, 240, 180, 120, 100};
359 signed char pio
, ide_pio
;
361 if (drive
->id
->eide_pio_iordy
> 0) { /* Has timing table */
362 for (pio
= 5; pio
>= 0; pio
--)
363 if (drive
->id
->eide_pio_iordy
<= eide_pio_timing
[pio
])
365 } else { /* No timing table -> use mode capabilities */
366 pio
= (drive
->id
->eide_pio_modes
& 4) ? 5 :
367 (drive
->id
->eide_pio_modes
& 2) ? 4 :
368 (drive
->id
->eide_pio_modes
& 1) ? 3 :
369 (drive
->id
->tPIO
== 2) ? 2 :
370 (drive
->id
->tPIO
== 1) ? 1 : 0;
373 ide_pio
= ide_get_best_pio_mode(drive
, 255, 5, NULL
);
374 pio
= (pio
>= ide_pio
) ? pio
: ide_pio
; /* Phew. What about the blacklist? */
376 if (!pio
) pio
= (!drive
->id
->tPIO
) ? XFER_PIO_0
: XFER_PIO_SLOW
;
377 else pio
+= XFER_PIO_0
;
379 /* Fixup because of broken ide-probe.c */
380 drive
->dn
= HWIF(drive
)->channel
* 2 + (drive
->select
.b
.unit
& 1);
382 via_set_speed(drive
, pio
);
385 static void via82cxxx_tune_drive(ide_drive_t
*drive
, byte pio
)
388 config_chipset_for_pio(drive
);
392 if (pio
> 5) pio
= 5;
394 via_set_speed(drive
, XFER_PIO_0
+ pio
);
397 #ifdef CONFIG_BLK_DEV_IDEDMA
399 static int config_chipset_for_dma(ide_drive_t
*drive
)
401 struct hd_driveid
*id
= drive
->id
;
402 unsigned char ultra66
= eighty_ninty_three(drive
);
403 unsigned char speed
=
405 ((id
->dma_ultra
& 0x0010) && ultra66
) ? XFER_UDMA_4
:
406 ((id
->dma_ultra
& 0x0008) && ultra66
) ? XFER_UDMA_3
:
407 (id
->dma_ultra
& 0x0004) ? XFER_UDMA_2
:
408 (id
->dma_ultra
& 0x0002) ? XFER_UDMA_1
:
409 (id
->dma_ultra
& 0x0001) ? XFER_UDMA_0
:
410 (id
->dma_mword
& 0x0004) ? XFER_MW_DMA_2
:
411 (id
->dma_mword
& 0x0002) ? XFER_MW_DMA_1
:
412 (id
->dma_mword
& 0x0001) ? XFER_MW_DMA_0
:
413 (id
->dma_1word
& 0x0004) ? XFER_SW_DMA_2
:
414 (id
->dma_1word
& 0x0002) ? XFER_SW_DMA_1
:
415 (id
->dma_1word
& 0x0001) ? XFER_SW_DMA_0
: 0;
417 if (!speed
) return (int) ide_dma_off_quietly
;
419 via_set_speed(drive
, speed
);
421 return (int) ide_dma_on
;
425 * Almost a library function.
428 static int config_drive_xfer_rate(ide_drive_t
*drive
)
430 struct hd_driveid
*id
= drive
->id
;
431 ide_dma_action_t dma_func
= ide_dma_on
;
433 if (id
&& (id
->capability
& 1) && HWIF(drive
)->autodma
) {
434 /* Consult the list of known "bad" drives */
435 if (ide_dmaproc(ide_dma_bad_drive
, drive
)) {
436 dma_func
= ide_dma_off
;
439 dma_func
= ide_dma_off_quietly
;
440 if (id
->field_valid
& 4) {
441 if (id
->dma_ultra
& 0x002F) {
442 /* Force if Capable UltraDMA */
443 dma_func
= config_chipset_for_dma(drive
);
444 if ((id
->field_valid
& 2) &&
445 (dma_func
!= ide_dma_on
))
448 } else if (id
->field_valid
& 2) {
450 if (id
->dma_mword
& 0x0007) {
451 /* Force if Capable regular DMA modes */
452 dma_func
= config_chipset_for_dma(drive
);
453 if (dma_func
!= ide_dma_on
)
456 } else if (ide_dmaproc(ide_dma_good_drive
, drive
)) {
457 if (id
->eide_dma_time
> 150) {
460 /* Consult the list of known "good" drives */
461 dma_func
= config_chipset_for_dma(drive
);
462 if (dma_func
!= ide_dma_on
)
467 } else if ((id
->capability
& 8) || (id
->field_valid
& 2)) {
469 dma_func
= ide_dma_off_quietly
;
471 config_chipset_for_pio(drive
);
473 return HWIF(drive
)->dmaproc(dma_func
, drive
);
477 int via82cxxx_dmaproc(ide_dma_action_t func
, ide_drive_t
*drive
)
479 if (func
== ide_dma_check
)
480 return config_drive_xfer_rate(drive
);
481 return ide_dmaproc(func
, drive
);
483 #endif /* CONFIG_BLK_DEV_IDEDMA */
485 unsigned int __init
pci_init_via82cxxx(struct pci_dev
*dev
, const char *name
)
487 struct pci_dev
*isa
= NULL
;
488 unsigned char f
, t
, m
;
492 * Find ISA bridge to see how good the IDE is.
495 for (via_config
= 0; via_isa_bridges
[via_config
].id
; via_config
++)
496 if ((isa
= pci_find_device(PCI_VENDOR_ID_VIA
, via_isa_bridges
[via_config
].id
, NULL
)))
502 if (via_isa_bridges
[via_config
].id
== PCI_DEVICE_ID_VIA_82C586_0
) {
503 pci_read_config_byte(isa
, PCI_REVISION_ID
, &t
);
504 if (t
< 0x30) via_config
++; /* vt82c586a */
505 if (t
< 0x20) via_config
++; /* vt82c586 */
508 if (via_isa_bridges
[via_config
].id
== PCI_DEVICE_ID_VIA_82C596
) {
509 pci_read_config_byte(isa
, PCI_REVISION_ID
, &t
);
510 if (t
< 0x10) via_config
++; /* vt82c596a */
514 * Check UDMA66 mode set by BIOS.
517 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
519 for (i
= 0; i
< 4; i
++) {
520 pci_read_config_byte(dev
, VIA_UDMA_TIMING
+ (3 - i
), &t
);
521 if ((u
& (0x80000 >> ((i
>> 1) << 4))) && ((t
& 7) < 2)) via_ata66
|= (1 << (i
>> 1));
525 printk(KERN_DEBUG
"VP_IDE: BIOS enabled ATA66: primary: %s, secondary: %s\n",
526 via_ata66
& 1 ? "yes" : "no", via_ata66
& 2 ? "yes" : "no");
530 * Set UDMA66 double clock bits.
532 if (via_isa_bridges
[via_config
].speed
== XFER_UDMA_4
)
533 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
| 0x80008);
536 * Set up FIFO, flush, prefetch and post-writes.
539 pci_read_config_dword(dev
, VIA_IDE_ENABLE
, &u
);
540 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &f
);
541 pci_read_config_byte(dev
, VIA_IDE_CONFIG
, &t
);
542 pci_read_config_byte(dev
, VIA_MISC_3
, &m
);
544 f
&= 0x90; t
&= 0x0f; m
&= 0x0f;
547 case 2: via_enabled
= 1; f
|= 0x06; t
|= 0xc0; m
|= 0xa0; break; /* primary only, 3/4 */
548 case 1: via_enabled
= 2; f
|= 0x69; t
|= 0x30; m
|= 0x50; break; /* secondary only, 3/4 */
549 case 3: via_enabled
= 3;
550 default: f
|= 0x2a; t
|= 0xf0; m
|= 0xf0; break; /* fifo evenly distributed */
553 via_write_config_byte(dev
, VIA_FIFO_CONFIG
, f
);
554 via_write_config_byte(dev
, VIA_IDE_CONFIG
, t
);
555 via_write_config_byte(dev
, VIA_MISC_3
, m
);
558 * Print the boot message.
561 printk(KERN_INFO
"VP_IDE: VIA %s IDE %s controller on pci%d:%d.%d\n",
562 via_isa_bridges
[via_config
].name
,
563 via_isa_bridges
[via_config
].speed
>= XFER_UDMA_4
? "UDMA66" :
564 via_isa_bridges
[via_config
].speed
>= XFER_UDMA_2
? "UDMA33" : "MWDMA16",
565 dev
->bus
->number
, PCI_SLOT(dev
->devfn
), PCI_FUNC(dev
->devfn
));
567 * Register /proc/ide/via entry
570 #if defined(CONFIG_PROC_FS)
575 via_display_info
= &via_get_info
;
583 * Since we don't have a way to detect the 80-wire ribbon cable
584 * we rely on the BIOS detection. We also check the IDENTIFY byte
585 * 93 to check the drive's point of view. I think we could return
589 unsigned int __init
ata66_via82cxxx(ide_hwif_t
*hwif
)
591 return ((via_enabled
& via_ata66
) >> hwif
->channel
) & 1;
594 void __init
ide_init_via82cxxx(ide_hwif_t
*hwif
)
596 hwif
->tuneproc
= &via82cxxx_tune_drive
;
597 hwif
->speedproc
= &via_set_speed
;
598 hwif
->drives
[0].autotune
= 1;
599 hwif
->drives
[1].autotune
= 1;
602 #ifdef CONFIG_BLK_DEV_IDEDMA
603 if (hwif
->dma_base
) {
604 hwif
->dmaproc
= &via82cxxx_dmaproc
;
607 #endif /* CONFIG_BLK_DEV_IDEDMA */
611 * We allow the BM-DMA driver only work on enabled interfaces.
614 void __init
ide_dmacapable_via82cxxx(ide_hwif_t
*hwif
, unsigned long dmabase
)
616 if ((via_enabled
>> hwif
->channel
) & 1)
617 ide_setup_dma(hwif
, dmabase
, 8);