drivers/misc/parport_ax.c

   1 /* $Id: parport_ax.c,v 1.17 1999/01/20 06:18:54 davem Exp $
   2  * Parallel-port routines for Sun Ultra/AX architecture
   3  *
   4  * Author: Eddie C. Dost <ecd@skynet.be>
   5  *
   6  * based on work by:
   7  *          Phil Blundell <Philip.Blundell@pobox.com>
   8  *          Tim Waugh <tim@cyberelk.demon.co.uk>
   9  *          Jose Renau <renau@acm.org>
  10  *          David Campbell <campbell@tirian.che.curtin.edu.au>
  11  *          Grant Guenther <grant@torque.net>
  12  */
  13
  14 #include <linux/string.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17 #include <linux/errno.h>
  18 #include <linux/ioport.h>
  19 #include <linux/kernel.h>
  20 #include <linux/malloc.h>
  21 #include <linux/init.h>
  22
  23 #include <linux/parport.h>
  24
  25 #include <asm/ptrace.h>
  26 #include <linux/interrupt.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/ebus.h>
  30 #include <asm/ns87303.h>
  31 #include <asm/irq.h>
  32
  33
  34 /*
  35  * Define this if you have Devices which don't support short
  36  * host read/write cycles.
  37  */
  38 #undef HAVE_SLOW_DEVICES
  39
  40
  41 #define DATA            0x00
  42 #define STATUS          0x01
  43 #define CONTROL         0x02
  44 #define EPPADDR         0x03
  45 #define EPPDATA         0x04
  46
  47 #define CFIFO           0x400
  48 #define DFIFO           0x400
  49 #define TFIFO           0x400
  50 #define CONFIGA         0x400
  51 #define CONFIGB         0x401
  52 #define ECONTROL        0x402
  53
  54 static void parport_ax_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  55 {
  56         parport_generic_irq(irq, (struct parport *) dev_id, regs);
  57 }
  58
  59 void
  60 parport_ax_write_epp(struct parport *p, unsigned char d)
  61 {
  62         outb(d, p->base + EPPDATA);
  63 }
  64
  65 unsigned char
  66 parport_ax_read_epp(struct parport *p)
  67 {
  68         return inb(p->base + EPPDATA);
  69 }
  70
  71 void
  72 parport_ax_write_epp_addr(struct parport *p, unsigned char d)
  73 {
  74         outb(d, p->base + EPPADDR);
  75 }
  76
  77 unsigned char
  78 parport_ax_read_epp_addr(struct parport *p)
  79 {
  80         return inb(p->base + EPPADDR);
  81 }
  82
  83 int parport_ax_epp_clear_timeout(struct parport *pb);
  84
  85 int
  86 parport_ax_check_epp_timeout(struct parport *p)
  87 {
  88         if (!(inb(p->base+STATUS) & 1))
  89                 return 0;
  90         parport_ax_epp_clear_timeout(p);
  91         return 1;
  92 }
  93
  94 unsigned char
  95 parport_ax_read_configb(struct parport *p)
  96 {
  97         return inb(p->base + CONFIGB);
  98 }
  99
 100 void
 101 parport_ax_write_data(struct parport *p, unsigned char d)
 102 {
 103         outb(d, p->base + DATA);
 104 }
 105
 106 unsigned char
 107 parport_ax_read_data(struct parport *p)
 108 {
 109         return inb(p->base + DATA);
 110 }
 111
 112 void
 113 parport_ax_write_control(struct parport *p, unsigned char d)
 114 {
 115         outb(d, p->base + CONTROL);
 116 }
 117
 118 unsigned char
 119 parport_ax_read_control(struct parport *p)
 120 {
 121         return inb(p->base + CONTROL);
 122 }
 123
 124 unsigned char
 125 parport_ax_frob_control(struct parport *p, unsigned char mask,  unsigned char val)
 126 {
 127         unsigned char old = inb(p->base + CONTROL);
 128         outb(((old & ~mask) ^ val), p->base + CONTROL);
 129         return old;
 130 }
 131
 132 void
 133 parport_ax_write_status(struct parport *p, unsigned char d)
 134 {
 135         outb(d, p->base + STATUS);
 136 }
 137
 138 unsigned char
 139 parport_ax_read_status(struct parport *p)
 140 {
 141         return inb(p->base + STATUS);
 142 }
 143
 144 void
 145 parport_ax_write_econtrol(struct parport *p, unsigned char d)
 146 {
 147         outb(d, p->base + ECONTROL);
 148 }
 149
 150 unsigned char
 151 parport_ax_read_econtrol(struct parport *p)
 152 {
 153         return inb(p->base + ECONTROL);
 154 }
 155
 156 unsigned char
 157 parport_ax_frob_econtrol(struct parport *p, unsigned char mask, unsigned char val)
 158 {
 159         unsigned char old = inb(p->base + ECONTROL);
 160         outb(((old & ~mask) ^ val), p->base + ECONTROL);
 161         return old;
 162 }
 163
 164 void
 165 parport_ax_change_mode(struct parport *p, int m)
 166 {
 167         parport_ax_frob_econtrol(p, 0xe0, m << 5);
 168 }
 169
 170 void
 171 parport_ax_write_fifo(struct parport *p, unsigned char v)
 172 {
 173         outb(v, p->base + DFIFO);
 174 }
 175
 176 unsigned char
 177 parport_ax_read_fifo(struct parport *p)
 178 {
 179         return inb(p->base + DFIFO);
 180 }
 181
 182 void
 183 parport_ax_disable_irq(struct parport *p)
 184 {
 185         struct linux_ebus_dma *dma = p->private_data;
 186         unsigned int dcsr;
 187
 188         dcsr = readl((unsigned long)&dma->dcsr);
 189         dcsr &= ~(EBUS_DCSR_INT_EN);
 190         writel(dcsr, (unsigned long)&dma->dcsr);
 191 }
 192
 193 void
 194 parport_ax_enable_irq(struct parport *p)
 195 {
 196         struct linux_ebus_dma *dma = p->private_data;
 197         unsigned int dcsr;
 198
 199         dcsr = readl((unsigned long)&dma->dcsr);
 200         dcsr |= EBUS_DCSR_INT_EN;
 201         writel(dcsr, (unsigned long)&dma->dcsr);
 202 }
 203
 204 int
 205 parport_ax_claim_resources(struct parport *p)
 206 {
 207 }
 208
 209 void
 210 parport_ax_init_state(struct parport_state *s)
 211 {
 212         s->u.pc.ctr = 0xc;
 213         s->u.pc.ecr = 0x0;
 214 }
 215
 216 void
 217 parport_ax_save_state(struct parport *p, struct parport_state *s)
 218 {
 219         s->u.pc.ctr = parport_ax_read_control(p);
 220         s->u.pc.ecr = parport_ax_read_econtrol(p);
 221 }
 222
 223 void
 224 parport_ax_restore_state(struct parport *p, struct parport_state *s)
 225 {
 226         parport_ax_write_control(p, s->u.pc.ctr);
 227         parport_ax_write_econtrol(p, s->u.pc.ecr);
 228 }
 229
 230 size_t
 231 parport_ax_epp_read_block(struct parport *p, void *buf, size_t length)
 232 {
 233         return 0; /* FIXME */
 234 }
 235
 236 size_t
 237 parport_ax_epp_write_block(struct parport *p, void *buf, size_t length)
 238 {
 239         return 0; /* FIXME */
 240 }
 241
 242 int
 243 parport_ax_ecp_read_block(struct parport *p, void *buf, size_t length,
 244                           void (*fn)(struct parport *, void *, size_t),
 245                           void *handle)
 246 {
 247         return 0; /* FIXME */
 248 }
 249
 250 int
 251 parport_ax_ecp_write_block(struct parport *p, void *buf, size_t length,
 252                            void (*fn)(struct parport *, void *, size_t),
 253                            void *handle)
 254 {
 255         return 0; /* FIXME */
 256 }
 257
 258 void
 259 parport_ax_inc_use_count(void)
 260 {
 261 #ifdef MODULE
 262         MOD_INC_USE_COUNT;
 263 #endif
 264 }
 265
 266 void
 267 parport_ax_dec_use_count(void)
 268 {
 269 #ifdef MODULE
 270         MOD_DEC_USE_COUNT;
 271 #endif
 272 }
 273
 274 static void parport_ax_fill_inode(struct inode *inode, int fill)
 275 {
 276 #ifdef MODULE
 277         if (fill)
 278                 MOD_INC_USE_COUNT;
 279         else
 280                 MOD_DEC_USE_COUNT;
 281 #endif
 282 }
 283
 284 static struct parport_operations parport_ax_ops =
 285 {
 286         parport_ax_write_data,
 287         parport_ax_read_data,
 288
 289         parport_ax_write_control,
 290         parport_ax_read_control,
 291         parport_ax_frob_control,
 292
 293         parport_ax_write_econtrol,
 294         parport_ax_read_econtrol,
 295         parport_ax_frob_econtrol,
 296
 297         parport_ax_write_status,
 298         parport_ax_read_status,
 299
 300         parport_ax_write_fifo,
 301         parport_ax_read_fifo,
 302
 303         parport_ax_change_mode,
 304
 305         parport_ax_write_epp,
 306         parport_ax_read_epp,
 307         parport_ax_write_epp_addr,
 308         parport_ax_read_epp_addr,
 309         parport_ax_check_epp_timeout,
 310
 311         parport_ax_epp_write_block,
 312         parport_ax_epp_read_block,
 313
 314         parport_ax_ecp_write_block,
 315         parport_ax_ecp_read_block,
 316
 317         parport_ax_init_state,
 318         parport_ax_save_state,
 319         parport_ax_restore_state,
 320
 321         parport_ax_enable_irq,
 322         parport_ax_disable_irq,
 323         parport_ax_interrupt,
 324
 325         parport_ax_inc_use_count,
 326         parport_ax_dec_use_count,
 327         parport_ax_fill_inode
 328 };
 329
 330
 331 /******************************************************
 332  *  MODE detection section:
 333  */
 334
 335 /*
 336  * Clear TIMEOUT BIT in EPP MODE
 337  */
 338 int parport_ax_epp_clear_timeout(struct parport *pb)
 339 {
 340         unsigned char r;
 341
 342         if (!(parport_ax_read_status(pb) & 0x01))
 343                 return 1;
 344
 345         /* To clear timeout some chips require double read */
 346         parport_ax_read_status(pb);
 347         r = parport_ax_read_status(pb);
 348         parport_ax_write_status(pb, r | 0x01); /* Some reset by writing 1 */
 349         parport_ax_write_status(pb, r & 0xfe); /* Others by writing 0 */
 350         r = parport_ax_read_status(pb);
 351
 352         return !(r & 0x01);
 353 }
 354
 355 /* Check for ECP
 356  *
 357  * Old style XT ports alias io ports every 0x400, hence accessing ECONTROL
 358  * on these cards actually accesses the CTR.
 359  *
 360  * Modern cards don't do this but reading from ECONTROL will return 0xff
 361  * regardless of what is written here if the card does NOT support
 362  * ECP.
 363  *
 364  * We will write 0x2c to ECONTROL and 0xcc to CTR since both of these
 365  * values are "safe" on the CTR since bits 6-7 of CTR are unused.
 366  */
 367 static int parport_ECR_present(struct parport *pb)
 368 {
 369         unsigned int r;
 370         unsigned char octr = pb->ops->read_control(pb),
 371           oecr = pb->ops->read_econtrol(pb);
 372
 373         r = pb->ops->read_control(pb);
 374         if ((pb->ops->read_econtrol(pb) & 0x3) == (r & 0x3)) {
 375                 pb->ops->write_control(pb, r ^ 0x2 ); /* Toggle bit 1 */
 376
 377                 r = pb->ops->read_control(pb);
 378                 if ((pb->ops->read_econtrol(pb) & 0x2) == (r & 0x2)) {
 379                         pb->ops->write_control(pb, octr);
 380                         return 0; /* Sure that no ECONTROL register exists */
 381                 }
 382         }
 383
 384         if ((pb->ops->read_econtrol(pb) & 0x3 ) != 0x1)
 385                 return 0;
 386
 387         pb->ops->write_econtrol(pb, 0x34);
 388         if (pb->ops->read_econtrol(pb) != 0x35)
 389                 return 0;
 390
 391         pb->ops->write_econtrol(pb, oecr);
 392         pb->ops->write_control(pb, octr);
 393
 394         return PARPORT_MODE_PCECR;
 395 }
 396
 397 static int parport_ECP_supported(struct parport *pb)
 398 {
 399         int i;
 400         unsigned char oecr = pb->ops->read_econtrol(pb);
 401
 402         /* If there is no ECONTROL, we have no hope of supporting ECP. */
 403         if (!(pb->modes & PARPORT_MODE_PCECR))
 404                 return 0;
 405
 406         /*
 407          * Using LGS chipset it uses ECONTROL register, but
 408          * it doesn't support ECP or FIFO MODE
 409          */
 410
 411         pb->ops->write_econtrol(pb, 0xc0); /* TEST FIFO */
 412         for (i=0; i < 1024 && (pb->ops->read_econtrol(pb) & 0x01); i++)
 413                 pb->ops->write_fifo(pb, 0xaa);
 414
 415         pb->ops->write_econtrol(pb, oecr);
 416         return (i == 1024) ? 0 : PARPORT_MODE_PCECP;
 417 }
 418
 419 /* Detect PS/2 support.
 420  *
 421  * Bit 5 (0x20) sets the PS/2 data direction; setting this high
 422  * allows us to read data from the data lines.  In theory we would get back
 423  * 0xff but any peripheral attached to the port may drag some or all of the
 424  * lines down to zero.  So if we get back anything that isn't the contents
 425  * of the data register we deem PS/2 support to be present.
 426  *
 427  * Some SPP ports have "half PS/2" ability - you can't turn off the line
 428  * drivers, but an external peripheral with sufficiently beefy drivers of
 429  * its own can overpower them and assert its own levels onto the bus, from
 430  * where they can then be read back as normal.  Ports with this property
 431  * and the right type of device attached are likely to fail the SPP test,
 432  * (as they will appear to have stuck bits) and so the fact that they might
 433  * be misdetected here is rather academic.
 434  */
 435
 436 static int parport_PS2_supported(struct parport *pb)
 437 {
 438         int ok = 0;
 439         unsigned char octr = pb->ops->read_control(pb);
 440
 441         pb->ops->write_control(pb, octr | 0x20);  /* try to tri-state buffer */
 442
 443         pb->ops->write_data(pb, 0x55);
 444         if (pb->ops->read_data(pb) != 0x55) ok++;
 445
 446         pb->ops->write_data(pb, 0xaa);
 447         if (pb->ops->read_data(pb) != 0xaa) ok++;
 448
 449         pb->ops->write_control(pb, octr);          /* cancel input mode */
 450
 451         return ok ? PARPORT_MODE_PCPS2 : 0;
 452 }
 453
 454 static int parport_ECPPS2_supported(struct parport *pb)
 455 {
 456         int mode;
 457         unsigned char oecr = pb->ops->read_econtrol(pb);
 458
 459         if (!(pb->modes & PARPORT_MODE_PCECR))
 460                 return 0;
 461
 462         pb->ops->write_econtrol(pb, 0x20);
 463
 464         mode = parport_PS2_supported(pb);
 465
 466         pb->ops->write_econtrol(pb, oecr);
 467         return mode ? PARPORT_MODE_PCECPPS2 : 0;
 468 }
 469
 470 #define printmode(x)                                    \
 471 {                                                       \
 472         if (p->modes & PARPORT_MODE_PC##x) {            \
 473                 printk("%s%s", f ? "," : "", #x);       \
 474                 f++;                                    \
 475         }                                               \
 476 }
 477
 478 int
 479 init_one_port(struct linux_ebus_device *dev)
 480 {
 481         struct parport tmpport, *p;
 482         unsigned long base;
 483         unsigned long config;
 484         unsigned char tmp;
 485         int irq, dma;
 486
 487         /* Pointer to NS87303 Configuration Registers */
 488         config = dev->base_address[1];
 489
 490         /* Setup temporary access to Device operations */
 491         tmpport.base = dev->base_address[0];
 492         tmpport.ops = &parport_ax_ops;
 493
 494         /* Enable ECP mode, set bit 2 of the CTR first */
 495         tmpport.ops->write_control(&tmpport, 0x04);
 496         tmp = ns87303_readb(config, PCR);
 497         tmp |= (PCR_EPP_IEEE | PCR_ECP_ENABLE | PCR_ECP_CLK_ENA);
 498         ns87303_writeb(config, PCR, tmp);
 499
 500         /* LPT CTR bit 5 controls direction of parallel port */
 501         tmp = ns87303_readb(config, PTR);
 502         tmp |= PTR_LPT_REG_DIR;
 503         ns87303_writeb(config, PTR, tmp);
 504
 505         /* Configure IRQ to Push Pull, Level Low */
 506         tmp = ns87303_readb(config, PCR);
 507         tmp &= ~(PCR_IRQ_ODRAIN);
 508         tmp |= PCR_IRQ_POLAR;
 509         ns87303_writeb(config, PCR, tmp);
 510
 511 #ifndef HAVE_SLOW_DEVICES
 512         /* Enable Zero Wait State for ECP */
 513         tmp = ns87303_readb(config, FCR);
 514         tmp |= FCR_ZWS_ENA;
 515         ns87303_writeb(config, FCR, tmp);
 516 #endif
 517
 518         /*
 519          * Now continue initializing the port
 520          */
 521         base = dev->base_address[0];
 522         irq = dev->irqs[0];
 523         dma = PARPORT_DMA_AUTO;
 524
 525         if (!(p = parport_register_port(base, irq, dma, &parport_ax_ops)))
 526                 return 0;
 527
 528         /* Save away pointer to our EBus DMA */
 529         p->private_data = (void *)dev->base_address[2];
 530
 531         p->modes = PARPORT_MODE_PCSPP | parport_PS2_supported(p);
 532         if (!check_region(p->base + 0x400, 3)) {
 533                 p->modes |= parport_ECR_present(p);
 534                 p->modes |= parport_ECP_supported(p);
 535                 p->modes |= parport_ECPPS2_supported(p);
 536         }
 537         p->size = 3;
 538
 539         if (p->dma == PARPORT_DMA_AUTO)
 540                 p->dma = (p->modes & PARPORT_MODE_PCECP) ? 0 : PARPORT_DMA_NONE;
 541
 542         if (p->irq != PARPORT_IRQ_NONE) {
 543                 int err;
 544                 if ((err = request_irq(p->irq, parport_ax_interrupt,
 545                                        0, p->name, p)) != 0)
 546                         return err;
 547                 else
 548                         parport_ax_enable_irq(p);
 549         }
 550         request_region(p->base, p->size, p->name);
 551         if (p->modes & PARPORT_MODE_PCECR)
 552                 request_region(p->base+0x400, 3, p->name);
 553         request_region((unsigned long)p->private_data,
 554                        sizeof(struct linux_ebus_dma), p->name);
 555
 556         printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
 557         if (p->irq != PARPORT_IRQ_NONE)
 558                 printk(", irq %s", __irq_itoa(p->irq));
 559         if (p->dma != PARPORT_DMA_NONE)
 560                 printk(", dma %d", p->dma);
 561         printk(" [");
 562         {
 563                 int f = 0;
 564                 printmode(SPP);
 565                 printmode(PS2);
 566                 printmode(ECP);
 567                 printmode(ECPPS2);
 568         }
 569         printk("]\n");
 570         parport_proc_register(p);
 571
 572         p->ops->write_control(p, 0x0c);
 573         p->ops->write_data(p, 0);
 574
 575         if (parport_probe_hook)
 576                 (*parport_probe_hook)(p);
 577
 578         parport_announce_port (p);
 579
 580         return 1;
 581 }
 582
 583 EXPORT_NO_SYMBOLS;
 584
 585 #ifdef MODULE
 586 int init_module(void)
 587 #else
 588 __initfunc(int parport_ax_init(void))
 589 #endif
 590 {
 591         struct linux_ebus *ebus;
 592         struct linux_ebus_device *edev;
 593         int count = 0;
 594
 595         for_each_ebus(ebus) {
 596                 for_each_ebusdev(edev, ebus) {
 597                         if (!strcmp(edev->prom_name, "ecpp"))
 598                                 count += init_one_port(edev);
 599                 }
 600         }
 601         return count ? 0 : -ENODEV;
 602 }
 603
 604 #ifdef MODULE
 605 void
 606 cleanup_module(void)
 607 {
 608         struct parport *p = parport_enumerate(), *tmp;
 609         while (p) {
 610                 tmp = p->next;
 611                 if (p->modes & PARPORT_MODE_PCSPP) {
 612                         if (p->irq != PARPORT_IRQ_NONE) {
 613                                 parport_ax_disable_irq(p);
 614                                 free_irq(p->irq, p);
 615                         }
 616                         release_region(p->base, p->size);
 617                         if (p->modes & PARPORT_MODE_PCECR)
 618                                 release_region(p->base+0x400, 3);
 619                         release_region((unsigned long)p->private_data,
 620                                        sizeof(struct linux_ebus_dma));
 621                         parport_proc_unregister(p);
 622                         parport_unregister_port(p);
 623                 }
 624                 p = tmp;
 625         }
 626 }
 627 #endif