Import 2.3.16
[davej-history.git] / arch / alpha / kernel / core_polaris.c
blob39ae36f8e795c49f296da142f0495167d61f8953
1 /*
2 * linux/arch/alpha/kernel/core_polaris.c
4 * POLARIS chip-specific code
5 */
7 #include <linux/kernel.h>
8 #include <linux/types.h>
9 #include <linux/pci.h>
10 #include <linux/sched.h>
11 #include <linux/init.h>
13 #include <asm/system.h>
14 #include <asm/ptrace.h>
15 #include <asm/pci.h>
17 #define __EXTERN_INLINE inline
18 #include <asm/io.h>
19 #include <asm/core_polaris.h>
20 #undef __EXTERN_INLINE
22 #include "proto.h"
23 #include "pci_impl.h"
26 * BIOS32-style PCI interface:
29 #define DEBUG_CONFIG 0
31 #if DEBUG_CONFIG
32 # define DBG_CFG(args) printk args
33 #else
34 # define DBG_CFG(args)
35 #endif
39 * Given a bus, device, and function number, compute resulting
40 * configuration space address. This is fairly straightforward
41 * on POLARIS, since the chip itself generates Type 0 or Type 1
42 * cycles automatically depending on the bus number (Bus 0 is
43 * hardwired to Type 0, all others are Type 1. Peer bridges
44 * are not supported).
46 * All types:
48 * 3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
49 * 9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
50 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
51 * |1|1|1|1|1|0|0|1|1|1|1|1|1|1|1|0|B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|x|x|
52 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
54 * 23:16 bus number (8 bits = 128 possible buses)
55 * 15:11 Device number (5 bits)
56 * 10:8 function number
57 * 7:2 register number
59 * Notes:
60 * The function number selects which function of a multi-function device
61 * (e.g., scsi and ethernet).
63 * The register selects a DWORD (32 bit) register offset. Hence it
64 * doesn't get shifted by 2 bits as we want to "drop" the bottom two
65 * bits.
68 static int
69 mk_conf_addr(struct pci_dev *dev, int where, unsigned long *pci_addr, u8 *type1)
71 u8 bus = dev->bus->number;
72 u8 device_fn = dev->devfn;
74 *type1 = (bus == 0) ? 0 : 1;
75 *pci_addr = (bus << 16) | (device_fn << 8) | (where) |
76 POLARIS_DENSE_CONFIG_BASE;
78 DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x,"
79 " returning address 0x%p\n"
80 bus, device_fn, where, *pci_addr));
82 return 0;
85 static int
86 polaris_read_config_byte(struct pci_dev *dev, int where, u8 *value)
88 unsigned long pci_addr;
89 unsigned char type1;
91 if (mk_conf_addr(dev, where, &pci_addr, &type1))
92 return PCIBIOS_DEVICE_NOT_FOUND;
94 *value = __kernel_ldbu(*(vucp)pci_addr);
95 return PCIBIOS_SUCCESSFUL;
98 static int
99 polaris_read_config_word(struct pci_dev *dev, int where, u16 *value)
101 unsigned long pci_addr;
102 unsigned char type1;
104 if (mk_conf_addr(dev, where, &pci_addr, &type1))
105 return PCIBIOS_DEVICE_NOT_FOUND;
107 *value = __kernel_ldwu(*(vusp)pci_addr);
108 return PCIBIOS_SUCCESSFUL;
111 static int
112 polaris_read_config_dword(struct pci_dev *dev, int where, u32 *value)
114 unsigned long pci_addr;
115 unsigned char type1;
117 if (mk_conf_addr(dev, where, &pci_addr, &type1))
118 return PCIBIOS_DEVICE_NOT_FOUND;
120 *value = *(vuip)pci_addr;
121 return PCIBIOS_SUCCESSFUL;
124 static int
125 polaris_write_config_byte(struct pci_dev *dev, int where, u8 value)
127 unsigned long pci_addr;
128 unsigned char type1;
130 if (mk_conf_addr(dev, where, &pci_addr, &type1))
131 return PCIBIOS_DEVICE_NOT_FOUND;
133 __kernel_stb(value, *(vucp)pci_addr);
134 mb();
135 __kernel_ldbu(*(vucp)pci_addr);
136 return PCIBIOS_SUCCESSFUL;
139 static int
140 polaris_write_config_word(struct pci_dev *dev, int where, u16 value)
142 unsigned long pci_addr;
143 unsigned char type1;
145 if (mk_conf_addr(dev, where, &pci_addr, &type1))
146 return PCIBIOS_DEVICE_NOT_FOUND;
148 __kernel_stw(value, *(vusp)pci_addr);
149 mb();
150 __kernel_ldbu(*(vusp)pci_addr);
151 return PCIBIOS_SUCCESSFUL;
154 static int
155 polaris_write_config_dword(struct pci_dev *dev, int where, u32 value)
157 unsigned long pci_addr;
158 unsigned char type1;
160 if (mk_conf_addr(dev, where, &pci_addr, &type1))
161 return PCIBIOS_DEVICE_NOT_FOUND;
163 *(vuip)pci_addr = value;
164 mb();
165 *(vuip)pci_addr;
166 return PCIBIOS_SUCCESSFUL;
169 struct pci_ops polaris_pci_ops =
171 read_byte: polaris_read_config_byte,
172 read_word: polaris_read_config_word,
173 read_dword: polaris_read_config_dword,
174 write_byte: polaris_write_config_byte,
175 write_word: polaris_write_config_word,
176 write_dword: polaris_write_config_dword
179 void __init
180 polaris_init_arch(unsigned long *mem_start, unsigned long *mem_end)
182 struct pci_controler *hose;
184 /* May need to initialize error reporting (see PCICTL0/1), but
185 * for now assume that the firmware has done the right thing
186 * already.
188 #if 0
189 printk("polaris_init_arch(): trusting firmware for setup\n");
190 #endif
193 * Create our single hose.
196 hose = alloc_pci_controler(mem_start);
197 hose->io_space = &ioport_resource;
198 hose->mem_space = &iomem_resource;
199 hose->config_space = POLARIS_DENSE_CONFIG_BASE;
200 hose->index = 0;
203 static inline void
204 polaris_pci_clr_err(void)
206 *(vusp)POLARIS_W_STATUS;
207 /* Write 1's to settable bits to clear errors */
208 *(vusp)POLARIS_W_STATUS = 0x7800;
209 mb();
210 *(vusp)POLARIS_W_STATUS;
213 void
214 polaris_machine_check(unsigned long vector, unsigned long la_ptr,
215 struct pt_regs * regs)
217 /* Clear the error before any reporting. */
218 mb();
219 mb();
220 draina();
221 polaris_pci_clr_err();
222 wrmces(0x7);
223 mb();
225 process_mcheck_info(vector, la_ptr, regs, "POLARIS",
226 mcheck_expected(0));