?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Import 2.3.1pre2
[davej-history.git] / drivers / sound / sonicvibes.c
blob76f6c1497cb5b4b6a051f5cc256a4133e4aa2761
1 /*****************************************************************************/
2
3 /*
4 * sonicvibes.c -- S3 Sonic Vibes audio driver.
5 *
6 * Copyright (C) 1998-1999 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to David C. Niemi
23 *
24 *
25 * Module command line parameters:
26 * none so far
27 *
28 *
29 * Supported devices:
30 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
31 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
32 * /dev/midi simple MIDI UART interface, no ioctl
33 *
34 * The card has both an FM and a Wavetable synth, but I have to figure
35 * out first how to drive them...
36 *
37 * Revision history
38 * 06.05.98 0.1 Initial release
39 * 10.05.98 0.2 Fixed many bugs, esp. ADC rate calculation
40 * First stab at a simple midi interface (no bells&whistles)
41 * 13.05.98 0.3 Fix stupid cut&paste error: set_adc_rate was called instead of
42 * set_dac_rate in the FMODE_WRITE case in sv_open
43 * Fix hwptr out of bounds (now mpg123 works)
44 * 14.05.98 0.4 Don't allow excessive interrupt rates
45 * 08.06.98 0.5 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.98 0.6 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.98 0.7 Fix realplayer problems - dac.count issues
50 * 10.12.98 0.8 Fix drain_dac trying to wait on not yet initialized DMA
51 * 16.12.98 0.9 Fix a few f_file & FMODE_ bugs
52 * 06.01.99 0.10 remove the silly SA_INTERRUPT flag.
53 * hopefully killed the egcs section type conflict
54 * 12.03.99 0.11 cinfo.blocks should be reset after GETxPTR ioctl.
55 * reported by Johan Maes <joma@telindus.be>
56 * 22.03.99 0.12 return EAGAIN instead of EBUSY when O_NONBLOCK
57 * read/write cannot be executed
58 * 05.04.99 0.13 added code to sv_read and sv_write which should detect
59 * lockups of the sound chip and revive it. This is basically
60 * an ugly hack, but at least applications using this driver
61 * won't hang forever. I don't know why these lockups happen,
62 * it might well be the motherboard chipset (an early 486 PCI
63 * board with ALI chipset), since every busmastering 100MB
64 * ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
65 * exhibit similar behaviour (they work for a couple of packets
66 * and then lock up and can be revived by ifconfig down/up).
67 * 07.04.99 0.14 implemented the following ioctl's: SOUND_PCM_READ_RATE,
68 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
69 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
70 * Note: dmaio hack might still be wrong on archs other than i386
71 *
72 */
73
74 /*****************************************************************************/
75
76 #include <linux/version.h>
77 #include <linux/module.h>
78 #include <linux/string.h>
79 #include <linux/ioport.h>
80 #include <linux/sched.h>
81 #include <linux/delay.h>
82 #include <linux/sound.h>
83 #include <linux/malloc.h>
84 #include <linux/soundcard.h>
85 #include <linux/pci.h>
86 #include <asm/io.h>
87 #include <asm/dma.h>
88 #include <linux/init.h>
89 #include <linux/poll.h>
90 #include <asm/spinlock.h>
91 #include <asm/uaccess.h>
92 #include <asm/hardirq.h>
93
94 #include "dm.h"
95
96 /* --------------------------------------------------------------------- */
97
98 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
99
100 /* --------------------------------------------------------------------- */
101
102 #ifndef PCI_VENDOR_ID_S3
103 #define PCI_VENDOR_ID_S3 0x5333
104 #endif
105 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
106 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
107 #endif
108
109 #define SV_MAGIC ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
110
111 #define SV_EXTENT_SB 0x10
112 #define SV_EXTENT_ENH 0x10
113 #define SV_EXTENT_SYNTH 0x4
114 #define SV_EXTENT_MIDI 0x4
115 #define SV_EXTENT_GAME 0x8
116 #define SV_EXTENT_DMA 0x10
117
118
119 #define SV_MIDI_DATA 0
120 #define SV_MIDI_COMMAND 1
121 #define SV_MIDI_STATUS 1
122
123 #define SV_DMA_ADDR0 0
124 #define SV_DMA_ADDR1 1
125 #define SV_DMA_ADDR2 2
126 #define SV_DMA_ADDR3 3
127 #define SV_DMA_COUNT0 4
128 #define SV_DMA_COUNT1 5
129 #define SV_DMA_COUNT2 6
130 #define SV_DMA_MODE 0xb
131 #define SV_DMA_RESET 0xd
132 #define SV_DMA_MASK 0xf
133
134 /*
135 * DONT reset the DMA controllers unless you understand
136 * the reset semantics. Assuming reset semantics as in
137 * the 8237 does not work.
138 */
139
140 #define DMA_MODE_AUTOINIT 0x10
141 #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
142 #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
143
144 #define SV_CODEC_CONTROL 0
145 #define SV_CODEC_INTMASK 1
146 #define SV_CODEC_STATUS 2
147 #define SV_CODEC_IADDR 4
148 #define SV_CODEC_IDATA 5
149
150 #define SV_CCTRL_RESET 0x80
151 #define SV_CCTRL_INTADRIVE 0x20
152 #define SV_CCTRL_WAVETABLE 0x08
153 #define SV_CCTRL_REVERB 0x04
154 #define SV_CCTRL_ENHANCED 0x01
155
156 #define SV_CINTMASK_DMAA 0x01
157 #define SV_CINTMASK_DMAC 0x04
158 #define SV_CINTMASK_SPECIAL 0x08
159 #define SV_CINTMASK_UPDOWN 0x40
160 #define SV_CINTMASK_MIDI 0x80
161
162 #define SV_CSTAT_DMAA 0x01
163 #define SV_CSTAT_DMAC 0x04
164 #define SV_CSTAT_SPECIAL 0x08
165 #define SV_CSTAT_UPDOWN 0x40
166 #define SV_CSTAT_MIDI 0x80
167
168 #define SV_CIADDR_TRD 0x80
169 #define SV_CIADDR_MCE 0x40
170
171 /* codec indirect registers */
172 #define SV_CIMIX_ADCINL 0x00
173 #define SV_CIMIX_ADCINR 0x01
174 #define SV_CIMIX_AUX1INL 0x02
175 #define SV_CIMIX_AUX1INR 0x03
176 #define SV_CIMIX_CDINL 0x04
177 #define SV_CIMIX_CDINR 0x05
178 #define SV_CIMIX_LINEINL 0x06
179 #define SV_CIMIX_LINEINR 0x07
180 #define SV_CIMIX_MICIN 0x08
181 #define SV_CIMIX_SYNTHINL 0x0A
182 #define SV_CIMIX_SYNTHINR 0x0B
183 #define SV_CIMIX_AUX2INL 0x0C
184 #define SV_CIMIX_AUX2INR 0x0D
185 #define SV_CIMIX_ANALOGINL 0x0E
186 #define SV_CIMIX_ANALOGINR 0x0F
187 #define SV_CIMIX_PCMINL 0x10
188 #define SV_CIMIX_PCMINR 0x11
189
190 #define SV_CIGAMECONTROL 0x09
191 #define SV_CIDATAFMT 0x12
192 #define SV_CIENABLE 0x13
193 #define SV_CIUPDOWN 0x14
194 #define SV_CIREVISION 0x15
195 #define SV_CIADCOUTPUT 0x16
196 #define SV_CIDMAABASECOUNT1 0x18
197 #define SV_CIDMAABASECOUNT0 0x19
198 #define SV_CIDMACBASECOUNT1 0x1c
199 #define SV_CIDMACBASECOUNT0 0x1d
200 #define SV_CIPCMSR0 0x1e
201 #define SV_CIPCMSR1 0x1f
202 #define SV_CISYNTHSR0 0x20
203 #define SV_CISYNTHSR1 0x21
204 #define SV_CIADCCLKSOURCE 0x22
205 #define SV_CIADCALTSR 0x23
206 #define SV_CIADCPLLM 0x24
207 #define SV_CIADCPLLN 0x25
208 #define SV_CISYNTHPLLM 0x26
209 #define SV_CISYNTHPLLN 0x27
210 #define SV_CIUARTCONTROL 0x2a
211 #define SV_CIDRIVECONTROL 0x2b
212 #define SV_CISRSSPACE 0x2c
213 #define SV_CISRSCENTER 0x2d
214 #define SV_CIWAVETABLESRC 0x2e
215 #define SV_CIANALOGPWRDOWN 0x30
216 #define SV_CIDIGITALPWRDOWN 0x31
217
218
219 #define SV_CIMIX_ADCSRC_CD 0x20
220 #define SV_CIMIX_ADCSRC_DAC 0x40
221 #define SV_CIMIX_ADCSRC_AUX2 0x60
222 #define SV_CIMIX_ADCSRC_LINE 0x80
223 #define SV_CIMIX_ADCSRC_AUX1 0xa0
224 #define SV_CIMIX_ADCSRC_MIC 0xc0
225 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
226 #define SV_CIMIX_ADCSRC_MASK 0xe0
227
228 #define SV_CFMT_STEREO 0x01
229 #define SV_CFMT_16BIT 0x02
230 #define SV_CFMT_MASK 0x03
231 #define SV_CFMT_ASHIFT 0
232 #define SV_CFMT_CSHIFT 4
233
234 static const unsigned sample_size[] = { 1, 2, 2, 4 };
235 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
236
237 #define SV_CENABLE_PPE 0x4
238 #define SV_CENABLE_RE 0x2
239 #define SV_CENABLE_PE 0x1
240
241
242 /* MIDI buffer sizes */
243
244 #define MIDIINBUF 256
245 #define MIDIOUTBUF 256
246
247 #define FMODE_MIDI_SHIFT 2
248 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
249 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
250
251 #define FMODE_DMFM 0x10
252
253 #define SND_DEV_DSP16 5
254
255 /* --------------------------------------------------------------------- */
256
257 struct sv_state {
258 /* magic */
259 unsigned int magic;
260
261 /* we keep sv cards in a linked list */
262 struct sv_state *next;
263
264 /* soundcore stuff */
265 int dev_audio;
266 int dev_mixer;
267 int dev_midi;
268 int dev_dmfm;
269
270 /* hardware resources */
271 unsigned long iosb, ioenh, iosynth, iomidi, iogame; /* long for SPARC */
272 unsigned int iodmaa, iodmac, irq;
273
274 /* mixer stuff */
275 struct {
276 unsigned int modcnt;
277 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
278 unsigned short vol[13];
279 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
280 } mix;
281
282 /* wave stuff */
283 unsigned int rateadc, ratedac;
284 unsigned char fmt, enable;
285
286 spinlock_t lock;
287 struct semaphore open_sem;
288 mode_t open_mode;
289 wait_queue_head_t open_wait;
290
291 struct dmabuf {
292 void *rawbuf;
293 unsigned buforder;
294 unsigned numfrag;
295 unsigned fragshift;
296 unsigned hwptr, swptr;
297 unsigned total_bytes;
298 int count;
299 unsigned error; /* over/underrun */
300 wait_queue_head_t wait;
301 /* redundant, but makes calculations easier */
302 unsigned fragsize;
303 unsigned dmasize;
304 unsigned fragsamples;
305 /* OSS stuff */
306 unsigned mapped:1;
307 unsigned ready:1;
308 unsigned endcleared:1;
309 unsigned ossfragshift;
310 int ossmaxfrags;
311 unsigned subdivision;
312 } dma_dac, dma_adc;
313
314 /* midi stuff */
315 struct {
316 unsigned ird, iwr, icnt;
317 unsigned ord, owr, ocnt;
318 wait_queue_head_t iwait;
319 wait_queue_head_t owait;
320 struct timer_list timer;
321 unsigned char ibuf[MIDIINBUF];
322 unsigned char obuf[MIDIOUTBUF];
323 } midi;
324 };
325
326 /* --------------------------------------------------------------------- */
327
328 static struct sv_state *devs = NULL;
329 static unsigned long wavetable_mem = 0;
330
331 /* --------------------------------------------------------------------- */
332
333 extern __inline__ unsigned ld2(unsigned int x)
334 {
335 unsigned r = 0;
336
337 if (x >= 0x10000) {
338 x >>= 16;
339 r += 16;
340 }
341 if (x >= 0x100) {
342 x >>= 8;
343 r += 8;
344 }
345 if (x >= 0x10) {
346 x >>= 4;
347 r += 4;
348 }
349 if (x >= 4) {
350 x >>= 2;
351 r += 2;
352 }
353 if (x >= 2)
354 r++;
355 return r;
356 }
357
358 /*
359 * hweightN: returns the hamming weight (i.e. the number
360 * of bits set) of a N-bit word
361 */
362
363 #ifdef hweight32
364 #undef hweight32
365 #endif
366
367 extern __inline__ unsigned int hweight32(unsigned int w)
368 {
369 unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
370 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
371 res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
372 res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
373 return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
374 }
375
376 /* --------------------------------------------------------------------- */
377
378 /*
379 * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
380 */
381
382 #undef DMABYTEIO
383
384 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
385 {
386 #ifdef DMABYTEIO
387 unsigned io = s->iodmaa, u;
388
389 count--;
390 for (u = 4; u > 0; u--, addr >>= 8, io++)
391 outb(addr & 0xff, io);
392 for (u = 3; u > 0; u--, count >>= 8, io++)
393 outb(count & 0xff, io);
394 #else /* DMABYTEIO */
395 count--;
396 outl(addr, s->iodmaa + SV_DMA_ADDR0);
397 outl(count, s->iodmaa + SV_DMA_COUNT0);
398 #endif /* DMABYTEIO */
399 outb(0x18, s->iodmaa + SV_DMA_MODE);
400 }
401
402 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
403 {
404 #ifdef DMABYTEIO
405 unsigned io = s->iodmac, u;
406
407 count >>= 1;
408 count--;
409 for (u = 4; u > 0; u--, addr >>= 8, io++)
410 outb(addr & 0xff, io);
411 for (u = 3; u > 0; u--, count >>= 8, io++)
412 outb(count & 0xff, io);
413 #else /* DMABYTEIO */
414 count >>= 1;
415 count--;
416 outl(addr, s->iodmac + SV_DMA_ADDR0);
417 outl(count, s->iodmac + SV_DMA_COUNT0);
418 #endif /* DMABYTEIO */
419 outb(0x14, s->iodmac + SV_DMA_MODE);
420 }
421
422 extern __inline__ unsigned get_dmaa(struct sv_state *s)
423 {
424 #ifdef DMABYTEIO
425 unsigned io = s->iodmaa+6, v = 0, u;
426
427 for (u = 3; u > 0; u--, io--) {
428 v <<= 8;
429 v |= inb(io);
430 }
431 return v + 1;
432 #else /* DMABYTEIO */
433 return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
434 #endif /* DMABYTEIO */
435 }
436
437 extern __inline__ unsigned get_dmac(struct sv_state *s)
438 {
439 #ifdef DMABYTEIO
440 unsigned io = s->iodmac+6, v = 0, u;
441
442 for (u = 3; u > 0; u--, io--) {
443 v <<= 8;
444 v |= inb(io);
445 }
446 return (v + 1) << 1;
447 #else /* DMABYTEIO */
448 return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
449 #endif /* DMABYTEIO */
450 }
451
452 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
453 {
454 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
455 udelay(10);
456 outb(data, s->ioenh + SV_CODEC_IDATA);
457 udelay(10);
458 }
459
460 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
461 {
462 unsigned char v;
463
464 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
465 udelay(10);
466 v = inb(s->ioenh + SV_CODEC_IDATA);
467 udelay(10);
468 return v;
469 }
470
471 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
472 {
473 unsigned long flags;
474
475 spin_lock_irqsave(&s->lock, flags);
476 outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
477 if (mask) {
478 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
479 udelay(10);
480 }
481 s->fmt = (s->fmt & mask) | data;
482 outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
483 udelay(10);
484 outb(0, s->ioenh + SV_CODEC_IADDR);
485 spin_unlock_irqrestore(&s->lock, flags);
486 udelay(10);
487 }
488
489 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
490 {
491 outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
492 udelay(10);
493 outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
494 udelay(10);
495 }
496
497 #define REFFREQUENCY 24576000
498 #define ADCMULT 512
499 #define FULLRATE 48000
500
501 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
502 {
503 unsigned long flags;
504 unsigned char r, m, n;
505 unsigned xm, xn, xr, xd, metric = ~0U;
506 /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
507
508 if (rate < 625000/ADCMULT)
509 rate = 625000/ADCMULT;
510 if (rate > 150000000/ADCMULT)
511 rate = 150000000/ADCMULT;
512 /* slight violation of specs, needed for continuous sampling rates */
513 for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
514 for (xn = 3; xn < 35; xn++)
515 for (xm = 3; xm < 130; xm++) {
516 xr = REFFREQUENCY/ADCMULT * xm / xn;
517 xd = abs((signed)(xr - rate));
518 if (xd < metric) {
519 metric = xd;
520 m = xm - 2;
521 n = xn - 2;
522 }
523 }
524 reg &= 0x3f;
525 spin_lock_irqsave(&s->lock, flags);
526 outb(reg, s->ioenh + SV_CODEC_IADDR);
527 udelay(10);
528 outb(m, s->ioenh + SV_CODEC_IDATA);
529 udelay(10);
530 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
531 udelay(10);
532 outb(r | n, s->ioenh + SV_CODEC_IDATA);
533 spin_unlock_irqrestore(&s->lock, flags);
534 udelay(10);
535 return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
536 }
537
538 #if 0
539
540 static unsigned getpll(struct sv_state *s, unsigned char reg)
541 {
542 unsigned long flags;
543 unsigned char m, n;
544
545 reg &= 0x3f;
546 spin_lock_irqsave(&s->lock, flags);
547 outb(reg, s->ioenh + SV_CODEC_IADDR);
548 udelay(10);
549 m = inb(s->ioenh + SV_CODEC_IDATA);
550 udelay(10);
551 outb(reg+1, s->ioenh + SV_CODEC_IADDR);
552 udelay(10);
553 n = inb(s->ioenh + SV_CODEC_IDATA);
554 spin_unlock_irqrestore(&s->lock, flags);
555 udelay(10);
556 return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
557 }
558
559 #endif
560
561 static void set_dac_rate(struct sv_state *s, unsigned rate)
562 {
563 unsigned div;
564 unsigned long flags;
565
566 if (rate > 48000)
567 rate = 48000;
568 if (rate < 4000)
569 rate = 4000;
570 div = (rate * 65536 + FULLRATE/2) / FULLRATE;
571 if (div > 65535)
572 div = 65535;
573 spin_lock_irqsave(&s->lock, flags);
574 wrindir(s, SV_CIPCMSR1, div >> 8);
575 wrindir(s, SV_CIPCMSR0, div);
576 spin_unlock_irqrestore(&s->lock, flags);
577 s->ratedac = (div * FULLRATE + 32768) / 65536;
578 }
579
580 static void set_adc_rate(struct sv_state *s, unsigned rate)
581 {
582 unsigned long flags;
583 unsigned rate1, rate2, div;
584
585 if (rate > 48000)
586 rate = 48000;
587 if (rate < 4000)
588 rate = 4000;
589 rate1 = setpll(s, SV_CIADCPLLM, rate);
590 div = (48000 + rate/2) / rate;
591 if (div > 8)
592 div = 8;
593 rate2 = (48000 + div/2) / div;
594 spin_lock_irqsave(&s->lock, flags);
595 wrindir(s, SV_CIADCALTSR, (div-1) << 4);
596 if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
597 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
598 s->rateadc = rate2;
599 } else {
600 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
601 s->rateadc = rate1;
602 }
603 spin_unlock_irqrestore(&s->lock, flags);
604 }
605
606 /* --------------------------------------------------------------------- */
607
608 extern inline void stop_adc(struct sv_state *s)
609 {
610 unsigned long flags;
611
612 spin_lock_irqsave(&s->lock, flags);
613 s->enable &= ~SV_CENABLE_RE;
614 wrindir(s, SV_CIENABLE, s->enable);
615 spin_unlock_irqrestore(&s->lock, flags);
616 }
617
618 extern inline void stop_dac(struct sv_state *s)
619 {
620 unsigned long flags;
621
622 spin_lock_irqsave(&s->lock, flags);
623 s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
624 wrindir(s, SV_CIENABLE, s->enable);
625 spin_unlock_irqrestore(&s->lock, flags);
626 }
627
628 static void start_dac(struct sv_state *s)
629 {
630 unsigned long flags;
631
632 spin_lock_irqsave(&s->lock, flags);
633 if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
634 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
635 wrindir(s, SV_CIENABLE, s->enable);
636 }
637 spin_unlock_irqrestore(&s->lock, flags);
638 }
639
640 static void start_adc(struct sv_state *s)
641 {
642 unsigned long flags;
643
644 spin_lock_irqsave(&s->lock, flags);
645 if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
646 && s->dma_adc.ready) {
647 s->enable |= SV_CENABLE_RE;
648 wrindir(s, SV_CIENABLE, s->enable);
649 }
650 spin_unlock_irqrestore(&s->lock, flags);
651 }
652
653 /* --------------------------------------------------------------------- */
654
655 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
656 #define DMABUF_MINORDER 1
657
658 static void dealloc_dmabuf(struct dmabuf *db)
659 {
660 unsigned long map, mapend;
661
662 if (db->rawbuf) {
663 /* undo marking the pages as reserved */
664 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
665 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
666 clear_bit(PG_reserved, &mem_map[map].flags);
667 free_pages((unsigned long)db->rawbuf, db->buforder);
668 }
669 db->rawbuf = NULL;
670 db->mapped = db->ready = 0;
671 }
672
673
674 /* DMAA is used for playback, DMAC is used for recording */
675
676 static int prog_dmabuf(struct sv_state *s, unsigned rec)
677 {
678 struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
679 unsigned rate = rec ? s->rateadc : s->ratedac;
680 int order;
681 unsigned bytepersec;
682 unsigned bufs;
683 unsigned long map, mapend;
684 unsigned char fmt;
685 unsigned long flags;
686
687 spin_lock_irqsave(&s->lock, flags);
688 fmt = s->fmt;
689 if (rec) {
690 s->enable &= ~SV_CENABLE_RE;
691 fmt >>= SV_CFMT_CSHIFT;
692 } else {
693 s->enable &= ~SV_CENABLE_PE;
694 fmt >>= SV_CFMT_ASHIFT;
695 }
696 wrindir(s, SV_CIENABLE, s->enable);
697 spin_unlock_irqrestore(&s->lock, flags);
698 fmt &= SV_CFMT_MASK;
699 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
700 if (!db->rawbuf) {
701 db->ready = db->mapped = 0;
702 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER && !db->rawbuf; order--)
703 db->rawbuf = (void *)__get_free_pages(GFP_KERNEL | GFP_DMA, order);
704 if (!db->rawbuf)
705 return -ENOMEM;
706 db->buforder = order;
707 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
708 printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx size %ld\n",
709 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
710 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
711 printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx size %ld\n",
712 virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
713 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
714 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
715 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
716 set_bit(PG_reserved, &mem_map[map].flags);
717 }
718 bytepersec = rate << sample_shift[fmt];
719 bufs = PAGE_SIZE << db->buforder;
720 if (db->ossfragshift) {
721 if ((1000 << db->ossfragshift) < bytepersec)
722 db->fragshift = ld2(bytepersec/1000);
723 else
724 db->fragshift = db->ossfragshift;
725 } else {
726 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
727 if (db->fragshift < 3)
728 db->fragshift = 3;
729 }
730 db->numfrag = bufs >> db->fragshift;
731 while (db->numfrag < 4 && db->fragshift > 3) {
732 db->fragshift--;
733 db->numfrag = bufs >> db->fragshift;
734 }
735 db->fragsize = 1 << db->fragshift;
736 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
737 db->numfrag = db->ossmaxfrags;
738 db->fragsamples = db->fragsize >> sample_shift[fmt];
739 db->dmasize = db->numfrag << db->fragshift;
740 memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
741 spin_lock_irqsave(&s->lock, flags);
742 if (rec) {
743 set_dmac(s, virt_to_bus(db->rawbuf), db->numfrag << db->fragshift);
744 /* program enhanced mode registers */
745 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
746 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
747 } else {
748 set_dmaa(s, virt_to_bus(db->rawbuf), db->numfrag << db->fragshift);
749 /* program enhanced mode registers */
750 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
751 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
752 }
753 spin_unlock_irqrestore(&s->lock, flags);
754 db->ready = 1;
755 return 0;
756 }
757
758 extern __inline__ void clear_advance(struct sv_state *s)
759 {
760 unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
761 unsigned char *buf = s->dma_dac.rawbuf;
762 unsigned bsize = s->dma_dac.dmasize;
763 unsigned bptr = s->dma_dac.swptr;
764 unsigned len = s->dma_dac.fragsize;
765
766 if (bptr + len > bsize) {
767 unsigned x = bsize - bptr;
768 memset(buf + bptr, c, x);
769 bptr = 0;
770 len -= x;
771 }
772 memset(buf + bptr, c, len);
773 }
774
775 /* call with spinlock held! */
776 static void sv_update_ptr(struct sv_state *s)
777 {
778 unsigned hwptr;
779 int diff;
780
781 /* update ADC pointer */
782 if (s->dma_adc.ready) {
783 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
784 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
785 s->dma_adc.hwptr = hwptr;
786 s->dma_adc.total_bytes += diff;
787 s->dma_adc.count += diff;
788 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
789 wake_up(&s->dma_adc.wait);
790 if (!s->dma_adc.mapped) {
791 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
792 s->enable &= ~SV_CENABLE_RE;
793 wrindir(s, SV_CIENABLE, s->enable);
794 s->dma_adc.error++;
795 }
796 }
797 }
798 /* update DAC pointer */
799 if (s->dma_dac.ready) {
800 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
801 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
802 s->dma_dac.hwptr = hwptr;
803 s->dma_dac.total_bytes += diff;
804 if (s->dma_dac.mapped) {
805 s->dma_dac.count += diff;
806 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
807 wake_up(&s->dma_dac.wait);
808 } else {
809 s->dma_dac.count -= diff;
810 if (s->dma_dac.count <= 0) {
811 s->enable &= ~SV_CENABLE_PE;
812 wrindir(s, SV_CIENABLE, s->enable);
813 s->dma_dac.error++;
814 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
815 clear_advance(s);
816 s->dma_dac.endcleared = 1;
817 }
818 if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
819 wake_up(&s->dma_dac.wait);
820 }
821 }
822 }
823
824 /* hold spinlock for the following! */
825 static void sv_handle_midi(struct sv_state *s)
826 {
827 unsigned char ch;
828 int wake;
829
830 wake = 0;
831 while (!(inb(s->iomidi+1) & 0x80)) {
832 ch = inb(s->iomidi);
833 if (s->midi.icnt < MIDIINBUF) {
834 s->midi.ibuf[s->midi.iwr] = ch;
835 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
836 s->midi.icnt++;
837 }
838 wake = 1;
839 }
840 if (wake)
841 wake_up(&s->midi.iwait);
842 wake = 0;
843 while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
844 outb(s->midi.obuf[s->midi.ord], s->iomidi);
845 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
846 s->midi.ocnt--;
847 if (s->midi.ocnt < MIDIOUTBUF-16)
848 wake = 1;
849 }
850 if (wake)
851 wake_up(&s->midi.owait);
852 }
853
854 static void sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
855 {
856 struct sv_state *s = (struct sv_state *)dev_id;
857 unsigned int intsrc;
858
859 /* fastpath out, to ease interrupt sharing */
860 intsrc = inb(s->ioenh + SV_CODEC_STATUS);
861 if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
862 return;
863 spin_lock(&s->lock);
864 sv_update_ptr(s);
865 sv_handle_midi(s);
866 spin_unlock(&s->lock);
867 }
868
869 static void sv_midi_timer(unsigned long data)
870 {
871 struct sv_state *s = (struct sv_state *)data;
872 unsigned long flags;
873
874 spin_lock_irqsave(&s->lock, flags);
875 sv_handle_midi(s);
876 spin_unlock_irqrestore(&s->lock, flags);
877 s->midi.timer.expires = jiffies+1;
878 add_timer(&s->midi.timer);
879 }
880
881 /* --------------------------------------------------------------------- */
882
883 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
884
885 #define VALIDATE_STATE(s) \
886 ({ \
887 if (!(s) || (s)->magic != SV_MAGIC) { \
888 printk(invalid_magic); \
889 return -ENXIO; \
890 } \
891 })
892
893 /* --------------------------------------------------------------------- */
894
895 #define MT_4 1
896 #define MT_5MUTE 2
897 #define MT_4MUTEMONO 3
898 #define MT_6MUTE 4
899
900 static const struct {
901 unsigned left:5;
902 unsigned right:5;
903 unsigned type:3;
904 unsigned rec:3;
905 } mixtable[SOUND_MIXER_NRDEVICES] = {
906 [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL, SV_CIMIX_ADCINR, MT_4, 0 },
907 [SOUND_MIXER_LINE1] = { SV_CIMIX_AUX1INL, SV_CIMIX_AUX1INR, MT_5MUTE, 5 },
908 [SOUND_MIXER_CD] = { SV_CIMIX_CDINL, SV_CIMIX_CDINR, MT_5MUTE, 1 },
909 [SOUND_MIXER_LINE] = { SV_CIMIX_LINEINL, SV_CIMIX_LINEINR, MT_5MUTE, 4 },
910 [SOUND_MIXER_MIC] = { SV_CIMIX_MICIN, SV_CIMIX_ADCINL, MT_4MUTEMONO, 6 },
911 [SOUND_MIXER_SYNTH] = { SV_CIMIX_SYNTHINL, SV_CIMIX_SYNTHINR, MT_5MUTE, 2 },
912 [SOUND_MIXER_LINE2] = { SV_CIMIX_AUX2INL, SV_CIMIX_AUX2INR, MT_5MUTE, 3 },
913 [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE, 7 },
914 [SOUND_MIXER_PCM] = { SV_CIMIX_PCMINL, SV_CIMIX_PCMINR, MT_6MUTE, 0 }
915 };
916
917 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
918
919 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
920 {
921 unsigned long flags;
922 unsigned char l, r, rl, rr;
923
924 spin_lock_irqsave(&s->lock, flags);
925 l = rdindir(s, mixtable[i].left);
926 r = rdindir(s, mixtable[i].right);
927 spin_unlock_irqrestore(&s->lock, flags);
928 switch (mixtable[i].type) {
929 case MT_4:
930 r &= 0xf;
931 l &= 0xf;
932 rl = 10 + 6 * (l & 15);
933 rr = 10 + 6 * (r & 15);
934 break;
935
936 case MT_4MUTEMONO:
937 rl = 55 - 3 * (l & 15);
938 if (r & 0x10)
939 rl += 45;
940 rr = rl;
941 r = l;
942 break;
943
944 case MT_5MUTE:
945 default:
946 rl = 100 - 3 * (l & 31);
947 rr = 100 - 3 * (r & 31);
948 break;
949
950 case MT_6MUTE:
951 rl = 100 - 3 * (l & 63) / 2;
952 rr = 100 - 3 * (r & 63) / 2;
953 break;
954 }
955 if (l & 0x80)
956 rl = 0;
957 if (r & 0x80)
958 rr = 0;
959 return put_user((rr << 8) | rl, arg);
960 }
961
962 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
963
964 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
965 {
966 [SOUND_MIXER_RECLEV] = 1,
967 [SOUND_MIXER_LINE1] = 2,
968 [SOUND_MIXER_CD] = 3,
969 [SOUND_MIXER_LINE] = 4,
970 [SOUND_MIXER_MIC] = 5,
971 [SOUND_MIXER_SYNTH] = 6,
972 [SOUND_MIXER_LINE2] = 7,
973 [SOUND_MIXER_VOLUME] = 8,
974 [SOUND_MIXER_PCM] = 9
975 };
976
977 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
978
979 static unsigned mixer_recmask(struct sv_state *s)
980 {
981 unsigned long flags;
982 int i, j;
983
984 spin_lock_irqsave(&s->lock, flags);
985 j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
986 spin_unlock_irqrestore(&s->lock, flags);
987 j &= 7;
988 for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
989 return 1 << i;
990 }
991
992 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
993 {
994 unsigned long flags;
995 int i, val;
996 unsigned char l, r, rl, rr;
997
998 VALIDATE_STATE(s);
999 if (cmd == SOUND_MIXER_INFO) {
1000 mixer_info info;
1001 strncpy(info.id, "SonicVibes", sizeof(info.id));
1002 strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
1003 info.modify_counter = s->mix.modcnt;
1004 if (copy_to_user((void *)arg, &info, sizeof(info)))
1005 return -EFAULT;
1006 return 0;
1007 }
1008 if (cmd == SOUND_OLD_MIXER_INFO) {
1009 _old_mixer_info info;
1010 strncpy(info.id, "SonicVibes", sizeof(info.id));
1011 strncpy(info.name, "S3 SonicVibes", sizeof(info.name));
1012 if (copy_to_user((void *)arg, &info, sizeof(info)))
1013 return -EFAULT;
1014 return 0;
1015 }
1016 if (cmd == OSS_GETVERSION)
1017 return put_user(SOUND_VERSION, (int *)arg);
1018 if (cmd == SOUND_MIXER_PRIVATE1) { /* SRS settings */
1019 get_user_ret(val, (int *)arg, -EFAULT);
1020 spin_lock_irqsave(&s->lock, flags);
1021 if (val & 1) {
1022 if (val & 2) {
1023 l = 4 - ((val >> 2) & 7);
1024 if (l & ~3)
1025 l = 4;
1026 r = 4 - ((val >> 5) & 7);
1027 if (r & ~3)
1028 r = 4;
1029 wrindir(s, SV_CISRSSPACE, l);
1030 wrindir(s, SV_CISRSCENTER, r);
1031 } else
1032 wrindir(s, SV_CISRSSPACE, 0x80);
1033 }
1034 l = rdindir(s, SV_CISRSSPACE);
1035 r = rdindir(s, SV_CISRSCENTER);
1036 spin_unlock_irqrestore(&s->lock, flags);
1037 if (l & 0x80)
1038 return put_user(0, (int *)arg);
1039 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, (int *)arg);
1040 }
1041 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1042 return -EINVAL;
1043 if (_IOC_DIR(cmd) == _IOC_READ) {
1044 switch (_IOC_NR(cmd)) {
1045 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1046 return put_user(mixer_recmask(s), (int *)arg);
1047
1048 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1049 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1050 if (mixtable[i].type)
1051 val |= 1 << i;
1052 return put_user(val, (int *)arg);
1053
1054 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1055 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1056 if (mixtable[i].rec)
1057 val |= 1 << i;
1058 return put_user(val, (int *)arg);
1059
1060 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1061 for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1062 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1063 val |= 1 << i;
1064 return put_user(val, (int *)arg);
1065
1066 case SOUND_MIXER_CAPS:
1067 return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
1068
1069 default:
1070 i = _IOC_NR(cmd);
1071 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1072 return -EINVAL;
1073 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1074 return return_mixval(s, i, (int *)arg);
1075 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1076 if (!volidx[i])
1077 return -EINVAL;
1078 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1079 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1080 }
1081 }
1082 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1083 return -EINVAL;
1084 s->mix.modcnt++;
1085 switch (_IOC_NR(cmd)) {
1086 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1087 get_user_ret(val, (int *)arg, -EFAULT);
1088 i = hweight32(val);
1089 if (i == 0)
1090 return 0; /*val = mixer_recmask(s);*/
1091 else if (i > 1)
1092 val &= ~mixer_recmask(s);
1093 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1094 if (!(val & (1 << i)))
1095 continue;
1096 if (mixtable[i].rec)
1097 break;
1098 }
1099 if (!mixtable[i].rec)
1100 return 0;
1101 spin_lock_irqsave(&s->lock, flags);
1102 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1103 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1104 spin_unlock_irqrestore(&s->lock, flags);
1105 return 0;
1106
1107 default:
1108 i = _IOC_NR(cmd);
1109 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1110 return -EINVAL;
1111 get_user_ret(val, (int *)arg, -EFAULT);
1112 l = val & 0xff;
1113 r = (val >> 8) & 0xff;
1114 if (mixtable[i].type == MT_4MUTEMONO)
1115 l = (r + l) / 2;
1116 if (l > 100)
1117 l = 100;
1118 if (r > 100)
1119 r = 100;
1120 spin_lock_irqsave(&s->lock, flags);
1121 switch (mixtable[i].type) {
1122 case MT_4:
1123 if (l >= 10)
1124 l -= 10;
1125 if (r >= 10)
1126 r -= 10;
1127 frobindir(s, mixtable[i].left, 0xf0, l / 6);
1128 frobindir(s, mixtable[i].right, 0xf0, l / 6);
1129 break;
1130
1131 case MT_4MUTEMONO:
1132 rr = 0;
1133 if (l < 10)
1134 rl = 0x80;
1135 else {
1136 if (l >= 55) {
1137 rr = 0x10;
1138 l -= 45;
1139 }
1140 rl = (55 - l) / 3;
1141 }
1142 wrindir(s, mixtable[i].left, rl);
1143 frobindir(s, mixtable[i].right, ~0x10, rr);
1144 break;
1145
1146 case MT_5MUTE:
1147 if (l < 7)
1148 rl = 0x80;
1149 else
1150 rl = (100 - l) / 3;
1151 if (r < 7)
1152 rr = 0x80;
1153 else
1154 rr = (100 - r) / 3;
1155 wrindir(s, mixtable[i].left, rl);
1156 wrindir(s, mixtable[i].right, rr);
1157 break;
1158
1159 case MT_6MUTE:
1160 if (l < 6)
1161 rl = 0x80;
1162 else
1163 rl = (100 - l) * 2 / 3;
1164 if (r < 6)
1165 rr = 0x80;
1166 else
1167 rr = (100 - r) * 2 / 3;
1168 wrindir(s, mixtable[i].left, rl);
1169 wrindir(s, mixtable[i].right, rr);
1170 break;
1171 }
1172 spin_unlock_irqrestore(&s->lock, flags);
1173 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1174 return return_mixval(s, i, (int *)arg);
1175 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1176 if (!volidx[i])
1177 return -EINVAL;
1178 s->mix.vol[volidx[i]-1] = val;
1179 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1180 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1181 }
1182 }
1183
1184 /* --------------------------------------------------------------------- */
1185
1186 static loff_t sv_llseek(struct file *file, loff_t offset, int origin)
1187 {
1188 return -ESPIPE;
1189 }
1190
1191 /* --------------------------------------------------------------------- */
1192
1193 static int sv_open_mixdev(struct inode *inode, struct file *file)
1194 {
1195 int minor = MINOR(inode->i_rdev);
1196 struct sv_state *s = devs;
1197
1198 while (s && s->dev_mixer != minor)
1199 s = s->next;
1200 if (!s)
1201 return -ENODEV;
1202 VALIDATE_STATE(s);
1203 file->private_data = s;
1204 MOD_INC_USE_COUNT;
1205 return 0;
1206 }
1207
1208 static int sv_release_mixdev(struct inode *inode, struct file *file)
1209 {
1210 struct sv_state *s = (struct sv_state *)file->private_data;
1211
1212 VALIDATE_STATE(s);
1213 MOD_DEC_USE_COUNT;
1214 return 0;
1215 }
1216
1217 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1218 {
1219 return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1220 }
1221
1222 static /*const*/ struct file_operations sv_mixer_fops = {
1223 &sv_llseek,
1224 NULL, /* read */
1225 NULL, /* write */
1226 NULL, /* readdir */
1227 NULL, /* poll */
1228 &sv_ioctl_mixdev,
1229 NULL, /* mmap */
1230 &sv_open_mixdev,
1231 NULL, /* flush */
1232 &sv_release_mixdev,
1233 NULL, /* fsync */
1234 NULL, /* fasync */
1235 NULL, /* check_media_change */
1236 NULL, /* revalidate */
1237 NULL, /* lock */
1238 };
1239
1240 /* --------------------------------------------------------------------- */
1241
1242 static int drain_dac(struct sv_state *s, int nonblock)
1243 {
1244 DECLARE_WAITQUEUE(wait, current);
1245 unsigned long flags;
1246 int count, tmo;
1247
1248 if (s->dma_dac.mapped || !s->dma_dac.ready)
1249 return 0;
1250 current->state = TASK_INTERRUPTIBLE;
1251 add_wait_queue(&s->dma_dac.wait, &wait);
1252 for (;;) {
1253 spin_lock_irqsave(&s->lock, flags);
1254 count = s->dma_dac.count;
1255 spin_unlock_irqrestore(&s->lock, flags);
1256 if (count <= 0)
1257 break;
1258 if (signal_pending(current))
1259 break;
1260 if (nonblock) {
1261 remove_wait_queue(&s->dma_dac.wait, &wait);
1262 current->state = TASK_RUNNING;
1263 return -EBUSY;
1264 }
1265 tmo = (count * HZ) / s->ratedac;
1266 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1267 if (!schedule_timeout(tmo ? : 1) && tmo)
1268 printk(KERN_DEBUG "sv: dma timed out??\n");
1269 }
1270 remove_wait_queue(&s->dma_dac.wait, &wait);
1271 current->state = TASK_RUNNING;
1272 if (signal_pending(current))
1273 return -ERESTARTSYS;
1274 return 0;
1275 }
1276
1277 /* --------------------------------------------------------------------- */
1278
1279 static ssize_t sv_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1280 {
1281 struct sv_state *s = (struct sv_state *)file->private_data;
1282 ssize_t ret;
1283 unsigned long flags;
1284 unsigned swptr;
1285 int cnt;
1286
1287 VALIDATE_STATE(s);
1288 if (ppos != &file->f_pos)
1289 return -ESPIPE;
1290 if (s->dma_adc.mapped)
1291 return -ENXIO;
1292 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1293 return ret;
1294 if (!access_ok(VERIFY_WRITE, buffer, count))
1295 return -EFAULT;
1296 ret = 0;
1297 #if 0
1298 spin_lock_irqsave(&s->lock, flags);
1299 sv_update_ptr(s);
1300 spin_unlock_irqrestore(&s->lock, flags);
1301 #endif
1302 while (count > 0) {
1303 spin_lock_irqsave(&s->lock, flags);
1304 swptr = s->dma_adc.swptr;
1305 cnt = s->dma_adc.dmasize-swptr;
1306 if (s->dma_adc.count < cnt)
1307 cnt = s->dma_adc.count;
1308 spin_unlock_irqrestore(&s->lock, flags);
1309 if (cnt > count)
1310 cnt = count;
1311 if (cnt <= 0) {
1312 start_adc(s);
1313 if (file->f_flags & O_NONBLOCK)
1314 return ret ? ret : -EAGAIN;
1315 if (!interruptible_sleep_on_timeout(&s->dma_adc.wait, HZ)) {
1316 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1317 s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count,
1318 s->dma_adc.hwptr, s->dma_adc.swptr);
1319 stop_adc(s);
1320 spin_lock_irqsave(&s->lock, flags);
1321 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1322 /* program enhanced mode registers */
1323 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1324 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1325 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1326 spin_unlock_irqrestore(&s->lock, flags);
1327 }
1328 if (signal_pending(current))
1329 return ret ? ret : -ERESTARTSYS;
1330 continue;
1331 }
1332 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1333 return ret ? ret : -EFAULT;
1334 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1335 spin_lock_irqsave(&s->lock, flags);
1336 s->dma_adc.swptr = swptr;
1337 s->dma_adc.count -= cnt;
1338 spin_unlock_irqrestore(&s->lock, flags);
1339 count -= cnt;
1340 buffer += cnt;
1341 ret += cnt;
1342 start_adc(s);
1343 }
1344 return ret;
1345 }
1346
1347 static ssize_t sv_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1348 {
1349 struct sv_state *s = (struct sv_state *)file->private_data;
1350 ssize_t ret;
1351 unsigned long flags;
1352 unsigned swptr;
1353 int cnt;
1354
1355 VALIDATE_STATE(s);
1356 if (ppos != &file->f_pos)
1357 return -ESPIPE;
1358 if (s->dma_dac.mapped)
1359 return -ENXIO;
1360 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1361 return ret;
1362 if (!access_ok(VERIFY_READ, buffer, count))
1363 return -EFAULT;
1364 ret = 0;
1365 #if 0
1366 spin_lock_irqsave(&s->lock, flags);
1367 sv_update_ptr(s);
1368 spin_unlock_irqrestore(&s->lock, flags);
1369 #endif
1370 while (count > 0) {
1371 spin_lock_irqsave(&s->lock, flags);
1372 if (s->dma_dac.count < 0) {
1373 s->dma_dac.count = 0;
1374 s->dma_dac.swptr = s->dma_dac.hwptr;
1375 }
1376 swptr = s->dma_dac.swptr;
1377 cnt = s->dma_dac.dmasize-swptr;
1378 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1379 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1380 spin_unlock_irqrestore(&s->lock, flags);
1381 if (cnt > count)
1382 cnt = count;
1383 if (cnt <= 0) {
1384 start_dac(s);
1385 if (file->f_flags & O_NONBLOCK)
1386 return ret ? ret : -EAGAIN;
1387 if (!interruptible_sleep_on_timeout(&s->dma_dac.wait, HZ)) {
1388 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1389 s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count,
1390 s->dma_dac.hwptr, s->dma_dac.swptr);
1391 stop_dac(s);
1392 spin_lock_irqsave(&s->lock, flags);
1393 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1394 /* program enhanced mode registers */
1395 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1396 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1397 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1398 spin_unlock_irqrestore(&s->lock, flags);
1399 }
1400 if (signal_pending(current))
1401 return ret ? ret : -ERESTARTSYS;
1402 continue;
1403 }
1404 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt))
1405 return ret ? ret : -EFAULT;
1406 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1407 spin_lock_irqsave(&s->lock, flags);
1408 s->dma_dac.swptr = swptr;
1409 s->dma_dac.count += cnt;
1410 s->dma_dac.endcleared = 0;
1411 spin_unlock_irqrestore(&s->lock, flags);
1412 count -= cnt;
1413 buffer += cnt;
1414 ret += cnt;
1415 start_dac(s);
1416 }
1417 return ret;
1418 }
1419
1420 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1421 {
1422 struct sv_state *s = (struct sv_state *)file->private_data;
1423 unsigned long flags;
1424 unsigned int mask = 0;
1425
1426 VALIDATE_STATE(s);
1427 if (file->f_mode & FMODE_WRITE)
1428 poll_wait(file, &s->dma_dac.wait, wait);
1429 if (file->f_mode & FMODE_READ)
1430 poll_wait(file, &s->dma_adc.wait, wait);
1431 spin_lock_irqsave(&s->lock, flags);
1432 sv_update_ptr(s);
1433 if (file->f_mode & FMODE_READ) {
1434 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1435 mask |= POLLIN | POLLRDNORM;
1436 }
1437 if (file->f_mode & FMODE_WRITE) {
1438 if (s->dma_dac.mapped) {
1439 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1440 mask |= POLLOUT | POLLWRNORM;
1441 } else {
1442 if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1443 mask |= POLLOUT | POLLWRNORM;
1444 }
1445 }
1446 spin_unlock_irqrestore(&s->lock, flags);
1447 return mask;
1448 }
1449
1450 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1451 {
1452 struct sv_state *s = (struct sv_state *)file->private_data;
1453 struct dmabuf *db;
1454 int ret;
1455 unsigned long size;
1456
1457 VALIDATE_STATE(s);
1458 if (vma->vm_flags & VM_WRITE) {
1459 if ((ret = prog_dmabuf(s, 1)) != 0)
1460 return ret;
1461 db = &s->dma_dac;
1462 } else if (vma->vm_flags & VM_READ) {
1463 if ((ret = prog_dmabuf(s, 0)) != 0)
1464 return ret;
1465 db = &s->dma_adc;
1466 } else
1467 return -EINVAL;
1468 if (vma->vm_offset != 0)
1469 return -EINVAL;
1470 size = vma->vm_end - vma->vm_start;
1471 if (size > (PAGE_SIZE << db->buforder))
1472 return -EINVAL;
1473 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1474 return -EAGAIN;
1475 db->mapped = 1;
1476 return 0;
1477 }
1478
1479 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1480 {
1481 struct sv_state *s = (struct sv_state *)file->private_data;
1482 unsigned long flags;
1483 audio_buf_info abinfo;
1484 count_info cinfo;
1485 int val, mapped, ret;
1486 unsigned char fmtm, fmtd;
1487
1488 VALIDATE_STATE(s);
1489 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1490 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1491 switch (cmd) {
1492 case OSS_GETVERSION:
1493 return put_user(SOUND_VERSION, (int *)arg);
1494
1495 case SNDCTL_DSP_SYNC:
1496 if (file->f_mode & FMODE_WRITE)
1497 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1498 return 0;
1499
1500 case SNDCTL_DSP_SETDUPLEX:
1501 return 0;
1502
1503 case SNDCTL_DSP_GETCAPS:
1504 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1505
1506 case SNDCTL_DSP_RESET:
1507 if (file->f_mode & FMODE_WRITE) {
1508 stop_dac(s);
1509 synchronize_irq();
1510 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1511 }
1512 if (file->f_mode & FMODE_READ) {
1513 stop_adc(s);
1514 synchronize_irq();
1515 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1516 }
1517 return 0;
1518
1519 case SNDCTL_DSP_SPEED:
1520 get_user_ret(val, (int *)arg, -EFAULT);
1521 if (val >= 0) {
1522 if (file->f_mode & FMODE_READ) {
1523 stop_adc(s);
1524 s->dma_adc.ready = 0;
1525 set_adc_rate(s, val);
1526 }
1527 if (file->f_mode & FMODE_WRITE) {
1528 stop_dac(s);
1529 s->dma_dac.ready = 0;
1530 set_dac_rate(s, val);
1531 }
1532 }
1533 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1534
1535 case SNDCTL_DSP_STEREO:
1536 get_user_ret(val, (int *)arg, -EFAULT);
1537 fmtd = 0;
1538 fmtm = ~0;
1539 if (file->f_mode & FMODE_READ) {
1540 stop_adc(s);
1541 s->dma_adc.ready = 0;
1542 if (val)
1543 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1544 else
1545 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1546 }
1547 if (file->f_mode & FMODE_WRITE) {
1548 stop_dac(s);
1549 s->dma_dac.ready = 0;
1550 if (val)
1551 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1552 else
1553 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1554 }
1555 set_fmt(s, fmtm, fmtd);
1556 return 0;
1557
1558 case SNDCTL_DSP_CHANNELS:
1559 get_user_ret(val, (int *)arg, -EFAULT);
1560 if (val != 0) {
1561 fmtd = 0;
1562 fmtm = ~0;
1563 if (file->f_mode & FMODE_READ) {
1564 stop_adc(s);
1565 s->dma_adc.ready = 0;
1566 if (val >= 2)
1567 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1568 else
1569 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1570 }
1571 if (file->f_mode & FMODE_WRITE) {
1572 stop_dac(s);
1573 s->dma_dac.ready = 0;
1574 if (val >= 2)
1575 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1576 else
1577 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1578 }
1579 set_fmt(s, fmtm, fmtd);
1580 }
1581 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1582 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1583
1584 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1585 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1586
1587 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1588 get_user_ret(val, (int *)arg, -EFAULT);
1589 if (val != AFMT_QUERY) {
1590 fmtd = 0;
1591 fmtm = ~0;
1592 if (file->f_mode & FMODE_READ) {
1593 stop_adc(s);
1594 s->dma_adc.ready = 0;
1595 if (val == AFMT_S16_LE)
1596 fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1597 else
1598 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1599 }
1600 if (file->f_mode & FMODE_WRITE) {
1601 stop_dac(s);
1602 s->dma_dac.ready = 0;
1603 if (val == AFMT_S16_LE)
1604 fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1605 else
1606 fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1607 }
1608 set_fmt(s, fmtm, fmtd);
1609 }
1610 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1611 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
1612
1613 case SNDCTL_DSP_POST:
1614 return 0;
1615
1616 case SNDCTL_DSP_GETTRIGGER:
1617 val = 0;
1618 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE)
1619 val |= PCM_ENABLE_INPUT;
1620 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE)
1621 val |= PCM_ENABLE_OUTPUT;
1622 return put_user(val, (int *)arg);
1623
1624 case SNDCTL_DSP_SETTRIGGER:
1625 get_user_ret(val, (int *)arg, -EFAULT);
1626 if (file->f_mode & FMODE_READ) {
1627 if (val & PCM_ENABLE_INPUT) {
1628 if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1629 return ret;
1630 start_adc(s);
1631 } else
1632 stop_adc(s);
1633 }
1634 if (file->f_mode & FMODE_WRITE) {
1635 if (val & PCM_ENABLE_OUTPUT) {
1636 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1637 return ret;
1638 start_dac(s);
1639 } else
1640 stop_dac(s);
1641 }
1642 return 0;
1643
1644 case SNDCTL_DSP_GETOSPACE:
1645 if (!(file->f_mode & FMODE_WRITE))
1646 return -EINVAL;
1647 if (!(s->enable & SV_CENABLE_PE) && (val = prog_dmabuf(s, 0)) != 0)
1648 return val;
1649 spin_lock_irqsave(&s->lock, flags);
1650 sv_update_ptr(s);
1651 abinfo.fragsize = s->dma_dac.fragsize;
1652 abinfo.bytes = s->dma_dac.dmasize - s->dma_dac.count;
1653 abinfo.fragstotal = s->dma_dac.numfrag;
1654 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1655 spin_unlock_irqrestore(&s->lock, flags);
1656 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1657
1658 case SNDCTL_DSP_GETISPACE:
1659 if (!(file->f_mode & FMODE_READ))
1660 return -EINVAL;
1661 if (!(s->enable & SV_CENABLE_RE) && (val = prog_dmabuf(s, 1)) != 0)
1662 return val;
1663 spin_lock_irqsave(&s->lock, flags);
1664 sv_update_ptr(s);
1665 abinfo.fragsize = s->dma_adc.fragsize;
1666 abinfo.bytes = s->dma_adc.count;
1667 abinfo.fragstotal = s->dma_adc.numfrag;
1668 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1669 spin_unlock_irqrestore(&s->lock, flags);
1670 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1671
1672 case SNDCTL_DSP_NONBLOCK:
1673 file->f_flags |= O_NONBLOCK;
1674 return 0;
1675
1676 case SNDCTL_DSP_GETODELAY:
1677 if (!(file->f_mode & FMODE_WRITE))
1678 return -EINVAL;
1679 spin_lock_irqsave(&s->lock, flags);
1680 sv_update_ptr(s);
1681 val = s->dma_dac.count;
1682 spin_unlock_irqrestore(&s->lock, flags);
1683 return put_user(val, (int *)arg);
1684
1685 case SNDCTL_DSP_GETIPTR:
1686 if (!(file->f_mode & FMODE_READ))
1687 return -EINVAL;
1688 spin_lock_irqsave(&s->lock, flags);
1689 sv_update_ptr(s);
1690 cinfo.bytes = s->dma_adc.total_bytes;
1691 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1692 cinfo.ptr = s->dma_adc.hwptr;
1693 if (s->dma_adc.mapped)
1694 s->dma_adc.count &= s->dma_adc.fragsize-1;
1695 spin_unlock_irqrestore(&s->lock, flags);
1696 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1697
1698 case SNDCTL_DSP_GETOPTR:
1699 if (!(file->f_mode & FMODE_WRITE))
1700 return -EINVAL;
1701 spin_lock_irqsave(&s->lock, flags);
1702 sv_update_ptr(s);
1703 cinfo.bytes = s->dma_dac.total_bytes;
1704 cinfo.blocks = s->dma_dac.count >> s->dma_dac.fragshift;
1705 cinfo.ptr = s->dma_dac.hwptr;
1706 if (s->dma_dac.mapped)
1707 s->dma_dac.count &= s->dma_dac.fragsize-1;
1708 spin_unlock_irqrestore(&s->lock, flags);
1709 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1710
1711 case SNDCTL_DSP_GETBLKSIZE:
1712 if (file->f_mode & FMODE_WRITE) {
1713 if ((val = prog_dmabuf(s, 0)))
1714 return val;
1715 return put_user(s->dma_dac.fragsize, (int *)arg);
1716 }
1717 if ((val = prog_dmabuf(s, 1)))
1718 return val;
1719 return put_user(s->dma_adc.fragsize, (int *)arg);
1720
1721 case SNDCTL_DSP_SETFRAGMENT:
1722 get_user_ret(val, (int *)arg, -EFAULT);
1723 if (file->f_mode & FMODE_READ) {
1724 s->dma_adc.ossfragshift = val & 0xffff;
1725 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1726 if (s->dma_adc.ossfragshift < 4)
1727 s->dma_adc.ossfragshift = 4;
1728 if (s->dma_adc.ossfragshift > 15)
1729 s->dma_adc.ossfragshift = 15;
1730 if (s->dma_adc.ossmaxfrags < 4)
1731 s->dma_adc.ossmaxfrags = 4;
1732 }
1733 if (file->f_mode & FMODE_WRITE) {
1734 s->dma_dac.ossfragshift = val & 0xffff;
1735 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1736 if (s->dma_dac.ossfragshift < 4)
1737 s->dma_dac.ossfragshift = 4;
1738 if (s->dma_dac.ossfragshift > 15)
1739 s->dma_dac.ossfragshift = 15;
1740 if (s->dma_dac.ossmaxfrags < 4)
1741 s->dma_dac.ossmaxfrags = 4;
1742 }
1743 return 0;
1744
1745 case SNDCTL_DSP_SUBDIVIDE:
1746 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1747 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1748 return -EINVAL;
1749 get_user_ret(val, (int *)arg, -EFAULT);
1750 if (val != 1 && val != 2 && val != 4)
1751 return -EINVAL;
1752 if (file->f_mode & FMODE_READ)
1753 s->dma_adc.subdivision = val;
1754 if (file->f_mode & FMODE_WRITE)
1755 s->dma_dac.subdivision = val;
1756 return 0;
1757
1758 case SOUND_PCM_READ_RATE:
1759 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, (int *)arg);
1760
1761 case SOUND_PCM_READ_CHANNELS:
1762 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT)
1763 : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, (int *)arg);
1764
1765 case SOUND_PCM_READ_BITS:
1766 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT)
1767 : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, (int *)arg);
1768
1769 case SOUND_PCM_WRITE_FILTER:
1770 case SNDCTL_DSP_SETSYNCRO:
1771 case SOUND_PCM_READ_FILTER:
1772 return -EINVAL;
1773
1774 }
1775 return mixer_ioctl(s, cmd, arg);
1776 }
1777
1778 static int sv_open(struct inode *inode, struct file *file)
1779 {
1780 int minor = MINOR(inode->i_rdev);
1781 struct sv_state *s = devs;
1782 unsigned char fmtm = ~0, fmts = 0;
1783
1784 while (s && ((s->dev_audio ^ minor) & ~0xf))
1785 s = s->next;
1786 if (!s)
1787 return -ENODEV;
1788 VALIDATE_STATE(s);
1789 file->private_data = s;
1790 /* wait for device to become free */
1791 down(&s->open_sem);
1792 while (s->open_mode & file->f_mode) {
1793 if (file->f_flags & O_NONBLOCK) {
1794 up(&s->open_sem);
1795 return -EBUSY;
1796 }
1797 up(&s->open_sem);
1798 interruptible_sleep_on(&s->open_wait);
1799 if (signal_pending(current))
1800 return -ERESTARTSYS;
1801 down(&s->open_sem);
1802 }
1803 if (file->f_mode & FMODE_READ) {
1804 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1805 if ((minor & 0xf) == SND_DEV_DSP16)
1806 fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1807 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1808 set_adc_rate(s, 8000);
1809 }
1810 if (file->f_mode & FMODE_WRITE) {
1811 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1812 if ((minor & 0xf) == SND_DEV_DSP16)
1813 fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1814 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1815 set_dac_rate(s, 8000);
1816 }
1817 set_fmt(s, fmtm, fmts);
1818 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1819 up(&s->open_sem);
1820 MOD_INC_USE_COUNT;
1821 return 0;
1822 }
1823
1824 static int sv_release(struct inode *inode, struct file *file)
1825 {
1826 struct sv_state *s = (struct sv_state *)file->private_data;
1827
1828 VALIDATE_STATE(s);
1829 if (file->f_mode & FMODE_WRITE)
1830 drain_dac(s, file->f_flags & O_NONBLOCK);
1831 down(&s->open_sem);
1832 if (file->f_mode & FMODE_WRITE) {
1833 stop_dac(s);
1834 dealloc_dmabuf(&s->dma_dac);
1835 }
1836 if (file->f_mode & FMODE_READ) {
1837 stop_adc(s);
1838 dealloc_dmabuf(&s->dma_adc);
1839 }
1840 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1841 up(&s->open_sem);
1842 wake_up(&s->open_wait);
1843 MOD_DEC_USE_COUNT;
1844 return 0;
1845 }
1846
1847 static /*const*/ struct file_operations sv_audio_fops = {
1848 &sv_llseek,
1849 &sv_read,
1850 &sv_write,
1851 NULL, /* readdir */
1852 &sv_poll,
1853 &sv_ioctl,
1854 &sv_mmap,
1855 &sv_open,
1856 NULL, /* flush */
1857 &sv_release,
1858 NULL, /* fsync */
1859 NULL, /* fasync */
1860 NULL, /* check_media_change */
1861 NULL, /* revalidate */
1862 NULL, /* lock */
1863 };
1864
1865 /* --------------------------------------------------------------------- */
1866
1867 static ssize_t sv_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1868 {
1869 struct sv_state *s = (struct sv_state *)file->private_data;
1870 ssize_t ret;
1871 unsigned long flags;
1872 unsigned ptr;
1873 int cnt;
1874
1875 VALIDATE_STATE(s);
1876 if (ppos != &file->f_pos)
1877 return -ESPIPE;
1878 if (!access_ok(VERIFY_WRITE, buffer, count))
1879 return -EFAULT;
1880 ret = 0;
1881 while (count > 0) {
1882 spin_lock_irqsave(&s->lock, flags);
1883 ptr = s->midi.ird;
1884 cnt = MIDIINBUF - ptr;
1885 if (s->midi.icnt < cnt)
1886 cnt = s->midi.icnt;
1887 spin_unlock_irqrestore(&s->lock, flags);
1888 if (cnt > count)
1889 cnt = count;
1890 if (cnt <= 0) {
1891 if (file->f_flags & O_NONBLOCK)
1892 return ret ? ret : -EAGAIN;
1893 interruptible_sleep_on(&s->midi.iwait);
1894 if (signal_pending(current))
1895 return ret ? ret : -ERESTARTSYS;
1896 continue;
1897 }
1898 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
1899 return ret ? ret : -EFAULT;
1900 ptr = (ptr + cnt) % MIDIINBUF;
1901 spin_lock_irqsave(&s->lock, flags);
1902 s->midi.ird = ptr;
1903 s->midi.icnt -= cnt;
1904 spin_unlock_irqrestore(&s->lock, flags);
1905 count -= cnt;
1906 buffer += cnt;
1907 ret += cnt;
1908 }
1909 return ret;
1910 }
1911
1912 static ssize_t sv_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1913 {
1914 struct sv_state *s = (struct sv_state *)file->private_data;
1915 ssize_t ret;
1916 unsigned long flags;
1917 unsigned ptr;
1918 int cnt;
1919
1920 VALIDATE_STATE(s);
1921 if (ppos != &file->f_pos)
1922 return -ESPIPE;
1923 if (!access_ok(VERIFY_READ, buffer, count))
1924 return -EFAULT;
1925 ret = 0;
1926 while (count > 0) {
1927 spin_lock_irqsave(&s->lock, flags);
1928 ptr = s->midi.owr;
1929 cnt = MIDIOUTBUF - ptr;
1930 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1931 cnt = MIDIOUTBUF - s->midi.ocnt;
1932 if (cnt <= 0)
1933 sv_handle_midi(s);
1934 spin_unlock_irqrestore(&s->lock, flags);
1935 if (cnt > count)
1936 cnt = count;
1937 if (cnt <= 0) {
1938 if (file->f_flags & O_NONBLOCK)
1939 return ret ? ret : -EAGAIN;
1940 interruptible_sleep_on(&s->midi.owait);
1941 if (signal_pending(current))
1942 return ret ? ret : -ERESTARTSYS;
1943 continue;
1944 }
1945 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
1946 return ret ? ret : -EFAULT;
1947 ptr = (ptr + cnt) % MIDIOUTBUF;
1948 spin_lock_irqsave(&s->lock, flags);
1949 s->midi.owr = ptr;
1950 s->midi.ocnt += cnt;
1951 spin_unlock_irqrestore(&s->lock, flags);
1952 count -= cnt;
1953 buffer += cnt;
1954 ret += cnt;
1955 spin_lock_irqsave(&s->lock, flags);
1956 sv_handle_midi(s);
1957 spin_unlock_irqrestore(&s->lock, flags);
1958 }
1959 return ret;
1960 }
1961
1962 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
1963 {
1964 struct sv_state *s = (struct sv_state *)file->private_data;
1965 unsigned long flags;
1966 unsigned int mask = 0;
1967
1968 VALIDATE_STATE(s);
1969 if (file->f_mode & FMODE_WRITE)
1970 poll_wait(file, &s->midi.owait, wait);
1971 if (file->f_mode & FMODE_READ)
1972 poll_wait(file, &s->midi.iwait, wait);
1973 spin_lock_irqsave(&s->lock, flags);
1974 if (file->f_mode & FMODE_READ) {
1975 if (s->midi.icnt > 0)
1976 mask |= POLLIN | POLLRDNORM;
1977 }
1978 if (file->f_mode & FMODE_WRITE) {
1979 if (s->midi.ocnt < MIDIOUTBUF)
1980 mask |= POLLOUT | POLLWRNORM;
1981 }
1982 spin_unlock_irqrestore(&s->lock, flags);
1983 return mask;
1984 }
1985
1986 static int sv_midi_open(struct inode *inode, struct file *file)
1987 {
1988 int minor = MINOR(inode->i_rdev);
1989 struct sv_state *s = devs;
1990 unsigned long flags;
1991
1992 while (s && s->dev_midi != minor)
1993 s = s->next;
1994 if (!s)
1995 return -ENODEV;
1996 VALIDATE_STATE(s);
1997 file->private_data = s;
1998 /* wait for device to become free */
1999 down(&s->open_sem);
2000 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2001 if (file->f_flags & O_NONBLOCK) {
2002 up(&s->open_sem);
2003 return -EBUSY;
2004 }
2005 up(&s->open_sem);
2006 interruptible_sleep_on(&s->open_wait);
2007 if (signal_pending(current))
2008 return -ERESTARTSYS;
2009 down(&s->open_sem);
2010 }
2011 spin_lock_irqsave(&s->lock, flags);
2012 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2013 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2014 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2015 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2016 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2017 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2018 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2019 outb(0xff, s->iomidi+1); /* reset command */
2020 outb(0x3f, s->iomidi+1); /* uart command */
2021 if (!(inb(s->iomidi+1) & 0x80))
2022 inb(s->iomidi);
2023 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2024 init_timer(&s->midi.timer);
2025 s->midi.timer.expires = jiffies+1;
2026 s->midi.timer.data = (unsigned long)s;
2027 s->midi.timer.function = sv_midi_timer;
2028 add_timer(&s->midi.timer);
2029 }
2030 if (file->f_mode & FMODE_READ) {
2031 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2032 }
2033 if (file->f_mode & FMODE_WRITE) {
2034 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2035 }
2036 spin_unlock_irqrestore(&s->lock, flags);
2037 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2038 up(&s->open_sem);
2039 MOD_INC_USE_COUNT;
2040 return 0;
2041 }
2042
2043 static int sv_midi_release(struct inode *inode, struct file *file)
2044 {
2045 struct sv_state *s = (struct sv_state *)file->private_data;
2046 DECLARE_WAITQUEUE(wait, current);
2047 unsigned long flags;
2048 unsigned count, tmo;
2049
2050 VALIDATE_STATE(s);
2051
2052 if (file->f_mode & FMODE_WRITE) {
2053 current->state = TASK_INTERRUPTIBLE;
2054 add_wait_queue(&s->midi.owait, &wait);
2055 for (;;) {
2056 spin_lock_irqsave(&s->lock, flags);
2057 count = s->midi.ocnt;
2058 spin_unlock_irqrestore(&s->lock, flags);
2059 if (count <= 0)
2060 break;
2061 if (signal_pending(current))
2062 break;
2063 if (file->f_flags & O_NONBLOCK) {
2064 remove_wait_queue(&s->midi.owait, &wait);
2065 current->state = TASK_RUNNING;
2066 return -EBUSY;
2067 }
2068 tmo = (count * HZ) / 3100;
2069 if (!schedule_timeout(tmo ? : 1) && tmo)
2070 printk(KERN_DEBUG "sv: midi timed out??\n");
2071 }
2072 remove_wait_queue(&s->midi.owait, &wait);
2073 current->state = TASK_RUNNING;
2074 }
2075 down(&s->open_sem);
2076 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2077 spin_lock_irqsave(&s->lock, flags);
2078 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2079 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2080 del_timer(&s->midi.timer);
2081 }
2082 spin_unlock_irqrestore(&s->lock, flags);
2083 up(&s->open_sem);
2084 wake_up(&s->open_wait);
2085 MOD_DEC_USE_COUNT;
2086 return 0;
2087 }
2088
2089 static /*const*/ struct file_operations sv_midi_fops = {
2090 &sv_llseek,
2091 &sv_midi_read,
2092 &sv_midi_write,
2093 NULL, /* readdir */
2094 &sv_midi_poll,
2095 NULL, /* ioctl */
2096 NULL, /* mmap */
2097 &sv_midi_open,
2098 NULL, /* flush */
2099 &sv_midi_release,
2100 NULL, /* fsync */
2101 NULL, /* fasync */
2102 NULL, /* check_media_change */
2103 NULL, /* revalidate */
2104 NULL, /* lock */
2105 };
2106
2107 /* --------------------------------------------------------------------- */
2108
2109 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2110 {
2111 static const unsigned char op_offset[18] = {
2112 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2113 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2114 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2115 };
2116 struct sv_state *s = (struct sv_state *)file->private_data;
2117 struct dm_fm_voice v;
2118 struct dm_fm_note n;
2119 struct dm_fm_params p;
2120 unsigned int io;
2121 unsigned int regb;
2122
2123 switch (cmd) {
2124 case FM_IOCTL_RESET:
2125 for (regb = 0xb0; regb < 0xb9; regb++) {
2126 outb(regb, s->iosynth);
2127 outb(0, s->iosynth+1);
2128 outb(regb, s->iosynth+2);
2129 outb(0, s->iosynth+3);
2130 }
2131 return 0;
2132
2133 case FM_IOCTL_PLAY_NOTE:
2134 if (copy_from_user(&n, (void *)arg, sizeof(n)))
2135 return -EFAULT;
2136 if (n.voice >= 18)
2137 return -EINVAL;
2138 if (n.voice >= 9) {
2139 regb = n.voice - 9;
2140 io = s->iosynth+2;
2141 } else {
2142 regb = n.voice;
2143 io = s->iosynth;
2144 }
2145 outb(0xa0 + regb, io);
2146 outb(n.fnum & 0xff, io+1);
2147 outb(0xb0 + regb, io);
2148 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2149 return 0;
2150
2151 case FM_IOCTL_SET_VOICE:
2152 if (copy_from_user(&v, (void *)arg, sizeof(v)))
2153 return -EFAULT;
2154 if (v.voice >= 18)
2155 return -EINVAL;
2156 regb = op_offset[v.voice];
2157 io = s->iosynth + ((v.op & 1) << 1);
2158 outb(0x20 + regb, io);
2159 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2160 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2161 outb(0x40 + regb, io);
2162 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2163 outb(0x60 + regb, io);
2164 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2165 outb(0x80 + regb, io);
2166 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2167 outb(0xe0 + regb, io);
2168 outb(v.waveform & 0x7, io+1);
2169 if (n.voice >= 9) {
2170 regb = n.voice - 9;
2171 io = s->iosynth+2;
2172 } else {
2173 regb = n.voice;
2174 io = s->iosynth;
2175 }
2176 outb(0xc0 + regb, io);
2177 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2178 (v.connection & 1), io+1);
2179 return 0;
2180
2181 case FM_IOCTL_SET_PARAMS:
2182 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2183 return -EFAULT;
2184 outb(0x08, s->iosynth);
2185 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2186 outb(0xbd, s->iosynth);
2187 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2188 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2189 return 0;
2190
2191 case FM_IOCTL_SET_OPL:
2192 outb(4, s->iosynth+2);
2193 outb(arg, s->iosynth+3);
2194 return 0;
2195
2196 case FM_IOCTL_SET_MODE:
2197 outb(5, s->iosynth+2);
2198 outb(arg & 1, s->iosynth+3);
2199 return 0;
2200
2201 default:
2202 return -EINVAL;
2203 }
2204 }
2205
2206 static int sv_dmfm_open(struct inode *inode, struct file *file)
2207 {
2208 int minor = MINOR(inode->i_rdev);
2209 struct sv_state *s = devs;
2210
2211 while (s && s->dev_dmfm != minor)
2212 s = s->next;
2213 if (!s)
2214 return -ENODEV;
2215 VALIDATE_STATE(s);
2216 file->private_data = s;
2217 /* wait for device to become free */
2218 down(&s->open_sem);
2219 while (s->open_mode & FMODE_DMFM) {
2220 if (file->f_flags & O_NONBLOCK) {
2221 up(&s->open_sem);
2222 return -EBUSY;
2223 }
2224 up(&s->open_sem);
2225 interruptible_sleep_on(&s->open_wait);
2226 if (signal_pending(current))
2227 return -ERESTARTSYS;
2228 down(&s->open_sem);
2229 }
2230 /* init the stuff */
2231 outb(1, s->iosynth);
2232 outb(0x20, s->iosynth+1); /* enable waveforms */
2233 outb(4, s->iosynth+2);
2234 outb(0, s->iosynth+3); /* no 4op enabled */
2235 outb(5, s->iosynth+2);
2236 outb(1, s->iosynth+3); /* enable OPL3 */
2237 s->open_mode |= FMODE_DMFM;
2238 up(&s->open_sem);
2239 MOD_INC_USE_COUNT;
2240 return 0;
2241 }
2242
2243 static int sv_dmfm_release(struct inode *inode, struct file *file)
2244 {
2245 struct sv_state *s = (struct sv_state *)file->private_data;
2246 unsigned int regb;
2247
2248 VALIDATE_STATE(s);
2249 down(&s->open_sem);
2250 s->open_mode &= ~FMODE_DMFM;
2251 for (regb = 0xb0; regb < 0xb9; regb++) {
2252 outb(regb, s->iosynth);
2253 outb(0, s->iosynth+1);
2254 outb(regb, s->iosynth+2);
2255 outb(0, s->iosynth+3);
2256 }
2257 up(&s->open_sem);
2258 wake_up(&s->open_wait);
2259 MOD_DEC_USE_COUNT;
2260 return 0;
2261 }
2262
2263 static /*const*/ struct file_operations sv_dmfm_fops = {
2264 &sv_llseek,
2265 NULL, /* read */
2266 NULL, /* write */
2267 NULL, /* readdir */
2268 NULL, /* poll */
2269 &sv_dmfm_ioctl,
2270 NULL, /* mmap */
2271 &sv_dmfm_open,
2272 NULL, /* flush */
2273 &sv_dmfm_release,
2274 NULL, /* fsync */
2275 NULL, /* fasync */
2276 NULL, /* check_media_change */
2277 NULL, /* revalidate */
2278 NULL, /* lock */
2279 };
2280
2281 /* --------------------------------------------------------------------- */
2282
2283 /* maximum number of devices */
2284 #define NR_DEVICE 5
2285
2286 static int reverb[NR_DEVICE] = { 0, };
2287
2288 #if 0
2289 static int wavetable[NR_DEVICE] = { 0, };
2290 #endif
2291
2292 static unsigned dmaio = 0xac00;
2293
2294 /* --------------------------------------------------------------------- */
2295
2296 static struct initvol {
2297 int mixch;
2298 int vol;
2299 } initvol[] __initdata = {
2300 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2301 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2302 { SOUND_MIXER_WRITE_CD, 0x4040 },
2303 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2304 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2305 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2306 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2307 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2308 { SOUND_MIXER_WRITE_PCM, 0x4040 }
2309 };
2310
2311 #ifdef MODULE
2312 __initfunc(int init_module(void))
2313 #else
2314 __initfunc(int init_sonicvibes(void))
2315 #endif
2316 {
2317 struct sv_state *s;
2318 struct pci_dev *pcidev = NULL;
2319 mm_segment_t fs;
2320 int i, val, index = 0;
2321
2322 if (!pci_present()) /* No PCI bus in this machine! */
2323 return -ENODEV;
2324 printk(KERN_INFO "sv: version v0.14 time " __TIME__ " " __DATE__ "\n");
2325 #if 0
2326 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2327 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2328 #endif
2329 while (index < NR_DEVICE &&
2330 (pcidev = pci_find_device(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, pcidev))) {
2331 if (pcidev->base_address[1] == 0 ||
2332 (pcidev->base_address[1] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2333 continue;
2334 if (pcidev->base_address[2] == 0 ||
2335 (pcidev->base_address[2] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2336 continue;
2337 if (pcidev->base_address[3] == 0 ||
2338 (pcidev->base_address[3] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2339 continue;
2340 if (pcidev->irq == 0)
2341 continue;
2342 if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2343 printk(KERN_WARNING "sv: out of memory\n");
2344 continue;
2345 }
2346 memset(s, 0, sizeof(struct sv_state));
2347 init_waitqueue_head(&s->dma_adc.wait);
2348 init_waitqueue_head(&s->dma_dac.wait);
2349 init_waitqueue_head(&s->open_wait);
2350 init_waitqueue_head(&s->midi.iwait);
2351 init_waitqueue_head(&s->midi.owait);
2352 s->open_sem = MUTEX;
2353 s->magic = SV_MAGIC;
2354 s->iosb = pcidev->base_address[0] & PCI_BASE_ADDRESS_IO_MASK;
2355 s->ioenh = pcidev->base_address[1] & PCI_BASE_ADDRESS_IO_MASK;
2356 s->iosynth = pcidev->base_address[2] & PCI_BASE_ADDRESS_IO_MASK;
2357 s->iomidi = pcidev->base_address[3] & PCI_BASE_ADDRESS_IO_MASK;
2358 s->iogame = pcidev->base_address[4] & PCI_BASE_ADDRESS_IO_MASK;
2359 pci_read_config_dword(pcidev, 0x40, &s->iodmaa);
2360 pci_read_config_dword(pcidev, 0x48, &s->iodmac);
2361 dmaio &= ~(SV_EXTENT_DMA-1);
2362 s->iodmaa &= ~(SV_EXTENT_DMA-1);
2363 s->iodmac &= ~(SV_EXTENT_DMA-1);
2364 if (!(s->iodmaa)) {
2365 s->iodmaa = dmaio;
2366 dmaio += SV_EXTENT_DMA;
2367 printk(KERN_INFO "sv: BIOS did not allocate DDMA channel A io, allocated at %#x\n",
2368 s->iodmaa);
2369 }
2370 if (!(s->iodmac)) {
2371 s->iodmac = dmaio;
2372 dmaio += SV_EXTENT_DMA;
2373 printk(KERN_INFO "sv: BIOS did not allocate DDMA channel C io, allocated at %#x\n",
2374 s->iodmac);
2375 }
2376 pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9); /* enable and use extended mode */
2377 pci_write_config_dword(pcidev, 0x48, s->iodmac | 9); /* enable */
2378 printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#lx %#x %#x\n",
2379 s->iosb, s->ioenh, s->iosynth, s->iomidi, s->iogame, s->iodmaa, s->iodmac);
2380 if (s->ioenh == 0 || s->iodmaa == 0 || s->iodmac == 0)
2381 continue;
2382 s->irq = pcidev->irq;
2383
2384 /* hack */
2385 pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12); /* wavetable base address */
2386
2387 if (check_region(s->ioenh, SV_EXTENT_ENH)) {
2388 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2389 goto err_region5;
2390 }
2391 request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM");
2392 if (check_region(s->iodmaa, SV_EXTENT_DMA)) {
2393 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2394 goto err_region4;
2395 }
2396 request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA");
2397 if (check_region(s->iodmac, SV_EXTENT_DMA)) {
2398 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2399 goto err_region3;
2400 }
2401 request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC");
2402 if (check_region(s->iomidi, SV_EXTENT_MIDI)) {
2403 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2404 goto err_region2;
2405 }
2406 request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi");
2407 if (check_region(s->iosynth, SV_EXTENT_SYNTH)) {
2408 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2409 goto err_region1;
2410 }
2411 request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth");
2412 /* initialize codec registers */
2413 outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2414 udelay(50);
2415 outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2416 udelay(50);
2417 outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2418 | (reverb[index] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2419 inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2420 wrindir(s, SV_CIDRIVECONTROL, 0); /* drive current 16mA */
2421 wrindir(s, SV_CIENABLE, s->enable = 0); /* disable DMAA and DMAC */
2422 outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2423 //outb(0xff, s->iodmaa + SV_DMA_RESET);
2424 //outb(0xff, s->iodmac + SV_DMA_RESET);
2425 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2426 wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2427 wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2428 wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2429 setpll(s, SV_CIADCPLLM, 8000);
2430 wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2431 wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2432 wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2433 wrindir(s, SV_CIADCOUTPUT, 0);
2434 /* request irq */
2435 if (request_irq(s->irq, sv_interrupt, SA_SHIRQ, "S3 SonicVibes", s)) {
2436 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2437 goto err_irq;
2438 }
2439 printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2440 s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2441 /* register devices */
2442 if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0)
2443 goto err_dev1;
2444 if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0)
2445 goto err_dev2;
2446 if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0)
2447 goto err_dev3;
2448 if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0)
2449 goto err_dev4;
2450 /* initialize the chips */
2451 fs = get_fs();
2452 set_fs(KERNEL_DS);
2453 val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2454 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2455 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2456 val = initvol[i].vol;
2457 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2458 }
2459 set_fs(fs);
2460 /* queue it for later freeing */
2461 s->next = devs;
2462 devs = s;
2463 index++;
2464 continue;
2465
2466 err_dev4:
2467 unregister_sound_midi(s->dev_midi);
2468 err_dev3:
2469 unregister_sound_mixer(s->dev_mixer);
2470 err_dev2:
2471 unregister_sound_dsp(s->dev_audio);
2472 err_dev1:
2473 printk(KERN_ERR "sv: cannot register misc device\n");
2474 free_irq(s->irq, s);
2475 err_irq:
2476 release_region(s->iosynth, SV_EXTENT_SYNTH);
2477 err_region1:
2478 release_region(s->iomidi, SV_EXTENT_MIDI);
2479 err_region2:
2480 release_region(s->iodmac, SV_EXTENT_DMA);
2481 err_region3:
2482 release_region(s->iodmaa, SV_EXTENT_DMA);
2483 err_region4:
2484 release_region(s->ioenh, SV_EXTENT_ENH);
2485 err_region5:
2486 kfree_s(s, sizeof(struct sv_state));
2487 }
2488 if (!devs) {
2489 if (wavetable_mem)
2490 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2491 return -ENODEV;
2492 }
2493 return 0;
2494 }
2495
2496 /* --------------------------------------------------------------------- */
2497
2498 #ifdef MODULE
2499
2500 MODULE_PARM(reverb, "1-" __MODULE_STRING(NR_DEVICE) "i");
2501 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2502 #if 0
2503 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2504 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2505 #endif
2506
2507 MODULE_PARM(dmaio, "i");
2508 MODULE_PARM_DESC(dmaio, "if the motherboard BIOS did not allocate DDMA io, allocate them starting at this address");
2509
2510 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2511 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2512
2513 void cleanup_module(void)
2514 {
2515 struct sv_state *s;
2516
2517 while ((s = devs)) {
2518 devs = devs->next;
2519 outb(~0, s->ioenh + SV_CODEC_INTMASK); /* disable ints */
2520 synchronize_irq();
2521 inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2522 wrindir(s, SV_CIENABLE, 0); /* disable DMAA and DMAC */
2523 //outb(0, s->iodmaa + SV_DMA_RESET);
2524 //outb(0, s->iodmac + SV_DMA_RESET);
2525 free_irq(s->irq, s);
2526 release_region(s->iodmac, SV_EXTENT_DMA);
2527 release_region(s->iodmaa, SV_EXTENT_DMA);
2528 release_region(s->ioenh, SV_EXTENT_ENH);
2529 release_region(s->iomidi, SV_EXTENT_MIDI);
2530 release_region(s->iosynth, SV_EXTENT_SYNTH);
2531 unregister_sound_dsp(s->dev_audio);
2532 unregister_sound_mixer(s->dev_mixer);
2533 unregister_sound_midi(s->dev_midi);
2534 unregister_sound_special(s->dev_dmfm);
2535 kfree_s(s, sizeof(struct sv_state));
2536 }
2537 if (wavetable_mem)
2538 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2539 printk(KERN_INFO "sv: unloading\n");
2540 }
2541
2542 #endif /* MODULE */
Copy of Dave Jones history.git as used by http://archive.org/details/git-history-of-linux