?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Import 2.3.1pre2
[davej-history.git] / drivers / sound / es1371.c
blobe0882d7ce4fc039ad3aecf15e350b6e2a35bf451
1 /*****************************************************************************/
2
3 /*
4 * es1371.c -- Creative Ensoniq ES1371.
5 *
6 * Copyright (C) 1998 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Special thanks to Ensoniq
23 *
24 *
25 * Module command line parameters:
26 * joystick must be set to the base I/O-Port to be used for
27 * the gameport. Legal values are 0x200, 0x208, 0x210 and 0x218.
28 * The gameport is mirrored eight times.
29 *
30 * Supported devices:
31 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
32 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
33 * /dev/dsp1 additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
34 * /dev/midi simple MIDI UART interface, no ioctl
35 *
36 * NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
37 * to be done in software. That is what /dev/dac is for. By now (Q2 1998)
38 * there are several MIDI to PCM (WAV) packages, one of them is timidity.
39 *
40 * Revision history
41 * 04.06.98 0.1 Initial release
42 * Mixer stuff should be overhauled; especially optional AC97 mixer bits
43 * should be detected. This results in strange behaviour of some mixer
44 * settings, like master volume and mic.
45 * 08.06.98 0.2 First release using Alan Cox' soundcore instead of miscdevice
46 * 03.08.98 0.3 Do not include modversions.h
47 * Now mixer behaviour can basically be selected between
48 * "OSS documented" and "OSS actual" behaviour
49 * 31.08.98 0.4 Fix realplayer problems - dac.count issues
50 * 27.10.98 0.5 Fix joystick support
51 * -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
52 * 10.12.98 0.6 Fix drain_dac trying to wait on not yet initialized DMA
53 * 23.12.98 0.7 Fix a few f_file & FMODE_ bugs
54 * Don't wake up app until there are fragsize bytes to read/write
55 * 06.01.99 0.8 remove the silly SA_INTERRUPT flag.
56 * hopefully killed the egcs section type conflict
57 * 12.03.99 0.9 cinfo.blocks should be reset after GETxPTR ioctl.
58 * reported by Johan Maes <joma@telindus.be>
59 * 22.03.99 0.10 return EAGAIN instead of EBUSY when O_NONBLOCK
60 * read/write cannot be executed
61 * 07.04.99 0.11 implemented the following ioctl's: SOUND_PCM_READ_RATE,
62 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
63 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
64 * Another Alpha fix (wait_src_ready in init routine)
65 * reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
66 * Note: joystick address handling might still be wrong on archs
67 * other than i386
68 *
69 */
70
71 /*****************************************************************************/
72
73 #include <linux/config.h>
74 #include <linux/version.h>
75 #include <linux/module.h>
76 #include <linux/string.h>
77 #include <linux/ioport.h>
78 #include <linux/sched.h>
79 #include <linux/delay.h>
80 #include <linux/sound.h>
81 #include <linux/malloc.h>
82 #include <linux/soundcard.h>
83 #include <linux/pci.h>
84 #include <asm/io.h>
85 #include <asm/dma.h>
86 #include <linux/init.h>
87 #include <linux/poll.h>
88 #include <asm/spinlock.h>
89 #include <asm/uaccess.h>
90 #include <asm/hardirq.h>
91
92 /* --------------------------------------------------------------------- */
93
94 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
95
96 /* --------------------------------------------------------------------- */
97
98 #ifndef PCI_VENDOR_ID_ENSONIQ
99 #define PCI_VENDOR_ID_ENSONIQ 0x1274
100 #endif
101 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
102 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
103 #endif
104
105 #define ES1371_MAGIC ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
106
107 #define ES1371_EXTENT 0x40
108 #define JOY_EXTENT 8
109
110 #define ES1371_REG_CONTROL 0x00
111 #define ES1371_REG_STATUS 0x04
112 #define ES1371_REG_UART_DATA 0x08
113 #define ES1371_REG_UART_STATUS 0x09
114 #define ES1371_REG_UART_CONTROL 0x09
115 #define ES1371_REG_UART_TEST 0x0a
116 #define ES1371_REG_MEMPAGE 0x0c
117 #define ES1371_REG_SRCONV 0x10
118 #define ES1371_REG_CODEC 0x14
119 #define ES1371_REG_LEGACY 0x18
120 #define ES1371_REG_SERIAL_CONTROL 0x20
121 #define ES1371_REG_DAC1_SCOUNT 0x24
122 #define ES1371_REG_DAC2_SCOUNT 0x28
123 #define ES1371_REG_ADC_SCOUNT 0x2c
124
125 #define ES1371_REG_DAC1_FRAMEADR 0xc30
126 #define ES1371_REG_DAC1_FRAMECNT 0xc34
127 #define ES1371_REG_DAC2_FRAMEADR 0xc38
128 #define ES1371_REG_DAC2_FRAMECNT 0xc3c
129 #define ES1371_REG_ADC_FRAMEADR 0xd30
130 #define ES1371_REG_ADC_FRAMECNT 0xd34
131
132 #define ES1371_FMT_U8_MONO 0
133 #define ES1371_FMT_U8_STEREO 1
134 #define ES1371_FMT_S16_MONO 2
135 #define ES1371_FMT_S16_STEREO 3
136 #define ES1371_FMT_STEREO 1
137 #define ES1371_FMT_S16 2
138 #define ES1371_FMT_MASK 3
139
140 static const unsigned sample_size[] = { 1, 2, 2, 4 };
141 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
142
143 #define CTRL_JOY_SHIFT 24
144 #define CTRL_JOY_MASK 3
145 #define CTRL_JOY_200 0x00000000 /* joystick base address */
146 #define CTRL_JOY_208 0x01000000
147 #define CTRL_JOY_210 0x02000000
148 #define CTRL_JOY_218 0x03000000
149 #define CTRL_GPIO_IN0 0x00100000 /* general purpose inputs/outputs */
150 #define CTRL_GPIO_IN1 0x00200000
151 #define CTRL_GPIO_IN2 0x00400000
152 #define CTRL_GPIO_IN3 0x00800000
153 #define CTRL_GPIO_OUT0 0x00010000
154 #define CTRL_GPIO_OUT1 0x00020000
155 #define CTRL_GPIO_OUT2 0x00040000
156 #define CTRL_GPIO_OUT3 0x00080000
157 #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
158 #define CTRL_SYNCRES 0x00004000 /* AC97 warm reset */
159 #define CTRL_ADCSTOP 0x00002000 /* stop ADC transfers */
160 #define CTRL_PWR_INTRM 0x00001000 /* 1 = power level ints enabled */
161 #define CTRL_M_CB 0x00000800 /* recording source: 0 = ADC, 1 = MPEG */
162 #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
163 #define CTRL_PDLEV0 0x00000000 /* power down level */
164 #define CTRL_PDLEV1 0x00000100
165 #define CTRL_PDLEV2 0x00000200
166 #define CTRL_PDLEV3 0x00000300
167 #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
168 #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
169 #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
170 #define CTRL_ADC_EN 0x00000010 /* enable ADC */
171 #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
172 #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port */
173 #define CTRL_XTALCLKDIS 0x00000002 /* 1 = disable crystal clock input */
174 #define CTRL_PCICLKDIS 0x00000001 /* 1 = disable PCI clock distribution */
175
176
177 #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
178 #define STAT_SYNC_ERR 0x00000100 /* 1 = codec sync error */
179 #define STAT_VC 0x000000c0 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
180 #define STAT_SH_VC 6
181 #define STAT_MPWR 0x00000020 /* power level interrupt */
182 #define STAT_MCCB 0x00000010 /* CCB int pending */
183 #define STAT_UART 0x00000008 /* UART int pending */
184 #define STAT_DAC1 0x00000004 /* DAC1 int pending */
185 #define STAT_DAC2 0x00000002 /* DAC2 int pending */
186 #define STAT_ADC 0x00000001 /* ADC int pending */
187
188 #define USTAT_RXINT 0x80 /* UART rx int pending */
189 #define USTAT_TXINT 0x04 /* UART tx int pending */
190 #define USTAT_TXRDY 0x02 /* UART tx ready */
191 #define USTAT_RXRDY 0x01 /* UART rx ready */
192
193 #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
194 #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
195 #define UCTRL_ENA_TXINT 0x20 /* enable TX int */
196 #define UCTRL_CNTRL 0x03 /* control field */
197 #define UCTRL_CNTRL_SWR 0x03 /* software reset command */
198
199 /* sample rate converter */
200 #define SRC_RAMADDR_MASK 0xfe000000
201 #define SRC_RAMADDR_SHIFT 25
202 #define SRC_WE 0x01000000 /* read/write control for SRC RAM */
203 #define SRC_BUSY 0x00800000 /* SRC busy */
204 #define SRC_DIS 0x00400000 /* 1 = disable SRC */
205 #define SRC_DDAC1 0x00200000 /* 1 = disable accum update for DAC1 */
206 #define SRC_DDAC2 0x00100000 /* 1 = disable accum update for DAC2 */
207 #define SRC_DADC 0x00080000 /* 1 = disable accum update for ADC2 */
208 #define SRC_RAMDATA_MASK 0x0000ffff
209 #define SRC_RAMDATA_SHIFT 0
210
211 #define SRCREG_ADC 0x78
212 #define SRCREG_DAC1 0x70
213 #define SRCREG_DAC2 0x74
214 #define SRCREG_VOL_ADC 0x6c
215 #define SRCREG_VOL_DAC1 0x7c
216 #define SRCREG_VOL_DAC2 0x7e
217
218 #define SRCREG_TRUNC_N 0x00
219 #define SRCREG_INT_REGS 0x01
220 #define SRCREG_ACCUM_FRAC 0x02
221 #define SRCREG_VFREQ_FRAC 0x03
222
223 #define CODEC_PIRD 0x00800000 /* 0 = write AC97 register */
224 #define CODEC_PIADD_MASK 0x007f0000
225 #define CODEC_PIADD_SHIFT 16
226 #define CODEC_PIDAT_MASK 0x0000ffff
227 #define CODEC_PIDAT_SHIFT 0
228
229 #define CODEC_RDY 0x80000000 /* AC97 read data valid */
230 #define CODEC_WIP 0x40000000 /* AC97 write in progress */
231 #define CODEC_PORD 0x00800000 /* 0 = write AC97 register */
232 #define CODEC_POADD_MASK 0x007f0000
233 #define CODEC_POADD_SHIFT 16
234 #define CODEC_PODAT_MASK 0x0000ffff
235 #define CODEC_PODAT_SHIFT 0
236
237
238 #define LEGACY_JFAST 0x80000000 /* fast joystick timing */
239 #define LEGACY_FIRQ 0x01000000 /* force IRQ */
240
241 #define SCTRL_DACTEST 0x00400000 /* 1 = DAC test, test vector generation purposes */
242 #define SCTRL_P2ENDINC 0x00380000 /* */
243 #define SCTRL_SH_P2ENDINC 19
244 #define SCTRL_P2STINC 0x00070000 /* */
245 #define SCTRL_SH_P2STINC 16
246 #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
247 #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
248 #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
249 #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
250 #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
251 #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
252 #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
253 #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
254 #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
255 #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
256 #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
257 #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
258 #define SCTRL_R1FMT 0x00000030 /* format mask */
259 #define SCTRL_SH_R1FMT 4
260 #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
261 #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
262 #define SCTRL_P2FMT 0x0000000c /* format mask */
263 #define SCTRL_SH_P2FMT 2
264 #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
265 #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
266 #define SCTRL_P1FMT 0x00000003 /* format mask */
267 #define SCTRL_SH_P1FMT 0
268
269 /* codec constants */
270
271 #define CODEC_ID_DEDICATEDMIC 0x001
272 #define CODEC_ID_MODEMCODEC 0x002
273 #define CODEC_ID_BASSTREBLE 0x004
274 #define CODEC_ID_SIMULATEDSTEREO 0x008
275 #define CODEC_ID_HEADPHONEOUT 0x010
276 #define CODEC_ID_LOUDNESS 0x020
277 #define CODEC_ID_18BITDAC 0x040
278 #define CODEC_ID_20BITDAC 0x080
279 #define CODEC_ID_18BITADC 0x100
280 #define CODEC_ID_20BITADC 0x200
281
282 #define CODEC_ID_SESHIFT 10
283 #define CODEC_ID_SEMASK 0x1f
284
285
286 /* misc stuff */
287
288 #define FMODE_DAC 4 /* slight misuse of mode_t */
289
290 /* MIDI buffer sizes */
291
292 #define MIDIINBUF 256
293 #define MIDIOUTBUF 256
294
295 #define FMODE_MIDI_SHIFT 3
296 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
297 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
298
299 #define SND_DEV_DSP16 5
300
301 /* --------------------------------------------------------------------- */
302
303 static const char *stereo_enhancement[] __initdata =
304 {
305 "no 3D stereo enhancement",
306 "Analog Devices Phat Stereo",
307 "Creative Stereo Enhancement",
308 "National Semiconductor 3D Stereo Enhancement",
309 "YAMAHA Ymersion",
310 "BBE 3D Stereo Enhancement",
311 "Crystal Semiconductor 3D Stereo Enhancement",
312 "Qsound QXpander",
313 "Spatializer 3D Stereo Enhancement",
314 "SRS 3D Stereo Enhancement",
315 "Platform Technologies 3D Stereo Enhancement",
316 "AKM 3D Audio",
317 "Aureal Stereo Enhancement",
318 "AZTECH 3D Enhancement",
319 "Binaura 3D Audio Enhancement",
320 "ESS Technology Stereo Enhancement",
321 "Harman International VMAx",
322 "NVidea 3D Stereo Enhancement",
323 "Philips Incredible Sound",
324 "Texas Instruments 3D Stereo Enhancement",
325 "VLSI Technology 3D Stereo Enhancement"
326 };
327
328 /* --------------------------------------------------------------------- */
329
330 struct es1371_state {
331 /* magic */
332 unsigned int magic;
333
334 /* we keep sb cards in a linked list */
335 struct es1371_state *next;
336
337 /* soundcore stuff */
338 int dev_audio;
339 int dev_mixer;
340 int dev_dac;
341 int dev_midi;
342
343 /* hardware resources */
344 unsigned long io; /* long for SPARC */
345 unsigned int irq;
346
347 /* mixer registers; there is no HW readback */
348 struct {
349 unsigned short codec_id;
350 unsigned int modcnt;
351 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
352 unsigned short vol[13];
353 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
354 } mix;
355
356 /* wave stuff */
357 unsigned ctrl;
358 unsigned sctrl;
359 unsigned dac1rate, dac2rate, adcrate;
360
361 spinlock_t lock;
362 struct semaphore open_sem;
363 mode_t open_mode;
364 wait_queue_head_t open_wait;
365
366 struct dmabuf {
367 void *rawbuf;
368 unsigned buforder;
369 unsigned numfrag;
370 unsigned fragshift;
371 unsigned hwptr, swptr;
372 unsigned total_bytes;
373 int count;
374 unsigned error; /* over/underrun */
375 wait_queue_head_t wait;
376 /* redundant, but makes calculations easier */
377 unsigned fragsize;
378 unsigned dmasize;
379 unsigned fragsamples;
380 /* OSS stuff */
381 unsigned mapped:1;
382 unsigned ready:1;
383 unsigned endcleared:1;
384 unsigned ossfragshift;
385 int ossmaxfrags;
386 unsigned subdivision;
387 } dma_dac1, dma_dac2, dma_adc;
388
389 /* midi stuff */
390 struct {
391 unsigned ird, iwr, icnt;
392 unsigned ord, owr, ocnt;
393 wait_queue_head_t iwait;
394 wait_queue_head_t owait;
395 unsigned char ibuf[MIDIINBUF];
396 unsigned char obuf[MIDIOUTBUF];
397 } midi;
398 };
399
400 /* --------------------------------------------------------------------- */
401
402 static struct es1371_state *devs = NULL;
403
404 /* --------------------------------------------------------------------- */
405
406 extern inline unsigned ld2(unsigned int x)
407 {
408 unsigned r = 0;
409
410 if (x >= 0x10000) {
411 x >>= 16;
412 r += 16;
413 }
414 if (x >= 0x100) {
415 x >>= 8;
416 r += 8;
417 }
418 if (x >= 0x10) {
419 x >>= 4;
420 r += 4;
421 }
422 if (x >= 4) {
423 x >>= 2;
424 r += 2;
425 }
426 if (x >= 2)
427 r++;
428 return r;
429 }
430
431 /* --------------------------------------------------------------------- */
432 /*
433 * hweightN: returns the hamming weight (i.e. the number
434 * of bits set) of a N-bit word
435 */
436
437 #ifdef hweight32
438 #undef hweight32
439 #endif
440
441 extern __inline__ unsigned int hweight32(unsigned int w)
442 {
443 unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
444 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
445 res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
446 res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
447 return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
448 }
449
450 /* --------------------------------------------------------------------- */
451
452 static unsigned wait_src_ready(struct es1371_state *s)
453 {
454 unsigned int t, r;
455
456 for (t = 0; t < 1000; t++) {
457 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
458 return r;
459 udelay(1);
460 }
461 printk(KERN_DEBUG "es1371: sample rate converter timeout r = 0x%08x\n", r);
462 return r;
463 }
464
465 static unsigned src_read(struct es1371_state *s, unsigned reg)
466 {
467 unsigned int r;
468
469 r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
470 r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
471 outl(r, s->io + ES1371_REG_SRCONV);
472 return (wait_src_ready(s) & SRC_RAMDATA_MASK) >> SRC_RAMDATA_SHIFT;
473 }
474
475
476 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
477 {
478 unsigned int r;
479
480 r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
481 r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
482 r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
483 outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
484 }
485
486 /* --------------------------------------------------------------------- */
487
488 /* most of the following here is black magic */
489
490 static void set_adc_rate(struct es1371_state *s, unsigned rate)
491 {
492 unsigned long flags;
493 unsigned int n, truncm, freq;
494
495 if (rate > 48000)
496 rate = 48000;
497 if (rate < 4000)
498 rate = 4000;
499 n = rate / 3000;
500 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
501 n--;
502 truncm = (21 * n - 1) | 1;
503 freq = ((48000UL << 15) / rate) * n;
504 s->adcrate = (48000UL << 15) / (freq / n);
505 spin_lock_irqsave(&s->lock, flags);
506 if (rate >= 24000) {
507 if (truncm > 239)
508 truncm = 239;
509 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
510 (((239 - truncm) >> 1) << 9) | (n << 4));
511 } else {
512 if (truncm > 119)
513 truncm = 119;
514 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
515 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
516 }
517 src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
518 (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
519 ((freq >> 5) & 0xfc00));
520 src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
521 src_write(s, SRCREG_VOL_ADC, n << 8);
522 src_write(s, SRCREG_VOL_ADC+1, n << 8);
523 spin_unlock_irqrestore(&s->lock, flags);
524 }
525
526 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
527 {
528 unsigned long flags;
529 unsigned int freq, r;
530
531 if (rate > 48000)
532 rate = 48000;
533 if (rate < 4000)
534 rate = 4000;
535 freq = (rate << 15) / 3000;
536 s->dac1rate = (freq * 3000) >> 15;
537 spin_lock_irqsave(&s->lock, flags);
538 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
539 outl(r, s->io + ES1371_REG_SRCONV);
540 src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
541 (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
542 ((freq >> 5) & 0xfc00));
543 src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
544 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
545 outl(r, s->io + ES1371_REG_SRCONV);
546 spin_unlock_irqrestore(&s->lock, flags);
547 }
548
549 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
550 {
551 unsigned long flags;
552 unsigned int freq, r;
553
554 if (rate > 48000)
555 rate = 48000;
556 if (rate < 4000)
557 rate = 4000;
558 freq = (rate << 15) / 3000;
559 s->dac2rate = (freq * 3000) >> 15;
560 spin_lock_irqsave(&s->lock, flags);
561 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
562 outl(r, s->io + ES1371_REG_SRCONV);
563 src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
564 (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
565 ((freq >> 5) & 0xfc00));
566 src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
567 r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
568 outl(r, s->io + ES1371_REG_SRCONV);
569 spin_unlock_irqrestore(&s->lock, flags);
570 }
571
572 /* --------------------------------------------------------------------- */
573
574 static void wrcodec(struct es1371_state *s, unsigned addr, unsigned data)
575 {
576 unsigned long flags;
577 unsigned t, x;
578
579 for (t = 0; t < 0x1000; t++)
580 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
581 break;
582 spin_lock_irqsave(&s->lock, flags);
583 /* save the current state for later */
584 x = inl(s->io+ES1371_REG_SRCONV);
585 /* enable SRC state data in SRC mux */
586 outl((wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
587 s->io+ES1371_REG_SRCONV);
588 /* wait for a SAFE time to write addr/data and then do it, dammit */
589 for (t = 0; t < 0x1000; t++)
590 if ((inl(s->io+ES1371_REG_SRCONV) & 0x00070000) == 0x00010000)
591 break;
592 outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
593 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
594 /* restore SRC reg */
595 wait_src_ready(s);
596 outl(x, s->io+ES1371_REG_SRCONV);
597 spin_unlock_irqrestore(&s->lock, flags);
598 }
599
600 static unsigned rdcodec(struct es1371_state *s, unsigned addr)
601 {
602 unsigned long flags;
603 unsigned t, x;
604
605 for (t = 0; t < 0x1000; t++)
606 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
607 break;
608 spin_lock_irqsave(&s->lock, flags);
609 /* save the current state for later */
610 x = inl(s->io+ES1371_REG_SRCONV);
611 /* enable SRC state data in SRC mux */
612 outl((wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
613 s->io+ES1371_REG_SRCONV);
614 /* wait for a SAFE time to write addr/data and then do it, dammit */
615 for (t = 0; t < 0x1000; t++)
616 if ((inl(s->io+ES1371_REG_SRCONV) & 0x00070000) == 0x00010000)
617 break;
618 outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
619 /* restore SRC reg */
620 wait_src_ready(s);
621 outl(x, s->io+ES1371_REG_SRCONV);
622 spin_unlock_irqrestore(&s->lock, flags);
623 /* now wait for the stinkin' data (RDY) */
624 for (t = 0; t < 0x1000; t++)
625 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
626 break;
627 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
628 }
629
630 /* --------------------------------------------------------------------- */
631
632 extern inline void stop_adc(struct es1371_state *s)
633 {
634 unsigned long flags;
635
636 spin_lock_irqsave(&s->lock, flags);
637 s->ctrl &= ~CTRL_ADC_EN;
638 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
639 spin_unlock_irqrestore(&s->lock, flags);
640 }
641
642 extern inline void stop_dac1(struct es1371_state *s)
643 {
644 unsigned long flags;
645
646 spin_lock_irqsave(&s->lock, flags);
647 s->ctrl &= ~CTRL_DAC1_EN;
648 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
649 spin_unlock_irqrestore(&s->lock, flags);
650 }
651
652 extern inline void stop_dac2(struct es1371_state *s)
653 {
654 unsigned long flags;
655
656 spin_lock_irqsave(&s->lock, flags);
657 s->ctrl &= ~CTRL_DAC2_EN;
658 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
659 spin_unlock_irqrestore(&s->lock, flags);
660 }
661
662 static void start_dac1(struct es1371_state *s)
663 {
664 unsigned long flags;
665 unsigned fragremain, fshift;
666
667 spin_lock_irqsave(&s->lock, flags);
668 if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
669 && s->dma_dac1.ready) {
670 s->ctrl |= CTRL_DAC1_EN;
671 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
672 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
673 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
674 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
675 if (fragremain < 2*fshift)
676 fragremain = s->dma_dac1.fragsize;
677 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
678 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
679 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
680 }
681 spin_unlock_irqrestore(&s->lock, flags);
682 }
683
684 static void start_dac2(struct es1371_state *s)
685 {
686 unsigned long flags;
687 unsigned fragremain, fshift;
688
689 spin_lock_irqsave(&s->lock, flags);
690 if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
691 && s->dma_dac2.ready) {
692 s->ctrl |= CTRL_DAC2_EN;
693 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
694 SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
695 (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
696 (0 << SCTRL_SH_P2STINC);
697 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
698 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
699 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
700 if (fragremain < 2*fshift)
701 fragremain = s->dma_dac2.fragsize;
702 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
703 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
704 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
705 }
706 spin_unlock_irqrestore(&s->lock, flags);
707 }
708
709 static void start_adc(struct es1371_state *s)
710 {
711 unsigned long flags;
712 unsigned fragremain, fshift;
713
714 spin_lock_irqsave(&s->lock, flags);
715 if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
716 && s->dma_adc.ready) {
717 s->ctrl |= CTRL_ADC_EN;
718 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
719 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
720 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
721 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
722 if (fragremain < 2*fshift)
723 fragremain = s->dma_adc.fragsize;
724 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
725 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
726 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
727 }
728 spin_unlock_irqrestore(&s->lock, flags);
729 }
730
731 /* --------------------------------------------------------------------- */
732
733 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
734 #define DMABUF_MINORDER 1
735
736
737 extern inline void dealloc_dmabuf(struct dmabuf *db)
738 {
739 unsigned long map, mapend;
740
741 if (db->rawbuf) {
742 /* undo marking the pages as reserved */
743 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
744 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
745 clear_bit(PG_reserved, &mem_map[map].flags);
746 free_pages((unsigned long)db->rawbuf, db->buforder);
747 }
748 db->rawbuf = NULL;
749 db->mapped = db->ready = 0;
750 }
751
752 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
753 {
754 int order;
755 unsigned bytepersec;
756 unsigned bufs;
757 unsigned long map, mapend;
758
759 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
760 if (!db->rawbuf) {
761 db->ready = db->mapped = 0;
762 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER && !db->rawbuf; order--)
763 db->rawbuf = (void *)__get_free_pages(GFP_KERNEL, order);
764 if (!db->rawbuf)
765 return -ENOMEM;
766 db->buforder = order;
767 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
768 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
769 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
770 set_bit(PG_reserved, &mem_map[map].flags);
771 }
772 fmt &= ES1371_FMT_MASK;
773 bytepersec = rate << sample_shift[fmt];
774 bufs = PAGE_SIZE << db->buforder;
775 if (db->ossfragshift) {
776 if ((1000 << db->ossfragshift) < bytepersec)
777 db->fragshift = ld2(bytepersec/1000);
778 else
779 db->fragshift = db->ossfragshift;
780 } else {
781 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
782 if (db->fragshift < 3)
783 db->fragshift = 3;
784 }
785 db->numfrag = bufs >> db->fragshift;
786 while (db->numfrag < 4 && db->fragshift > 3) {
787 db->fragshift--;
788 db->numfrag = bufs >> db->fragshift;
789 }
790 db->fragsize = 1 << db->fragshift;
791 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
792 db->numfrag = db->ossmaxfrags;
793 db->fragsamples = db->fragsize >> sample_shift[fmt];
794 db->dmasize = db->numfrag << db->fragshift;
795 memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
796 outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
797 outl(virt_to_bus(db->rawbuf), s->io+(reg & 0xff));
798 outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
799 db->ready = 1;
800 return 0;
801 }
802
803 extern inline int prog_dmabuf_adc(struct es1371_state *s)
804 {
805 stop_adc(s);
806 return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
807 ES1371_REG_ADC_FRAMEADR);
808 }
809
810 extern inline int prog_dmabuf_dac2(struct es1371_state *s)
811 {
812 stop_dac2(s);
813 return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
814 ES1371_REG_DAC2_FRAMEADR);
815 }
816
817 extern inline int prog_dmabuf_dac1(struct es1371_state *s)
818 {
819 stop_dac1(s);
820 return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
821 ES1371_REG_DAC1_FRAMEADR);
822 }
823
824 extern inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
825 {
826 unsigned hwptr, diff;
827
828 outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
829 hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
830 diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
831 db->hwptr = hwptr;
832 return diff;
833 }
834
835 extern inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
836 {
837 if (bptr + len > bsize) {
838 unsigned x = bsize - bptr;
839 memset(((char *)buf) + bptr, c, x);
840 bptr = 0;
841 len -= x;
842 }
843 memset(((char *)buf) + bptr, c, len);
844 }
845
846 /* call with spinlock held! */
847 static void es1371_update_ptr(struct es1371_state *s)
848 {
849 int diff;
850
851 /* update ADC pointer */
852 if (s->ctrl & CTRL_ADC_EN) {
853 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
854 s->dma_adc.total_bytes += diff;
855 s->dma_adc.count += diff;
856 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
857 wake_up(&s->dma_adc.wait);
858 if (!s->dma_adc.mapped) {
859 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
860 s->ctrl &= ~CTRL_ADC_EN;
861 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
862 s->dma_adc.error++;
863 }
864 }
865 }
866 /* update DAC1 pointer */
867 if (s->ctrl & CTRL_DAC1_EN) {
868 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
869 s->dma_dac1.total_bytes += diff;
870 if (s->dma_dac1.mapped) {
871 s->dma_dac1.count += diff;
872 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
873 wake_up(&s->dma_dac1.wait);
874 } else {
875 s->dma_dac1.count -= diff;
876 if (s->dma_dac1.count <= 0) {
877 s->ctrl &= ~CTRL_DAC1_EN;
878 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
879 s->dma_dac1.error++;
880 } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
881 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
882 s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
883 s->dma_dac1.endcleared = 1;
884 }
885 if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
886 wake_up(&s->dma_dac1.wait);
887 }
888 }
889 /* update DAC2 pointer */
890 if (s->ctrl & CTRL_DAC2_EN) {
891 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
892 s->dma_dac2.total_bytes += diff;
893 if (s->dma_dac2.mapped) {
894 s->dma_dac2.count += diff;
895 if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
896 wake_up(&s->dma_dac2.wait);
897 } else {
898 s->dma_dac2.count -= diff;
899 if (s->dma_dac2.count <= 0) {
900 s->ctrl &= ~CTRL_DAC2_EN;
901 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
902 s->dma_dac2.error++;
903 } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
904 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
905 s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
906 s->dma_dac2.endcleared = 1;
907 }
908 if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
909 wake_up(&s->dma_dac2.wait);
910 }
911 }
912 }
913
914 /* hold spinlock for the following! */
915 static void es1371_handle_midi(struct es1371_state *s)
916 {
917 unsigned char ch;
918 int wake;
919
920 if (!(s->ctrl & CTRL_UART_EN))
921 return;
922 wake = 0;
923 while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
924 ch = inb(s->io+ES1371_REG_UART_DATA);
925 if (s->midi.icnt < MIDIINBUF) {
926 s->midi.ibuf[s->midi.iwr] = ch;
927 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
928 s->midi.icnt++;
929 }
930 wake = 1;
931 }
932 if (wake)
933 wake_up(&s->midi.iwait);
934 wake = 0;
935 while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
936 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
937 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
938 s->midi.ocnt--;
939 if (s->midi.ocnt < MIDIOUTBUF-16)
940 wake = 1;
941 }
942 if (wake)
943 wake_up(&s->midi.owait);
944 outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
945 }
946
947 static void es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
948 {
949 struct es1371_state *s = (struct es1371_state *)dev_id;
950 unsigned int intsrc, sctl;
951
952 /* fastpath out, to ease interrupt sharing */
953 intsrc = inl(s->io+ES1371_REG_STATUS);
954 if (!(intsrc & 0x80000000))
955 return;
956 spin_lock(&s->lock);
957 /* clear audio interrupts first */
958 sctl = s->sctrl;
959 if (intsrc & STAT_ADC)
960 sctl &= ~SCTRL_R1INTEN;
961 if (intsrc & STAT_DAC1)
962 sctl &= ~SCTRL_P1INTEN;
963 if (intsrc & STAT_DAC2)
964 sctl &= ~SCTRL_P2INTEN;
965 outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
966 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
967 es1371_update_ptr(s);
968 es1371_handle_midi(s);
969 spin_unlock(&s->lock);
970 }
971
972 /* --------------------------------------------------------------------- */
973
974 static const char invalid_magic[] = KERN_CRIT "es1371: invalid magic value\n";
975
976 #define VALIDATE_STATE(s) \
977 ({ \
978 if (!(s) || (s)->magic != ES1371_MAGIC) { \
979 printk(invalid_magic); \
980 return -ENXIO; \
981 } \
982 })
983
984 /* --------------------------------------------------------------------- */
985
986 #define AC97_PESSIMISTIC
987
988 /*
989 * this define causes the driver to assume that all optional
990 * AC97 bits are missing. This is what Ensoniq does too in their
991 * Windows driver. Maybe we should one day autoprobe for these
992 * bits. But anyway I have to see an AC97 codec that implements
993 * one of those optional (volume) bits.
994 */
995
996 static const unsigned int recsrc[8] =
997 {
998 SOUND_MASK_MIC,
999 SOUND_MASK_CD,
1000 SOUND_MASK_VIDEO,
1001 SOUND_MASK_LINE1,
1002 SOUND_MASK_LINE,
1003 SOUND_MASK_VOLUME,
1004 SOUND_MASK_PHONEOUT,
1005 SOUND_MASK_PHONEIN
1006 };
1007
1008 static const unsigned char volreg[SOUND_MIXER_NRDEVICES] =
1009 {
1010 /* 5 bit stereo */
1011 [SOUND_MIXER_LINE] = 0x10,
1012 [SOUND_MIXER_CD] = 0x12,
1013 [SOUND_MIXER_VIDEO] = 0x14,
1014 [SOUND_MIXER_LINE1] = 0x16,
1015 [SOUND_MIXER_PCM] = 0x18,
1016 /* 6 bit stereo */
1017 [SOUND_MIXER_VOLUME] = 0x02,
1018 [SOUND_MIXER_PHONEOUT] = 0x04,
1019 /* 6 bit mono */
1020 [SOUND_MIXER_OGAIN] = 0x06,
1021 [SOUND_MIXER_PHONEIN] = 0x0c,
1022 /* 4 bit mono but shifted by 1 */
1023 [SOUND_MIXER_SPEAKER] = 0x08,
1024 /* 6 bit mono + preamp */
1025 [SOUND_MIXER_MIC] = 0x0e,
1026 /* 4 bit stereo */
1027 [SOUND_MIXER_RECLEV] = 0x1c,
1028 /* 4 bit mono */
1029 [SOUND_MIXER_IGAIN] = 0x1e
1030 };
1031
1032 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1033
1034 #define swab(x) ((((x) >> 8) & 0xff) | (((x) << 8) & 0xff00))
1035
1036 static int mixer_rdch(struct es1371_state *s, unsigned int ch, int *arg)
1037 {
1038 int j;
1039
1040 switch (ch) {
1041 case SOUND_MIXER_MIC:
1042 j = rdcodec(s, 0x0e);
1043 if (j & 0x8000)
1044 return put_user(0, (int *)arg);
1045 #ifdef AC97_PESSIMISTIC
1046 return put_user(0x4949 - 0x202 * (j & 0x1f) + ((j & 0x40) ? 0x1b1b : 0), (int *)arg);
1047 #else /* AC97_PESSIMISTIC */
1048 return put_user(0x5757 - 0x101 * ((j & 0x3f) * 5 / 4) + ((j & 0x40) ? 0x0d0d : 0), (int *)arg);
1049 #endif /* AC97_PESSIMISTIC */
1050
1051 case SOUND_MIXER_OGAIN:
1052 case SOUND_MIXER_PHONEIN:
1053 j = rdcodec(s, volreg[ch]);
1054 if (j & 0x8000)
1055 return put_user(0, (int *)arg);
1056 #ifdef AC97_PESSIMISTIC
1057 return put_user(0x6464 - 0x303 * (j & 0x1f), (int *)arg);
1058 #else /* AC97_PESSIMISTIC */
1059 return put_user((0x6464 - 0x303 * (j & 0x3f) / 2) & 0x7f7f, (int *)arg);
1060 #endif /* AC97_PESSIMISTIC */
1061
1062 case SOUND_MIXER_PHONEOUT:
1063 if (!(s->mix.codec_id & CODEC_ID_HEADPHONEOUT))
1064 return -EINVAL;
1065 /* fall through */
1066 case SOUND_MIXER_VOLUME:
1067 j = rdcodec(s, volreg[ch]);
1068 if (j & 0x8000)
1069 return put_user(0, (int *)arg);
1070 #ifdef AC97_PESSIMISTIC
1071 return put_user(0x6464 - (swab(j) & 0x1f1f) * 3, (int *)arg);
1072 #else /* AC97_PESSIMISTIC */
1073 return put_user((0x6464 - (swab(j) & 0x3f3f) * 3 / 2) & 0x7f7f, (int *)arg);
1074 #endif /* AC97_PESSIMISTIC */
1075
1076 case SOUND_MIXER_SPEAKER:
1077 j = rdcodec(s, 0x0a);
1078 if (j & 0x8000)
1079 return put_user(0, (int *)arg);
1080 return put_user(0x6464 - ((j >> 1) & 0xf) * 0x606, (int *)arg);
1081
1082 case SOUND_MIXER_LINE:
1083 case SOUND_MIXER_CD:
1084 case SOUND_MIXER_VIDEO:
1085 case SOUND_MIXER_LINE1:
1086 case SOUND_MIXER_PCM:
1087 j = rdcodec(s, volreg[ch]);
1088 if (j & 0x8000)
1089 return put_user(0, (int *)arg);
1090 return put_user(0x6464 - (swab(j) & 0x1f1f) * 3, (int *)arg);
1091
1092 case SOUND_MIXER_BASS:
1093 case SOUND_MIXER_TREBLE:
1094 if (!(s->mix.codec_id & CODEC_ID_BASSTREBLE))
1095 return -EINVAL;
1096 j = rdcodec(s, 0x08);
1097 if (ch == SOUND_MIXER_BASS)
1098 j >>= 8;
1099 return put_user((((j & 15) * 100) / 15) * 0x101, (int *)arg);
1100
1101 /* SOUND_MIXER_RECLEV and SOUND_MIXER_IGAIN specify gain */
1102 case SOUND_MIXER_RECLEV:
1103 j = rdcodec(s, 0x1c);
1104 if (j & 0x8000)
1105 return put_user(0, (int *)arg);
1106 return put_user((swab(j) & 0xf0f) * 6 + 0xa0a, (int *)arg);
1107
1108 case SOUND_MIXER_IGAIN:
1109 if (!(s->mix.codec_id & CODEC_ID_DEDICATEDMIC))
1110 return -EINVAL;
1111 j = rdcodec(s, 0x1e);
1112 if (j & 0x8000)
1113 return put_user(0, (int *)arg);
1114 return put_user((j & 0xf) * 0x606 + 0xa0a, (int *)arg);
1115
1116 default:
1117 return -EINVAL;
1118 }
1119 }
1120
1121 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1122
1123 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] =
1124 {
1125 /* 5 bit stereo */
1126 [SOUND_MIXER_LINE] = 1,
1127 [SOUND_MIXER_CD] = 2,
1128 [SOUND_MIXER_VIDEO] = 3,
1129 [SOUND_MIXER_LINE1] = 4,
1130 [SOUND_MIXER_PCM] = 5,
1131 /* 6 bit stereo */
1132 [SOUND_MIXER_VOLUME] = 6,
1133 [SOUND_MIXER_PHONEOUT] = 7,
1134 /* 6 bit mono */
1135 [SOUND_MIXER_OGAIN] = 8,
1136 [SOUND_MIXER_PHONEIN] = 9,
1137 /* 4 bit mono but shifted by 1 */
1138 [SOUND_MIXER_SPEAKER] = 10,
1139 /* 6 bit mono + preamp */
1140 [SOUND_MIXER_MIC] = 11,
1141 /* 4 bit stereo */
1142 [SOUND_MIXER_RECLEV] = 12,
1143 /* 4 bit mono */
1144 [SOUND_MIXER_IGAIN] = 13
1145 };
1146
1147 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1148
1149 static int mixer_wrch(struct es1371_state *s, unsigned int ch, int val)
1150 {
1151 int i;
1152 unsigned l1, r1;
1153
1154 l1 = val & 0xff;
1155 r1 = (val >> 8) & 0xff;
1156 if (l1 > 100)
1157 l1 = 100;
1158 if (r1 > 100)
1159 r1 = 100;
1160 switch (ch) {
1161 case SOUND_MIXER_LINE:
1162 case SOUND_MIXER_CD:
1163 case SOUND_MIXER_VIDEO:
1164 case SOUND_MIXER_LINE1:
1165 case SOUND_MIXER_PCM:
1166 if (l1 < 7 && r1 < 7) {
1167 wrcodec(s, volreg[ch], 0x8000);
1168 return 0;
1169 }
1170 if (l1 < 7)
1171 l1 = 7;
1172 if (r1 < 7)
1173 r1 = 7;
1174 wrcodec(s, volreg[ch], (((100 - l1) / 3) << 8) | ((100 - r1) / 3));
1175 return 0;
1176
1177 case SOUND_MIXER_PHONEOUT:
1178 if (!(s->mix.codec_id & CODEC_ID_HEADPHONEOUT))
1179 return -EINVAL;
1180 /* fall through */
1181 case SOUND_MIXER_VOLUME:
1182 #ifdef AC97_PESSIMISTIC
1183 if (l1 < 7 && r1 < 7) {
1184 wrcodec(s, volreg[ch], 0x8000);
1185 return 0;
1186 }
1187 if (l1 < 7)
1188 l1 = 7;
1189 if (r1 < 7)
1190 r1 = 7;
1191 wrcodec(s, volreg[ch], (((100 - l1) / 3) << 8) | ((100 - r1) / 3));
1192 return 0;
1193 #else /* AC97_PESSIMISTIC */
1194 if (l1 < 4 && r1 < 4) {
1195 wrcodec(s, volreg[ch], 0x8000);
1196 return 0;
1197 }
1198 if (l1 < 4)
1199 l1 = 4;
1200 if (r1 < 4)
1201 r1 = 4;
1202 wrcodec(s, volreg[ch], ((2 * (100 - l1) / 3) << 8) | (2 * (100 - r1) / 3));
1203 return 0;
1204 #endif /* AC97_PESSIMISTIC */
1205
1206 case SOUND_MIXER_OGAIN:
1207 case SOUND_MIXER_PHONEIN:
1208 #ifdef AC97_PESSIMISTIC
1209 wrcodec(s, volreg[ch], (l1 < 7) ? 0x8000 : (100 - l1) / 3);
1210 return 0;
1211 #else /* AC97_PESSIMISTIC */
1212 wrcodec(s, volreg[ch], (l1 < 4) ? 0x8000 : (2 * (100 - l1) / 3));
1213 return 0;
1214 #endif /* AC97_PESSIMISTIC */
1215
1216 case SOUND_MIXER_SPEAKER:
1217 wrcodec(s, 0x0a, (l1 < 10) ? 0x8000 : ((100 - l1) / 6) << 1);
1218 return 0;
1219
1220 case SOUND_MIXER_MIC:
1221 #ifdef AC97_PESSIMISTIC
1222 if (l1 < 11) {
1223 wrcodec(s, 0x0e, 0x8000);
1224 return 0;
1225 }
1226 i = 0;
1227 if (l1 >= 27) {
1228 l1 -= 27;
1229 i = 0x40;
1230 }
1231 if (l1 < 11)
1232 l1 = 11;
1233 wrcodec(s, 0x0e, ((73 - l1) / 2) | i);
1234 return 0;
1235 #else /* AC97_PESSIMISTIC */
1236 if (l1 < 9) {
1237 wrcodec(s, 0x0e, 0x8000);
1238 return 0;
1239 }
1240 i = 0;
1241 if (l1 >= 13) {
1242 l1 -= 13;
1243 i = 0x40;
1244 }
1245 if (l1 < 9)
1246 l1 = 9;
1247 wrcodec(s, 0x0e, (((87 - l1) * 4) / 5) | i);
1248 return 0;
1249 #endif /* AC97_PESSIMISTIC */
1250
1251 case SOUND_MIXER_BASS:
1252 val = ((l1 * 15) / 100) & 0xf;
1253 wrcodec(s, 0x08, (rdcodec(s, 0x08) & 0x00ff) | (val << 8));
1254 return 0;
1255
1256 case SOUND_MIXER_TREBLE:
1257 val = ((l1 * 15) / 100) & 0xf;
1258 wrcodec(s, 0x08, (rdcodec(s, 0x08) & 0xff00) | val);
1259 return 0;
1260
1261 /* SOUND_MIXER_RECLEV and SOUND_MIXER_IGAIN specify gain */
1262 case SOUND_MIXER_RECLEV:
1263 if (l1 < 10 || r1 < 10) {
1264 wrcodec(s, 0x1c, 0x8000);
1265 return 0;
1266 }
1267 if (l1 < 10)
1268 l1 = 10;
1269 if (r1 < 10)
1270 r1 = 10;
1271 wrcodec(s, 0x1c, (((l1 - 10) / 6) << 8) | ((r1 - 10) / 6));
1272 return 0;
1273
1274 case SOUND_MIXER_IGAIN:
1275 if (!(s->mix.codec_id & CODEC_ID_DEDICATEDMIC))
1276 return -EINVAL;
1277 wrcodec(s, 0x1e, (l1 < 10) ? 0x8000 : ((l1 - 10) / 6) & 0xf);
1278 return 0;
1279
1280 default:
1281 return -EINVAL;
1282 }
1283 }
1284
1285 static int mixer_ioctl(struct es1371_state *s, unsigned int cmd, unsigned long arg)
1286 {
1287 int i, val;
1288
1289 VALIDATE_STATE(s);
1290 if (cmd == SOUND_MIXER_PRIVATE1) {
1291 if (!(s->mix.codec_id & (CODEC_ID_SEMASK << CODEC_ID_SESHIFT)))
1292 return -EINVAL;
1293 get_user_ret(val, (int *)arg, -EFAULT);
1294 if (val & 1)
1295 wrcodec(s, 0x22, ((val << 3) & 0xf00) | ((val >> 1) & 0xf));
1296 val = rdcodec(s, 0x22);
1297 return put_user(((val & 0xf) << 1) | ((val & 0xf00) >> 3), (int *)arg);
1298 }
1299 if (cmd == SOUND_MIXER_INFO) {
1300 mixer_info info;
1301 strncpy(info.id, "ES1371", sizeof(info.id));
1302 strncpy(info.name, "Ensoniq ES1371", sizeof(info.name));
1303 info.modify_counter = s->mix.modcnt;
1304 if (copy_to_user((void *)arg, &info, sizeof(info)))
1305 return -EFAULT;
1306 return 0;
1307 }
1308 if (cmd == SOUND_OLD_MIXER_INFO) {
1309 _old_mixer_info info;
1310 strncpy(info.id, "ES1371", sizeof(info.id));
1311 strncpy(info.name, "Ensoniq ES1371", sizeof(info.name));
1312 if (copy_to_user((void *)arg, &info, sizeof(info)))
1313 return -EFAULT;
1314 return 0;
1315 }
1316 if (cmd == OSS_GETVERSION)
1317 return put_user(SOUND_VERSION, (int *)arg);
1318 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
1319 return -EINVAL;
1320 if (_IOC_DIR(cmd) == _IOC_READ) {
1321 switch (_IOC_NR(cmd)) {
1322 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1323 return put_user(recsrc[rdcodec(s, 0x1a) & 7], (int *)arg);
1324
1325 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1326 return put_user(SOUND_MASK_LINE | SOUND_MASK_CD | SOUND_MASK_VIDEO |
1327 SOUND_MASK_LINE1 | SOUND_MASK_PCM | SOUND_MASK_VOLUME |
1328 SOUND_MASK_OGAIN | SOUND_MASK_PHONEIN | SOUND_MASK_SPEAKER |
1329 SOUND_MASK_MIC | SOUND_MASK_RECLEV |
1330 ((s->mix.codec_id & CODEC_ID_BASSTREBLE) ? (SOUND_MASK_BASS | SOUND_MASK_TREBLE) : 0) |
1331 ((s->mix.codec_id & CODEC_ID_HEADPHONEOUT) ? SOUND_MASK_PHONEOUT : 0) |
1332 ((s->mix.codec_id & CODEC_ID_DEDICATEDMIC) ? SOUND_MASK_IGAIN : 0), (int *)arg);
1333
1334 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1335 return put_user(SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VIDEO | SOUND_MASK_LINE1 |
1336 SOUND_MASK_LINE | SOUND_MASK_VOLUME | SOUND_MASK_PHONEOUT |
1337 SOUND_MASK_PHONEIN, (int *)arg);
1338
1339 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1340 return put_user(SOUND_MASK_LINE | SOUND_MASK_CD | SOUND_MASK_VIDEO |
1341 SOUND_MASK_LINE1 | SOUND_MASK_PCM | SOUND_MASK_VOLUME |
1342 SOUND_MASK_PHONEOUT | SOUND_MASK_RECLEV, (int *)arg);
1343
1344 case SOUND_MIXER_CAPS:
1345 return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
1346
1347 default:
1348 i = _IOC_NR(cmd);
1349 if (i >= SOUND_MIXER_NRDEVICES)
1350 return -EINVAL;
1351 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1352 return mixer_rdch(s, i, (int *)arg);
1353 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1354 if (!volidx[i])
1355 return -EINVAL;
1356 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1357 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1358 }
1359 }
1360 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
1361 return -EINVAL;
1362 s->mix.modcnt++;
1363 switch (_IOC_NR(cmd)) {
1364 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1365 get_user_ret(val, (int *)arg, -EFAULT);
1366 i = hweight32(val);
1367 if (i == 0)
1368 return 0; /*val = mixer_recmask(s);*/
1369 else if (i > 1)
1370 val &= ~recsrc[rdcodec(s, 0x1a) & 7];
1371 for (i = 0; i < 8; i++) {
1372 if (val & recsrc[i]) {
1373 wrcodec(s, 0x1a, 0x101 * i);
1374 return 0;
1375 }
1376 }
1377 return 0;
1378
1379 default:
1380 i = _IOC_NR(cmd);
1381 if (i >= SOUND_MIXER_NRDEVICES)
1382 return -EINVAL;
1383 get_user_ret(val, (int *)arg, -EFAULT);
1384 if (mixer_wrch(s, i, val))
1385 return -EINVAL;
1386 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1387 return mixer_rdch(s, i, (int *)arg);
1388 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1389 if (!volidx[i])
1390 return -EINVAL;
1391 s->mix.vol[volidx[i]-1] = val;
1392 return put_user(s->mix.vol[volidx[i]-1], (int *)arg);
1393 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1394 }
1395 }
1396
1397 /* --------------------------------------------------------------------- */
1398
1399 static loff_t es1371_llseek(struct file *file, loff_t offset, int origin)
1400 {
1401 return -ESPIPE;
1402 }
1403
1404 /* --------------------------------------------------------------------- */
1405
1406 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1407 {
1408 int minor = MINOR(inode->i_rdev);
1409 struct es1371_state *s = devs;
1410
1411 while (s && s->dev_mixer != minor)
1412 s = s->next;
1413 if (!s)
1414 return -ENODEV;
1415 VALIDATE_STATE(s);
1416 file->private_data = s;
1417 MOD_INC_USE_COUNT;
1418 return 0;
1419 }
1420
1421 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1422 {
1423 struct es1371_state *s = (struct es1371_state *)file->private_data;
1424
1425 VALIDATE_STATE(s);
1426 MOD_DEC_USE_COUNT;
1427 return 0;
1428 }
1429
1430 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1431 {
1432 return mixer_ioctl((struct es1371_state *)file->private_data, cmd, arg);
1433 }
1434
1435 static /*const*/ struct file_operations es1371_mixer_fops = {
1436 &es1371_llseek,
1437 NULL, /* read */
1438 NULL, /* write */
1439 NULL, /* readdir */
1440 NULL, /* poll */
1441 &es1371_ioctl_mixdev,
1442 NULL, /* mmap */
1443 &es1371_open_mixdev,
1444 NULL, /* flush */
1445 &es1371_release_mixdev,
1446 NULL, /* fsync */
1447 NULL, /* fasync */
1448 NULL, /* check_media_change */
1449 NULL, /* revalidate */
1450 NULL, /* lock */
1451 };
1452
1453 /* --------------------------------------------------------------------- */
1454
1455 static int drain_dac1(struct es1371_state *s, int nonblock)
1456 {
1457 DECLARE_WAITQUEUE(wait, current);
1458 unsigned long flags;
1459 int count, tmo;
1460
1461 if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1462 return 0;
1463 current->state = TASK_INTERRUPTIBLE;
1464 add_wait_queue(&s->dma_dac1.wait, &wait);
1465 for (;;) {
1466 spin_lock_irqsave(&s->lock, flags);
1467 count = s->dma_dac1.count;
1468 spin_unlock_irqrestore(&s->lock, flags);
1469 if (count <= 0)
1470 break;
1471 if (signal_pending(current))
1472 break;
1473 if (nonblock) {
1474 remove_wait_queue(&s->dma_dac1.wait, &wait);
1475 current->state = TASK_RUNNING;
1476 return -EBUSY;
1477 }
1478 tmo = (count * HZ) / s->dac1rate;
1479 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1480 if (!schedule_timeout(tmo ? : 1) && tmo)
1481 printk(KERN_DEBUG "es1371: dma timed out??\n");
1482 }
1483 remove_wait_queue(&s->dma_dac1.wait, &wait);
1484 current->state = TASK_RUNNING;
1485 if (signal_pending(current))
1486 return -ERESTARTSYS;
1487 return 0;
1488 }
1489
1490 static int drain_dac2(struct es1371_state *s, int nonblock)
1491 {
1492 DECLARE_WAITQUEUE(wait, current);
1493 unsigned long flags;
1494 int count, tmo;
1495
1496 if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1497 return 0;
1498 current->state = TASK_INTERRUPTIBLE;
1499 add_wait_queue(&s->dma_dac2.wait, &wait);
1500 for (;;) {
1501 spin_lock_irqsave(&s->lock, flags);
1502 count = s->dma_dac2.count;
1503 spin_unlock_irqrestore(&s->lock, flags);
1504 if (count <= 0)
1505 break;
1506 if (signal_pending(current))
1507 break;
1508 if (nonblock) {
1509 remove_wait_queue(&s->dma_dac2.wait, &wait);
1510 current->state = TASK_RUNNING;
1511 return -EBUSY;
1512 }
1513 tmo = (count * HZ) / s->dac2rate;
1514 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1515 if (!schedule_timeout(tmo ? : 1) && tmo)
1516 printk(KERN_DEBUG "es1371: dma timed out??\n");
1517 }
1518 remove_wait_queue(&s->dma_dac2.wait, &wait);
1519 current->state = TASK_RUNNING;
1520 if (signal_pending(current))
1521 return -ERESTARTSYS;
1522 return 0;
1523 }
1524
1525 /* --------------------------------------------------------------------- */
1526
1527 static ssize_t es1371_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1528 {
1529 struct es1371_state *s = (struct es1371_state *)file->private_data;
1530 ssize_t ret;
1531 unsigned long flags;
1532 unsigned swptr;
1533 int cnt;
1534
1535 VALIDATE_STATE(s);
1536 if (ppos != &file->f_pos)
1537 return -ESPIPE;
1538 if (s->dma_adc.mapped)
1539 return -ENXIO;
1540 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1541 return ret;
1542 if (!access_ok(VERIFY_WRITE, buffer, count))
1543 return -EFAULT;
1544 ret = 0;
1545 while (count > 0) {
1546 spin_lock_irqsave(&s->lock, flags);
1547 swptr = s->dma_adc.swptr;
1548 cnt = s->dma_adc.dmasize-swptr;
1549 if (s->dma_adc.count < cnt)
1550 cnt = s->dma_adc.count;
1551 spin_unlock_irqrestore(&s->lock, flags);
1552 if (cnt > count)
1553 cnt = count;
1554 if (cnt <= 0) {
1555 start_adc(s);
1556 if (file->f_flags & O_NONBLOCK)
1557 return ret ? ret : -EAGAIN;
1558 interruptible_sleep_on(&s->dma_adc.wait);
1559 if (signal_pending(current))
1560 return ret ? ret : -ERESTARTSYS;
1561 continue;
1562 }
1563 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt))
1564 return ret ? ret : -EFAULT;
1565 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1566 spin_lock_irqsave(&s->lock, flags);
1567 s->dma_adc.swptr = swptr;
1568 s->dma_adc.count -= cnt;
1569 spin_unlock_irqrestore(&s->lock, flags);
1570 count -= cnt;
1571 buffer += cnt;
1572 ret += cnt;
1573 start_adc(s);
1574 }
1575 return ret;
1576 }
1577
1578 static ssize_t es1371_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1579 {
1580 struct es1371_state *s = (struct es1371_state *)file->private_data;
1581 ssize_t ret;
1582 unsigned long flags;
1583 unsigned swptr;
1584 int cnt;
1585
1586 VALIDATE_STATE(s);
1587 if (ppos != &file->f_pos)
1588 return -ESPIPE;
1589 if (s->dma_dac2.mapped)
1590 return -ENXIO;
1591 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1592 return ret;
1593 if (!access_ok(VERIFY_READ, buffer, count))
1594 return -EFAULT;
1595 ret = 0;
1596 while (count > 0) {
1597 spin_lock_irqsave(&s->lock, flags);
1598 if (s->dma_dac2.count < 0) {
1599 s->dma_dac2.count = 0;
1600 s->dma_dac2.swptr = s->dma_dac2.hwptr;
1601 }
1602 swptr = s->dma_dac2.swptr;
1603 cnt = s->dma_dac2.dmasize-swptr;
1604 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1605 cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1606 spin_unlock_irqrestore(&s->lock, flags);
1607 if (cnt > count)
1608 cnt = count;
1609 if (cnt <= 0) {
1610 start_dac2(s);
1611 if (file->f_flags & O_NONBLOCK)
1612 return ret ? ret : -EAGAIN;
1613 interruptible_sleep_on(&s->dma_dac2.wait);
1614 if (signal_pending(current))
1615 return ret ? ret : -ERESTARTSYS;
1616 continue;
1617 }
1618 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt))
1619 return ret ? ret : -EFAULT;
1620 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1621 spin_lock_irqsave(&s->lock, flags);
1622 s->dma_dac2.swptr = swptr;
1623 s->dma_dac2.count += cnt;
1624 s->dma_dac2.endcleared = 0;
1625 spin_unlock_irqrestore(&s->lock, flags);
1626 count -= cnt;
1627 buffer += cnt;
1628 ret += cnt;
1629 start_dac2(s);
1630 }
1631 return ret;
1632 }
1633
1634 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1635 {
1636 struct es1371_state *s = (struct es1371_state *)file->private_data;
1637 unsigned long flags;
1638 unsigned int mask = 0;
1639
1640 VALIDATE_STATE(s);
1641 if (file->f_mode & FMODE_WRITE)
1642 poll_wait(file, &s->dma_dac2.wait, wait);
1643 if (file->f_mode & FMODE_READ)
1644 poll_wait(file, &s->dma_adc.wait, wait);
1645 spin_lock_irqsave(&s->lock, flags);
1646 es1371_update_ptr(s);
1647 if (file->f_mode & FMODE_READ) {
1648 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1649 mask |= POLLIN | POLLRDNORM;
1650 }
1651 if (file->f_mode & FMODE_WRITE) {
1652 if (s->dma_dac2.mapped) {
1653 if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1654 mask |= POLLOUT | POLLWRNORM;
1655 } else {
1656 if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1657 mask |= POLLOUT | POLLWRNORM;
1658 }
1659 }
1660 spin_unlock_irqrestore(&s->lock, flags);
1661 return mask;
1662 }
1663
1664 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1665 {
1666 struct es1371_state *s = (struct es1371_state *)file->private_data;
1667 struct dmabuf *db;
1668 int ret;
1669 unsigned long size;
1670
1671 VALIDATE_STATE(s);
1672 if (vma->vm_flags & VM_WRITE) {
1673 if ((ret = prog_dmabuf_dac2(s)) != 0)
1674 return ret;
1675 db = &s->dma_dac2;
1676 } else if (vma->vm_flags & VM_READ) {
1677 if ((ret = prog_dmabuf_adc(s)) != 0)
1678 return ret;
1679 db = &s->dma_adc;
1680 } else
1681 return -EINVAL;
1682 if (vma->vm_offset != 0)
1683 return -EINVAL;
1684 size = vma->vm_end - vma->vm_start;
1685 if (size > (PAGE_SIZE << db->buforder))
1686 return -EINVAL;
1687 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1688 return -EAGAIN;
1689 db->mapped = 1;
1690 return 0;
1691 }
1692
1693 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1694 {
1695 struct es1371_state *s = (struct es1371_state *)file->private_data;
1696 unsigned long flags;
1697 audio_buf_info abinfo;
1698 count_info cinfo;
1699 int val, mapped, ret;
1700
1701 VALIDATE_STATE(s);
1702 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1703 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1704 switch (cmd) {
1705 case OSS_GETVERSION:
1706 return put_user(SOUND_VERSION, (int *)arg);
1707
1708 case SNDCTL_DSP_SYNC:
1709 if (file->f_mode & FMODE_WRITE)
1710 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1711 return 0;
1712
1713 case SNDCTL_DSP_SETDUPLEX:
1714 return 0;
1715
1716 case SNDCTL_DSP_GETCAPS:
1717 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1718
1719 case SNDCTL_DSP_RESET:
1720 if (file->f_mode & FMODE_WRITE) {
1721 stop_dac2(s);
1722 synchronize_irq();
1723 s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1724 }
1725 if (file->f_mode & FMODE_READ) {
1726 stop_adc(s);
1727 synchronize_irq();
1728 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1729 }
1730 return 0;
1731
1732 case SNDCTL_DSP_SPEED:
1733 get_user_ret(val, (int *)arg, -EFAULT);
1734 if (val >= 0) {
1735 if (file->f_mode & FMODE_READ) {
1736 stop_adc(s);
1737 s->dma_adc.ready = 0;
1738 set_adc_rate(s, val);
1739 }
1740 if (file->f_mode & FMODE_WRITE) {
1741 stop_dac2(s);
1742 s->dma_dac2.ready = 0;
1743 set_dac2_rate(s, val);
1744 }
1745 }
1746 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1747
1748 case SNDCTL_DSP_STEREO:
1749 get_user_ret(val, (int *)arg, -EFAULT);
1750 if (file->f_mode & FMODE_READ) {
1751 stop_adc(s);
1752 s->dma_adc.ready = 0;
1753 spin_lock_irqsave(&s->lock, flags);
1754 if (val)
1755 s->sctrl |= SCTRL_R1SMB;
1756 else
1757 s->sctrl &= ~SCTRL_R1SMB;
1758 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1759 spin_unlock_irqrestore(&s->lock, flags);
1760 }
1761 if (file->f_mode & FMODE_WRITE) {
1762 stop_dac2(s);
1763 s->dma_dac2.ready = 0;
1764 spin_lock_irqsave(&s->lock, flags);
1765 if (val)
1766 s->sctrl |= SCTRL_P2SMB;
1767 else
1768 s->sctrl &= ~SCTRL_P2SMB;
1769 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1770 spin_unlock_irqrestore(&s->lock, flags);
1771 }
1772 return 0;
1773
1774 case SNDCTL_DSP_CHANNELS:
1775 get_user_ret(val, (int *)arg, -EFAULT);
1776 if (val != 0) {
1777 if (file->f_mode & FMODE_READ) {
1778 stop_adc(s);
1779 s->dma_adc.ready = 0;
1780 spin_lock_irqsave(&s->lock, flags);
1781 if (val >= 2)
1782 s->sctrl |= SCTRL_R1SMB;
1783 else
1784 s->sctrl &= ~SCTRL_R1SMB;
1785 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1786 spin_unlock_irqrestore(&s->lock, flags);
1787 }
1788 if (file->f_mode & FMODE_WRITE) {
1789 stop_dac2(s);
1790 s->dma_dac2.ready = 0;
1791 spin_lock_irqsave(&s->lock, flags);
1792 if (val >= 2)
1793 s->sctrl |= SCTRL_P2SMB;
1794 else
1795 s->sctrl &= ~SCTRL_P2SMB;
1796 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1797 spin_unlock_irqrestore(&s->lock, flags);
1798 }
1799 }
1800 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1801
1802 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1803 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
1804
1805 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1806 get_user_ret(val, (int *)arg, -EFAULT);
1807 if (val != AFMT_QUERY) {
1808 if (file->f_mode & FMODE_READ) {
1809 stop_adc(s);
1810 s->dma_adc.ready = 0;
1811 spin_lock_irqsave(&s->lock, flags);
1812 if (val == AFMT_S16_LE)
1813 s->sctrl |= SCTRL_R1SEB;
1814 else
1815 s->sctrl &= ~SCTRL_R1SEB;
1816 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1817 spin_unlock_irqrestore(&s->lock, flags);
1818 }
1819 if (file->f_mode & FMODE_WRITE) {
1820 stop_dac2(s);
1821 s->dma_dac2.ready = 0;
1822 spin_lock_irqsave(&s->lock, flags);
1823 if (val == AFMT_S16_LE)
1824 s->sctrl |= SCTRL_P2SEB;
1825 else
1826 s->sctrl &= ~SCTRL_P2SEB;
1827 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1828 spin_unlock_irqrestore(&s->lock, flags);
1829 }
1830 }
1831 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1832 AFMT_S16_LE : AFMT_U8, (int *)arg);
1833
1834 case SNDCTL_DSP_POST:
1835 return 0;
1836
1837 case SNDCTL_DSP_GETTRIGGER:
1838 val = 0;
1839 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1840 val |= PCM_ENABLE_INPUT;
1841 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1842 val |= PCM_ENABLE_OUTPUT;
1843 return put_user(val, (int *)arg);
1844
1845 case SNDCTL_DSP_SETTRIGGER:
1846 get_user_ret(val, (int *)arg, -EFAULT);
1847 if (file->f_mode & FMODE_READ) {
1848 if (val & PCM_ENABLE_INPUT) {
1849 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1850 return ret;
1851 start_adc(s);
1852 } else
1853 stop_adc(s);
1854 }
1855 if (file->f_mode & FMODE_WRITE) {
1856 if (val & PCM_ENABLE_OUTPUT) {
1857 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1858 return ret;
1859 start_dac2(s);
1860 } else
1861 stop_dac2(s);
1862 }
1863 return 0;
1864
1865 case SNDCTL_DSP_GETOSPACE:
1866 if (!(file->f_mode & FMODE_WRITE))
1867 return -EINVAL;
1868 if (!(s->ctrl & CTRL_DAC2_EN) && (val = prog_dmabuf_dac2(s)) != 0)
1869 return val;
1870 spin_lock_irqsave(&s->lock, flags);
1871 es1371_update_ptr(s);
1872 abinfo.fragsize = s->dma_dac2.fragsize;
1873 abinfo.bytes = s->dma_dac2.dmasize - s->dma_dac2.count;
1874 abinfo.fragstotal = s->dma_dac2.numfrag;
1875 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1876 spin_unlock_irqrestore(&s->lock, flags);
1877 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1878
1879 case SNDCTL_DSP_GETISPACE:
1880 if (!(file->f_mode & FMODE_READ))
1881 return -EINVAL;
1882 if (!(s->ctrl & CTRL_ADC_EN) && (val = prog_dmabuf_adc(s)) != 0)
1883 return val;
1884 spin_lock_irqsave(&s->lock, flags);
1885 es1371_update_ptr(s);
1886 abinfo.fragsize = s->dma_adc.fragsize;
1887 abinfo.bytes = s->dma_adc.count;
1888 abinfo.fragstotal = s->dma_adc.numfrag;
1889 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1890 spin_unlock_irqrestore(&s->lock, flags);
1891 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1892
1893 case SNDCTL_DSP_NONBLOCK:
1894 file->f_flags |= O_NONBLOCK;
1895 return 0;
1896
1897 case SNDCTL_DSP_GETODELAY:
1898 if (!(file->f_mode & FMODE_WRITE))
1899 return -EINVAL;
1900 spin_lock_irqsave(&s->lock, flags);
1901 es1371_update_ptr(s);
1902 val = s->dma_dac2.count;
1903 spin_unlock_irqrestore(&s->lock, flags);
1904 return put_user(val, (int *)arg);
1905
1906 case SNDCTL_DSP_GETIPTR:
1907 if (!(file->f_mode & FMODE_READ))
1908 return -EINVAL;
1909 spin_lock_irqsave(&s->lock, flags);
1910 es1371_update_ptr(s);
1911 cinfo.bytes = s->dma_adc.total_bytes;
1912 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1913 cinfo.ptr = s->dma_adc.hwptr;
1914 if (s->dma_adc.mapped)
1915 s->dma_adc.count &= s->dma_adc.fragsize-1;
1916 spin_unlock_irqrestore(&s->lock, flags);
1917 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1918
1919 case SNDCTL_DSP_GETOPTR:
1920 if (!(file->f_mode & FMODE_WRITE))
1921 return -EINVAL;
1922 spin_lock_irqsave(&s->lock, flags);
1923 es1371_update_ptr(s);
1924 cinfo.bytes = s->dma_dac2.total_bytes;
1925 cinfo.blocks = s->dma_dac2.count >> s->dma_dac2.fragshift;
1926 cinfo.ptr = s->dma_dac2.hwptr;
1927 if (s->dma_dac2.mapped)
1928 s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1929 spin_unlock_irqrestore(&s->lock, flags);
1930 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1931
1932 case SNDCTL_DSP_GETBLKSIZE:
1933 if (file->f_mode & FMODE_WRITE) {
1934 if ((val = prog_dmabuf_dac2(s)))
1935 return val;
1936 return put_user(s->dma_dac2.fragsize, (int *)arg);
1937 }
1938 if ((val = prog_dmabuf_adc(s)))
1939 return val;
1940 return put_user(s->dma_adc.fragsize, (int *)arg);
1941
1942 case SNDCTL_DSP_SETFRAGMENT:
1943 get_user_ret(val, (int *)arg, -EFAULT);
1944 if (file->f_mode & FMODE_READ) {
1945 s->dma_adc.ossfragshift = val & 0xffff;
1946 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1947 if (s->dma_adc.ossfragshift < 4)
1948 s->dma_adc.ossfragshift = 4;
1949 if (s->dma_adc.ossfragshift > 15)
1950 s->dma_adc.ossfragshift = 15;
1951 if (s->dma_adc.ossmaxfrags < 4)
1952 s->dma_adc.ossmaxfrags = 4;
1953 }
1954 if (file->f_mode & FMODE_WRITE) {
1955 s->dma_dac2.ossfragshift = val & 0xffff;
1956 s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1957 if (s->dma_dac2.ossfragshift < 4)
1958 s->dma_dac2.ossfragshift = 4;
1959 if (s->dma_dac2.ossfragshift > 15)
1960 s->dma_dac2.ossfragshift = 15;
1961 if (s->dma_dac2.ossmaxfrags < 4)
1962 s->dma_dac2.ossmaxfrags = 4;
1963 }
1964 return 0;
1965
1966 case SNDCTL_DSP_SUBDIVIDE:
1967 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1968 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1969 return -EINVAL;
1970 get_user_ret(val, (int *)arg, -EFAULT);
1971 if (val != 1 && val != 2 && val != 4)
1972 return -EINVAL;
1973 if (file->f_mode & FMODE_READ)
1974 s->dma_adc.subdivision = val;
1975 if (file->f_mode & FMODE_WRITE)
1976 s->dma_dac2.subdivision = val;
1977 return 0;
1978
1979 case SOUND_PCM_READ_RATE:
1980 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, (int *)arg);
1981
1982 case SOUND_PCM_READ_CHANNELS:
1983 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, (int *)arg);
1984
1985 case SOUND_PCM_READ_BITS:
1986 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, (int *)arg);
1987
1988 case SOUND_PCM_WRITE_FILTER:
1989 case SNDCTL_DSP_SETSYNCRO:
1990 case SOUND_PCM_READ_FILTER:
1991 return -EINVAL;
1992
1993 }
1994 return mixer_ioctl(s, cmd, arg);
1995 }
1996
1997 static int es1371_open(struct inode *inode, struct file *file)
1998 {
1999 int minor = MINOR(inode->i_rdev);
2000 struct es1371_state *s = devs;
2001 unsigned long flags;
2002
2003 while (s && ((s->dev_audio ^ minor) & ~0xf))
2004 s = s->next;
2005 if (!s)
2006 return -ENODEV;
2007 VALIDATE_STATE(s);
2008 file->private_data = s;
2009 /* wait for device to become free */
2010 down(&s->open_sem);
2011 while (s->open_mode & file->f_mode) {
2012 if (file->f_flags & O_NONBLOCK) {
2013 up(&s->open_sem);
2014 return -EBUSY;
2015 }
2016 up(&s->open_sem);
2017 interruptible_sleep_on(&s->open_wait);
2018 if (signal_pending(current))
2019 return -ERESTARTSYS;
2020 down(&s->open_sem);
2021 }
2022 if (file->f_mode & FMODE_READ) {
2023 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
2024 set_adc_rate(s, 8000);
2025 }
2026 if (file->f_mode & FMODE_WRITE) {
2027 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
2028 set_dac2_rate(s, 8000);
2029 }
2030 spin_lock_irqsave(&s->lock, flags);
2031 if (file->f_mode & FMODE_READ) {
2032 s->sctrl &= ~SCTRL_R1FMT;
2033 if ((minor & 0xf) == SND_DEV_DSP16)
2034 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
2035 else
2036 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
2037 }
2038 if (file->f_mode & FMODE_WRITE) {
2039 s->sctrl &= ~SCTRL_P2FMT;
2040 if ((minor & 0xf) == SND_DEV_DSP16)
2041 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
2042 else
2043 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
2044 }
2045 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2046 spin_unlock_irqrestore(&s->lock, flags);
2047 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2048 up(&s->open_sem);
2049 MOD_INC_USE_COUNT;
2050 return 0;
2051 }
2052
2053 static int es1371_release(struct inode *inode, struct file *file)
2054 {
2055 struct es1371_state *s = (struct es1371_state *)file->private_data;
2056
2057 VALIDATE_STATE(s);
2058 if (file->f_mode & FMODE_WRITE)
2059 drain_dac2(s, file->f_flags & O_NONBLOCK);
2060 down(&s->open_sem);
2061 if (file->f_mode & FMODE_WRITE) {
2062 stop_dac2(s);
2063 dealloc_dmabuf(&s->dma_dac2);
2064 }
2065 if (file->f_mode & FMODE_READ) {
2066 stop_adc(s);
2067 dealloc_dmabuf(&s->dma_adc);
2068 }
2069 s->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
2070 up(&s->open_sem);
2071 wake_up(&s->open_wait);
2072 MOD_DEC_USE_COUNT;
2073 return 0;
2074 }
2075
2076 static /*const*/ struct file_operations es1371_audio_fops = {
2077 &es1371_llseek,
2078 &es1371_read,
2079 &es1371_write,
2080 NULL, /* readdir */
2081 &es1371_poll,
2082 &es1371_ioctl,
2083 &es1371_mmap,
2084 &es1371_open,
2085 NULL, /* flush */
2086 &es1371_release,
2087 NULL, /* fsync */
2088 NULL, /* fasync */
2089 NULL, /* check_media_change */
2090 NULL, /* revalidate */
2091 NULL, /* lock */
2092 };
2093
2094 /* --------------------------------------------------------------------- */
2095
2096 static ssize_t es1371_write_dac(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2097 {
2098 struct es1371_state *s = (struct es1371_state *)file->private_data;
2099 ssize_t ret = 0;
2100 unsigned long flags;
2101 unsigned swptr;
2102 int cnt;
2103
2104 VALIDATE_STATE(s);
2105 if (ppos != &file->f_pos)
2106 return -ESPIPE;
2107 if (s->dma_dac1.mapped)
2108 return -ENXIO;
2109 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2110 return ret;
2111 if (!access_ok(VERIFY_READ, buffer, count))
2112 return -EFAULT;
2113 while (count > 0) {
2114 spin_lock_irqsave(&s->lock, flags);
2115 if (s->dma_dac1.count < 0) {
2116 s->dma_dac1.count = 0;
2117 s->dma_dac1.swptr = s->dma_dac1.hwptr;
2118 }
2119 swptr = s->dma_dac1.swptr;
2120 cnt = s->dma_dac1.dmasize-swptr;
2121 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2122 cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2123 spin_unlock_irqrestore(&s->lock, flags);
2124 if (cnt > count)
2125 cnt = count;
2126 if (cnt <= 0) {
2127 start_dac1(s);
2128 if (file->f_flags & O_NONBLOCK)
2129 return ret ? ret : -EAGAIN;
2130 interruptible_sleep_on(&s->dma_dac1.wait);
2131 if (signal_pending(current))
2132 return ret ? ret : -ERESTARTSYS;
2133 continue;
2134 }
2135 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt))
2136 return ret ? ret : -EFAULT;
2137 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2138 spin_lock_irqsave(&s->lock, flags);
2139 s->dma_dac1.swptr = swptr;
2140 s->dma_dac1.count += cnt;
2141 s->dma_dac1.endcleared = 0;
2142 spin_unlock_irqrestore(&s->lock, flags);
2143 count -= cnt;
2144 buffer += cnt;
2145 ret += cnt;
2146 start_dac1(s);
2147 }
2148 return ret;
2149 }
2150
2151 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2152 {
2153 struct es1371_state *s = (struct es1371_state *)file->private_data;
2154 unsigned long flags;
2155 unsigned int mask = 0;
2156
2157 VALIDATE_STATE(s);
2158 poll_wait(file, &s->dma_dac1.wait, wait);
2159 spin_lock_irqsave(&s->lock, flags);
2160 es1371_update_ptr(s);
2161 if (s->dma_dac1.mapped) {
2162 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2163 mask |= POLLOUT | POLLWRNORM;
2164 } else {
2165 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2166 mask |= POLLOUT | POLLWRNORM;
2167 }
2168 spin_unlock_irqrestore(&s->lock, flags);
2169 return mask;
2170 }
2171
2172 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2173 {
2174 struct es1371_state *s = (struct es1371_state *)file->private_data;
2175 int ret;
2176 unsigned long size;
2177
2178 VALIDATE_STATE(s);
2179 if (!(vma->vm_flags & VM_WRITE))
2180 return -EINVAL;
2181 if ((ret = prog_dmabuf_dac1(s)) != 0)
2182 return ret;
2183 if (vma->vm_offset != 0)
2184 return -EINVAL;
2185 size = vma->vm_end - vma->vm_start;
2186 if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2187 return -EINVAL;
2188 if (remap_page_range(vma->vm_start, virt_to_phys(s->dma_dac1.rawbuf), size, vma->vm_page_prot))
2189 return -EAGAIN;
2190 s->dma_dac1.mapped = 1;
2191 return 0;
2192 }
2193
2194 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2195 {
2196 struct es1371_state *s = (struct es1371_state *)file->private_data;
2197 unsigned long flags;
2198 audio_buf_info abinfo;
2199 count_info cinfo;
2200 int val, ret;
2201
2202 VALIDATE_STATE(s);
2203 switch (cmd) {
2204 case OSS_GETVERSION:
2205 return put_user(SOUND_VERSION, (int *)arg);
2206
2207 case SNDCTL_DSP_SYNC:
2208 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2209
2210 case SNDCTL_DSP_SETDUPLEX:
2211 return -EINVAL;
2212
2213 case SNDCTL_DSP_GETCAPS:
2214 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
2215
2216 case SNDCTL_DSP_RESET:
2217 stop_dac1(s);
2218 synchronize_irq();
2219 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2220 return 0;
2221
2222 case SNDCTL_DSP_SPEED:
2223 get_user_ret(val, (int *)arg, -EFAULT);
2224 if (val >= 0) {
2225 stop_dac1(s);
2226 s->dma_dac1.ready = 0;
2227 set_dac1_rate(s, val);
2228 }
2229 return put_user(s->dac1rate, (int *)arg);
2230
2231 case SNDCTL_DSP_STEREO:
2232 get_user_ret(val, (int *)arg, -EFAULT);
2233 stop_dac1(s);
2234 s->dma_dac1.ready = 0;
2235 spin_lock_irqsave(&s->lock, flags);
2236 if (val)
2237 s->sctrl |= SCTRL_P1SMB;
2238 else
2239 s->sctrl &= ~SCTRL_P1SMB;
2240 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2241 spin_unlock_irqrestore(&s->lock, flags);
2242 return 0;
2243
2244 case SNDCTL_DSP_CHANNELS:
2245 get_user_ret(val, (int *)arg, -EFAULT);
2246 if (val != 0) {
2247 stop_dac1(s);
2248 s->dma_dac1.ready = 0;
2249 spin_lock_irqsave(&s->lock, flags);
2250 if (val >= 2)
2251 s->sctrl |= SCTRL_P1SMB;
2252 else
2253 s->sctrl &= ~SCTRL_P1SMB;
2254 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2255 spin_unlock_irqrestore(&s->lock, flags);
2256 }
2257 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2258
2259 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2260 return put_user(AFMT_S16_LE|AFMT_U8, (int *)arg);
2261
2262 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2263 get_user_ret(val, (int *)arg, -EFAULT);
2264 if (val != AFMT_QUERY) {
2265 stop_dac1(s);
2266 s->dma_dac1.ready = 0;
2267 spin_lock_irqsave(&s->lock, flags);
2268 if (val == AFMT_S16_LE)
2269 s->sctrl |= SCTRL_P1SEB;
2270 else
2271 s->sctrl &= ~SCTRL_P1SEB;
2272 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2273 spin_unlock_irqrestore(&s->lock, flags);
2274 }
2275 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, (int *)arg);
2276
2277 case SNDCTL_DSP_POST:
2278 return 0;
2279
2280 case SNDCTL_DSP_GETTRIGGER:
2281 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, (int *)arg);
2282
2283 case SNDCTL_DSP_SETTRIGGER:
2284 get_user_ret(val, (int *)arg, -EFAULT);
2285 if (val & PCM_ENABLE_OUTPUT) {
2286 if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2287 return ret;
2288 start_dac1(s);
2289 } else
2290 stop_dac1(s);
2291 return 0;
2292
2293 case SNDCTL_DSP_GETOSPACE:
2294 if (!(s->ctrl & CTRL_DAC2_EN) && (val = prog_dmabuf_dac1(s)) != 0)
2295 return val;
2296 spin_lock_irqsave(&s->lock, flags);
2297 es1371_update_ptr(s);
2298 abinfo.fragsize = s->dma_dac1.fragsize;
2299 abinfo.bytes = s->dma_dac1.dmasize - s->dma_dac1.count;
2300 abinfo.fragstotal = s->dma_dac1.numfrag;
2301 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2302 spin_unlock_irqrestore(&s->lock, flags);
2303 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2304
2305 case SNDCTL_DSP_NONBLOCK:
2306 file->f_flags |= O_NONBLOCK;
2307 return 0;
2308
2309 case SNDCTL_DSP_GETODELAY:
2310 spin_lock_irqsave(&s->lock, flags);
2311 es1371_update_ptr(s);
2312 val = s->dma_dac1.count;
2313 spin_unlock_irqrestore(&s->lock, flags);
2314 return put_user(val, (int *)arg);
2315
2316 case SNDCTL_DSP_GETOPTR:
2317 if (!(file->f_mode & FMODE_WRITE))
2318 return -EINVAL;
2319 spin_lock_irqsave(&s->lock, flags);
2320 es1371_update_ptr(s);
2321 cinfo.bytes = s->dma_dac1.total_bytes;
2322 cinfo.blocks = s->dma_dac1.count >> s->dma_dac1.fragshift;
2323 cinfo.ptr = s->dma_dac1.hwptr;
2324 if (s->dma_dac1.mapped)
2325 s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2326 spin_unlock_irqrestore(&s->lock, flags);
2327 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
2328
2329 case SNDCTL_DSP_GETBLKSIZE:
2330 if ((val = prog_dmabuf_dac1(s)))
2331 return val;
2332 return put_user(s->dma_dac1.fragsize, (int *)arg);
2333
2334 case SNDCTL_DSP_SETFRAGMENT:
2335 get_user_ret(val, (int *)arg, -EFAULT);
2336 s->dma_dac1.ossfragshift = val & 0xffff;
2337 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2338 if (s->dma_dac1.ossfragshift < 4)
2339 s->dma_dac1.ossfragshift = 4;
2340 if (s->dma_dac1.ossfragshift > 15)
2341 s->dma_dac1.ossfragshift = 15;
2342 if (s->dma_dac1.ossmaxfrags < 4)
2343 s->dma_dac1.ossmaxfrags = 4;
2344 return 0;
2345
2346 case SNDCTL_DSP_SUBDIVIDE:
2347 if (s->dma_dac1.subdivision)
2348 return -EINVAL;
2349 get_user_ret(val, (int *)arg, -EFAULT);
2350 if (val != 1 && val != 2 && val != 4)
2351 return -EINVAL;
2352 s->dma_dac1.subdivision = val;
2353 return 0;
2354
2355 case SOUND_PCM_READ_RATE:
2356 return put_user(s->dac1rate, (int *)arg);
2357
2358 case SOUND_PCM_READ_CHANNELS:
2359 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, (int *)arg);
2360
2361 case SOUND_PCM_READ_BITS:
2362 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, (int *)arg);
2363
2364 case SOUND_PCM_WRITE_FILTER:
2365 case SNDCTL_DSP_SETSYNCRO:
2366 case SOUND_PCM_READ_FILTER:
2367 return -EINVAL;
2368
2369 }
2370 return mixer_ioctl(s, cmd, arg);
2371 }
2372
2373 static int es1371_open_dac(struct inode *inode, struct file *file)
2374 {
2375 int minor = MINOR(inode->i_rdev);
2376 struct es1371_state *s = devs;
2377 unsigned long flags;
2378
2379 while (s && ((s->dev_dac ^ minor) & ~0xf))
2380 s = s->next;
2381 if (!s)
2382 return -ENODEV;
2383 VALIDATE_STATE(s);
2384 /* we allow opening with O_RDWR, most programs do it although they will only write */
2385 #if 0
2386 if (file->f_mode & FMODE_READ)
2387 return -EPERM;
2388 #endif
2389 if (!(file->f_mode & FMODE_WRITE))
2390 return -EINVAL;
2391 file->private_data = s;
2392 /* wait for device to become free */
2393 down(&s->open_sem);
2394 while (s->open_mode & FMODE_DAC) {
2395 if (file->f_flags & O_NONBLOCK) {
2396 up(&s->open_sem);
2397 return -EBUSY;
2398 }
2399 up(&s->open_sem);
2400 interruptible_sleep_on(&s->open_wait);
2401 if (signal_pending(current))
2402 return -ERESTARTSYS;
2403 down(&s->open_sem);
2404 }
2405 s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2406 set_dac1_rate(s, 8000);
2407 spin_lock_irqsave(&s->lock, flags);
2408 s->sctrl &= ~SCTRL_P1FMT;
2409 if ((minor & 0xf) == SND_DEV_DSP16)
2410 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2411 else
2412 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2413 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2414 spin_unlock_irqrestore(&s->lock, flags);
2415 s->open_mode |= FMODE_DAC;
2416 up(&s->open_sem);
2417 MOD_INC_USE_COUNT;
2418 return 0;
2419 }
2420
2421 static int es1371_release_dac(struct inode *inode, struct file *file)
2422 {
2423 struct es1371_state *s = (struct es1371_state *)file->private_data;
2424
2425 VALIDATE_STATE(s);
2426 drain_dac1(s, file->f_flags & O_NONBLOCK);
2427 down(&s->open_sem);
2428 stop_dac1(s);
2429 dealloc_dmabuf(&s->dma_dac1);
2430 s->open_mode &= ~FMODE_DAC;
2431 up(&s->open_sem);
2432 wake_up(&s->open_wait);
2433 MOD_DEC_USE_COUNT;
2434 return 0;
2435 }
2436
2437 static /*const*/ struct file_operations es1371_dac_fops = {
2438 &es1371_llseek,
2439 NULL, /* read */
2440 &es1371_write_dac,
2441 NULL, /* readdir */
2442 &es1371_poll_dac,
2443 &es1371_ioctl_dac,
2444 &es1371_mmap_dac,
2445 &es1371_open_dac,
2446 NULL, /* flush */
2447 &es1371_release_dac,
2448 NULL, /* fsync */
2449 NULL, /* fasync */
2450 NULL, /* check_media_change */
2451 NULL, /* revalidate */
2452 NULL, /* lock */
2453 };
2454
2455 /* --------------------------------------------------------------------- */
2456
2457 static ssize_t es1371_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
2458 {
2459 struct es1371_state *s = (struct es1371_state *)file->private_data;
2460 ssize_t ret;
2461 unsigned long flags;
2462 unsigned ptr;
2463 int cnt;
2464
2465 VALIDATE_STATE(s);
2466 if (ppos != &file->f_pos)
2467 return -ESPIPE;
2468 if (!access_ok(VERIFY_WRITE, buffer, count))
2469 return -EFAULT;
2470 ret = 0;
2471 while (count > 0) {
2472 spin_lock_irqsave(&s->lock, flags);
2473 ptr = s->midi.ird;
2474 cnt = MIDIINBUF - ptr;
2475 if (s->midi.icnt < cnt)
2476 cnt = s->midi.icnt;
2477 spin_unlock_irqrestore(&s->lock, flags);
2478 if (cnt > count)
2479 cnt = count;
2480 if (cnt <= 0) {
2481 if (file->f_flags & O_NONBLOCK)
2482 return ret ? ret : -EAGAIN;
2483 interruptible_sleep_on(&s->midi.iwait);
2484 if (signal_pending(current))
2485 return ret ? ret : -ERESTARTSYS;
2486 continue;
2487 }
2488 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt))
2489 return ret ? ret : -EFAULT;
2490 ptr = (ptr + cnt) % MIDIINBUF;
2491 spin_lock_irqsave(&s->lock, flags);
2492 s->midi.ird = ptr;
2493 s->midi.icnt -= cnt;
2494 spin_unlock_irqrestore(&s->lock, flags);
2495 count -= cnt;
2496 buffer += cnt;
2497 ret += cnt;
2498 }
2499 return ret;
2500 }
2501
2502 static ssize_t es1371_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
2503 {
2504 struct es1371_state *s = (struct es1371_state *)file->private_data;
2505 ssize_t ret;
2506 unsigned long flags;
2507 unsigned ptr;
2508 int cnt;
2509
2510 VALIDATE_STATE(s);
2511 if (ppos != &file->f_pos)
2512 return -ESPIPE;
2513 if (!access_ok(VERIFY_READ, buffer, count))
2514 return -EFAULT;
2515 ret = 0;
2516 while (count > 0) {
2517 spin_lock_irqsave(&s->lock, flags);
2518 ptr = s->midi.owr;
2519 cnt = MIDIOUTBUF - ptr;
2520 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2521 cnt = MIDIOUTBUF - s->midi.ocnt;
2522 if (cnt <= 0)
2523 es1371_handle_midi(s);
2524 spin_unlock_irqrestore(&s->lock, flags);
2525 if (cnt > count)
2526 cnt = count;
2527 if (cnt <= 0) {
2528 if (file->f_flags & O_NONBLOCK)
2529 return ret ? ret : -EAGAIN;
2530 interruptible_sleep_on(&s->midi.owait);
2531 if (signal_pending(current))
2532 return ret ? ret : -ERESTARTSYS;
2533 continue;
2534 }
2535 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt))
2536 return ret ? ret : -EFAULT;
2537 ptr = (ptr + cnt) % MIDIOUTBUF;
2538 spin_lock_irqsave(&s->lock, flags);
2539 s->midi.owr = ptr;
2540 s->midi.ocnt += cnt;
2541 spin_unlock_irqrestore(&s->lock, flags);
2542 count -= cnt;
2543 buffer += cnt;
2544 ret += cnt;
2545 spin_lock_irqsave(&s->lock, flags);
2546 es1371_handle_midi(s);
2547 spin_unlock_irqrestore(&s->lock, flags);
2548 }
2549 return ret;
2550 }
2551
2552 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2553 {
2554 struct es1371_state *s = (struct es1371_state *)file->private_data;
2555 unsigned long flags;
2556 unsigned int mask = 0;
2557
2558 VALIDATE_STATE(s);
2559 if (file->f_mode & FMODE_WRITE)
2560 poll_wait(file, &s->midi.owait, wait);
2561 if (file->f_mode & FMODE_READ)
2562 poll_wait(file, &s->midi.iwait, wait);
2563 spin_lock_irqsave(&s->lock, flags);
2564 if (file->f_mode & FMODE_READ) {
2565 if (s->midi.icnt > 0)
2566 mask |= POLLIN | POLLRDNORM;
2567 }
2568 if (file->f_mode & FMODE_WRITE) {
2569 if (s->midi.ocnt < MIDIOUTBUF)
2570 mask |= POLLOUT | POLLWRNORM;
2571 }
2572 spin_unlock_irqrestore(&s->lock, flags);
2573 return mask;
2574 }
2575
2576 static int es1371_midi_open(struct inode *inode, struct file *file)
2577 {
2578 int minor = MINOR(inode->i_rdev);
2579 struct es1371_state *s = devs;
2580 unsigned long flags;
2581
2582 while (s && s->dev_midi != minor)
2583 s = s->next;
2584 if (!s)
2585 return -ENODEV;
2586 VALIDATE_STATE(s);
2587 file->private_data = s;
2588 /* wait for device to become free */
2589 down(&s->open_sem);
2590 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2591 if (file->f_flags & O_NONBLOCK) {
2592 up(&s->open_sem);
2593 return -EBUSY;
2594 }
2595 up(&s->open_sem);
2596 interruptible_sleep_on(&s->open_wait);
2597 if (signal_pending(current))
2598 return -ERESTARTSYS;
2599 down(&s->open_sem);
2600 }
2601 spin_lock_irqsave(&s->lock, flags);
2602 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2603 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2604 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2605 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2606 outb(0, s->io+ES1371_REG_UART_CONTROL);
2607 outb(0, s->io+ES1371_REG_UART_TEST);
2608 }
2609 if (file->f_mode & FMODE_READ) {
2610 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2611 }
2612 if (file->f_mode & FMODE_WRITE) {
2613 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2614 }
2615 s->ctrl |= CTRL_UART_EN;
2616 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2617 es1371_handle_midi(s);
2618 spin_unlock_irqrestore(&s->lock, flags);
2619 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2620 up(&s->open_sem);
2621 MOD_INC_USE_COUNT;
2622 return 0;
2623 }
2624
2625 static int es1371_midi_release(struct inode *inode, struct file *file)
2626 {
2627 struct es1371_state *s = (struct es1371_state *)file->private_data;
2628 DECLARE_WAITQUEUE(wait, current);
2629 unsigned long flags;
2630 unsigned count, tmo;
2631
2632 VALIDATE_STATE(s);
2633 if (file->f_mode & FMODE_WRITE) {
2634 current->state = TASK_INTERRUPTIBLE;
2635 add_wait_queue(&s->midi.owait, &wait);
2636 for (;;) {
2637 spin_lock_irqsave(&s->lock, flags);
2638 count = s->midi.ocnt;
2639 spin_unlock_irqrestore(&s->lock, flags);
2640 if (count <= 0)
2641 break;
2642 if (signal_pending(current))
2643 break;
2644 if (file->f_flags & O_NONBLOCK) {
2645 remove_wait_queue(&s->midi.owait, &wait);
2646 current->state = TASK_RUNNING;
2647 return -EBUSY;
2648 }
2649 tmo = (count * HZ) / 3100;
2650 if (!schedule_timeout(tmo ? : 1) && tmo)
2651 printk(KERN_DEBUG "es1371: midi timed out??\n");
2652 }
2653 remove_wait_queue(&s->midi.owait, &wait);
2654 current->state = TASK_RUNNING;
2655 }
2656 down(&s->open_sem);
2657 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
2658 spin_lock_irqsave(&s->lock, flags);
2659 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2660 s->ctrl &= ~CTRL_UART_EN;
2661 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2662 }
2663 spin_unlock_irqrestore(&s->lock, flags);
2664 up(&s->open_sem);
2665 wake_up(&s->open_wait);
2666 MOD_DEC_USE_COUNT;
2667 return 0;
2668 }
2669
2670 static /*const*/ struct file_operations es1371_midi_fops = {
2671 &es1371_llseek,
2672 &es1371_midi_read,
2673 &es1371_midi_write,
2674 NULL, /* readdir */
2675 &es1371_midi_poll,
2676 NULL, /* ioctl */
2677 NULL, /* mmap */
2678 &es1371_midi_open,
2679 NULL, /* flush */
2680 &es1371_midi_release,
2681 NULL, /* fsync */
2682 NULL, /* fasync */
2683 NULL, /* check_media_change */
2684 NULL, /* revalidate */
2685 NULL, /* lock */
2686 };
2687
2688 /* --------------------------------------------------------------------- */
2689
2690 /* maximum number of devices */
2691 #define NR_DEVICE 5
2692
2693 #if CONFIG_SOUND_ES1371_JOYPORT_BOOT
2694 static int joystick[NR_DEVICE] = {
2695 CONFIG_SOUND_ES1371_GAMEPORT
2696 , 0, };
2697 #else
2698 static int joystick[NR_DEVICE] = { 0, };
2699 #endif
2700
2701 /* --------------------------------------------------------------------- */
2702
2703 static struct initvol {
2704 int mixch;
2705 int vol;
2706 } initvol[] __initdata = {
2707 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2708 { SOUND_MIXER_WRITE_CD, 0x4040 },
2709 { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2710 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2711 { SOUND_MIXER_WRITE_PCM, 0x4040 },
2712 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2713 { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2714 { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2715 { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2716 { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2717 { SOUND_MIXER_WRITE_MIC, 0x4040 },
2718 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2719 { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2720 };
2721
2722 #ifdef MODULE
2723 __initfunc(int init_module(void))
2724 #else
2725 __initfunc(int init_es1371(void))
2726 #endif
2727 {
2728 struct es1371_state *s;
2729 struct pci_dev *pcidev = NULL;
2730 mm_segment_t fs;
2731 int i, val, val2, index = 0;
2732
2733 if (!pci_present()) /* No PCI bus in this machine! */
2734 return -ENODEV;
2735 printk(KERN_INFO "es1371: version v0.11 time " __TIME__ " " __DATE__ "\n");
2736 while (index < NR_DEVICE &&
2737 (pcidev = pci_find_device(PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, pcidev))) {
2738 if (pcidev->base_address[0] == 0 ||
2739 (pcidev->base_address[0] & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_IO)
2740 continue;
2741 if (pcidev->irq == 0)
2742 continue;
2743 if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2744 printk(KERN_WARNING "es1371: out of memory\n");
2745 continue;
2746 }
2747 memset(s, 0, sizeof(struct es1371_state));
2748 init_waitqueue_head(&s->dma_adc.wait);
2749 init_waitqueue_head(&s->dma_dac1.wait);
2750 init_waitqueue_head(&s->dma_dac2.wait);
2751 init_waitqueue_head(&s->open_wait);
2752 init_waitqueue_head(&s->midi.iwait);
2753 init_waitqueue_head(&s->midi.owait);
2754 s->open_sem = MUTEX;
2755 s->magic = ES1371_MAGIC;
2756 s->io = pcidev->base_address[0] & PCI_BASE_ADDRESS_IO_MASK;
2757 s->irq = pcidev->irq;
2758 if (check_region(s->io, ES1371_EXTENT)) {
2759 printk(KERN_ERR "es1371: io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2760 goto err_region;
2761 }
2762 request_region(s->io, ES1371_EXTENT, "es1371");
2763 if (request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371", s)) {
2764 printk(KERN_ERR "es1371: irq %u in use\n", s->irq);
2765 goto err_irq;
2766 }
2767 printk(KERN_INFO "es1371: found adapter at io %#lx irq %u\n"
2768 KERN_INFO "es1371: features: joystick 0x%x\n", s->io, s->irq, joystick[index]);
2769 /* register devices */
2770 if ((s->dev_audio = register_sound_dsp(&es1371_audio_fops, -1)) < 0)
2771 goto err_dev1;
2772 if ((s->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1)) < 0)
2773 goto err_dev2;
2774 if ((s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1)) < 0)
2775 goto err_dev3;
2776 if ((s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)) < 0)
2777 goto err_dev4;
2778 /* initialize codec registers */
2779 s->ctrl = 0;
2780 if ((joystick[index] & ~0x18) == 0x200) {
2781 if (check_region(joystick[index], JOY_EXTENT))
2782 printk(KERN_ERR "es1371: joystick address 0x%x already in use\n", joystick[index]);
2783 else {
2784 s->ctrl |= CTRL_JYSTK_EN | (((joystick[index] >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2785 }
2786 }
2787 s->sctrl = 0;
2788 /* initialize the chips */
2789 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2790 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2791 outl(0, s->io+ES1371_REG_LEGACY);
2792 /* AC97 warm reset to start the bitclk */
2793 outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2794 udelay(2);
2795 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2796 /* init the sample rate converter */
2797 outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
2798 for (val = 0; val < 0x80; val++)
2799 src_write(s, val, 0);
2800 src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
2801 src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
2802 src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
2803 src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
2804 src_write(s, SRCREG_VOL_ADC, 1 << 12);
2805 src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
2806 src_write(s, SRCREG_VOL_DAC1, 1 << 12);
2807 src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
2808 src_write(s, SRCREG_VOL_DAC2, 1 << 12);
2809 src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
2810 set_adc_rate(s, 22050);
2811 set_dac1_rate(s, 22050);
2812 set_dac2_rate(s, 22050);
2813 /* WARNING:
2814 * enabling the sample rate converter without properly programming
2815 * its parameters causes the chip to lock up (the SRC busy bit will
2816 * be stuck high, and I've found no way to rectify this other than
2817 * power cycle)
2818 */
2819 wait_src_ready(s);
2820 outl(0, s->io+ES1371_REG_SRCONV);
2821 /* codec init */
2822 wrcodec(s, 0x00, 0); /* reset codec */
2823 s->mix.codec_id = rdcodec(s, 0x00); /* get codec ID */
2824 val = rdcodec(s, 0x7c);
2825 val2 = rdcodec(s, 0x7e);
2826 printk(KERN_INFO "es1371: codec vendor %c%c%c revision %d\n",
2827 (val >> 8) & 0xff, val & 0xff, (val2 >> 8) & 0xff, val2 & 0xff);
2828 printk(KERN_INFO "es1371: codec features");
2829 if (s->mix.codec_id & CODEC_ID_DEDICATEDMIC)
2830 printk(" dedicated MIC PCM in");
2831 if (s->mix.codec_id & CODEC_ID_MODEMCODEC)
2832 printk(" Modem Line Codec");
2833 if (s->mix.codec_id & CODEC_ID_BASSTREBLE)
2834 printk(" Bass & Treble");
2835 if (s->mix.codec_id & CODEC_ID_SIMULATEDSTEREO)
2836 printk(" Simulated Stereo");
2837 if (s->mix.codec_id & CODEC_ID_HEADPHONEOUT)
2838 printk(" Headphone out");
2839 if (s->mix.codec_id & CODEC_ID_LOUDNESS)
2840 printk(" Loudness");
2841 if (s->mix.codec_id & CODEC_ID_18BITDAC)
2842 printk(" 18bit DAC");
2843 if (s->mix.codec_id & CODEC_ID_20BITDAC)
2844 printk(" 20bit DAC");
2845 if (s->mix.codec_id & CODEC_ID_18BITADC)
2846 printk(" 18bit ADC");
2847 if (s->mix.codec_id & CODEC_ID_20BITADC)
2848 printk(" 20bit ADC");
2849 printk("%s\n", (s->mix.codec_id & 0x3ff) ? "" : " none");
2850 val = (s->mix.codec_id >> CODEC_ID_SESHIFT) & CODEC_ID_SEMASK;
2851 printk(KERN_INFO "es1371: stereo enhancement: %s\n", (val <= 20) ? stereo_enhancement[val] : "unknown");
2852 fs = get_fs();
2853 set_fs(KERNEL_DS);
2854 val = SOUND_MASK_LINE;
2855 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2856 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2857 val = initvol[i].vol;
2858 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2859 }
2860 set_fs(fs);
2861 /* queue it for later freeing */
2862 s->next = devs;
2863 devs = s;
2864 index++;
2865 continue;
2866
2867 err_dev4:
2868 unregister_sound_dsp(s->dev_dac);
2869 err_dev3:
2870 unregister_sound_mixer(s->dev_mixer);
2871 err_dev2:
2872 unregister_sound_dsp(s->dev_audio);
2873 err_dev1:
2874 printk(KERN_ERR "es1371: cannot register misc device\n");
2875 free_irq(s->irq, s);
2876 err_irq:
2877 release_region(s->io, ES1371_EXTENT);
2878 err_region:
2879 kfree_s(s, sizeof(struct es1371_state));
2880 }
2881 if (!devs)
2882 return -ENODEV;
2883 return 0;
2884 }
2885
2886 /* --------------------------------------------------------------------- */
2887
2888 #ifdef MODULE
2889
2890 MODULE_PARM(joystick, "1-" __MODULE_STRING(NR_DEVICE) "i");
2891 MODULE_PARM_DESC(joystick, "sets address and enables joystick interface (still need separate driver)");
2892
2893 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2894 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2895
2896 void cleanup_module(void)
2897 {
2898 struct es1371_state *s;
2899
2900 while ((s = devs)) {
2901 devs = devs->next;
2902 outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
2903 outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
2904 synchronize_irq();
2905 free_irq(s->irq, s);
2906 release_region(s->io, ES1371_EXTENT);
2907 unregister_sound_dsp(s->dev_audio);
2908 unregister_sound_mixer(s->dev_mixer);
2909 unregister_sound_dsp(s->dev_dac);
2910 unregister_sound_midi(s->dev_midi);
2911 kfree_s(s, sizeof(struct es1371_state));
2912 }
2913 printk(KERN_INFO "es1371: unloading\n");
2914 }
2915
2916 #endif /* MODULE */
Copy of Dave Jones history.git as used by http://archive.org/details/git-history-of-linux