Import 2.3.50pre1
[davej-history.git] / drivers / char / stradis.c
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1 /*
2 * stradis.c - stradis 4:2:2 mpeg decoder driver
4 * Stradis 4:2:2 MPEG-2 Decoder Driver
5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/version.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/fs.h>
27 #include <linux/kernel.h>
28 #include <linux/major.h>
29 #include <linux/malloc.h>
30 #include <linux/mm.h>
31 #include <linux/init.h>
32 #include <linux/poll.h>
33 #include <linux/pci.h>
34 #include <linux/signal.h>
35 #include <asm/io.h>
36 #include <linux/ioport.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <linux/sched.h>
40 #include <asm/segment.h>
41 #include <asm/types.h>
42 #include <linux/types.h>
43 #include <linux/wrapper.h>
44 #include <linux/interrupt.h>
45 #include <asm/uaccess.h>
46 #include <linux/vmalloc.h>
47 #include <linux/videodev.h>
48 #include <linux/i2c-old.h>
50 #include "saa7146.h"
51 #include "saa7146reg.h"
52 #include "ibmmpeg2.h"
53 #include "saa7121.h"
54 #include "cs8420.h"
56 #define DEBUG(x) /* debug driver */
57 #undef IDEBUG(x) /* debug irq handler */
58 #undef MDEBUG(x) /* debug memory management */
60 #define SAA7146_MAX 6
62 static struct saa7146 saa7146s[SAA7146_MAX];
64 static int saa_num = 0; /* number of SAA7146s in use */
66 #define nDebNormal 0x00480000
67 #define nDebNoInc 0x00480000
68 #define nDebVideo 0xd0480000
69 #define nDebAudio 0xd0400000
70 #define nDebDMA 0x02c80000
72 #define oDebNormal 0x13c80000
73 #define oDebNoInc 0x13c80000
74 #define oDebVideo 0xd1080000
75 #define oDebAudio 0xd1080000
76 #define oDebDMA 0x03080000
78 #define NewCard (saa->boardcfg[3])
79 #define ChipControl (saa->boardcfg[1])
80 #define NTSCFirstActive (saa->boardcfg[4])
81 #define PALFirstActive (saa->boardcfg[5])
82 #define NTSCLastActive (saa->boardcfg[54])
83 #define PALLastActive (saa->boardcfg[55])
84 #define Have2MB (saa->boardcfg[18] & 0x40)
85 #define HaveCS8420 (saa->boardcfg[18] & 0x04)
86 #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
87 #define HaveCS3310 (saa->boardcfg[18] & 0x01)
88 #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
89 #define HaveCS4341 (saa->boardcfg[40] == 2)
90 #define SDIType (saa->boardcfg[27])
91 #define CurrentMode (saa->boardcfg[2])
93 #define debNormal (NewCard ? nDebNormal : oDebNormal)
94 #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
95 #define debVideo (NewCard ? nDebVideo : oDebVideo)
96 #define debAudio (NewCard ? nDebAudio : oDebAudio)
97 #define debDMA (NewCard ? nDebDMA : oDebDMA)
99 #ifdef DEBUG
100 int stradis_driver(void) /* for the benefit of ksymoops */
102 return 1;
104 #endif
106 #ifdef USE_RESCUE_EEPROM_SDM275
107 static unsigned char rescue_eeprom[64] = {
108 0x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
110 #endif
112 /* ----------------------------------------------------------------------- */
113 /* Hardware I2C functions */
114 static void I2CWipe(struct saa7146 *saa)
116 int i;
117 /* set i2c to ~=100kHz, abort transfer, clear busy */
118 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
119 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
120 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
121 /* wait for i2c registers to be programmed */
122 for (i = 0; i < 1000 &&
123 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
124 schedule();
125 saawrite(0x600, SAA7146_I2C_STATUS);
126 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
127 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
128 /* wait for i2c registers to be programmed */
129 for (i = 0; i < 1000 &&
130 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
131 schedule();
132 saawrite(0x600, SAA7146_I2C_STATUS);
133 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
134 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
135 /* wait for i2c registers to be programmed */
136 for (i = 0; i < 1000 &&
137 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
138 schedule();
140 /* read I2C */
141 static int I2CRead(struct i2c_bus *bus, unsigned char addr,
142 unsigned char subaddr, int dosub)
144 struct saa7146 *saa = (struct saa7146 *) bus->data;
145 int i;
148 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
149 I2CWipe(saa);
150 for (i = 0; i < 1000 &&
151 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
152 schedule();
153 if (i == 1000)
154 I2CWipe(saa);
155 if (dosub)
156 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
157 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
158 else
159 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
160 0xf1, SAA7146_I2C_TRANSFER);
161 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
162 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
163 /* wait for i2c registers to be programmed */
164 for (i = 0; i < 1000 &&
165 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
166 schedule();
167 /* wait for valid data */
168 for (i = 0; i < 1000 &&
169 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
170 schedule();
171 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
172 return -1;
173 if (i == 1000)
174 printk("i2c setup read timeout\n");
175 saawrite(0x41, SAA7146_I2C_TRANSFER);
176 saawrite((SAA7146_MC2_UPLD_I2C << 16) |
177 SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
178 /* wait for i2c registers to be programmed */
179 for (i = 0; i < 1000 &&
180 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
181 schedule();
182 /* wait for valid data */
183 for (i = 0; i < 1000 &&
184 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
185 schedule();
186 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
187 return -1;
188 if (i == 1000)
189 printk("i2c read timeout\n");
190 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
192 static int I2CReadOld(struct i2c_bus *bus, unsigned char addr)
194 return I2CRead(bus, addr, 0, 0);
197 /* set both to write both bytes, reset it to write only b1 */
199 static int I2CWrite(struct i2c_bus *bus, unsigned char addr, unsigned char b1,
200 unsigned char b2, int both)
202 struct saa7146 *saa = (struct saa7146 *) bus->data;
203 int i;
204 u32 data;
206 if (saaread(SAA7146_I2C_STATUS) & 0x3c)
207 I2CWipe(saa);
208 for (i = 0; i < 1000 &&
209 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
210 schedule();
211 if (i == 1000)
212 I2CWipe(saa);
213 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
214 if (both)
215 data |= ((b2 & 0xff) << 8) | 0xe5;
216 else
217 data |= 0xd1;
218 saawrite(data, SAA7146_I2C_TRANSFER);
219 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
220 SAA7146_MC2);
221 return 0;
224 static void attach_inform(struct i2c_bus *bus, int id)
226 struct saa7146 *saa = (struct saa7146 *) bus->data;
227 int i;
229 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id));
230 if (id == 0xa0) { /* we have rev2 or later board, fill in info */
231 for (i = 0; i < 64; i++)
232 saa->boardcfg[i] = I2CRead(bus, 0xa0, i, 1);
233 #ifdef USE_RESCUE_EEPROM_SDM275
234 if (saa->boardcfg[0] != 0) {
235 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr);
236 for (i = 0; i < 64; i++)
237 saa->boardcfg[i] = rescue_eeprom[i];
239 #endif
240 printk("stradis%d: config =", saa->nr);
241 for (i = 0; i < 51; i++) {
242 printk(" %02x",saa->boardcfg[i]);
244 printk("\n");
248 static void detach_inform(struct i2c_bus *bus, int id)
250 struct saa7146 *saa = (struct saa7146 *) bus->data;
251 int i;
252 i = saa->nr;
255 static void I2CBusScan(struct i2c_bus *bus)
257 int i;
258 for (i = 0; i < 0xff; i += 2)
259 if ((I2CRead(bus, i, 0, 0)) >= 0)
260 attach_inform(bus, i);
263 static struct i2c_bus saa7146_i2c_bus_template =
265 "saa7146",
266 I2C_BUSID_BT848,
267 NULL,
268 SPIN_LOCK_UNLOCKED,
269 attach_inform,
270 detach_inform,
271 NULL,
272 NULL,
273 I2CReadOld,
274 I2CWrite,
277 static int debiwait_maxwait = 0;
279 static int wait_for_debi_done(struct saa7146 *saa)
281 int i;
283 /* wait for registers to be programmed */
284 for (i = 0; i < 100000 &&
285 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
286 saaread(SAA7146_MC2);
287 /* wait for transfer to complete */
288 for (i = 0; i < 500000 &&
289 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
290 saaread(SAA7146_MC2);
291 if (i > debiwait_maxwait)
292 printk("wait-for-debi-done maxwait: %d\n",
293 debiwait_maxwait = i);
295 if (i == 500000)
296 return -1;
297 return 0;
300 static int debiwrite(struct saa7146 *saa, u32 config, int addr,
301 u32 val, int count)
303 u32 cmd;
304 if (count <= 0 || count > 32764)
305 return -1;
306 if (wait_for_debi_done(saa) < 0)
307 return -1;
308 saawrite(config, SAA7146_DEBI_CONFIG);
309 if (count <= 4) /* immediate transfer */
310 saawrite(val, SAA7146_DEBI_AD);
311 else /* block transfer */
312 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
313 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
314 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
315 SAA7146_MC2);
316 return 0;
319 static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
321 u32 result = 0;
323 if (count > 32764 || count <= 0)
324 return 0;
325 if (wait_for_debi_done(saa) < 0)
326 return 0;
327 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
328 saawrite((count << 17) | 0x10000 | (addr & 0xffff),
329 SAA7146_DEBI_COMMAND);
330 saawrite(config, SAA7146_DEBI_CONFIG);
331 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
332 SAA7146_MC2);
333 if (count > 4) /* not an immediate transfer */
334 return count;
335 wait_for_debi_done(saa);
336 result = saaread(SAA7146_DEBI_AD);
337 if (count == 1)
338 result &= 0xff;
339 if (count == 2)
340 result &= 0xffff;
341 if (count == 3)
342 result &= 0xffffff;
343 return result;
346 /* MUST be a multiple of 8 bytes and 8-byte aligned and < 32768 bytes */
347 /* data copied into saa->dmadebi buffer, caller must re-enable interrupts */
348 static void ibm_block_dram_read(struct saa7146 *saa, int address, int bytes)
350 int i, j;
351 u32 *buf;
352 buf = (u32 *) saa->dmadebi;
353 if (bytes > 0x7000)
354 bytes = 0x7000;
355 saawrite(0, SAA7146_IER); /* disable interrupts */
356 for (i=0; i < 10000 &&
357 (debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
358 & 0x8000); i++)
359 saaread(SAA7146_MC2);
360 if (i == 10000)
361 printk(KERN_ERR "stradis%d: dram_busy never cleared\n",
362 saa->nr);
363 debiwrite(saa, debNormal, IBM_MP2_SRC_ADDR, (address<<16) |
364 (address>>16), 4);
365 debiwrite(saa, debNormal, IBM_MP2_BLOCK_SIZE, bytes, 2);
366 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 0x8a10, 2);
367 for (j = 0; j < bytes/4; j++) {
368 for (i = 0; i < 10000 &&
369 (!(debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
370 & 0x4000)); i++)
371 saaread(SAA7146_MC2);
372 if (i == 10000)
373 printk(KERN_ERR "stradis%d: dram_ready never set\n",
374 saa->nr);
375 buf[j] = debiread(saa, debNormal, IBM_MP2_DRAM_DATA, 4);
379 static void do_irq_send_data(struct saa7146 *saa)
381 int split, audbytes, vidbytes;
383 saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
384 /* if special feature mode in effect, disable audio sending */
385 if (saa->playmode != VID_PLAY_NORMAL)
386 saa->audtail = saa->audhead = 0;
387 if (saa->audhead <= saa->audtail)
388 audbytes = saa->audtail - saa->audhead;
389 else
390 audbytes = 65536 - (saa->audhead - saa->audtail);
391 if (saa->vidhead <= saa->vidtail)
392 vidbytes = saa->vidtail - saa->vidhead;
393 else
394 vidbytes = 524288 - (saa->vidhead - saa->vidtail);
395 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
396 saawrite(0, SAA7146_IER);
397 return;
399 /* if at least 1 block audio waiting and audio fifo isn't full */
400 if (audbytes >= 2048 && (debiread(saa, debNormal,
401 IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) {
402 if (saa->audhead > saa->audtail)
403 split = 65536 - saa->audhead;
404 else
405 split = 0;
406 audbytes = 2048;
407 if (split > 0 && split < 2048) {
408 memcpy(saa->dmadebi, saa->audbuf + saa->audhead,
409 split);
410 saa->audhead = 0;
411 audbytes -= split;
412 } else
413 split = 0;
414 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
415 audbytes);
416 saa->audhead += audbytes;
417 saa->audhead &= 0xffff;
418 debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO :
419 IBM_MP2_AUD_FIFOW), 0, 2048);
420 wake_up_interruptible(&saa->audq);
421 /* if at least 1 block video waiting and video fifo isn't full */
422 } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
423 IBM_MP2_FIFO, 2)) < 16384) {
424 if (saa->vidhead > saa->vidtail)
425 split = 524288 - saa->vidhead;
426 else
427 split = 0;
428 vidbytes = 30720;
429 if (split > 0 && split < 30720) {
430 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead,
431 split);
432 saa->vidhead = 0;
433 vidbytes -= split;
434 } else
435 split = 0;
436 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
437 vidbytes);
438 saa->vidhead += vidbytes;
439 saa->vidhead &= 0x7ffff;
440 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
441 IBM_MP2_FIFOW), 0, 30720);
442 wake_up_interruptible(&saa->vidq);
444 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
447 static void send_osd_data(struct saa7146 *saa)
449 int size = saa->osdtail - saa->osdhead;
450 if (size > 30720)
451 size = 30720;
452 /* ensure some multiple of 8 bytes is transferred */
453 size = 8 * ((size + 8)>>3);
454 if (size) {
455 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
456 (saa->osdhead>>3), 2);
457 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
458 saa->osdhead += size;
459 /* block transfer of next 8 bytes to ~32k bytes */
460 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
462 if (saa->osdhead >= saa->osdtail) {
463 saa->osdhead = saa->osdtail = 0;
464 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
468 static void saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
470 struct saa7146 *saa = (struct saa7146 *) dev_id;
471 u32 stat, astat;
472 int count;
474 count = 0;
475 while (1) {
476 /* get/clear interrupt status bits */
477 stat = saaread(SAA7146_ISR);
478 astat = stat & saaread(SAA7146_IER);
479 if (!astat)
480 return;
481 saawrite(astat, SAA7146_ISR);
482 if (astat & SAA7146_PSR_DEBI_S) {
483 do_irq_send_data(saa);
485 if (astat & SAA7146_PSR_PIN1) {
486 int istat;
487 /* the following read will trigger DEBI_S */
488 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
489 if (istat & 1) {
490 saawrite(0, SAA7146_IER);
491 send_osd_data(saa);
492 saawrite(SAA7146_PSR_DEBI_S |
493 SAA7146_PSR_PIN1, SAA7146_IER);
495 if (istat & 0x20) { /* Video Start */
496 saa->vidinfo.frame_count++;
498 if (istat & 0x400) { /* Picture Start */
499 /* update temporal reference */
501 if (istat & 0x200) { /* Picture Resolution Change */
502 /* read new resolution */
504 if (istat & 0x100) { /* New User Data found */
505 /* read new user data */
507 if (istat & 0x1000) { /* new GOP/SMPTE */
508 /* read new SMPTE */
510 if (istat & 0x8000) { /* Sequence Start Code */
511 /* reset frame counter, load sizes */
512 saa->vidinfo.frame_count = 0;
513 saa->vidinfo.h_size = 704;
514 saa->vidinfo.v_size = 480;
515 #if 0
516 if (saa->endmarkhead != saa->endmarktail) {
517 saa->audhead =
518 saa->endmark[saa->endmarkhead];
519 saa->endmarkhead++;
520 if (saa->endmarkhead >= MAX_MARKS)
521 saa->endmarkhead = 0;
523 #endif
525 if (istat & 0x4000) { /* Sequence Error Code */
526 if (saa->endmarkhead != saa->endmarktail) {
527 saa->audhead =
528 saa->endmark[saa->endmarkhead];
529 saa->endmarkhead++;
530 if (saa->endmarkhead >= MAX_MARKS)
531 saa->endmarkhead = 0;
535 #ifdef IDEBUG
536 if (astat & SAA7146_PSR_PPEF) {
537 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
539 if (astat & SAA7146_PSR_PABO) {
540 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
542 if (astat & SAA7146_PSR_PPED) {
543 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
545 if (astat & SAA7146_PSR_RPS_I1) {
546 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
548 if (astat & SAA7146_PSR_RPS_I0) {
549 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
551 if (astat & SAA7146_PSR_RPS_LATE1) {
552 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
554 if (astat & SAA7146_PSR_RPS_LATE0) {
555 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
557 if (astat & SAA7146_PSR_RPS_E1) {
558 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
560 if (astat & SAA7146_PSR_RPS_E0) {
561 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
563 if (astat & SAA7146_PSR_RPS_TO1) {
564 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
566 if (astat & SAA7146_PSR_RPS_TO0) {
567 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
569 if (astat & SAA7146_PSR_UPLD) {
570 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
572 if (astat & SAA7146_PSR_DEBI_E) {
573 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
575 if (astat & SAA7146_PSR_I2C_S) {
576 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
578 if (astat & SAA7146_PSR_I2C_E) {
579 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
581 if (astat & SAA7146_PSR_A2_IN) {
582 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
584 if (astat & SAA7146_PSR_A2_OUT) {
585 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
587 if (astat & SAA7146_PSR_A1_IN) {
588 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
590 if (astat & SAA7146_PSR_A1_OUT) {
591 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
593 if (astat & SAA7146_PSR_AFOU) {
594 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
596 if (astat & SAA7146_PSR_V_PE) {
597 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
599 if (astat & SAA7146_PSR_VFOU) {
600 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
602 if (astat & SAA7146_PSR_FIDA) {
603 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
605 if (astat & SAA7146_PSR_FIDB) {
606 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
608 if (astat & SAA7146_PSR_PIN3) {
609 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
611 if (astat & SAA7146_PSR_PIN2) {
612 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
614 if (astat & SAA7146_PSR_PIN0) {
615 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
617 if (astat & SAA7146_PSR_ECS) {
618 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
620 if (astat & SAA7146_PSR_EC3S) {
621 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
623 if (astat & SAA7146_PSR_EC0S) {
624 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
626 #endif
627 count++;
628 if (count > 15)
629 printk(KERN_WARNING "stradis%d: irq loop %d\n",
630 saa->nr, count);
631 if (count > 20) {
632 saawrite(0, SAA7146_IER);
633 printk(KERN_ERR
634 "stradis%d: IRQ loop cleared\n", saa->nr);
639 static int ibm_send_command(struct saa7146 *saa,
640 int command, int data, int chain)
642 int i;
644 if (chain)
645 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2);
646 else
647 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
648 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
649 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
650 for (i = 0; i < 100 &&
651 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
652 schedule();
653 if (i == 100)
654 return -1;
655 return 0;
658 static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
660 I2CWrite(&(saa->i2c), 0x22, 0x03,
661 left > 94 ? 94 : left, 2);
662 I2CWrite(&(saa->i2c), 0x22, 0x04,
663 right > 94 ? 94 : right, 2);
666 static void initialize_cs4341(struct saa7146 *saa)
668 int i;
669 for (i = 0; i < 200; i++) {
670 /* auto mute off, power on, no de-emphasis */
671 /* I2S data up to 24-bit 64xFs internal SCLK */
672 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x11, 2);
673 /* ATAPI mixer setings */
674 I2CWrite(&(saa->i2c), 0x22, 0x02, 0x49, 2);
675 /* attenuation left 3db */
676 I2CWrite(&(saa->i2c), 0x22, 0x03, 0x00, 2);
677 /* attenuation right 3db */
678 I2CWrite(&(saa->i2c), 0x22, 0x04, 0x00, 2);
679 I2CWrite(&(saa->i2c), 0x22, 0x01, 0x10, 2);
680 if (I2CRead(&(saa->i2c), 0x22, 0x02, 1) == 0x49)
681 break;
682 schedule();
684 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
685 return;
688 static void initialize_cs8420(struct saa7146 *saa, int pro)
690 int i;
691 u8 *sequence;
692 if (pro)
693 sequence = mode8420pro;
694 else
695 sequence = mode8420con;
696 for (i = 0; i < INIT8420LEN; i++)
697 I2CWrite(&(saa->i2c), 0x20, init8420[i * 2],
698 init8420[i * 2 + 1], 2);
699 for (i = 0; i < MODE8420LEN; i++)
700 I2CWrite(&(saa->i2c), 0x20, sequence[i * 2],
701 sequence[i * 2 + 1], 2);
702 printk("stradis%d: CS8420 initialized\n", saa->nr);
705 static void initialize_saa7121(struct saa7146 *saa, int dopal)
707 int i, mod;
708 u8 *sequence;
709 if (dopal)
710 sequence = init7121pal;
711 else
712 sequence = init7121ntsc;
713 mod = saaread(SAA7146_PSR) & 0x08;
714 /* initialize PAL/NTSC video encoder */
715 for (i = 0; i < INIT7121LEN; i++) {
716 if (NewCard) { /* handle new card encoder differences */
717 if (sequence[i*2] == 0x3a)
718 I2CWrite(&(saa->i2c), 0x88, 0x3a, 0x13, 2);
719 else if (sequence[i*2] == 0x6b)
720 I2CWrite(&(saa->i2c), 0x88, 0x6b, 0x20, 2);
721 else if (sequence[i*2] == 0x6c)
722 I2CWrite(&(saa->i2c), 0x88, 0x6c,
723 dopal ? 0x09 : 0xf5, 2);
724 else if (sequence[i*2] == 0x6d)
725 I2CWrite(&(saa->i2c), 0x88, 0x6d,
726 dopal ? 0x20 : 0x00, 2);
727 else if (sequence[i*2] == 0x7a)
728 I2CWrite(&(saa->i2c), 0x88, 0x7a,
729 dopal ? (PALFirstActive - 1) :
730 (NTSCFirstActive - 4), 2);
731 else if (sequence[i*2] == 0x7b)
732 I2CWrite(&(saa->i2c), 0x88, 0x7b,
733 dopal ? PALLastActive :
734 NTSCLastActive, 2);
735 else I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
736 sequence[i * 2 + 1], 2);
737 } else {
738 if (sequence[i*2] == 0x6b && mod)
739 I2CWrite(&(saa->i2c), 0x88, 0x6b,
740 (sequence[i * 2 + 1] ^ 0x09), 2);
741 else if (sequence[i*2] == 0x7a)
742 I2CWrite(&(saa->i2c), 0x88, 0x7a,
743 dopal ? (PALFirstActive - 1) :
744 (NTSCFirstActive - 4), 2);
745 else if (sequence[i*2] == 0x7b)
746 I2CWrite(&(saa->i2c), 0x88, 0x7b,
747 dopal ? PALLastActive :
748 NTSCLastActive, 2);
749 else
750 I2CWrite(&(saa->i2c), 0x88, sequence[i * 2],
751 sequence[i * 2 + 1], 2);
756 static void set_genlock_offset(struct saa7146 *saa, int noffset)
758 int nCode;
759 int PixelsPerLine = 858;
760 if (CurrentMode == VIDEO_MODE_PAL)
761 PixelsPerLine = 864;
762 if (noffset > 500)
763 noffset = 500;
764 else if (noffset < -500)
765 noffset = -500;
766 nCode = noffset + 0x100;
767 if (nCode == 1)
768 nCode = 0x401;
769 else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode;
770 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
773 static void set_out_format(struct saa7146 *saa, int mode)
775 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
776 saa->boardcfg[2] = mode;
777 /* do not adjust analog video parameters here, use saa7121 init */
778 /* you will affect the SDI output on the new card */
779 if (mode == VIDEO_MODE_PAL) { /* PAL */
780 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
781 mdelay(50);
782 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
783 if (NewCard) {
784 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
785 0xe100, 2);
786 mdelay(50);
788 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
789 NewCard ? 0xe500: 0x6500, 2);
790 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
791 (1 << 8) |
792 (NewCard ? PALFirstActive : PALFirstActive-6), 2);
793 } else { /* NTSC */
794 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
795 mdelay(50);
796 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
797 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
798 NewCard ? 0xe100: 0x6100, 2);
799 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
800 (1 << 8) |
801 (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2);
806 /* Intialize bitmangler to map from a byte value to the mangled word that
807 * must be output to program the Xilinx part through the DEBI port.
808 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
809 * transfer FPGA code, init IBM chip, transfer IBM microcode
810 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
812 static u16 bitmangler[256];
814 static int initialize_fpga(struct video_code *bitdata)
816 int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
817 u16 *dmabuf;
818 u8 *newdma;
819 struct saa7146 *saa;
821 /* verify fpga code */
822 for (startindex = 0; startindex < bitdata->datasize; startindex++)
823 if (bitdata->data[startindex] == 255)
824 break;
825 if (startindex == bitdata->datasize) {
826 printk(KERN_INFO "stradis: bad fpga code\n");
827 return -1;
829 /* initialize all detected cards */
830 for (num = 0; num < saa_num; num++) {
831 saa = &saa7146s[num];
832 if (saa->boardcfg[0] > 20)
833 continue; /* card was programmed */
834 loadtwo = (saa->boardcfg[18] & 0x10);
835 if (!NewCard) /* we have an old board */
836 for (i = 0; i < 256; i++)
837 bitmangler[i] = ((i & 0x01) << 15) |
838 ((i & 0x02) << 6) | ((i & 0x04) << 4) |
839 ((i & 0x08) << 9) | ((i & 0x10) << 7) |
840 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
841 ((i & 0x80) >> 7);
842 else /* else we have a new board */
843 for (i = 0; i < 256; i++)
844 bitmangler[i] = ((i & 0x01) << 7) |
845 ((i & 0x02) << 5) | ((i & 0x04) << 3) |
846 ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
847 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
848 ((i & 0x80) >> 7);
850 dmabuf = (u16 *) saa->dmadebi;
851 newdma = (u8 *) saa->dmadebi;
852 if (NewCard) { /* SDM2xxx */
853 if (!strncmp(bitdata->loadwhat, "decoder2", 8))
854 continue; /* fpga not for this card */
855 if (!strncmp(&saa->boardcfg[42],
856 bitdata->loadwhat, 8)) {
857 loadfile = 1;
858 } else if (loadtwo && !strncmp(&saa->boardcfg[19],
859 bitdata->loadwhat, 8)) {
860 loadfile = 2;
861 } else if (!saa->boardcfg[42] && /* special */
862 !strncmp("decxl", bitdata->loadwhat, 8)) {
863 loadfile = 1;
864 } else
865 continue; /* fpga not for this card */
866 if (loadfile != 1 && loadfile != 2) {
867 continue; /* skip to next card */
869 if (saa->boardcfg[0] && loadfile == 1 )
870 continue; /* skip to next card */
871 if (saa->boardcfg[0] != 1 && loadfile == 2)
872 continue; /* skip to next card */
873 saa->boardcfg[0]++; /* mark fpga handled */
874 printk("stradis%d: loading %s\n", saa->nr,
875 bitdata->loadwhat);
876 if (loadtwo && loadfile == 2)
877 goto send_fpga_stuff;
878 /* turn on the Audio interface to set PROG low */
879 saawrite(0x00400040, SAA7146_GPIO_CTRL);
880 saaread(SAA7146_PSR); /* ensure posted write */
881 /* wait for everyone to reset */
882 mdelay(10);
883 saawrite(0x00400000, SAA7146_GPIO_CTRL);
884 } else { /* original card */
885 if (strncmp(bitdata->loadwhat, "decoder2", 8))
886 continue; /* fpga not for this card */
887 /* Pull the Xilinx PROG signal WS3 low */
888 saawrite(0x02000200, SAA7146_MC1);
889 /* Turn on the Audio interface so can set PROG low */
890 saawrite(0x000000c0, SAA7146_ACON1);
891 /* Pull the Xilinx INIT signal (GPIO2) low */
892 saawrite(0x00400000, SAA7146_GPIO_CTRL);
893 /* Make sure everybody resets */
894 saaread(SAA7146_PSR); /* ensure posted write */
895 mdelay(10);
896 /* Release the Xilinx PROG signal */
897 saawrite(0x00000000, SAA7146_ACON1);
898 /* Turn off the Audio interface */
899 saawrite(0x02000000, SAA7146_MC1);
901 /* Release Xilinx INIT signal (WS2) */
902 saawrite(0x00000000, SAA7146_GPIO_CTRL);
903 /* Wait for the INIT to go High */
904 for (i = 0; i < 10000 &&
905 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
906 schedule();
907 if (i == 1000) {
908 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
909 return -1;
911 send_fpga_stuff:
912 if (NewCard) {
913 for (i = startindex; i < bitdata->datasize; i++)
914 newdma[i - startindex] =
915 bitmangler[bitdata->data[i]];
916 debiwrite(saa, 0x01420000, 0, 0,
917 ((bitdata->datasize - startindex) + 5));
918 if (loadtwo) {
919 if (loadfile == 1) {
920 printk("stradis%d: "
921 "awaiting 2nd FPGA bitfile\n",
922 saa->nr);
923 continue; /* skip to next card */
927 } else {
928 for (i = startindex; i < bitdata->datasize; i++)
929 dmabuf[i - startindex] =
930 bitmangler[bitdata->data[i]];
931 debiwrite(saa, 0x014a0000, 0, 0,
932 ((bitdata->datasize - startindex) + 5) * 2);
934 for (i = 0; i < 1000 &&
935 !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
936 schedule();
937 if (i == 1000) {
938 printk(KERN_INFO "stradis%d: FPGA load failed\n",
939 saa->nr);
940 failure++;
941 continue;
943 if (!NewCard) {
944 /* Pull the Xilinx INIT signal (GPIO2) low */
945 saawrite(0x00400000, SAA7146_GPIO_CTRL);
946 saaread(SAA7146_PSR); /* ensure posted write */
947 mdelay(2);
948 saawrite(0x00000000, SAA7146_GPIO_CTRL);
949 mdelay(2);
951 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
952 saa->boardcfg[0] = 26; /* mark fpga programmed */
953 /* set VXCO to its lowest frequency */
954 debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
955 if (NewCard) {
956 /* mute CS3310 */
957 if (HaveCS3310)
958 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
959 0, 2);
960 /* set VXCO to PWM mode, release reset, blank on */
961 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
962 mdelay(10);
963 /* unmute CS3310 */
964 if (HaveCS3310)
965 debiwrite(saa, debNormal, XILINX_CTL0,
966 0x2020, 2);
968 /* set source Black */
969 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
970 saa->boardcfg[4] = 22; /* set NTSC First Active Line */
971 saa->boardcfg[5] = 23; /* set PAL First Active Line */
972 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
973 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
974 set_out_format(saa, VIDEO_MODE_NTSC);
975 mdelay(50);
976 /* begin IBM chip init */
977 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
978 saaread(SAA7146_PSR); /* wait for reset */
979 mdelay(5);
980 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
981 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
982 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
983 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
984 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
985 if (NewCard) {
986 mdelay(5);
987 /* set i2s rate converter to 48KHz */
988 debiwrite(saa, debNormal, 0x80c0, 6, 2);
989 /* we must init CS8420 first since rev b pulls i2s */
990 /* master clock low and CS4341 needs i2s master to */
991 /* run the i2c port. */
992 if (HaveCS8420) {
993 /* 0=consumer, 1=pro */
994 initialize_cs8420(saa, 0);
996 mdelay(5);
997 if (HaveCS4341)
998 initialize_cs4341(saa);
1000 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1001 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1002 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1003 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1004 if (NewCard)
1005 set_genlock_offset(saa, 0);
1006 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1007 #if 0
1008 /* enable genlock */
1009 debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
1010 #else
1011 /* disable genlock */
1012 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
1013 #endif
1015 return failure;
1018 static int do_ibm_reset(struct saa7146 *saa)
1020 /* failure if decoder not previously programmed */
1021 if (saa->boardcfg[0] < 37)
1022 return -EIO;
1023 /* mute CS3310 */
1024 if (HaveCS3310)
1025 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
1026 /* disable interrupts */
1027 saawrite(0, SAA7146_IER);
1028 saa->audhead = saa->audtail = 0;
1029 saa->vidhead = saa->vidtail = 0;
1030 /* tristate debi bus, disable debi transfers */
1031 saawrite(0x00880000, SAA7146_MC1);
1032 /* ensure posted write */
1033 saaread(SAA7146_MC1);
1034 mdelay(50);
1035 /* re-enable debi transfers */
1036 saawrite(0x00880088, SAA7146_MC1);
1037 /* set source Black */
1038 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
1039 /* begin IBM chip init */
1040 set_out_format(saa, CurrentMode);
1041 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
1042 saaread(SAA7146_PSR); /* wait for reset */
1043 mdelay(5);
1044 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
1045 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
1046 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1047 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
1048 if (NewCard) {
1049 mdelay(5);
1050 /* set i2s rate converter to 48KHz */
1051 debiwrite(saa, debNormal, 0x80c0, 6, 2);
1052 /* we must init CS8420 first since rev b pulls i2s */
1053 /* master clock low and CS4341 needs i2s master to */
1054 /* run the i2c port. */
1055 if (HaveCS8420) {
1056 /* 0=consumer, 1=pro */
1057 initialize_cs8420(saa, 1);
1059 mdelay(5);
1060 if (HaveCS4341)
1061 initialize_cs4341(saa);
1063 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
1064 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
1065 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
1066 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
1067 if (NewCard)
1068 set_genlock_offset(saa, 0);
1069 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
1070 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1071 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1072 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1073 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
1074 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
1076 if (HaveCS3310) {
1077 int i = CS3310MaxLvl;
1078 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1080 /* start video decoder */
1081 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
1082 /* 256k vid, 3520 bytes aud */
1083 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
1084 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1085 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1086 /* enable buffer threshold irq */
1087 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1088 /* clear pending interrupts */
1089 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1090 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1091 return 0;
1094 /* load the decoder microcode */
1095 static int initialize_ibmmpeg2(struct video_code *microcode)
1097 int i, num;
1098 struct saa7146 *saa;
1100 for (num = 0; num < saa_num; num++) {
1101 saa = &saa7146s[num];
1102 /* check that FPGA is loaded */
1103 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
1104 if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) !=
1105 0xa55a) {
1106 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
1107 saa->nr, i);
1108 #if 0
1109 return -1;
1110 #endif
1112 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
1113 if (saa->boardcfg[0] > 27)
1114 continue; /* skip to next card */
1115 /* load video control store */
1116 saa->boardcfg[1] = 0x13; /* no-sync default */
1117 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1118 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1119 for (i = 0; i < microcode->datasize / 2; i++)
1120 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
1121 (microcode->data[i * 2] << 8) |
1122 microcode->data[i * 2 + 1], 2);
1123 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
1124 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1125 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1126 ChipControl, 2);
1127 saa->boardcfg[0] = 28;
1129 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
1130 if (saa->boardcfg[0] > 35)
1131 continue; /* skip to next card */
1132 /* load audio control store */
1133 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
1134 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1135 for (i = 0; i < microcode->datasize; i++)
1136 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
1137 microcode->data[i], 1);
1138 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
1139 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
1140 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
1141 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
1142 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
1143 0xe000, 1)) {
1144 printk(KERN_ERR
1145 "stradis%d: IBM config failed\n",
1146 saa->nr);
1147 return -1;
1149 /* set PWM to center value */
1150 if (NewCard) {
1151 debiwrite(saa, debNormal, XILINX_PWM,
1152 saa->boardcfg[14] +
1153 (saa->boardcfg[13]<<8), 2);
1154 } else
1155 debiwrite(saa, debNormal, XILINX_PWM,
1156 0x46, 2);
1157 if (HaveCS3310) {
1158 i = CS3310MaxLvl;
1159 debiwrite(saa, debNormal,
1160 XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
1162 printk(KERN_INFO
1163 "stradis%d: IBM MPEGCD%d Initialized\n",
1164 saa->nr, 18 + (debiread(saa, debNormal,
1165 IBM_MP2_CHIP_CONTROL, 2) >> 12));
1166 /* start video decoder */
1167 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
1168 ChipControl, 2);
1169 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD,
1170 0x4037, 2); /* 256k vid, 3520 bytes aud */
1171 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
1172 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
1173 /* enable buffer threshold irq */
1174 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
1175 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
1176 /* enable gpio irq */
1177 saawrite(0x00002000, SAA7146_GPIO_CTRL);
1178 /* enable decoder output to HPS */
1179 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
1180 saa->boardcfg[0] = 37;
1183 return 0;
1186 static u32 palette2fmt[] =
1187 { /* some of these YUV translations are wrong */
1188 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
1189 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
1190 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
1192 static int bpp2fmt[4] =
1194 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
1195 VIDEO_PALETTE_RGB32
1198 /* I wish I could find a formula to calculate these... */
1199 static u32 h_prescale[64] =
1201 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
1202 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
1203 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
1204 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
1205 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
1206 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
1207 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
1208 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
1209 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
1210 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
1211 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
1213 static u32 v_gain[64] =
1215 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
1216 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
1217 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
1218 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1219 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1220 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1221 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1222 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1223 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1224 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1225 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
1229 static void saa7146_set_winsize(struct saa7146 *saa)
1231 u32 format;
1232 int offset, yacl, ysci;
1233 saa->win.color_fmt = format =
1234 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
1235 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
1236 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
1237 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
1238 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
1239 saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
1240 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
1241 SAA7146_PROT_ADDR1);
1242 saawrite(0, SAA7146_PAGE1);
1243 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1244 offset = (704 / (saa->win.width - 1)) & 0x3f;
1245 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
1246 offset = (720896 / saa->win.width) / (offset + 1);
1247 saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE);
1248 if (CurrentMode == VIDEO_MODE_NTSC) {
1249 yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0;
1250 ysci = 1024 - (saa->win.height * 1024 / 480);
1251 } else {
1252 yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0;
1253 ysci = 1024 - (saa->win.height * 1024 / 576);
1255 saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE);
1256 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
1257 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
1258 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
1259 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H),
1260 SAA7146_MC2);
1263 /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
1264 * bitmap is fixed width, 128 bytes (1024 pixels represented)
1265 * arranged most-sigificant-bit-left in 32-bit words
1266 * based on saa7146 clipping hardware, it swaps bytes if LE
1267 * much of this makes up for egcs brain damage -- so if you
1268 * are wondering "why did he do this?" it is because the C
1269 * was adjusted to generate the optimal asm output without
1270 * writing non-portable __asm__ directives.
1273 static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
1275 register int startword, endword;
1276 register u32 bitsleft, bitsright;
1277 u32 *temp;
1278 if (x < 0) {
1279 w += x;
1280 x = 0;
1282 if (y < 0) {
1283 h += y;
1284 y = 0;
1286 if (w <= 0 || h <= 0 || x > 1023 || y > 639)
1287 return; /* throw away bad clips */
1288 if (x + w > 1024)
1289 w = 1024 - x;
1290 if (y + h > 640)
1291 h = 640 - y;
1292 startword = (x >> 5);
1293 endword = ((x + w) >> 5);
1294 bitsleft = (0xffffffff >> (x & 31));
1295 bitsright = (0xffffffff << (~((x + w) - (endword<<5))));
1296 temp = &clipmap[(y<<5) + startword];
1297 w = endword - startword;
1298 if (!w) {
1299 bitsleft |= bitsright;
1300 for (y = 0; y < h; y++) {
1301 *temp |= bitsleft;
1302 temp += 32;
1304 } else {
1305 for (y = 0; y < h; y++) {
1306 *temp++ |= bitsleft;
1307 for (x = 1; x < w; x++)
1308 *temp++ = 0xffffffff;
1309 *temp |= bitsright;
1310 temp += (32 - w);
1315 static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
1317 int i, width, height;
1318 u32 *clipmap;
1320 clipmap = saa->dmavid2;
1321 if((width=saa->win.width)>1023)
1322 width = 1023; /* sanity check */
1323 if((height=saa->win.height)>640)
1324 height = 639; /* sanity check */
1325 if (ncr > 0) { /* rectangles pased */
1326 /* convert rectangular clips to a bitmap */
1327 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
1328 for (i = 0; i < ncr; i++)
1329 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
1330 cr[i].width, cr[i].height);
1332 /* clip against viewing window AND screen
1333 so we do not have to rely on the user program
1335 clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ?
1336 (saa->win.swidth-saa->win.x) : width, 0, 1024, 768);
1337 clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ?
1338 (saa->win.sheight-saa->win.y) : height,1024,768);
1339 if (saa->win.x<0)
1340 clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768);
1341 if (saa->win.y<0)
1342 clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y));
1345 static int saa_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
1347 struct saa7146 *saa = (struct saa7146 *) dev;
1348 switch (cmd) {
1349 case VIDIOCGCAP:
1351 struct video_capability b;
1352 strcpy(b.name, saa->video_dev.name);
1353 b.type = VID_TYPE_CAPTURE |
1354 VID_TYPE_OVERLAY |
1355 VID_TYPE_CLIPPING |
1356 VID_TYPE_FRAMERAM |
1357 VID_TYPE_SCALES;
1358 b.channels = 1;
1359 b.audios = 1;
1360 b.maxwidth = 768;
1361 b.maxheight = 576;
1362 b.minwidth = 32;
1363 b.minheight = 32;
1364 if (copy_to_user(arg, &b, sizeof(b)))
1365 return -EFAULT;
1366 return 0;
1368 case VIDIOCGPICT:
1370 struct video_picture p = saa->picture;
1371 if (saa->win.depth == 8)
1372 p.palette = VIDEO_PALETTE_HI240;
1373 if (saa->win.depth == 15)
1374 p.palette = VIDEO_PALETTE_RGB555;
1375 if (saa->win.depth == 16)
1376 p.palette = VIDEO_PALETTE_RGB565;
1377 if (saa->win.depth == 24)
1378 p.palette = VIDEO_PALETTE_RGB24;
1379 if (saa->win.depth == 32)
1380 p.palette = VIDEO_PALETTE_RGB32;
1381 if (copy_to_user(arg, &p, sizeof(p)))
1382 return -EFAULT;
1383 return 0;
1385 case VIDIOCSPICT:
1387 struct video_picture p;
1388 u32 format;
1389 if (copy_from_user(&p, arg, sizeof(p)))
1390 return -EFAULT;
1391 if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
1392 format = palette2fmt[p.palette];
1393 saa->win.color_fmt = format;
1394 saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
1396 saawrite(((p.brightness & 0xff00) << 16) |
1397 ((p.contrast & 0xfe00) << 7) |
1398 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
1399 saa->picture = p;
1400 /* upload changed registers */
1401 saawrite(((SAA7146_MC2_UPLD_HPS_H |
1402 SAA7146_MC2_UPLD_HPS_V) << 16) |
1403 SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V,
1404 SAA7146_MC2);
1405 return 0;
1407 case VIDIOCSWIN:
1409 struct video_window vw;
1410 struct video_clip *vcp = NULL;
1412 if (copy_from_user(&vw, arg, sizeof(vw)))
1413 return -EFAULT;
1415 if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */
1416 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1417 return -EINVAL;
1419 if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */
1420 int i = vw.x;
1421 vw.x = (vw.x + 3) & ~3;
1422 i = vw.x - i;
1423 vw.width -= i;
1425 saa->win.x = vw.x;
1426 saa->win.y = vw.y;
1427 saa->win.width = vw.width;
1428 if (saa->win.width > 768)
1429 saa->win.width = 768;
1430 saa->win.height = vw.height;
1431 if (CurrentMode == VIDEO_MODE_NTSC) {
1432 if (saa->win.height > 480)
1433 saa->win.height = 480;
1434 } else {
1435 if (saa->win.height > 576)
1436 saa->win.height = 576;
1439 /* stop capture */
1440 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
1441 saa7146_set_winsize(saa);
1444 * Do any clips.
1446 if (vw.clipcount < 0) {
1447 if (copy_from_user(saa->dmavid2, vw.clips,
1448 VIDEO_CLIPMAP_SIZE))
1449 return -EFAULT;
1450 } else if (vw.clipcount > 0) {
1451 if ((vcp = vmalloc(sizeof(struct video_clip) *
1452 (vw.clipcount))) == NULL)
1453 return -ENOMEM;
1454 if (copy_from_user(vcp, vw.clips,
1455 sizeof(struct video_clip) *
1456 vw.clipcount)) {
1457 vfree(vcp);
1458 return -EFAULT;
1460 } else /* nothing clipped */
1461 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
1462 make_clip_tab(saa, vcp, vw.clipcount);
1463 if (vw.clipcount > 0)
1464 vfree(vcp);
1466 /* start capture & clip dma if we have an address */
1467 if ((saa->cap & 3) && saa->win.vidadr != 0)
1468 saawrite(((SAA7146_MC1_TR_E_1 |
1469 SAA7146_MC1_TR_E_2) << 16) | 0xffff,
1470 SAA7146_MC1);
1471 return 0;
1473 case VIDIOCGWIN:
1475 struct video_window vw;
1476 vw.x = saa->win.x;
1477 vw.y = saa->win.y;
1478 vw.width = saa->win.width;
1479 vw.height = saa->win.height;
1480 vw.chromakey = 0;
1481 vw.flags = 0;
1482 if (copy_to_user(arg, &vw, sizeof(vw)))
1483 return -EFAULT;
1484 return 0;
1486 case VIDIOCCAPTURE:
1488 int v;
1489 if (copy_from_user(&v, arg, sizeof(v)))
1490 return -EFAULT;
1491 if (v == 0) {
1492 saa->cap &= ~1;
1493 saawrite((SAA7146_MC1_TR_E_1 << 16),
1494 SAA7146_MC1);
1495 } else {
1496 if (saa->win.vidadr == 0 || saa->win.width == 0
1497 || saa->win.height == 0)
1498 return -EINVAL;
1499 saa->cap |= 1;
1500 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
1501 SAA7146_MC1);
1503 return 0;
1505 case VIDIOCGFBUF:
1507 struct video_buffer v;
1508 v.base = (void *) saa->win.vidadr;
1509 v.height = saa->win.sheight;
1510 v.width = saa->win.swidth;
1511 v.depth = saa->win.depth;
1512 v.bytesperline = saa->win.bpl;
1513 if (copy_to_user(arg, &v, sizeof(v)))
1514 return -EFAULT;
1515 return 0;
1518 case VIDIOCSFBUF:
1520 struct video_buffer v;
1521 if (!capable(CAP_SYS_ADMIN))
1522 return -EPERM;
1523 if (copy_from_user(&v, arg, sizeof(v)))
1524 return -EFAULT;
1525 if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
1526 v.depth != 24 && v.depth != 32 && v.width > 16 &&
1527 v.height > 16 && v.bytesperline > 16)
1528 return -EINVAL;
1529 if (v.base)
1530 saa->win.vidadr = (unsigned long) v.base;
1531 saa->win.sheight = v.height;
1532 saa->win.swidth = v.width;
1533 saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
1534 saa->win.depth = v.depth;
1535 saa->win.bpl = v.bytesperline;
1537 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n",
1538 v.base, v.width, v.height, saa->win.bpp, saa->win.bpl));
1539 saa7146_set_winsize(saa);
1540 return 0;
1542 case VIDIOCKEY:
1544 /* Will be handled higher up .. */
1545 return 0;
1548 case VIDIOCGAUDIO:
1550 struct video_audio v;
1551 v = saa->audio_dev;
1552 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
1553 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
1554 strcpy(v.name, "MPEG");
1555 v.mode = VIDEO_SOUND_STEREO;
1556 if (copy_to_user(arg, &v, sizeof(v)))
1557 return -EFAULT;
1558 return 0;
1560 case VIDIOCSAUDIO:
1562 struct video_audio v;
1563 int i;
1564 if (copy_from_user(&v, arg, sizeof(v)))
1565 return -EFAULT;
1566 i = (~(v.volume>>8))&0xff;
1567 if (!HaveCS4341) {
1568 if (v.flags & VIDEO_AUDIO_MUTE) {
1569 debiwrite(saa, debNormal,
1570 IBM_MP2_FRNT_ATTEN,
1571 0xffff, 2);
1573 if (!(v.flags & VIDEO_AUDIO_MUTE))
1574 debiwrite(saa, debNormal,
1575 IBM_MP2_FRNT_ATTEN,
1576 0x0000, 2);
1577 if (v.flags & VIDEO_AUDIO_VOLUME)
1578 debiwrite(saa, debNormal,
1579 IBM_MP2_FRNT_ATTEN,
1580 (i<<8)|i, 2);
1581 } else {
1582 if (v.flags & VIDEO_AUDIO_MUTE)
1583 cs4341_setlevel(saa, 0xff, 0xff);
1584 if (!(v.flags & VIDEO_AUDIO_MUTE))
1585 cs4341_setlevel(saa, 0, 0);
1586 if (v.flags & VIDEO_AUDIO_VOLUME)
1587 cs4341_setlevel(saa, i, i);
1589 saa->audio_dev = v;
1590 return 0;
1593 case VIDIOCGUNIT:
1595 struct video_unit vu;
1596 vu.video = saa->video_dev.minor;
1597 vu.vbi = VIDEO_NO_UNIT;
1598 vu.radio = VIDEO_NO_UNIT;
1599 vu.audio = VIDEO_NO_UNIT;
1600 vu.teletext = VIDEO_NO_UNIT;
1601 if (copy_to_user((void *) arg, (void *) &vu, sizeof(vu)))
1602 return -EFAULT;
1603 return 0;
1605 case VIDIOCSPLAYMODE:
1607 struct video_play_mode pmode;
1608 if (copy_from_user((void *) &pmode, arg,
1609 sizeof(struct video_play_mode)))
1610 return -EFAULT;
1611 switch (pmode.mode) {
1612 case VID_PLAY_VID_OUT_MODE:
1613 if (pmode.p1 != VIDEO_MODE_NTSC &&
1614 pmode.p1 != VIDEO_MODE_PAL)
1615 return -EINVAL;
1616 set_out_format(saa, pmode.p1);
1617 return 0;
1618 case VID_PLAY_GENLOCK:
1619 debiwrite(saa, debNormal,
1620 XILINX_CTL0,
1621 (pmode.p1 ? 0x8000 : 0x8080),
1623 if (NewCard)
1624 set_genlock_offset(saa,
1625 pmode.p2);
1626 return 0;
1627 case VID_PLAY_NORMAL:
1628 debiwrite(saa, debNormal,
1629 IBM_MP2_CHIP_CONTROL,
1630 ChipControl, 2);
1631 ibm_send_command(saa,
1632 IBM_MP2_PLAY, 0, 0);
1633 saa->playmode = pmode.mode;
1634 return 0;
1635 case VID_PLAY_PAUSE:
1636 /* IBM removed the PAUSE command */
1637 /* they say use SINGLE_FRAME now */
1638 case VID_PLAY_SINGLE_FRAME:
1639 ibm_send_command(saa,
1640 IBM_MP2_SINGLE_FRAME,
1641 0, 0);
1642 if (saa->playmode == pmode.mode) {
1643 debiwrite(saa, debNormal,
1644 IBM_MP2_CHIP_CONTROL,
1645 ChipControl, 2);
1647 saa->playmode = pmode.mode;
1648 return 0;
1649 case VID_PLAY_FAST_FORWARD:
1650 ibm_send_command(saa,
1651 IBM_MP2_FAST_FORWARD, 0, 0);
1652 saa->playmode = pmode.mode;
1653 return 0;
1654 case VID_PLAY_SLOW_MOTION:
1655 ibm_send_command(saa,
1656 IBM_MP2_SLOW_MOTION,
1657 pmode.p1, 0);
1658 saa->playmode = pmode.mode;
1659 return 0;
1660 case VID_PLAY_IMMEDIATE_NORMAL:
1661 /* ensure transfers resume */
1662 debiwrite(saa, debNormal,
1663 IBM_MP2_CHIP_CONTROL,
1664 ChipControl, 2);
1665 ibm_send_command(saa,
1666 IBM_MP2_IMED_NORM_PLAY, 0, 0);
1667 saa->playmode = VID_PLAY_NORMAL;
1668 return 0;
1669 case VID_PLAY_SWITCH_CHANNELS:
1670 saa->audhead = saa->audtail = 0;
1671 saa->vidhead = saa->vidtail = 0;
1672 ibm_send_command(saa,
1673 IBM_MP2_FREEZE_FRAME, 0, 1);
1674 ibm_send_command(saa,
1675 IBM_MP2_RESET_AUD_RATE, 0, 1);
1676 debiwrite(saa, debNormal,
1677 IBM_MP2_CHIP_CONTROL, 0, 2);
1678 ibm_send_command(saa,
1679 IBM_MP2_CHANNEL_SWITCH, 0, 1);
1680 debiwrite(saa, debNormal,
1681 IBM_MP2_CHIP_CONTROL,
1682 ChipControl, 2);
1683 ibm_send_command(saa,
1684 IBM_MP2_PLAY, 0, 0);
1685 saa->playmode = VID_PLAY_NORMAL;
1686 return 0;
1687 case VID_PLAY_FREEZE_FRAME:
1688 ibm_send_command(saa,
1689 IBM_MP2_FREEZE_FRAME, 0, 0);
1690 saa->playmode = pmode.mode;
1691 return 0;
1692 case VID_PLAY_STILL_MODE:
1693 ibm_send_command(saa,
1694 IBM_MP2_SET_STILL_MODE, 0, 0);
1695 saa->playmode = pmode.mode;
1696 return 0;
1697 case VID_PLAY_MASTER_MODE:
1698 if (pmode.p1 == VID_PLAY_MASTER_NONE)
1699 saa->boardcfg[1] = 0x13;
1700 else if (pmode.p1 ==
1701 VID_PLAY_MASTER_VIDEO)
1702 saa->boardcfg[1] = 0x23;
1703 else if (pmode.p1 ==
1704 VID_PLAY_MASTER_AUDIO)
1705 saa->boardcfg[1] = 0x43;
1706 else
1707 return -EINVAL;
1708 debiwrite(saa, debNormal,
1709 IBM_MP2_CHIP_CONTROL,
1710 ChipControl, 2);
1711 return 0;
1712 case VID_PLAY_ACTIVE_SCANLINES:
1713 if (CurrentMode == VIDEO_MODE_PAL) {
1714 if (pmode.p1 < 1 ||
1715 pmode.p2 > 625)
1716 return -EINVAL;
1717 saa->boardcfg[5] = pmode.p1;
1718 saa->boardcfg[55] = (pmode.p1 +
1719 (pmode.p2/2) - 1) &
1720 0xff;
1721 } else {
1722 if (pmode.p1 < 4 ||
1723 pmode.p2 > 525)
1724 return -EINVAL;
1725 saa->boardcfg[4] = pmode.p1;
1726 saa->boardcfg[54] = (pmode.p1 +
1727 (pmode.p2/2) - 4) &
1728 0xff;
1730 set_out_format(saa, CurrentMode);
1731 case VID_PLAY_RESET:
1732 return do_ibm_reset(saa);
1733 case VID_PLAY_END_MARK:
1734 if (saa->endmarktail <
1735 saa->endmarkhead) {
1736 if (saa->endmarkhead -
1737 saa->endmarktail < 2)
1738 return -ENOSPC;
1739 } else if (saa->endmarkhead <=
1740 saa->endmarktail) {
1741 if (saa->endmarktail -
1742 saa->endmarkhead >
1743 (MAX_MARKS - 2))
1744 return -ENOSPC;
1745 } else
1746 return -ENOSPC;
1747 saa->endmark[saa->endmarktail] =
1748 saa->audtail;
1749 saa->endmarktail++;
1750 if (saa->endmarktail >= MAX_MARKS)
1751 saa->endmarktail = 0;
1753 return -EINVAL;
1755 case VIDIOCSWRITEMODE:
1757 int mode;
1758 if (copy_from_user((void *) &mode, arg, sizeof(int)))
1759 return -EFAULT;
1760 if (mode == VID_WRITE_MPEG_AUD ||
1761 mode == VID_WRITE_MPEG_VID ||
1762 mode == VID_WRITE_CC ||
1763 mode == VID_WRITE_TTX ||
1764 mode == VID_WRITE_OSD) {
1765 saa->writemode = mode;
1766 return 0;
1768 return -EINVAL;
1770 case VIDIOCSMICROCODE:
1772 struct video_code ucode;
1773 __u8 *udata;
1774 int i;
1775 if (copy_from_user((void *) &ucode, arg,
1776 sizeof(ucode)))
1777 return -EFAULT;
1778 if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
1779 strncmp(ucode.loadwhat, "dec", 3))
1780 return -EINVAL;
1781 if ((udata = vmalloc(ucode.datasize)) == NULL)
1782 return -ENOMEM;
1783 if (copy_from_user((void *) udata, ucode.data,
1784 ucode.datasize)) {
1785 vfree(udata);
1786 return -EFAULT;
1788 ucode.data = udata;
1789 if (!strncmp(ucode.loadwhat, "decoder.aud", 11)
1790 || !strncmp(ucode.loadwhat, "decoder.vid", 11))
1791 i = initialize_ibmmpeg2(&ucode);
1792 else
1793 i = initialize_fpga(&ucode);
1794 vfree(udata);
1795 if (i)
1796 return -EINVAL;
1797 return 0;
1800 case VIDIOCGCHAN: /* this makes xawtv happy */
1802 struct video_channel v;
1803 if (copy_from_user(&v, arg, sizeof(v)))
1804 return -EFAULT;
1805 v.flags = VIDEO_VC_AUDIO;
1806 v.tuners = 0;
1807 v.type = VID_TYPE_MPEG_DECODER;
1808 v.norm = CurrentMode;
1809 strcpy(v.name, "MPEG2");
1810 if (copy_to_user(arg, &v, sizeof(v)))
1811 return -EFAULT;
1812 return 0;
1814 case VIDIOCSCHAN: /* this makes xawtv happy */
1816 struct video_channel v;
1817 if (copy_from_user(&v, arg, sizeof(v)))
1818 return -EFAULT;
1819 /* do nothing */
1820 return 0;
1822 default:
1823 return -ENOIOCTLCMD;
1825 return 0;
1828 static int saa_init_done(struct video_device *dev)
1830 return 0;
1833 static int saa_mmap(struct video_device *dev, const char *adr,
1834 unsigned long size)
1836 struct saa7146 *saa = (struct saa7146 *) dev;
1837 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
1838 return -EINVAL;
1841 static long saa_read(struct video_device *dev, char *buf,
1842 unsigned long count, int nonblock)
1844 return -EINVAL;
1847 static long saa_write(struct video_device *dev, const char *buf,
1848 unsigned long count, int nonblock)
1850 struct saa7146 *saa = (struct saa7146 *) dev;
1851 unsigned long todo = count;
1852 int blocksize, split;
1853 unsigned long flags;
1855 while (todo > 0) {
1856 if (saa->writemode == VID_WRITE_MPEG_AUD) {
1857 spin_lock_irqsave(&saa->lock, flags);
1858 if (saa->audhead <= saa->audtail)
1859 blocksize = 65536-(saa->audtail - saa->audhead);
1860 else
1861 blocksize = saa->audhead - saa->audtail;
1862 spin_unlock_irqrestore(&saa->lock, flags);
1863 if (blocksize < 16384) {
1864 saawrite(SAA7146_PSR_DEBI_S |
1865 SAA7146_PSR_PIN1, SAA7146_IER);
1866 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1867 /* wait for buffer space to open */
1868 interruptible_sleep_on(&saa->audq);
1870 spin_lock_irqsave(&saa->lock, flags);
1871 if (saa->audhead <= saa->audtail) {
1872 blocksize = 65536-(saa->audtail - saa->audhead);
1873 split = 65536 - saa->audtail;
1874 } else {
1875 blocksize = saa->audhead - saa->audtail;
1876 split = 65536;
1878 spin_unlock_irqrestore(&saa->lock, flags);
1879 blocksize--;
1880 if (blocksize > todo)
1881 blocksize = todo;
1882 /* double check that we really have space */
1883 if (!blocksize)
1884 return -ENOSPC;
1885 if (split < blocksize) {
1886 if (copy_from_user(saa->audbuf +
1887 saa->audtail, buf, split))
1888 return -EFAULT;
1889 buf += split;
1890 todo -= split;
1891 blocksize -= split;
1892 saa->audtail = 0;
1894 if (copy_from_user(saa->audbuf + saa->audtail, buf,
1895 blocksize))
1896 return -EFAULT;
1897 saa->audtail += blocksize;
1898 todo -= blocksize;
1899 buf += blocksize;
1900 saa->audtail &= 0xffff;
1901 } else if (saa->writemode == VID_WRITE_MPEG_VID) {
1902 spin_lock_irqsave(&saa->lock, flags);
1903 if (saa->vidhead <= saa->vidtail)
1904 blocksize=524288-(saa->vidtail - saa->vidhead);
1905 else
1906 blocksize = saa->vidhead - saa->vidtail;
1907 spin_unlock_irqrestore(&saa->lock, flags);
1908 if (blocksize < 65536) {
1909 saawrite(SAA7146_PSR_DEBI_S |
1910 SAA7146_PSR_PIN1, SAA7146_IER);
1911 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1912 /* wait for buffer space to open */
1913 interruptible_sleep_on(&saa->vidq);
1915 spin_lock_irqsave(&saa->lock, flags);
1916 if (saa->vidhead <= saa->vidtail) {
1917 blocksize=524288-(saa->vidtail - saa->vidhead);
1918 split = 524288 - saa->vidtail;
1919 } else {
1920 blocksize = saa->vidhead - saa->vidtail;
1921 split = 524288;
1923 spin_unlock_irqrestore(&saa->lock, flags);
1924 blocksize--;
1925 if (blocksize > todo)
1926 blocksize = todo;
1927 /* double check that we really have space */
1928 if (!blocksize)
1929 return -ENOSPC;
1930 if (split < blocksize) {
1931 if (copy_from_user(saa->vidbuf +
1932 saa->vidtail, buf, split))
1933 return -EFAULT;
1934 buf += split;
1935 todo -= split;
1936 blocksize -= split;
1937 saa->vidtail = 0;
1939 if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
1940 blocksize))
1941 return -EFAULT;
1942 saa->vidtail += blocksize;
1943 todo -= blocksize;
1944 buf += blocksize;
1945 saa->vidtail &= 0x7ffff;
1946 } else if (saa->writemode == VID_WRITE_OSD) {
1947 if (count > 131072)
1948 return -ENOSPC;
1949 if (copy_from_user(saa->osdbuf, buf, count))
1950 return -EFAULT;
1951 buf += count;
1952 saa->osdhead = 0;
1953 saa->osdtail = count;
1954 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
1955 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
1956 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
1957 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
1958 debiread(saa, debNormal,
1959 IBM_MP2_DISP_MODE, 2) | 1, 2);
1960 /* trigger osd data transfer */
1961 saawrite(SAA7146_PSR_DEBI_S |
1962 SAA7146_PSR_PIN1, SAA7146_IER);
1963 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
1966 return count;
1969 static int saa_open(struct video_device *dev, int flags)
1971 struct saa7146 *saa = (struct saa7146 *) dev;
1973 saa->video_dev.busy = 0;
1974 saa->user++;
1975 if (saa->user > 1)
1976 return 0; /* device open already, don't reset */
1977 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
1978 return 0;
1981 static void saa_close(struct video_device *dev)
1983 struct saa7146 *saa = (struct saa7146 *) dev;
1984 saa->user--;
1985 saa->video_dev.busy = 0;
1986 if (saa->user > 0) /* still someone using device */
1987 return;
1988 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
1991 /* template for video_device-structure */
1992 static struct video_device saa_template =
1994 "SAA7146A",
1995 VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
1996 VID_HARDWARE_SAA7146,
1997 saa_open,
1998 saa_close,
1999 saa_read,
2000 saa_write,
2001 NULL, /* poll */
2002 saa_ioctl,
2003 saa_mmap,
2004 saa_init_done,
2005 NULL,
2010 static int configure_saa7146(struct pci_dev *dev, int num)
2012 int result;
2013 struct saa7146 *saa;
2015 saa = &saa7146s[num];
2017 saa->endmarkhead = saa->endmarktail = 0;
2018 saa->win.x = saa->win.y = 0;
2019 saa->win.width = saa->win.cropwidth = 720;
2020 saa->win.height = saa->win.cropheight = 480;
2021 saa->win.cropx = saa->win.cropy = 0;
2022 saa->win.bpp = 2;
2023 saa->win.depth = 16;
2024 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
2025 saa->win.bpl = 1024 * saa->win.bpp;
2026 saa->win.swidth = 1024;
2027 saa->win.sheight = 768;
2028 saa->picture.brightness = 32768;
2029 saa->picture.contrast = 38768;
2030 saa->picture.colour = 32768;
2031 saa->cap = 0;
2032 saa->dev = dev;
2033 saa->nr = num;
2034 saa->playmode = VID_PLAY_NORMAL;
2035 memset(saa->boardcfg, 0, 64); /* clear board config area */
2036 saa->saa7146_mem = NULL;
2037 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
2038 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
2039 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
2040 saa->pagea1out = saa->pagea2in = saa->pagea2out =
2041 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
2042 saa->pageRPS2 = NULL;
2043 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
2044 saa->audhead = saa->vidtail = 0;
2046 init_waitqueue_head(&saa->i2cq);
2047 init_waitqueue_head(&saa->audq);
2048 init_waitqueue_head(&saa->debiq);
2049 init_waitqueue_head(&saa->vidq);
2050 spin_lock_init(&saa->lock);
2052 saa->id = dev->device;
2053 saa->irq = dev->irq;
2054 saa->video_dev.minor = -1;
2055 saa->saa7146_adr = dev->resource[0].start;
2056 pci_read_config_byte(dev, PCI_CLASS_REVISION, &saa->revision);
2057 saa->saa7146_mem = ioremap(((saa->saa7146_adr) &
2058 PCI_BASE_ADDRESS_MEM_MASK), 0x200);
2059 memcpy(&(saa->i2c), &saa7146_i2c_bus_template, sizeof(struct i2c_bus));
2060 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
2061 sprintf(saa->i2c.name, "stradis%d", num);
2062 saa->i2c.data = saa;
2063 saawrite(0, SAA7146_IER); /* turn off all interrupts */
2064 result = request_irq(saa->irq, saa7146_irq,
2065 SA_SHIRQ | SA_INTERRUPT, "stradis", (void *) saa);
2066 if (result == -EINVAL)
2067 printk(KERN_ERR "stradis%d: Bad irq number or handler\n",
2068 num);
2069 if (result == -EBUSY)
2070 printk(KERN_ERR "stradis%d: IRQ %ld busy, change your PnP"
2071 " config in BIOS\n", num, saa->irq);
2072 if (result < 0)
2073 return result;
2074 pci_set_master(dev);
2075 if (video_register_device(&saa->video_dev, VFL_TYPE_GRABBER) < 0)
2076 return -1;
2077 #if 0
2078 /* i2c generic interface is currently BROKEN */
2079 i2c_register_bus(&saa->i2c);
2080 #endif
2081 return 0;
2084 static int init_saa7146(int i)
2086 struct saa7146 *saa = &saa7146s[i];
2088 saa->user = 0;
2089 /* reset the saa7146 */
2090 saawrite(0xffff0000, SAA7146_MC1);
2091 mdelay(5);
2092 /* enable debi and i2c transfers and pins */
2093 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
2094 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
2095 /* ensure proper state of chip */
2096 saawrite(0x00000000, SAA7146_PAGE1);
2097 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
2098 saawrite(0x00000000, SAA7146_PAGE2);
2099 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
2100 saawrite(0x00000000, SAA7146_DD1_INIT);
2101 saawrite(0x00000000, SAA7146_DD1_STREAM_B);
2102 saawrite(0x00000000, SAA7146_DD1_STREAM_A);
2103 saawrite(0x00000000, SAA7146_BRS_CTRL);
2104 saawrite(0x80400040, SAA7146_BCS_CTRL);
2105 saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL);
2106 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
2107 saawrite(0x00000000, SAA7146_ACON1);
2108 saawrite(0x00000000, SAA7146_ACON2);
2109 saawrite(0x00000600, SAA7146_I2C_STATUS);
2110 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
2111 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
2112 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
2113 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
2114 SAA7146_MC2);
2115 /* setup arbitration control registers */
2116 saawrite(0x1412121a, SAA7146_PCI_BT_V1);
2118 /* allocate 32k dma buffer + 4k for page table */
2119 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
2120 printk(KERN_ERR "stradis%d: debi kmalloc failed\n", i);
2121 return -1;
2123 #if 0
2124 saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
2125 saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
2126 for (i = 0; i < 12; i++) /* setup mmu page table */
2127 saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
2128 #endif
2129 saa->audhead = saa->vidhead = saa->osdhead = 0;
2130 saa->audtail = saa->vidtail = saa->osdtail = 0;
2131 if (saa->vidbuf == NULL)
2132 if ((saa->vidbuf = vmalloc(524288)) == NULL) {
2133 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2134 return -ENOMEM;
2136 if (saa->audbuf == NULL)
2137 if ((saa->audbuf = vmalloc(65536)) == NULL) {
2138 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2139 vfree(saa->vidbuf);
2140 saa->vidbuf = NULL;
2141 return -ENOMEM;
2143 if (saa->osdbuf == NULL)
2144 if ((saa->osdbuf = vmalloc(131072)) == NULL) {
2145 printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
2146 vfree(saa->vidbuf);
2147 vfree(saa->audbuf);
2148 saa->vidbuf = saa->audbuf = NULL;
2149 return -ENOMEM;
2151 /* allocate 81920 byte buffer for clipping */
2152 if ((saa->dmavid2 = kmalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
2153 printk(KERN_ERR "stradis%d: clip kmalloc failed\n", saa->nr);
2154 vfree(saa->vidbuf);
2155 vfree(saa->audbuf);
2156 vfree(saa->osdbuf);
2157 saa->vidbuf = saa->audbuf = saa->osdbuf = NULL;
2158 saa->dmavid2 = NULL;
2159 return -1;
2161 memset(saa->dmavid2, 0x00, VIDEO_CLIPMAP_SIZE); /* clip everything */
2162 /* setup clipping registers */
2163 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
2164 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
2165 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
2166 SAA7146_PROT_ADDR2);
2167 saawrite(256, SAA7146_PITCH2);
2168 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
2169 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
2170 SAA7146_MC2);
2171 I2CBusScan(&(saa->i2c));
2172 return 0;
2175 static void release_saa(void)
2177 u8 command;
2178 int i;
2179 struct saa7146 *saa;
2181 for (i = 0; i < saa_num; i++) {
2182 saa = &saa7146s[i];
2184 /* turn off all capturing, DMA and IRQs */
2185 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
2186 saawrite(0, SAA7146_MC2);
2187 saawrite(0, SAA7146_IER);
2188 saawrite(0xffffffffUL, SAA7146_ISR);
2189 #if 0
2190 /* unregister i2c_bus */
2191 i2c_unregister_bus((&saa->i2c));
2192 #endif
2194 /* disable PCI bus-mastering */
2195 pci_read_config_byte(saa->dev, PCI_COMMAND, &command);
2196 /* Should this be &=~ ?? */
2197 command &= ~PCI_COMMAND_MASTER;
2198 pci_write_config_byte(saa->dev, PCI_COMMAND, command);
2199 /* unmap and free memory */
2200 saa->audhead = saa->audtail = saa->osdhead = 0;
2201 saa->vidhead = saa->vidtail = saa->osdtail = 0;
2202 if (saa->vidbuf)
2203 vfree(saa->vidbuf);
2204 if (saa->audbuf)
2205 vfree(saa->audbuf);
2206 if (saa->osdbuf)
2207 vfree(saa->osdbuf);
2208 if (saa->dmavid2)
2209 kfree((void *) saa->dmavid2);
2210 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
2211 saa->dmavid2 = NULL;
2212 if (saa->dmadebi)
2213 kfree((void *) saa->dmadebi);
2214 if (saa->dmavid1)
2215 kfree((void *) saa->dmavid1);
2216 if (saa->dmavid2)
2217 kfree((void *) saa->dmavid2);
2218 if (saa->dmavid3)
2219 kfree((void *) saa->dmavid3);
2220 if (saa->dmaa1in)
2221 kfree((void *) saa->dmaa1in);
2222 if (saa->dmaa1out)
2223 kfree((void *) saa->dmaa1out);
2224 if (saa->dmaa2in)
2225 kfree((void *) saa->dmaa2in);
2226 if (saa->dmaa2out)
2227 kfree((void *) saa->dmaa2out);
2228 if (saa->dmaRPS1)
2229 kfree((void *) saa->dmaRPS1);
2230 if (saa->dmaRPS2)
2231 kfree((void *) saa->dmaRPS2);
2232 free_irq(saa->irq, saa);
2233 if (saa->saa7146_mem)
2234 iounmap(saa->saa7146_mem);
2235 if (saa->video_dev.minor != -1)
2236 video_unregister_device(&saa->video_dev);
2241 static int __init stradis_init (void)
2243 struct pci_dev *dev = NULL;
2244 int result = 0, i;
2246 saa_num = 0;
2248 while ((dev = pci_find_device(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, dev))) {
2249 if (!dev->subsystem_vendor)
2250 printk(KERN_INFO "stradis%d: rev1 decoder\n", saa_num);
2251 else
2252 printk(KERN_INFO "stradis%d: SDM2xx found\n", saa_num);
2253 result = configure_saa7146(dev, saa_num++);
2254 if (result)
2255 return result;
2257 if (saa_num)
2258 printk(KERN_INFO "stradis: %d card(s) found.\n", saa_num);
2259 else
2260 return -EINVAL;
2261 for (i = 0; i < saa_num; i++)
2262 if (init_saa7146(i) < 0) {
2263 release_saa();
2264 return -EIO;
2266 return 0;
2270 static void __exit stradis_exit (void)
2272 release_saa();
2273 printk(KERN_INFO "stradis: module cleanup complete\n");
2277 module_init(stradis_init);
2278 module_exit(stradis_exit);